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sys/dev/ic/rt2560.c
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1 /* $NetBSD: rt2560.c,v 1.19 2008/04/08 12:07:27 cegger Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini@free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.19 2008/04/08 12:07:27 cegger Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/callout.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <sys/bus.h> 43 #include <machine/endian.h> 44 #include <sys/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 #include <net/if_ether.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_rssadapt.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/ic/rt2560reg.h> 66 #include <dev/ic/rt2560var.h> 67 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcivar.h> 70 #include <dev/pci/pcidevs.h> 71 72 #ifdef RAL_DEBUG 73 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 74 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 75 int rt2560_debug = 0; 76 #else 77 #define DPRINTF(x) 78 #define DPRINTFN(n, x) 79 #endif 80 81 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 82 struct rt2560_tx_ring *, int); 83 static void rt2560_reset_tx_ring(struct rt2560_softc *, 84 struct rt2560_tx_ring *); 85 static void rt2560_free_tx_ring(struct rt2560_softc *, 86 struct rt2560_tx_ring *); 87 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 88 struct rt2560_rx_ring *, int); 89 static void rt2560_reset_rx_ring(struct rt2560_softc *, 90 struct rt2560_rx_ring *); 91 static void rt2560_free_rx_ring(struct rt2560_softc *, 92 struct rt2560_rx_ring *); 93 static struct ieee80211_node * 94 rt2560_node_alloc(struct ieee80211_node_table *); 95 static int rt2560_media_change(struct ifnet *); 96 static void rt2560_next_scan(void *); 97 static void rt2560_iter_func(void *, struct ieee80211_node *); 98 static void rt2560_update_rssadapt(void *); 99 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 100 int); 101 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 102 static void rt2560_encryption_intr(struct rt2560_softc *); 103 static void rt2560_tx_intr(struct rt2560_softc *); 104 static void rt2560_prio_intr(struct rt2560_softc *); 105 static void rt2560_decryption_intr(struct rt2560_softc *); 106 static void rt2560_rx_intr(struct rt2560_softc *); 107 static void rt2560_beacon_expire(struct rt2560_softc *); 108 static void rt2560_wakeup_expire(struct rt2560_softc *); 109 #if NBPFILTER > 0 110 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 111 #endif 112 static int rt2560_ack_rate(struct ieee80211com *, int); 113 static uint16_t rt2560_txtime(int, int, uint32_t); 114 static uint8_t rt2560_plcp_signal(int); 115 static void rt2560_setup_tx_desc(struct rt2560_softc *, 116 struct rt2560_tx_desc *, uint32_t, int, int, int, 117 bus_addr_t); 118 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 119 struct ieee80211_node *); 120 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 121 struct ieee80211_node *); 122 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 123 struct ieee80211_frame *, uint16_t); 124 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 125 struct ieee80211_node *); 126 static void rt2560_start(struct ifnet *); 127 static void rt2560_watchdog(struct ifnet *); 128 static int rt2560_reset(struct ifnet *); 129 static int rt2560_ioctl(struct ifnet *, u_long, void *); 130 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 131 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 132 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 133 static void rt2560_set_chan(struct rt2560_softc *, 134 struct ieee80211_channel *); 135 static void rt2560_disable_rf_tune(struct rt2560_softc *); 136 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 137 static void rt2560_update_plcp(struct rt2560_softc *); 138 static void rt2560_update_slot(struct ifnet *); 139 static void rt2560_set_basicrates(struct rt2560_softc *); 140 static void rt2560_update_led(struct rt2560_softc *, int, int); 141 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 142 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 143 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 144 static void rt2560_update_promisc(struct rt2560_softc *); 145 static void rt2560_set_txantenna(struct rt2560_softc *, int); 146 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 147 static const char *rt2560_get_rf(int); 148 static void rt2560_read_eeprom(struct rt2560_softc *); 149 static int rt2560_bbp_init(struct rt2560_softc *); 150 static int rt2560_init(struct ifnet *); 151 static void rt2560_stop(struct ifnet *, int); 152 153 /* 154 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 155 */ 156 static const struct ieee80211_rateset rt2560_rateset_11a = 157 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 158 159 static const struct ieee80211_rateset rt2560_rateset_11b = 160 { 4, { 2, 4, 11, 22 } }; 161 162 static const struct ieee80211_rateset rt2560_rateset_11g = 163 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 164 165 /* 166 * Default values for MAC registers; values taken from the reference driver. 167 */ 168 static const struct { 169 uint32_t reg; 170 uint32_t val; 171 } rt2560_def_mac[] = { 172 { RT2560_PSCSR0, 0x00020002 }, 173 { RT2560_PSCSR1, 0x00000002 }, 174 { RT2560_PSCSR2, 0x00020002 }, 175 { RT2560_PSCSR3, 0x00000002 }, 176 { RT2560_TIMECSR, 0x00003f21 }, 177 { RT2560_CSR9, 0x00000780 }, 178 { RT2560_CSR11, 0x07041483 }, 179 { RT2560_CNT3, 0x00000000 }, 180 { RT2560_TXCSR1, 0x07614562 }, 181 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 182 { RT2560_ACKPCTCSR, 0x7038140a }, 183 { RT2560_ARTCSR1, 0x1d21252d }, 184 { RT2560_ARTCSR2, 0x1919191d }, 185 { RT2560_RXCSR0, 0xffffffff }, 186 { RT2560_RXCSR3, 0xb3aab3af }, 187 { RT2560_PCICSR, 0x000003b8 }, 188 { RT2560_PWRCSR0, 0x3f3b3100 }, 189 { RT2560_GPIOCSR, 0x0000ff00 }, 190 { RT2560_TESTCSR, 0x000000f0 }, 191 { RT2560_PWRCSR1, 0x000001ff }, 192 { RT2560_MACCSR0, 0x00213223 }, 193 { RT2560_MACCSR1, 0x00235518 }, 194 { RT2560_RLPWCSR, 0x00000040 }, 195 { RT2560_RALINKCSR, 0x9a009a11 }, 196 { RT2560_CSR7, 0xffffffff }, 197 { RT2560_BBPCSR1, 0x82188200 }, 198 { RT2560_TXACKCSR0, 0x00000020 }, 199 { RT2560_SECCSR3, 0x0000e78f } 200 }; 201 202 /* 203 * Default values for BBP registers; values taken from the reference driver. 204 */ 205 static const struct { 206 uint8_t reg; 207 uint8_t val; 208 } rt2560_def_bbp[] = { 209 { 3, 0x02 }, 210 { 4, 0x19 }, 211 { 14, 0x1c }, 212 { 15, 0x30 }, 213 { 16, 0xac }, 214 { 17, 0x48 }, 215 { 18, 0x18 }, 216 { 19, 0xff }, 217 { 20, 0x1e }, 218 { 21, 0x08 }, 219 { 22, 0x08 }, 220 { 23, 0x08 }, 221 { 24, 0x80 }, 222 { 25, 0x50 }, 223 { 26, 0x08 }, 224 { 27, 0x23 }, 225 { 30, 0x10 }, 226 { 31, 0x2b }, 227 { 32, 0xb9 }, 228 { 34, 0x12 }, 229 { 35, 0x50 }, 230 { 39, 0xc4 }, 231 { 40, 0x02 }, 232 { 41, 0x60 }, 233 { 53, 0x10 }, 234 { 54, 0x18 }, 235 { 56, 0x08 }, 236 { 57, 0x10 }, 237 { 58, 0x08 }, 238 { 61, 0x60 }, 239 { 62, 0x10 }, 240 { 75, 0xff } 241 }; 242 243 /* 244 * Default values for RF register R2 indexed by channel numbers; values taken 245 * from the reference driver. 246 */ 247 static const uint32_t rt2560_rf2522_r2[] = { 248 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 249 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 250 }; 251 252 static const uint32_t rt2560_rf2523_r2[] = { 253 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 254 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 255 }; 256 257 static const uint32_t rt2560_rf2524_r2[] = { 258 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 259 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 260 }; 261 262 static const uint32_t rt2560_rf2525_r2[] = { 263 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 264 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 265 }; 266 267 static const uint32_t rt2560_rf2525_hi_r2[] = { 268 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 269 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 270 }; 271 272 static const uint32_t rt2560_rf2525e_r2[] = { 273 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 274 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 275 }; 276 277 static const uint32_t rt2560_rf2526_hi_r2[] = { 278 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 279 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 280 }; 281 282 static const uint32_t rt2560_rf2526_r2[] = { 283 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 284 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 285 }; 286 287 /* 288 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 289 * values taken from the reference driver. 290 */ 291 static const struct { 292 uint8_t chan; 293 uint32_t r1; 294 uint32_t r2; 295 uint32_t r4; 296 } rt2560_rf5222[] = { 297 { 1, 0x08808, 0x0044d, 0x00282 }, 298 { 2, 0x08808, 0x0044e, 0x00282 }, 299 { 3, 0x08808, 0x0044f, 0x00282 }, 300 { 4, 0x08808, 0x00460, 0x00282 }, 301 { 5, 0x08808, 0x00461, 0x00282 }, 302 { 6, 0x08808, 0x00462, 0x00282 }, 303 { 7, 0x08808, 0x00463, 0x00282 }, 304 { 8, 0x08808, 0x00464, 0x00282 }, 305 { 9, 0x08808, 0x00465, 0x00282 }, 306 { 10, 0x08808, 0x00466, 0x00282 }, 307 { 11, 0x08808, 0x00467, 0x00282 }, 308 { 12, 0x08808, 0x00468, 0x00282 }, 309 { 13, 0x08808, 0x00469, 0x00282 }, 310 { 14, 0x08808, 0x0046b, 0x00286 }, 311 312 { 36, 0x08804, 0x06225, 0x00287 }, 313 { 40, 0x08804, 0x06226, 0x00287 }, 314 { 44, 0x08804, 0x06227, 0x00287 }, 315 { 48, 0x08804, 0x06228, 0x00287 }, 316 { 52, 0x08804, 0x06229, 0x00287 }, 317 { 56, 0x08804, 0x0622a, 0x00287 }, 318 { 60, 0x08804, 0x0622b, 0x00287 }, 319 { 64, 0x08804, 0x0622c, 0x00287 }, 320 321 { 100, 0x08804, 0x02200, 0x00283 }, 322 { 104, 0x08804, 0x02201, 0x00283 }, 323 { 108, 0x08804, 0x02202, 0x00283 }, 324 { 112, 0x08804, 0x02203, 0x00283 }, 325 { 116, 0x08804, 0x02204, 0x00283 }, 326 { 120, 0x08804, 0x02205, 0x00283 }, 327 { 124, 0x08804, 0x02206, 0x00283 }, 328 { 128, 0x08804, 0x02207, 0x00283 }, 329 { 132, 0x08804, 0x02208, 0x00283 }, 330 { 136, 0x08804, 0x02209, 0x00283 }, 331 { 140, 0x08804, 0x0220a, 0x00283 }, 332 333 { 149, 0x08808, 0x02429, 0x00281 }, 334 { 153, 0x08808, 0x0242b, 0x00281 }, 335 { 157, 0x08808, 0x0242d, 0x00281 }, 336 { 161, 0x08808, 0x0242f, 0x00281 } 337 }; 338 339 int 340 rt2560_attach(void *xsc, int id) 341 { 342 struct rt2560_softc *sc = xsc; 343 struct ieee80211com *ic = &sc->sc_ic; 344 struct ifnet *ifp = &sc->sc_if; 345 int error, i; 346 347 callout_init(&sc->scan_ch, 0); 348 callout_init(&sc->rssadapt_ch, 0); 349 350 /* retrieve RT2560 rev. no */ 351 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 352 353 /* retrieve MAC address */ 354 rt2560_get_macaddr(sc, ic->ic_myaddr); 355 356 aprint_normal_dev(&sc->sc_dev, "802.11 address %s\n", 357 ether_sprintf(ic->ic_myaddr)); 358 359 /* retrieve RF rev. no and various other things from EEPROM */ 360 rt2560_read_eeprom(sc); 361 362 aprint_normal_dev(&sc->sc_dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 363 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 364 365 /* 366 * Allocate Tx and Rx rings. 367 */ 368 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 369 if (error != 0) { 370 aprint_error_dev(&sc->sc_dev, "could not allocate Tx ring\n)"); 371 goto fail1; 372 } 373 374 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 375 if (error != 0) { 376 aprint_error_dev(&sc->sc_dev, "could not allocate ATIM ring\n"); 377 goto fail2; 378 } 379 380 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 381 if (error != 0) { 382 aprint_error_dev(&sc->sc_dev, "could not allocate Prio ring\n"); 383 goto fail3; 384 } 385 386 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 387 if (error != 0) { 388 aprint_error_dev(&sc->sc_dev, "could not allocate Beacon ring\n"); 389 goto fail4; 390 } 391 392 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 393 if (error != 0) { 394 aprint_error_dev(&sc->sc_dev, "could not allocate Rx ring\n"); 395 goto fail5; 396 } 397 398 ifp->if_softc = sc; 399 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 400 ifp->if_init = rt2560_init; 401 ifp->if_stop = rt2560_stop; 402 ifp->if_ioctl = rt2560_ioctl; 403 ifp->if_start = rt2560_start; 404 ifp->if_watchdog = rt2560_watchdog; 405 IFQ_SET_READY(&ifp->if_snd); 406 memcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ); 407 408 ic->ic_ifp = ifp; 409 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 410 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 411 ic->ic_state = IEEE80211_S_INIT; 412 413 /* set device capabilities */ 414 ic->ic_caps = 415 IEEE80211_C_IBSS | /* IBSS mode supported */ 416 IEEE80211_C_MONITOR | /* monitor mode supported */ 417 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 418 IEEE80211_C_TXPMGT | /* tx power management */ 419 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 420 IEEE80211_C_SHSLOT | /* short slot time supported */ 421 IEEE80211_C_WPA; /* 802.11i */ 422 423 if (sc->rf_rev == RT2560_RF_5222) { 424 /* set supported .11a rates */ 425 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 426 427 /* set supported .11a channels */ 428 for (i = 36; i <= 64; i += 4) { 429 ic->ic_channels[i].ic_freq = 430 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 431 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 432 } 433 for (i = 100; i <= 140; i += 4) { 434 ic->ic_channels[i].ic_freq = 435 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 436 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 437 } 438 for (i = 149; i <= 161; i += 4) { 439 ic->ic_channels[i].ic_freq = 440 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 441 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 442 } 443 } 444 445 /* set supported .11b and .11g rates */ 446 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 447 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 448 449 /* set supported .11b and .11g channels (1 through 14) */ 450 for (i = 1; i <= 14; i++) { 451 ic->ic_channels[i].ic_freq = 452 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 453 ic->ic_channels[i].ic_flags = 454 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 455 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 456 } 457 458 if_attach(ifp); 459 ieee80211_ifattach(ic); 460 ic->ic_node_alloc = rt2560_node_alloc; 461 ic->ic_updateslot = rt2560_update_slot; 462 ic->ic_reset = rt2560_reset; 463 464 /* override state transition machine */ 465 sc->sc_newstate = ic->ic_newstate; 466 ic->ic_newstate = rt2560_newstate; 467 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 468 469 #if NBPFILTER > 0 470 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 471 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 472 #endif 473 474 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 475 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 476 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 477 478 sc->sc_txtap_len = sizeof sc->sc_txtapu; 479 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 480 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 481 482 483 sc->dwelltime = 200; 484 485 ieee80211_announce(ic); 486 487 if (!pmf_device_register(&sc->sc_dev, NULL, NULL)) 488 aprint_error_dev(&sc->sc_dev, "couldn't establish power handler\n"); 489 else 490 pmf_class_network_register(&sc->sc_dev, ifp); 491 492 return 0; 493 494 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 495 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 496 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 497 fail2: rt2560_free_tx_ring(sc, &sc->txq); 498 fail1: 499 return ENXIO; 500 } 501 502 503 int 504 rt2560_detach(void *xsc) 505 { 506 struct rt2560_softc *sc = xsc; 507 struct ifnet *ifp = &sc->sc_if; 508 509 callout_stop(&sc->scan_ch); 510 callout_stop(&sc->rssadapt_ch); 511 512 pmf_device_deregister(&sc->sc_dev); 513 514 rt2560_stop(ifp, 1); 515 516 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 517 if_detach(ifp); 518 519 rt2560_free_tx_ring(sc, &sc->txq); 520 rt2560_free_tx_ring(sc, &sc->atimq); 521 rt2560_free_tx_ring(sc, &sc->prioq); 522 rt2560_free_tx_ring(sc, &sc->bcnq); 523 rt2560_free_rx_ring(sc, &sc->rxq); 524 525 return 0; 526 } 527 528 int 529 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 530 int count) 531 { 532 int i, nsegs, error; 533 534 ring->count = count; 535 ring->queued = 0; 536 ring->cur = ring->next = 0; 537 ring->cur_encrypt = ring->next_encrypt = 0; 538 539 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 540 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 541 if (error != 0) { 542 aprint_error_dev(&sc->sc_dev, "could not create desc DMA map\n"); 543 goto fail; 544 } 545 546 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 547 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 548 if (error != 0) { 549 aprint_error_dev(&sc->sc_dev, "could not allocate DMA memory\n"); 550 goto fail; 551 } 552 553 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 554 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc, 555 BUS_DMA_NOWAIT); 556 if (error != 0) { 557 aprint_error_dev(&sc->sc_dev, "could not map desc DMA memory\n"); 558 goto fail; 559 } 560 561 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 562 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 563 if (error != 0) { 564 aprint_error_dev(&sc->sc_dev, "could not load desc DMA map\n"); 565 goto fail; 566 } 567 568 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 569 ring->physaddr = ring->map->dm_segs->ds_addr; 570 571 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 572 M_NOWAIT); 573 if (ring->data == NULL) { 574 aprint_error_dev(&sc->sc_dev, "could not allocate soft data\n"); 575 error = ENOMEM; 576 goto fail; 577 } 578 579 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 580 for (i = 0; i < count; i++) { 581 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 582 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 583 &ring->data[i].map); 584 if (error != 0) { 585 aprint_error_dev(&sc->sc_dev, "could not create DMA map\n"); 586 goto fail; 587 } 588 } 589 590 return 0; 591 592 fail: rt2560_free_tx_ring(sc, ring); 593 return error; 594 } 595 596 void 597 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 598 { 599 struct rt2560_tx_desc *desc; 600 struct rt2560_tx_data *data; 601 int i; 602 603 for (i = 0; i < ring->count; i++) { 604 desc = &ring->desc[i]; 605 data = &ring->data[i]; 606 607 if (data->m != NULL) { 608 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 609 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 610 bus_dmamap_unload(sc->sc_dmat, data->map); 611 m_freem(data->m); 612 data->m = NULL; 613 } 614 615 if (data->ni != NULL) { 616 ieee80211_free_node(data->ni); 617 data->ni = NULL; 618 } 619 620 desc->flags = 0; 621 } 622 623 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 624 BUS_DMASYNC_PREWRITE); 625 626 ring->queued = 0; 627 ring->cur = ring->next = 0; 628 ring->cur_encrypt = ring->next_encrypt = 0; 629 } 630 631 void 632 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 633 { 634 struct rt2560_tx_data *data; 635 int i; 636 637 if (ring->desc != NULL) { 638 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 639 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 640 bus_dmamap_unload(sc->sc_dmat, ring->map); 641 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 642 ring->count * RT2560_TX_DESC_SIZE); 643 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 644 } 645 646 if (ring->data != NULL) { 647 for (i = 0; i < ring->count; i++) { 648 data = &ring->data[i]; 649 650 if (data->m != NULL) { 651 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 652 data->map->dm_mapsize, 653 BUS_DMASYNC_POSTWRITE); 654 bus_dmamap_unload(sc->sc_dmat, data->map); 655 m_freem(data->m); 656 } 657 658 if (data->ni != NULL) 659 ieee80211_free_node(data->ni); 660 661 662 if (data->map != NULL) 663 bus_dmamap_destroy(sc->sc_dmat, data->map); 664 } 665 free(ring->data, M_DEVBUF); 666 } 667 } 668 669 int 670 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 671 int count) 672 { 673 struct rt2560_rx_desc *desc; 674 struct rt2560_rx_data *data; 675 int i, nsegs, error; 676 677 ring->count = count; 678 ring->cur = ring->next = 0; 679 ring->cur_decrypt = 0; 680 681 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 682 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 683 if (error != 0) { 684 aprint_error_dev(&sc->sc_dev, "could not create desc DMA map\n"); 685 goto fail; 686 } 687 688 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 689 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 690 if (error != 0) { 691 aprint_error_dev(&sc->sc_dev, "could not allocate DMA memory\n"); 692 goto fail; 693 } 694 695 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 696 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc, 697 BUS_DMA_NOWAIT); 698 if (error != 0) { 699 aprint_error_dev(&sc->sc_dev, "could not map desc DMA memory\n"); 700 goto fail; 701 } 702 703 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 704 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 705 if (error != 0) { 706 aprint_error_dev(&sc->sc_dev, "could not load desc DMA map\n"); 707 goto fail; 708 } 709 710 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 711 ring->physaddr = ring->map->dm_segs->ds_addr; 712 713 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 714 M_NOWAIT); 715 if (ring->data == NULL) { 716 aprint_error_dev(&sc->sc_dev, "could not allocate soft data\n"); 717 error = ENOMEM; 718 goto fail; 719 } 720 721 /* 722 * Pre-allocate Rx buffers and populate Rx ring. 723 */ 724 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 725 for (i = 0; i < count; i++) { 726 desc = &sc->rxq.desc[i]; 727 data = &sc->rxq.data[i]; 728 729 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 730 0, BUS_DMA_NOWAIT, &data->map); 731 if (error != 0) { 732 aprint_error_dev(&sc->sc_dev, "could not create DMA map\n"); 733 goto fail; 734 } 735 736 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 737 if (data->m == NULL) { 738 aprint_error_dev(&sc->sc_dev, "could not allocate rx mbuf\n"); 739 error = ENOMEM; 740 goto fail; 741 } 742 743 MCLGET(data->m, M_DONTWAIT); 744 if (!(data->m->m_flags & M_EXT)) { 745 aprint_error_dev(&sc->sc_dev, "could not allocate rx mbuf cluster\n"); 746 error = ENOMEM; 747 goto fail; 748 } 749 750 error = bus_dmamap_load(sc->sc_dmat, data->map, 751 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 752 if (error != 0) { 753 aprint_error_dev(&sc->sc_dev, "could not load rx buf DMA map"); 754 goto fail; 755 } 756 757 desc->flags = htole32(RT2560_RX_BUSY); 758 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 759 } 760 761 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 762 BUS_DMASYNC_PREWRITE); 763 764 return 0; 765 766 fail: rt2560_free_rx_ring(sc, ring); 767 return error; 768 } 769 770 void 771 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 772 { 773 int i; 774 775 for (i = 0; i < ring->count; i++) { 776 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 777 ring->data[i].drop = 0; 778 } 779 780 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 781 BUS_DMASYNC_PREWRITE); 782 783 ring->cur = ring->next = 0; 784 ring->cur_decrypt = 0; 785 } 786 787 void 788 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 789 { 790 struct rt2560_rx_data *data; 791 int i; 792 793 if (ring->desc != NULL) { 794 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 795 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 796 bus_dmamap_unload(sc->sc_dmat, ring->map); 797 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 798 ring->count * RT2560_RX_DESC_SIZE); 799 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 800 } 801 802 if (ring->data != NULL) { 803 for (i = 0; i < ring->count; i++) { 804 data = &ring->data[i]; 805 806 if (data->m != NULL) { 807 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 808 data->map->dm_mapsize, 809 BUS_DMASYNC_POSTREAD); 810 bus_dmamap_unload(sc->sc_dmat, data->map); 811 m_freem(data->m); 812 } 813 814 if (data->map != NULL) 815 bus_dmamap_destroy(sc->sc_dmat, data->map); 816 } 817 free(ring->data, M_DEVBUF); 818 } 819 } 820 821 struct ieee80211_node * 822 rt2560_node_alloc(struct ieee80211_node_table *nt) 823 { 824 struct rt2560_node *rn; 825 826 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 827 M_NOWAIT | M_ZERO); 828 829 return (rn != NULL) ? &rn->ni : NULL; 830 } 831 832 int 833 rt2560_media_change(struct ifnet *ifp) 834 { 835 int error; 836 837 error = ieee80211_media_change(ifp); 838 if (error != ENETRESET) 839 return error; 840 841 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 842 rt2560_init(ifp); 843 844 return 0; 845 } 846 847 /* 848 * This function is called periodically (every 200ms) during scanning to 849 * switch from one channel to another. 850 */ 851 void 852 rt2560_next_scan(void *arg) 853 { 854 struct rt2560_softc *sc = arg; 855 struct ieee80211com *ic = &sc->sc_ic; 856 857 if (ic->ic_state == IEEE80211_S_SCAN) 858 ieee80211_next_scan(ic); 859 } 860 861 /* 862 * This function is called for each neighbor node. 863 */ 864 void 865 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 866 { 867 struct rt2560_node *rn = (struct rt2560_node *)ni; 868 869 ieee80211_rssadapt_updatestats(&rn->rssadapt); 870 } 871 872 /* 873 * This function is called periodically (every 100ms) in RUN state to update 874 * the rate adaptation statistics. 875 */ 876 void 877 rt2560_update_rssadapt(void *arg) 878 { 879 struct rt2560_softc *sc = arg; 880 struct ieee80211com *ic = &sc->sc_ic; 881 882 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 883 884 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 885 } 886 887 int 888 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 889 { 890 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 891 enum ieee80211_state ostate; 892 struct ieee80211_node *ni; 893 struct mbuf *m; 894 int error = 0; 895 896 ostate = ic->ic_state; 897 callout_stop(&sc->scan_ch); 898 899 switch (nstate) { 900 case IEEE80211_S_INIT: 901 callout_stop(&sc->rssadapt_ch); 902 903 if (ostate == IEEE80211_S_RUN) { 904 /* abort TSF synchronization */ 905 RAL_WRITE(sc, RT2560_CSR14, 0); 906 907 /* turn association led off */ 908 rt2560_update_led(sc, 0, 0); 909 } 910 break; 911 912 case IEEE80211_S_SCAN: 913 rt2560_set_chan(sc, ic->ic_curchan); 914 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 915 rt2560_next_scan, sc); 916 break; 917 918 case IEEE80211_S_AUTH: 919 rt2560_set_chan(sc, ic->ic_curchan); 920 break; 921 922 case IEEE80211_S_ASSOC: 923 rt2560_set_chan(sc, ic->ic_curchan); 924 break; 925 926 case IEEE80211_S_RUN: 927 rt2560_set_chan(sc, ic->ic_curchan); 928 929 ni = ic->ic_bss; 930 931 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 932 rt2560_update_plcp(sc); 933 rt2560_set_basicrates(sc); 934 rt2560_set_bssid(sc, ni->ni_bssid); 935 } 936 937 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 938 ic->ic_opmode == IEEE80211_M_IBSS) { 939 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 940 if (m == NULL) { 941 aprint_error_dev(&sc->sc_dev, "could not allocate beacon\n"); 942 error = ENOBUFS; 943 break; 944 } 945 946 ieee80211_ref_node(ni); 947 error = rt2560_tx_bcn(sc, m, ni); 948 if (error != 0) 949 break; 950 } 951 952 /* turn assocation led on */ 953 rt2560_update_led(sc, 1, 0); 954 955 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 956 callout_reset(&sc->rssadapt_ch, hz / 10, 957 rt2560_update_rssadapt, sc); 958 rt2560_enable_tsf_sync(sc); 959 } 960 break; 961 } 962 963 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 964 } 965 966 /* 967 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 968 * 93C66). 969 */ 970 uint16_t 971 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 972 { 973 uint32_t tmp; 974 uint16_t val; 975 int n; 976 977 /* clock C once before the first command */ 978 RT2560_EEPROM_CTL(sc, 0); 979 980 RT2560_EEPROM_CTL(sc, RT2560_S); 981 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 982 RT2560_EEPROM_CTL(sc, RT2560_S); 983 984 /* write start bit (1) */ 985 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 986 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 987 988 /* write READ opcode (10) */ 989 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 990 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 991 RT2560_EEPROM_CTL(sc, RT2560_S); 992 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 993 994 /* write address (A5-A0 or A7-A0) */ 995 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 996 for (; n >= 0; n--) { 997 RT2560_EEPROM_CTL(sc, RT2560_S | 998 (((addr >> n) & 1) << RT2560_SHIFT_D)); 999 RT2560_EEPROM_CTL(sc, RT2560_S | 1000 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1001 } 1002 1003 RT2560_EEPROM_CTL(sc, RT2560_S); 1004 1005 /* read data Q15-Q0 */ 1006 val = 0; 1007 for (n = 15; n >= 0; n--) { 1008 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1009 tmp = RAL_READ(sc, RT2560_CSR21); 1010 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1011 RT2560_EEPROM_CTL(sc, RT2560_S); 1012 } 1013 1014 RT2560_EEPROM_CTL(sc, 0); 1015 1016 /* clear Chip Select and clock C */ 1017 RT2560_EEPROM_CTL(sc, RT2560_S); 1018 RT2560_EEPROM_CTL(sc, 0); 1019 RT2560_EEPROM_CTL(sc, RT2560_C); 1020 1021 return val; 1022 } 1023 1024 /* 1025 * Some frames were processed by the hardware cipher engine and are ready for 1026 * transmission. 1027 */ 1028 void 1029 rt2560_encryption_intr(struct rt2560_softc *sc) 1030 { 1031 struct rt2560_tx_desc *desc; 1032 int hw; 1033 1034 /* retrieve last descriptor index processed by cipher engine */ 1035 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1036 RT2560_TX_DESC_SIZE; 1037 1038 for (; sc->txq.next_encrypt != hw;) { 1039 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1040 1041 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1042 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1043 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1044 1045 if (le32toh(desc->flags) & 1046 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1047 break; 1048 1049 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1050 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1051 RT2560_TX_CIPHER_TKIP) 1052 desc->eiv = bswap32(desc->eiv); 1053 1054 /* mark the frame ready for transmission */ 1055 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1056 1057 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1058 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1059 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1060 1061 DPRINTFN(15, ("encryption done idx=%u\n", 1062 sc->txq.next_encrypt)); 1063 1064 sc->txq.next_encrypt = 1065 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1066 } 1067 1068 /* kick Tx */ 1069 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1070 } 1071 1072 void 1073 rt2560_tx_intr(struct rt2560_softc *sc) 1074 { 1075 struct ieee80211com *ic = &sc->sc_ic; 1076 struct ifnet *ifp = ic->ic_ifp; 1077 struct rt2560_tx_desc *desc; 1078 struct rt2560_tx_data *data; 1079 struct rt2560_node *rn; 1080 1081 for (;;) { 1082 desc = &sc->txq.desc[sc->txq.next]; 1083 data = &sc->txq.data[sc->txq.next]; 1084 1085 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1086 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1087 BUS_DMASYNC_POSTREAD); 1088 1089 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1090 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1091 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1092 break; 1093 1094 rn = (struct rt2560_node *)data->ni; 1095 1096 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1097 case RT2560_TX_SUCCESS: 1098 DPRINTFN(10, ("data frame sent successfully\n")); 1099 if (data->id.id_node != NULL) { 1100 ieee80211_rssadapt_raise_rate(ic, 1101 &rn->rssadapt, &data->id); 1102 } 1103 ifp->if_opackets++; 1104 break; 1105 1106 case RT2560_TX_SUCCESS_RETRY: 1107 DPRINTFN(9, ("data frame sent after %u retries\n", 1108 (le32toh(desc->flags) >> 5) & 0x7)); 1109 ifp->if_opackets++; 1110 break; 1111 1112 case RT2560_TX_FAIL_RETRY: 1113 DPRINTFN(9, ("sending data frame failed (too much " 1114 "retries)\n")); 1115 if (data->id.id_node != NULL) { 1116 ieee80211_rssadapt_lower_rate(ic, data->ni, 1117 &rn->rssadapt, &data->id); 1118 } 1119 ifp->if_oerrors++; 1120 break; 1121 1122 case RT2560_TX_FAIL_INVALID: 1123 case RT2560_TX_FAIL_OTHER: 1124 default: 1125 aprint_error_dev(&sc->sc_dev, "sending data frame failed 0x%08x\n", 1126 le32toh(desc->flags)); 1127 ifp->if_oerrors++; 1128 } 1129 1130 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1131 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1132 bus_dmamap_unload(sc->sc_dmat, data->map); 1133 m_freem(data->m); 1134 data->m = NULL; 1135 ieee80211_free_node(data->ni); 1136 data->ni = NULL; 1137 1138 /* descriptor is no longer valid */ 1139 desc->flags &= ~htole32(RT2560_TX_VALID); 1140 1141 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1142 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1143 BUS_DMASYNC_PREWRITE); 1144 1145 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1146 1147 sc->txq.queued--; 1148 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1149 } 1150 1151 sc->sc_tx_timer = 0; 1152 ifp->if_flags &= ~IFF_OACTIVE; 1153 rt2560_start(ifp); 1154 } 1155 1156 void 1157 rt2560_prio_intr(struct rt2560_softc *sc) 1158 { 1159 struct ieee80211com *ic = &sc->sc_ic; 1160 struct ifnet *ifp = ic->ic_ifp; 1161 struct rt2560_tx_desc *desc; 1162 struct rt2560_tx_data *data; 1163 1164 for (;;) { 1165 desc = &sc->prioq.desc[sc->prioq.next]; 1166 data = &sc->prioq.data[sc->prioq.next]; 1167 1168 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1169 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1170 BUS_DMASYNC_POSTREAD); 1171 1172 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1173 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1174 break; 1175 1176 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1177 case RT2560_TX_SUCCESS: 1178 DPRINTFN(10, ("mgt frame sent successfully\n")); 1179 break; 1180 1181 case RT2560_TX_SUCCESS_RETRY: 1182 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1183 (le32toh(desc->flags) >> 5) & 0x7)); 1184 break; 1185 1186 case RT2560_TX_FAIL_RETRY: 1187 DPRINTFN(9, ("sending mgt frame failed (too much " 1188 "retries)\n")); 1189 break; 1190 1191 case RT2560_TX_FAIL_INVALID: 1192 case RT2560_TX_FAIL_OTHER: 1193 default: 1194 aprint_error_dev(&sc->sc_dev, "sending mgt frame failed 0x%08x\n", 1195 le32toh(desc->flags)); 1196 } 1197 1198 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1199 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1200 bus_dmamap_unload(sc->sc_dmat, data->map); 1201 m_freem(data->m); 1202 data->m = NULL; 1203 ieee80211_free_node(data->ni); 1204 data->ni = NULL; 1205 1206 /* descriptor is no longer valid */ 1207 desc->flags &= ~htole32(RT2560_TX_VALID); 1208 1209 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1210 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1211 BUS_DMASYNC_PREWRITE); 1212 1213 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1214 1215 sc->prioq.queued--; 1216 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1217 } 1218 1219 sc->sc_tx_timer = 0; 1220 ifp->if_flags &= ~IFF_OACTIVE; 1221 rt2560_start(ifp); 1222 } 1223 1224 /* 1225 * Some frames were processed by the hardware cipher engine and are ready for 1226 * transmission to the IEEE802.11 layer. 1227 */ 1228 void 1229 rt2560_decryption_intr(struct rt2560_softc *sc) 1230 { 1231 struct ieee80211com *ic = &sc->sc_ic; 1232 struct ifnet *ifp = ic->ic_ifp; 1233 struct rt2560_rx_desc *desc; 1234 struct rt2560_rx_data *data; 1235 struct rt2560_node *rn; 1236 struct ieee80211_frame *wh; 1237 struct ieee80211_node *ni; 1238 struct mbuf *mnew, *m; 1239 int hw, error; 1240 1241 /* retrieve last decriptor index processed by cipher engine */ 1242 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1243 RT2560_RX_DESC_SIZE; 1244 1245 for (; sc->rxq.cur_decrypt != hw;) { 1246 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1247 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1248 1249 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1250 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1251 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1252 1253 if (le32toh(desc->flags) & 1254 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1255 break; 1256 1257 if (data->drop) { 1258 ifp->if_ierrors++; 1259 goto skip; 1260 } 1261 1262 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1263 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1264 ifp->if_ierrors++; 1265 goto skip; 1266 } 1267 1268 /* 1269 * Try to allocate a new mbuf for this ring element and load it 1270 * before processing the current mbuf. If the ring element 1271 * cannot be loaded, drop the received packet and reuse the old 1272 * mbuf. In the unlikely case that the old mbuf can't be 1273 * reloaded either, explicitly panic. 1274 */ 1275 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1276 if (mnew == NULL) { 1277 ifp->if_ierrors++; 1278 goto skip; 1279 } 1280 1281 MCLGET(mnew, M_DONTWAIT); 1282 if (!(mnew->m_flags & M_EXT)) { 1283 m_freem(mnew); 1284 ifp->if_ierrors++; 1285 goto skip; 1286 } 1287 1288 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1289 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1290 bus_dmamap_unload(sc->sc_dmat, data->map); 1291 1292 error = bus_dmamap_load(sc->sc_dmat, data->map, 1293 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1294 if (error != 0) { 1295 m_freem(mnew); 1296 1297 /* try to reload the old mbuf */ 1298 error = bus_dmamap_load(sc->sc_dmat, data->map, 1299 mtod(data->m, void *), MCLBYTES, NULL, 1300 BUS_DMA_NOWAIT); 1301 if (error != 0) { 1302 /* very unlikely that it will fail... */ 1303 panic("%s: could not load old rx mbuf", 1304 device_xname(&sc->sc_dev)); 1305 } 1306 /* physical address may have changed */ 1307 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1308 ifp->if_ierrors++; 1309 goto skip; 1310 } 1311 1312 /* 1313 * New mbuf successfully loaded, update Rx ring and continue 1314 * processing. 1315 */ 1316 m = data->m; 1317 data->m = mnew; 1318 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1319 1320 /* finalize mbuf */ 1321 m->m_pkthdr.rcvif = ifp; 1322 m->m_pkthdr.len = m->m_len = 1323 (le32toh(desc->flags) >> 16) & 0xfff; 1324 1325 #if NBPFILTER > 0 1326 if (sc->sc_drvbpf != NULL) { 1327 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1328 uint32_t tsf_lo, tsf_hi; 1329 1330 /* get timestamp (low and high 32 bits) */ 1331 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1332 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1333 1334 tap->wr_tsf = 1335 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1336 tap->wr_flags = 0; 1337 tap->wr_rate = rt2560_rxrate(desc); 1338 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1339 tap->wr_chan_flags = 1340 htole16(ic->ic_ibss_chan->ic_flags); 1341 tap->wr_antenna = sc->rx_ant; 1342 tap->wr_antsignal = desc->rssi; 1343 1344 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 1345 } 1346 #endif 1347 1348 wh = mtod(m, struct ieee80211_frame *); 1349 ni = ieee80211_find_rxnode(ic, 1350 (struct ieee80211_frame_min *)wh); 1351 1352 /* send the frame to the 802.11 layer */ 1353 ieee80211_input(ic, m, ni, desc->rssi, 0); 1354 1355 /* give rssi to the rate adatation algorithm */ 1356 rn = (struct rt2560_node *)ni; 1357 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1358 1359 /* node is no longer needed */ 1360 ieee80211_free_node(ni); 1361 1362 skip: desc->flags = htole32(RT2560_RX_BUSY); 1363 1364 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1365 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1366 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1367 1368 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1369 1370 sc->rxq.cur_decrypt = 1371 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1372 } 1373 1374 /* 1375 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1376 * without calling if_start(). 1377 */ 1378 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1379 rt2560_start(ifp); 1380 } 1381 1382 /* 1383 * Some frames were received. Pass them to the hardware cipher engine before 1384 * sending them to the 802.11 layer. 1385 */ 1386 void 1387 rt2560_rx_intr(struct rt2560_softc *sc) 1388 { 1389 struct rt2560_rx_desc *desc; 1390 struct rt2560_rx_data *data; 1391 1392 for (;;) { 1393 desc = &sc->rxq.desc[sc->rxq.cur]; 1394 data = &sc->rxq.data[sc->rxq.cur]; 1395 1396 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1397 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1398 BUS_DMASYNC_POSTREAD); 1399 1400 if (le32toh(desc->flags) & 1401 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1402 break; 1403 1404 data->drop = 0; 1405 1406 if (le32toh(desc->flags) & 1407 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1408 /* 1409 * This should not happen since we did not request 1410 * to receive those frames when we filled RXCSR0. 1411 */ 1412 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1413 le32toh(desc->flags))); 1414 data->drop = 1; 1415 } 1416 1417 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1418 DPRINTFN(5, ("bad length\n")); 1419 data->drop = 1; 1420 } 1421 1422 /* mark the frame for decryption */ 1423 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1424 1425 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1426 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1427 BUS_DMASYNC_PREWRITE); 1428 1429 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1430 1431 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1432 } 1433 1434 /* kick decrypt */ 1435 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1436 } 1437 1438 /* 1439 * This function is called periodically in IBSS mode when a new beacon must be 1440 * sent out. 1441 */ 1442 static void 1443 rt2560_beacon_expire(struct rt2560_softc *sc) 1444 { 1445 struct ieee80211com *ic = &sc->sc_ic; 1446 struct rt2560_tx_data *data; 1447 1448 if (ic->ic_opmode != IEEE80211_M_IBSS && 1449 ic->ic_opmode != IEEE80211_M_HOSTAP) 1450 return; 1451 1452 data = &sc->bcnq.data[sc->bcnq.next]; 1453 1454 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1455 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1456 bus_dmamap_unload(sc->sc_dmat, data->map); 1457 1458 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1459 1460 #if NBPFILTER > 0 1461 if (ic->ic_rawbpf != NULL) 1462 bpf_mtap(ic->ic_rawbpf, data->m); 1463 #endif 1464 rt2560_tx_bcn(sc, data->m, data->ni); 1465 1466 DPRINTFN(15, ("beacon expired\n")); 1467 1468 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1469 } 1470 1471 static void 1472 rt2560_wakeup_expire(struct rt2560_softc *sc) 1473 { 1474 DPRINTFN(15, ("wakeup expired\n")); 1475 } 1476 1477 int 1478 rt2560_intr(void *arg) 1479 { 1480 struct rt2560_softc *sc = arg; 1481 struct ifnet *ifp = &sc->sc_if; 1482 uint32_t r; 1483 1484 if (!device_is_active(&sc->sc_dev)) 1485 return 0; 1486 1487 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1488 return 0; /* not for us */ 1489 1490 /* disable interrupts */ 1491 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1492 1493 /* acknowledge interrupts */ 1494 RAL_WRITE(sc, RT2560_CSR7, r); 1495 1496 /* don't re-enable interrupts if we're shutting down */ 1497 if (!(ifp->if_flags & IFF_RUNNING)) 1498 return 0; 1499 1500 if (r & RT2560_BEACON_EXPIRE) 1501 rt2560_beacon_expire(sc); 1502 1503 if (r & RT2560_WAKEUP_EXPIRE) 1504 rt2560_wakeup_expire(sc); 1505 1506 if (r & RT2560_ENCRYPTION_DONE) 1507 rt2560_encryption_intr(sc); 1508 1509 if (r & RT2560_TX_DONE) 1510 rt2560_tx_intr(sc); 1511 1512 if (r & RT2560_PRIO_DONE) 1513 rt2560_prio_intr(sc); 1514 1515 if (r & RT2560_DECRYPTION_DONE) 1516 rt2560_decryption_intr(sc); 1517 1518 if (r & RT2560_RX_DONE) 1519 rt2560_rx_intr(sc); 1520 1521 /* re-enable interrupts */ 1522 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1523 1524 return 1; 1525 } 1526 1527 /* quickly determine if a given rate is CCK or OFDM */ 1528 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1529 1530 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1531 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1532 1533 #define RAL_SIFS 10 /* us */ 1534 1535 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1536 1537 /* 1538 * This function is only used by the Rx radiotap code. It returns the rate at 1539 * which a given frame was received. 1540 */ 1541 #if NBPFILTER > 0 1542 static uint8_t 1543 rt2560_rxrate(struct rt2560_rx_desc *desc) 1544 { 1545 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1546 /* reverse function of rt2560_plcp_signal */ 1547 switch (desc->rate) { 1548 case 0xb: return 12; 1549 case 0xf: return 18; 1550 case 0xa: return 24; 1551 case 0xe: return 36; 1552 case 0x9: return 48; 1553 case 0xd: return 72; 1554 case 0x8: return 96; 1555 case 0xc: return 108; 1556 } 1557 } else { 1558 if (desc->rate == 10) 1559 return 2; 1560 if (desc->rate == 20) 1561 return 4; 1562 if (desc->rate == 55) 1563 return 11; 1564 if (desc->rate == 110) 1565 return 22; 1566 } 1567 return 2; /* should not get there */ 1568 } 1569 #endif 1570 1571 /* 1572 * Return the expected ack rate for a frame transmitted at rate `rate'. 1573 * XXX: this should depend on the destination node basic rate set. 1574 */ 1575 static int 1576 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1577 { 1578 switch (rate) { 1579 /* CCK rates */ 1580 case 2: 1581 return 2; 1582 case 4: 1583 case 11: 1584 case 22: 1585 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1586 1587 /* OFDM rates */ 1588 case 12: 1589 case 18: 1590 return 12; 1591 case 24: 1592 case 36: 1593 return 24; 1594 case 48: 1595 case 72: 1596 case 96: 1597 case 108: 1598 return 48; 1599 } 1600 1601 /* default to 1Mbps */ 1602 return 2; 1603 } 1604 1605 /* 1606 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1607 * The function automatically determines the operating mode depending on the 1608 * given rate. `flags' indicates whether short preamble is in use or not. 1609 */ 1610 static uint16_t 1611 rt2560_txtime(int len, int rate, uint32_t flags) 1612 { 1613 uint16_t txtime; 1614 1615 if (RAL_RATE_IS_OFDM(rate)) { 1616 /* IEEE Std 802.11a-1999, pp. 37 */ 1617 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1618 txtime = 16 + 4 + 4 * txtime + 6; 1619 } else { 1620 /* IEEE Std 802.11b-1999, pp. 28 */ 1621 txtime = (16 * len + rate - 1) / rate; 1622 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1623 txtime += 72 + 24; 1624 else 1625 txtime += 144 + 48; 1626 } 1627 return txtime; 1628 } 1629 1630 static uint8_t 1631 rt2560_plcp_signal(int rate) 1632 { 1633 switch (rate) { 1634 /* CCK rates (returned values are device-dependent) */ 1635 case 2: return 0x0; 1636 case 4: return 0x1; 1637 case 11: return 0x2; 1638 case 22: return 0x3; 1639 1640 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1641 case 12: return 0xb; 1642 case 18: return 0xf; 1643 case 24: return 0xa; 1644 case 36: return 0xe; 1645 case 48: return 0x9; 1646 case 72: return 0xd; 1647 case 96: return 0x8; 1648 case 108: return 0xc; 1649 1650 /* unsupported rates (should not get there) */ 1651 default: return 0xff; 1652 } 1653 } 1654 1655 static void 1656 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1657 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1658 { 1659 struct ieee80211com *ic = &sc->sc_ic; 1660 uint16_t plcp_length; 1661 int remainder; 1662 1663 desc->flags = htole32(flags); 1664 desc->flags |= htole32(len << 16); 1665 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1666 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1667 1668 desc->physaddr = htole32(physaddr); 1669 desc->wme = htole16( 1670 RT2560_AIFSN(2) | 1671 RT2560_LOGCWMIN(3) | 1672 RT2560_LOGCWMAX(8)); 1673 1674 /* setup PLCP fields */ 1675 desc->plcp_signal = rt2560_plcp_signal(rate); 1676 desc->plcp_service = 4; 1677 1678 len += IEEE80211_CRC_LEN; 1679 if (RAL_RATE_IS_OFDM(rate)) { 1680 desc->flags |= htole32(RT2560_TX_OFDM); 1681 1682 plcp_length = len & 0xfff; 1683 desc->plcp_length_hi = plcp_length >> 6; 1684 desc->plcp_length_lo = plcp_length & 0x3f; 1685 } else { 1686 plcp_length = (16 * len + rate - 1) / rate; 1687 if (rate == 22) { 1688 remainder = (16 * len) % 22; 1689 if (remainder != 0 && remainder < 7) 1690 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1691 } 1692 desc->plcp_length_hi = plcp_length >> 8; 1693 desc->plcp_length_lo = plcp_length & 0xff; 1694 1695 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1696 desc->plcp_signal |= 0x08; 1697 } 1698 } 1699 1700 static int 1701 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1702 struct ieee80211_node *ni) 1703 { 1704 struct rt2560_tx_desc *desc; 1705 struct rt2560_tx_data *data; 1706 int rate, error; 1707 1708 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1709 data = &sc->bcnq.data[sc->bcnq.cur]; 1710 1711 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1712 1713 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1714 BUS_DMA_NOWAIT); 1715 if (error != 0) { 1716 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1717 error); 1718 m_freem(m0); 1719 return error; 1720 } 1721 1722 data->m = m0; 1723 data->ni = ni; 1724 1725 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1726 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1727 data->map->dm_segs->ds_addr); 1728 1729 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1730 BUS_DMASYNC_PREWRITE); 1731 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1732 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1733 BUS_DMASYNC_PREWRITE); 1734 1735 return 0; 1736 } 1737 1738 static int 1739 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1740 struct ieee80211_node *ni) 1741 { 1742 struct ieee80211com *ic = &sc->sc_ic; 1743 struct rt2560_tx_desc *desc; 1744 struct rt2560_tx_data *data; 1745 struct ieee80211_frame *wh; 1746 struct ieee80211_key *k; 1747 uint16_t dur; 1748 uint32_t flags = 0; 1749 int rate, error; 1750 1751 desc = &sc->prioq.desc[sc->prioq.cur]; 1752 data = &sc->prioq.data[sc->prioq.cur]; 1753 1754 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1755 1756 wh = mtod(m0, struct ieee80211_frame *); 1757 1758 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1759 k = ieee80211_crypto_encap(ic, ni, m0); 1760 if (k == NULL) { 1761 m_freem(m0); 1762 return ENOBUFS; 1763 } 1764 1765 /* packet header may have moved, reset our local pointer */ 1766 wh = mtod(m0, struct ieee80211_frame *); 1767 } 1768 1769 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1770 BUS_DMA_NOWAIT); 1771 if (error != 0) { 1772 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1773 error); 1774 m_freem(m0); 1775 return error; 1776 } 1777 1778 #if NBPFILTER > 0 1779 if (sc->sc_drvbpf != NULL) { 1780 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1781 1782 tap->wt_flags = 0; 1783 tap->wt_rate = rate; 1784 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1785 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1786 tap->wt_antenna = sc->tx_ant; 1787 1788 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1789 } 1790 #endif 1791 1792 data->m = m0; 1793 data->ni = ni; 1794 1795 wh = mtod(m0, struct ieee80211_frame *); 1796 1797 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1798 flags |= RT2560_TX_ACK; 1799 1800 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1801 RAL_SIFS; 1802 *(uint16_t *)wh->i_dur = htole16(dur); 1803 1804 /* tell hardware to add timestamp for probe responses */ 1805 if ((wh->i_fc[0] & 1806 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1807 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1808 flags |= RT2560_TX_TIMESTAMP; 1809 } 1810 1811 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1812 data->map->dm_segs->ds_addr); 1813 1814 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1815 BUS_DMASYNC_PREWRITE); 1816 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1817 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1818 BUS_DMASYNC_PREWRITE); 1819 1820 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1821 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1822 1823 /* kick prio */ 1824 sc->prioq.queued++; 1825 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1826 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1827 1828 return 0; 1829 } 1830 1831 /* 1832 * Build a RTS control frame. 1833 */ 1834 static struct mbuf * 1835 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1836 uint16_t dur) 1837 { 1838 struct ieee80211_frame_rts *rts; 1839 struct mbuf *m; 1840 1841 MGETHDR(m, M_DONTWAIT, MT_DATA); 1842 if (m == NULL) { 1843 sc->sc_ic.ic_stats.is_tx_nobuf++; 1844 aprint_error_dev(&sc->sc_dev, "could not allocate RTS frame\n"); 1845 return NULL; 1846 } 1847 1848 rts = mtod(m, struct ieee80211_frame_rts *); 1849 1850 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1851 IEEE80211_FC0_SUBTYPE_RTS; 1852 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1853 *(uint16_t *)rts->i_dur = htole16(dur); 1854 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1855 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1856 1857 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1858 1859 return m; 1860 } 1861 1862 static int 1863 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1864 struct ieee80211_node *ni) 1865 { 1866 struct ieee80211com *ic = &sc->sc_ic; 1867 struct rt2560_tx_desc *desc; 1868 struct rt2560_tx_data *data; 1869 struct rt2560_node *rn; 1870 struct ieee80211_rateset *rs; 1871 struct ieee80211_frame *wh; 1872 struct ieee80211_key *k; 1873 struct mbuf *mnew; 1874 uint16_t dur; 1875 uint32_t flags = 0; 1876 int rate, error; 1877 1878 wh = mtod(m0, struct ieee80211_frame *); 1879 1880 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1881 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1882 rate = rs->rs_rates[ic->ic_fixed_rate]; 1883 } else { 1884 rs = &ni->ni_rates; 1885 rn = (struct rt2560_node *)ni; 1886 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1887 wh, m0->m_pkthdr.len, -1, NULL, 0); 1888 rate = rs->rs_rates[ni->ni_txrate]; 1889 } 1890 rate &= IEEE80211_RATE_VAL; 1891 1892 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1893 k = ieee80211_crypto_encap(ic, ni, m0); 1894 if (k == NULL) { 1895 m_freem(m0); 1896 return ENOBUFS; 1897 } 1898 1899 /* packet header may have moved, reset our local pointer */ 1900 wh = mtod(m0, struct ieee80211_frame *); 1901 } 1902 1903 /* 1904 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1905 * for directed frames only when the length of the MPDU is greater 1906 * than the length threshold indicated by [...]" ic_rtsthreshold. 1907 */ 1908 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1909 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1910 struct mbuf *m; 1911 int rtsrate, ackrate; 1912 1913 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1914 ackrate = rt2560_ack_rate(ic, rate); 1915 1916 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1917 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1918 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1919 3 * RAL_SIFS; 1920 1921 m = rt2560_get_rts(sc, wh, dur); 1922 1923 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1924 data = &sc->txq.data[sc->txq.cur_encrypt]; 1925 1926 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1927 BUS_DMA_NOWAIT); 1928 if (error != 0) { 1929 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1930 error); 1931 m_freem(m); 1932 m_freem(m0); 1933 return error; 1934 } 1935 1936 /* avoid multiple free() of the same node for each fragment */ 1937 ieee80211_ref_node(ni); 1938 1939 data->m = m; 1940 data->ni = ni; 1941 1942 /* RTS frames are not taken into account for rssadapt */ 1943 data->id.id_node = NULL; 1944 1945 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1946 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1947 data->map->dm_segs->ds_addr); 1948 1949 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1950 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1951 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1952 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1953 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1954 1955 sc->txq.queued++; 1956 sc->txq.cur_encrypt = 1957 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1958 1959 /* 1960 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1961 * asynchronous data frame shall be transmitted after the CTS 1962 * frame and a SIFS period. 1963 */ 1964 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1965 } 1966 1967 data = &sc->txq.data[sc->txq.cur_encrypt]; 1968 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1969 1970 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1971 BUS_DMA_NOWAIT); 1972 if (error != 0 && error != EFBIG) { 1973 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1974 error); 1975 m_freem(m0); 1976 return error; 1977 } 1978 if (error != 0) { 1979 /* too many fragments, linearize */ 1980 1981 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1982 if (mnew == NULL) { 1983 m_freem(m0); 1984 return ENOMEM; 1985 } 1986 1987 M_COPY_PKTHDR(mnew, m0); 1988 if (m0->m_pkthdr.len > MHLEN) { 1989 MCLGET(mnew, M_DONTWAIT); 1990 if (!(mnew->m_flags & M_EXT)) { 1991 m_freem(m0); 1992 m_freem(mnew); 1993 return ENOMEM; 1994 } 1995 } 1996 1997 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *)); 1998 m_freem(m0); 1999 mnew->m_len = mnew->m_pkthdr.len; 2000 m0 = mnew; 2001 2002 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2003 BUS_DMA_NOWAIT); 2004 if (error != 0) { 2005 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 2006 error); 2007 m_freem(m0); 2008 return error; 2009 } 2010 2011 /* packet header have moved, reset our local pointer */ 2012 wh = mtod(m0, struct ieee80211_frame *); 2013 } 2014 2015 #if NBPFILTER > 0 2016 if (sc->sc_drvbpf != NULL) { 2017 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2018 2019 tap->wt_flags = 0; 2020 tap->wt_rate = rate; 2021 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2022 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2023 tap->wt_antenna = sc->tx_ant; 2024 2025 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 2026 } 2027 #endif 2028 2029 data->m = m0; 2030 data->ni = ni; 2031 2032 /* remember link conditions for rate adaptation algorithm */ 2033 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2034 data->id.id_len = m0->m_pkthdr.len; 2035 data->id.id_rateidx = ni->ni_txrate; 2036 data->id.id_node = ni; 2037 data->id.id_rssi = ni->ni_rssi; 2038 } else 2039 data->id.id_node = NULL; 2040 2041 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2042 flags |= RT2560_TX_ACK; 2043 2044 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2045 ic->ic_flags) + RAL_SIFS; 2046 *(uint16_t *)wh->i_dur = htole16(dur); 2047 } 2048 2049 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2050 data->map->dm_segs->ds_addr); 2051 2052 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2053 BUS_DMASYNC_PREWRITE); 2054 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2055 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2056 BUS_DMASYNC_PREWRITE); 2057 2058 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2059 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2060 2061 /* kick encrypt */ 2062 sc->txq.queued++; 2063 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2064 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2065 2066 return 0; 2067 } 2068 2069 static void 2070 rt2560_start(struct ifnet *ifp) 2071 { 2072 struct rt2560_softc *sc = ifp->if_softc; 2073 struct ieee80211com *ic = &sc->sc_ic; 2074 struct mbuf *m0; 2075 struct ieee80211_node *ni; 2076 struct ether_header *eh; 2077 2078 /* 2079 * net80211 may still try to send management frames even if the 2080 * IFF_RUNNING flag is not set... 2081 */ 2082 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2083 return; 2084 2085 for (;;) { 2086 IF_POLL(&ic->ic_mgtq, m0); 2087 if (m0 != NULL) { 2088 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2089 ifp->if_flags |= IFF_OACTIVE; 2090 break; 2091 } 2092 IF_DEQUEUE(&ic->ic_mgtq, m0); 2093 if (m0 == NULL) 2094 break; 2095 2096 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 2097 m0->m_pkthdr.rcvif = NULL; 2098 #if NBPFILTER > 0 2099 if (ic->ic_rawbpf != NULL) 2100 bpf_mtap(ic->ic_rawbpf, m0); 2101 #endif 2102 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2103 break; 2104 2105 } else { 2106 if (ic->ic_state != IEEE80211_S_RUN) 2107 break; 2108 IFQ_DEQUEUE(&ifp->if_snd, m0); 2109 if (m0 == NULL) 2110 break; 2111 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2112 ifp->if_flags |= IFF_OACTIVE; 2113 break; 2114 } 2115 2116 if (m0->m_len < sizeof (struct ether_header) && 2117 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2118 continue; 2119 2120 eh = mtod(m0, struct ether_header *); 2121 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2122 if (ni == NULL) { 2123 m_freem(m0); 2124 continue; 2125 } 2126 #if NBPFILTER > 0 2127 if (ifp->if_bpf != NULL) 2128 bpf_mtap(ifp->if_bpf, m0); 2129 #endif 2130 2131 m0 = ieee80211_encap(ic, m0, ni); 2132 if (m0 == NULL) { 2133 ieee80211_free_node(ni); 2134 continue; 2135 } 2136 2137 #if NBPFILTER > 0 2138 if (ic->ic_rawbpf != NULL) 2139 bpf_mtap(ic->ic_rawbpf, m0); 2140 2141 #endif 2142 if (rt2560_tx_data(sc, m0, ni) != 0) { 2143 ieee80211_free_node(ni); 2144 ifp->if_oerrors++; 2145 break; 2146 } 2147 } 2148 2149 sc->sc_tx_timer = 5; 2150 ifp->if_timer = 1; 2151 } 2152 } 2153 2154 static void 2155 rt2560_watchdog(struct ifnet *ifp) 2156 { 2157 struct rt2560_softc *sc = ifp->if_softc; 2158 2159 ifp->if_timer = 0; 2160 2161 if (sc->sc_tx_timer > 0) { 2162 if (--sc->sc_tx_timer == 0) { 2163 aprint_error_dev(&sc->sc_dev, "device timeout\n"); 2164 rt2560_init(ifp); 2165 ifp->if_oerrors++; 2166 return; 2167 } 2168 ifp->if_timer = 1; 2169 } 2170 2171 ieee80211_watchdog(&sc->sc_ic); 2172 } 2173 2174 /* 2175 * This function allows for fast channel switching in monitor mode (used by 2176 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2177 * generate a new beacon frame. 2178 */ 2179 static int 2180 rt2560_reset(struct ifnet *ifp) 2181 { 2182 struct rt2560_softc *sc = ifp->if_softc; 2183 struct ieee80211com *ic = &sc->sc_ic; 2184 2185 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2186 return ENETRESET; 2187 2188 rt2560_set_chan(sc, ic->ic_curchan); 2189 2190 return 0; 2191 } 2192 2193 int 2194 rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2195 { 2196 struct rt2560_softc *sc = ifp->if_softc; 2197 struct ieee80211com *ic = &sc->sc_ic; 2198 int s, error = 0; 2199 2200 s = splnet(); 2201 2202 switch (cmd) { 2203 case SIOCSIFFLAGS: 2204 if (ifp->if_flags & IFF_UP) { 2205 if (ifp->if_flags & IFF_RUNNING) 2206 rt2560_update_promisc(sc); 2207 else 2208 rt2560_init(ifp); 2209 } else { 2210 if (ifp->if_flags & IFF_RUNNING) 2211 rt2560_stop(ifp, 1); 2212 } 2213 break; 2214 2215 case SIOCADDMULTI: 2216 case SIOCDELMULTI: 2217 /* XXX no h/w multicast filter? --dyoung */ 2218 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) 2219 error = 0; 2220 break; 2221 2222 case SIOCS80211CHANNEL: 2223 /* 2224 * This allows for fast channel switching in monitor mode 2225 * (used by kismet). In IBSS mode, we must explicitly reset 2226 * the interface to generate a new beacon frame. 2227 */ 2228 error = ieee80211_ioctl(ic, cmd, data); 2229 if (error == ENETRESET && 2230 ic->ic_opmode == IEEE80211_M_MONITOR) { 2231 rt2560_set_chan(sc, ic->ic_ibss_chan); 2232 error = 0; 2233 } 2234 break; 2235 2236 default: 2237 error = ieee80211_ioctl(ic, cmd, data); 2238 } 2239 2240 if (error == ENETRESET) { 2241 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2242 (IFF_UP | IFF_RUNNING)) 2243 rt2560_init(ifp); 2244 error = 0; 2245 } 2246 2247 splx(s); 2248 2249 return error; 2250 } 2251 2252 static void 2253 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2254 { 2255 uint32_t tmp; 2256 int ntries; 2257 2258 for (ntries = 0; ntries < 100; ntries++) { 2259 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2260 break; 2261 DELAY(1); 2262 } 2263 if (ntries == 100) { 2264 aprint_error_dev(&sc->sc_dev, "could not write to BBP\n"); 2265 return; 2266 } 2267 2268 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2269 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2270 2271 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2272 } 2273 2274 static uint8_t 2275 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2276 { 2277 uint32_t val; 2278 int ntries; 2279 2280 val = RT2560_BBP_BUSY | reg << 8; 2281 RAL_WRITE(sc, RT2560_BBPCSR, val); 2282 2283 for (ntries = 0; ntries < 100; ntries++) { 2284 val = RAL_READ(sc, RT2560_BBPCSR); 2285 if (!(val & RT2560_BBP_BUSY)) 2286 return val & 0xff; 2287 DELAY(1); 2288 } 2289 2290 aprint_error_dev(&sc->sc_dev, "could not read from BBP\n"); 2291 return 0; 2292 } 2293 2294 static void 2295 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2296 { 2297 uint32_t tmp; 2298 int ntries; 2299 2300 for (ntries = 0; ntries < 100; ntries++) { 2301 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2302 break; 2303 DELAY(1); 2304 } 2305 if (ntries == 100) { 2306 aprint_error_dev(&sc->sc_dev, "could not write to RF\n"); 2307 return; 2308 } 2309 2310 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2311 (reg & 0x3); 2312 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2313 2314 /* remember last written value in sc */ 2315 sc->rf_regs[reg] = val; 2316 2317 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2318 } 2319 2320 static void 2321 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2322 { 2323 struct ieee80211com *ic = &sc->sc_ic; 2324 uint8_t power, tmp; 2325 u_int i, chan; 2326 2327 chan = ieee80211_chan2ieee(ic, c); 2328 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2329 return; 2330 2331 if (IEEE80211_IS_CHAN_2GHZ(c)) 2332 power = min(sc->txpow[chan - 1], 31); 2333 else 2334 power = 31; 2335 2336 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2337 2338 switch (sc->rf_rev) { 2339 case RT2560_RF_2522: 2340 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2341 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2342 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2343 break; 2344 2345 case RT2560_RF_2523: 2346 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2347 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2348 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2349 rt2560_rf_write(sc, RT2560_RF4, 2350 (chan == 14) ? 0x00280 : 0x00286); 2351 break; 2352 2353 case RT2560_RF_2524: 2354 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2355 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2356 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2357 rt2560_rf_write(sc, RT2560_RF4, 2358 (chan == 14) ? 0x00280 : 0x00286); 2359 break; 2360 2361 case RT2560_RF_2525: 2362 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2363 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2364 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2365 rt2560_rf_write(sc, RT2560_RF4, 2366 (chan == 14) ? 0x00280 : 0x00286); 2367 2368 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2369 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2370 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2371 rt2560_rf_write(sc, RT2560_RF4, 2372 (chan == 14) ? 0x00280 : 0x00286); 2373 break; 2374 2375 case RT2560_RF_2525E: 2376 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2377 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2378 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2379 rt2560_rf_write(sc, RT2560_RF4, 2380 (chan == 14) ? 0x00286 : 0x00282); 2381 break; 2382 2383 case RT2560_RF_2526: 2384 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2385 rt2560_rf_write(sc, RT2560_RF4, 2386 (chan & 1) ? 0x00386 : 0x00381); 2387 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2388 2389 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2390 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2391 rt2560_rf_write(sc, RT2560_RF4, 2392 (chan & 1) ? 0x00386 : 0x00381); 2393 break; 2394 2395 /* dual-band RF */ 2396 case RT2560_RF_5222: 2397 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2398 2399 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2400 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2401 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2402 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2403 break; 2404 } 2405 2406 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2407 ic->ic_state != IEEE80211_S_SCAN) { 2408 /* set Japan filter bit for channel 14 */ 2409 tmp = rt2560_bbp_read(sc, 70); 2410 2411 tmp &= ~RT2560_JAPAN_FILTER; 2412 if (chan == 14) 2413 tmp |= RT2560_JAPAN_FILTER; 2414 2415 rt2560_bbp_write(sc, 70, tmp); 2416 2417 DELAY(1000); /* RF needs a 1ms delay here */ 2418 rt2560_disable_rf_tune(sc); 2419 2420 /* clear CRC errors */ 2421 RAL_READ(sc, RT2560_CNT0); 2422 } 2423 } 2424 2425 /* 2426 * Disable RF auto-tuning. 2427 */ 2428 static void 2429 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2430 { 2431 uint32_t tmp; 2432 2433 if (sc->rf_rev != RT2560_RF_2523) { 2434 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2435 rt2560_rf_write(sc, RT2560_RF1, tmp); 2436 } 2437 2438 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2439 rt2560_rf_write(sc, RT2560_RF3, tmp); 2440 2441 DPRINTFN(2, ("disabling RF autotune\n")); 2442 } 2443 2444 /* 2445 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2446 * synchronization. 2447 */ 2448 static void 2449 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2450 { 2451 struct ieee80211com *ic = &sc->sc_ic; 2452 uint16_t logcwmin, preload; 2453 uint32_t tmp; 2454 2455 /* first, disable TSF synchronization */ 2456 RAL_WRITE(sc, RT2560_CSR14, 0); 2457 2458 tmp = 16 * ic->ic_bss->ni_intval; 2459 RAL_WRITE(sc, RT2560_CSR12, tmp); 2460 2461 RAL_WRITE(sc, RT2560_CSR13, 0); 2462 2463 logcwmin = 5; 2464 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2465 tmp = logcwmin << 16 | preload; 2466 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2467 2468 /* finally, enable TSF synchronization */ 2469 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2470 if (ic->ic_opmode == IEEE80211_M_STA) 2471 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2472 else 2473 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2474 RT2560_ENABLE_BEACON_GENERATOR; 2475 RAL_WRITE(sc, RT2560_CSR14, tmp); 2476 2477 DPRINTF(("enabling TSF synchronization\n")); 2478 } 2479 2480 static void 2481 rt2560_update_plcp(struct rt2560_softc *sc) 2482 { 2483 struct ieee80211com *ic = &sc->sc_ic; 2484 2485 /* no short preamble for 1Mbps */ 2486 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2487 2488 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2489 /* values taken from the reference driver */ 2490 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2491 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2492 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2493 } else { 2494 /* same values as above or'ed 0x8 */ 2495 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2496 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2497 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2498 } 2499 2500 DPRINTF(("updating PLCP for %s preamble\n", 2501 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2502 } 2503 2504 /* 2505 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2506 * know how these values are computed. 2507 */ 2508 static void 2509 rt2560_update_slot(struct ifnet *ifp) 2510 { 2511 struct rt2560_softc *sc = ifp->if_softc; 2512 struct ieee80211com *ic = &sc->sc_ic; 2513 uint8_t slottime; 2514 uint16_t sifs, pifs, difs, eifs; 2515 uint32_t tmp; 2516 2517 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2518 2519 /* define the MAC slot boundaries */ 2520 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2521 pifs = sifs + slottime; 2522 difs = sifs + 2 * slottime; 2523 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2524 2525 tmp = RAL_READ(sc, RT2560_CSR11); 2526 tmp = (tmp & ~0x1f00) | slottime << 8; 2527 RAL_WRITE(sc, RT2560_CSR11, tmp); 2528 2529 tmp = pifs << 16 | sifs; 2530 RAL_WRITE(sc, RT2560_CSR18, tmp); 2531 2532 tmp = eifs << 16 | difs; 2533 RAL_WRITE(sc, RT2560_CSR19, tmp); 2534 2535 DPRINTF(("setting slottime to %uus\n", slottime)); 2536 } 2537 2538 static void 2539 rt2560_set_basicrates(struct rt2560_softc *sc) 2540 { 2541 struct ieee80211com *ic = &sc->sc_ic; 2542 2543 /* update basic rate set */ 2544 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2545 /* 11b basic rates: 1, 2Mbps */ 2546 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2547 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2548 /* 11a basic rates: 6, 12, 24Mbps */ 2549 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2550 } else { 2551 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2552 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2553 } 2554 } 2555 2556 static void 2557 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2558 { 2559 uint32_t tmp; 2560 2561 /* set ON period to 70ms and OFF period to 30ms */ 2562 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2563 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2564 } 2565 2566 static void 2567 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2568 { 2569 uint32_t tmp; 2570 2571 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2572 RAL_WRITE(sc, RT2560_CSR5, tmp); 2573 2574 tmp = bssid[4] | bssid[5] << 8; 2575 RAL_WRITE(sc, RT2560_CSR6, tmp); 2576 2577 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2578 } 2579 2580 static void 2581 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2582 { 2583 uint32_t tmp; 2584 2585 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2586 RAL_WRITE(sc, RT2560_CSR3, tmp); 2587 2588 tmp = addr[4] | addr[5] << 8; 2589 RAL_WRITE(sc, RT2560_CSR4, tmp); 2590 2591 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2592 } 2593 2594 static void 2595 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2596 { 2597 uint32_t tmp; 2598 2599 tmp = RAL_READ(sc, RT2560_CSR3); 2600 addr[0] = tmp & 0xff; 2601 addr[1] = (tmp >> 8) & 0xff; 2602 addr[2] = (tmp >> 16) & 0xff; 2603 addr[3] = (tmp >> 24); 2604 2605 tmp = RAL_READ(sc, RT2560_CSR4); 2606 addr[4] = tmp & 0xff; 2607 addr[5] = (tmp >> 8) & 0xff; 2608 } 2609 2610 static void 2611 rt2560_update_promisc(struct rt2560_softc *sc) 2612 { 2613 struct ifnet *ifp = &sc->sc_if; 2614 uint32_t tmp; 2615 2616 tmp = RAL_READ(sc, RT2560_RXCSR0); 2617 2618 tmp &= ~RT2560_DROP_NOT_TO_ME; 2619 if (!(ifp->if_flags & IFF_PROMISC)) 2620 tmp |= RT2560_DROP_NOT_TO_ME; 2621 2622 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2623 2624 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2625 "entering" : "leaving")); 2626 } 2627 2628 static void 2629 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2630 { 2631 uint32_t tmp; 2632 uint8_t tx; 2633 2634 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2635 if (antenna == 1) 2636 tx |= RT2560_BBP_ANTA; 2637 else if (antenna == 2) 2638 tx |= RT2560_BBP_ANTB; 2639 else 2640 tx |= RT2560_BBP_DIVERSITY; 2641 2642 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2643 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2644 sc->rf_rev == RT2560_RF_5222) 2645 tx |= RT2560_BBP_FLIPIQ; 2646 2647 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2648 2649 /* update values for CCK and OFDM in BBPCSR1 */ 2650 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2651 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2652 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2653 } 2654 2655 static void 2656 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2657 { 2658 uint8_t rx; 2659 2660 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2661 if (antenna == 1) 2662 rx |= RT2560_BBP_ANTA; 2663 else if (antenna == 2) 2664 rx |= RT2560_BBP_ANTB; 2665 else 2666 rx |= RT2560_BBP_DIVERSITY; 2667 2668 /* need to force no I/Q flip for RF 2525e and 2526 */ 2669 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2670 rx &= ~RT2560_BBP_FLIPIQ; 2671 2672 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2673 } 2674 2675 static const char * 2676 rt2560_get_rf(int rev) 2677 { 2678 switch (rev) { 2679 case RT2560_RF_2522: return "RT2522"; 2680 case RT2560_RF_2523: return "RT2523"; 2681 case RT2560_RF_2524: return "RT2524"; 2682 case RT2560_RF_2525: return "RT2525"; 2683 case RT2560_RF_2525E: return "RT2525e"; 2684 case RT2560_RF_2526: return "RT2526"; 2685 case RT2560_RF_5222: return "RT5222"; 2686 default: return "unknown"; 2687 } 2688 } 2689 2690 static void 2691 rt2560_read_eeprom(struct rt2560_softc *sc) 2692 { 2693 uint16_t val; 2694 int i; 2695 2696 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2697 sc->rf_rev = (val >> 11) & 0x1f; 2698 sc->hw_radio = (val >> 10) & 0x1; 2699 sc->led_mode = (val >> 6) & 0x7; 2700 sc->rx_ant = (val >> 4) & 0x3; 2701 sc->tx_ant = (val >> 2) & 0x3; 2702 sc->nb_ant = val & 0x3; 2703 2704 /* read default values for BBP registers */ 2705 for (i = 0; i < 16; i++) { 2706 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2707 sc->bbp_prom[i].reg = val >> 8; 2708 sc->bbp_prom[i].val = val & 0xff; 2709 } 2710 2711 /* read Tx power for all b/g channels */ 2712 for (i = 0; i < 14 / 2; i++) { 2713 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2714 sc->txpow[i * 2] = val >> 8; 2715 sc->txpow[i * 2 + 1] = val & 0xff; 2716 } 2717 } 2718 2719 static int 2720 rt2560_bbp_init(struct rt2560_softc *sc) 2721 { 2722 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2723 int i, ntries; 2724 2725 /* wait for BBP to be ready */ 2726 for (ntries = 0; ntries < 100; ntries++) { 2727 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2728 break; 2729 DELAY(1); 2730 } 2731 if (ntries == 100) { 2732 aprint_error_dev(&sc->sc_dev, "timeout waiting for BBP\n"); 2733 return EIO; 2734 } 2735 2736 /* initialize BBP registers to default values */ 2737 for (i = 0; i < N(rt2560_def_bbp); i++) { 2738 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2739 rt2560_def_bbp[i].val); 2740 } 2741 #if 0 2742 /* initialize BBP registers to values stored in EEPROM */ 2743 for (i = 0; i < 16; i++) { 2744 if (sc->bbp_prom[i].reg == 0xff) 2745 continue; 2746 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2747 } 2748 #endif 2749 2750 return 0; 2751 #undef N 2752 } 2753 2754 static int 2755 rt2560_init(struct ifnet *ifp) 2756 { 2757 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2758 struct rt2560_softc *sc = ifp->if_softc; 2759 struct ieee80211com *ic = &sc->sc_ic; 2760 uint32_t tmp; 2761 int i; 2762 2763 /* for CardBus, power on the socket */ 2764 if (!(sc->sc_flags & RT2560_ENABLED)) { 2765 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2766 aprint_error_dev(&sc->sc_dev, "could not enable device\n"); 2767 return EIO; 2768 } 2769 sc->sc_flags |= RT2560_ENABLED; 2770 } 2771 2772 rt2560_stop(ifp, 1); 2773 2774 /* setup tx rings */ 2775 tmp = RT2560_PRIO_RING_COUNT << 24 | 2776 RT2560_ATIM_RING_COUNT << 16 | 2777 RT2560_TX_RING_COUNT << 8 | 2778 RT2560_TX_DESC_SIZE; 2779 2780 /* rings _must_ be initialized in this _exact_ order! */ 2781 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2782 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2783 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2784 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2785 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2786 2787 /* setup rx ring */ 2788 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2789 2790 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2791 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2792 2793 /* initialize MAC registers to default values */ 2794 for (i = 0; i < N(rt2560_def_mac); i++) 2795 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2796 2797 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2798 rt2560_set_macaddr(sc, ic->ic_myaddr); 2799 2800 /* set basic rate set (will be updated later) */ 2801 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2802 2803 rt2560_update_slot(ifp); 2804 rt2560_update_plcp(sc); 2805 rt2560_update_led(sc, 0, 0); 2806 2807 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2808 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2809 2810 if (rt2560_bbp_init(sc) != 0) { 2811 rt2560_stop(ifp, 1); 2812 return EIO; 2813 } 2814 2815 rt2560_set_txantenna(sc, 1); 2816 rt2560_set_rxantenna(sc, 1); 2817 2818 /* set default BSS channel */ 2819 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2820 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2821 2822 /* kick Rx */ 2823 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2824 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2825 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2826 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2827 tmp |= RT2560_DROP_TODS; 2828 if (!(ifp->if_flags & IFF_PROMISC)) 2829 tmp |= RT2560_DROP_NOT_TO_ME; 2830 } 2831 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2832 2833 /* clear old FCS and Rx FIFO errors */ 2834 RAL_READ(sc, RT2560_CNT0); 2835 RAL_READ(sc, RT2560_CNT4); 2836 2837 /* clear any pending interrupts */ 2838 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2839 2840 /* enable interrupts */ 2841 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2842 2843 ifp->if_flags &= ~IFF_OACTIVE; 2844 ifp->if_flags |= IFF_RUNNING; 2845 2846 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2847 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2848 else 2849 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2850 2851 return 0; 2852 #undef N 2853 } 2854 2855 static void 2856 rt2560_stop(struct ifnet *ifp, int disable) 2857 { 2858 struct rt2560_softc *sc = ifp->if_softc; 2859 struct ieee80211com *ic = &sc->sc_ic; 2860 2861 sc->sc_tx_timer = 0; 2862 ifp->if_timer = 0; 2863 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2864 2865 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2866 2867 /* abort Tx */ 2868 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2869 2870 /* disable Rx */ 2871 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2872 2873 /* reset ASIC (and thus, BBP) */ 2874 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2875 RAL_WRITE(sc, RT2560_CSR1, 0); 2876 2877 /* disable interrupts */ 2878 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2879 2880 /* clear any pending interrupt */ 2881 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2882 2883 /* reset Tx and Rx rings */ 2884 rt2560_reset_tx_ring(sc, &sc->txq); 2885 rt2560_reset_tx_ring(sc, &sc->atimq); 2886 rt2560_reset_tx_ring(sc, &sc->prioq); 2887 rt2560_reset_tx_ring(sc, &sc->bcnq); 2888 rt2560_reset_rx_ring(sc, &sc->rxq); 2889 2890 }
Cache object: 9e3a2cb18df20ae900d1992b2761793b
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