FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/rt2860.c
1 /* $OpenBSD: rt2860.c,v 1.20 2008/11/25 21:43:57 damien Exp $ */
2
3 /*-
4 * Copyright (c) 2007,2008
5 * Damien Bergamini <damien.bergamini@free.fr>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 /*-
21 * Ralink Technology RT2860 chipset driver
22 * http://www.ralinktech.com/
23 */
24
25 #include "bpfilter.h"
26
27 #include <sys/param.h>
28 #include <sys/sockio.h>
29 #include <sys/sysctl.h>
30 #include <sys/mbuf.h>
31 #include <sys/kernel.h>
32 #include <sys/socket.h>
33 #include <sys/systm.h>
34 #include <sys/malloc.h>
35 #include <sys/queue.h>
36 #include <sys/timeout.h>
37 #include <sys/conf.h>
38 #include <sys/device.h>
39
40 #include <machine/bus.h>
41 #include <machine/endian.h>
42 #include <machine/intr.h>
43
44 #if NBPFILTER > 0
45 #include <net/bpf.h>
46 #endif
47 #include <net/if.h>
48 #include <net/if_arp.h>
49 #include <net/if_dl.h>
50 #include <net/if_media.h>
51 #include <net/if_types.h>
52
53 #include <netinet/in.h>
54 #include <netinet/in_systm.h>
55 #include <netinet/in_var.h>
56 #include <netinet/if_ether.h>
57 #include <netinet/ip.h>
58
59 #include <net80211/ieee80211_var.h>
60 #include <net80211/ieee80211_amrr.h>
61 #include <net80211/ieee80211_radiotap.h>
62
63 #include <dev/ic/rt2860var.h>
64 #include <dev/ic/rt2860reg.h>
65
66 #include <dev/pci/pcireg.h>
67 #include <dev/pci/pcivar.h>
68 #include <dev/pci/pcidevs.h>
69
70 #ifdef RAL_DEBUG
71 #define DPRINTF(x) do { if (rt2860_debug > 0) printf x; } while (0)
72 #define DPRINTFN(n, x) do { if (rt2860_debug >= (n)) printf x; } while (0)
73 int rt2860_debug = 1;
74 #else
75 #define DPRINTF(x)
76 #define DPRINTFN(n, x)
77 #endif
78
79 int rt2860_alloc_tx_ring(struct rt2860_softc *,
80 struct rt2860_tx_ring *);
81 void rt2860_reset_tx_ring(struct rt2860_softc *,
82 struct rt2860_tx_ring *);
83 void rt2860_free_tx_ring(struct rt2860_softc *,
84 struct rt2860_tx_ring *);
85 int rt2860_alloc_tx_pool(struct rt2860_softc *);
86 void rt2860_free_tx_pool(struct rt2860_softc *);
87 int rt2860_alloc_rx_ring(struct rt2860_softc *,
88 struct rt2860_rx_ring *);
89 void rt2860_reset_rx_ring(struct rt2860_softc *,
90 struct rt2860_rx_ring *);
91 void rt2860_free_rx_ring(struct rt2860_softc *,
92 struct rt2860_rx_ring *);
93 int rt2860_media_change(struct ifnet *);
94 void rt2860_next_scan(void *);
95 void rt2860_iter_func(void *, struct ieee80211_node *);
96 void rt2860_updatestats(void *);
97 void rt2860_newassoc(struct ieee80211com *, struct ieee80211_node *,
98 int);
99 int rt2860_newstate(struct ieee80211com *, enum ieee80211_state,
100 int);
101 uint16_t rt2860_eeprom_read(struct rt2860_softc *, uint8_t);
102 void rt2860_drain_stats_fifo(struct rt2860_softc *);
103 void rt2860_tx_intr(struct rt2860_softc *, int);
104 void rt2860_rx_intr(struct rt2860_softc *);
105 int rt2860_ack_rate(struct ieee80211com *, int);
106 uint16_t rt2860_txtime(int, int, uint32_t);
107 uint8_t rt2860_rate2mcs(uint8_t);
108 int rt2860_tx_data(struct rt2860_softc *, struct mbuf *,
109 struct ieee80211_node *, int);
110 void rt2860_start(struct ifnet *);
111 void rt2860_watchdog(struct ifnet *);
112 int rt2860_ioctl(struct ifnet *, u_long, caddr_t);
113 void rt2860_mcu_bbp_write(struct rt2860_softc *, uint8_t, uint8_t);
114 uint8_t rt2860_mcu_bbp_read(struct rt2860_softc *, uint8_t);
115 void rt2860_rf_write(struct rt2860_softc *, uint8_t, uint32_t);
116 int rt2860_mcu_cmd(struct rt2860_softc *, uint8_t, uint16_t);
117 void rt2860_enable_mrr(struct rt2860_softc *);
118 void rt2860_set_txpreamble(struct rt2860_softc *);
119 void rt2860_set_basicrates(struct rt2860_softc *);
120 void rt2860_select_chan_group(struct rt2860_softc *, int);
121 void rt2860_set_chan(struct rt2860_softc *,
122 struct ieee80211_channel *);
123 void rt2860_set_leds(struct rt2860_softc *, uint16_t);
124 void rt2860_set_bssid(struct rt2860_softc *, const uint8_t *);
125 void rt2860_set_macaddr(struct rt2860_softc *, const uint8_t *);
126 void rt2860_updateslot(struct ieee80211com *);
127 void rt2860_updateprot(struct ieee80211com *);
128 void rt2860_updateedca(struct ieee80211com *);
129 int rt2860_set_key(struct ieee80211com *, struct ieee80211_node *,
130 struct ieee80211_key *);
131 void rt2860_delete_key(struct ieee80211com *,
132 struct ieee80211_node *, struct ieee80211_key *);
133 int8_t rt2860_rssi2dbm(struct rt2860_softc *, uint8_t, uint8_t);
134 uint8_t rt2860_maxrssi_chain(struct rt2860_softc *,
135 const struct rt2860_rxwi *);
136 const char * rt2860_get_rf(uint8_t);
137 int rt2860_read_eeprom(struct rt2860_softc *);
138 int rt2860_bbp_init(struct rt2860_softc *);
139 int rt2860_init(struct ifnet *);
140 void rt2860_stop(struct ifnet *, int);
141 int rt2860_load_microcode(struct rt2860_softc *);
142 void rt2860_calib(struct rt2860_softc *);
143 #ifndef IEEE80211_STA_ONLY
144 int rt2860_setup_beacon(struct rt2860_softc *);
145 #endif
146 void rt2860_enable_tsf_sync(struct rt2860_softc *);
147 void rt2860_power(int, void *);
148
149 static const struct {
150 uint32_t reg;
151 uint32_t val;
152 } rt2860_def_mac[] = {
153 RT2860_DEF_MAC
154 };
155
156 static const struct {
157 uint8_t reg;
158 uint8_t val;
159 } rt2860_def_bbp[] = {
160 RT2860_DEF_BBP
161 };
162
163 static const struct rfprog {
164 uint8_t chan;
165 uint32_t r1, r2, r3, r4;
166 } rt2860_rf2850[] = {
167 RT2860_RF2850
168 };
169
170 int
171 rt2860_attach(void *xsc, int id)
172 {
173 struct rt2860_softc *sc = xsc;
174 struct ieee80211com *ic = &sc->sc_ic;
175 struct ifnet *ifp = &ic->ic_if;
176 int i, qid, ntries, error;
177
178 sc->amrr.amrr_min_success_threshold = 1;
179 sc->amrr.amrr_max_success_threshold = 15;
180 timeout_set(&sc->amrr_to, rt2860_updatestats, sc);
181 timeout_set(&sc->scan_to, rt2860_next_scan, sc);
182
183 /* wait for NIC to initialize */
184 for (ntries = 0; ntries < 100; ntries++) {
185 sc->mac_rev = RAL_READ(sc, RT2860_ASIC_VER_ID);
186 if (sc->mac_rev != 0 && sc->mac_rev != 0xffffffff)
187 break;
188 DELAY(10);
189 }
190 if (ntries == 100) {
191 printf("%s: timeout waiting for NIC to initialize\n",
192 sc->sc_dev.dv_xname);
193 return ETIMEDOUT;
194 }
195 if ((sc->mac_rev >> 16) != 0x2860 &&
196 (id == PCI_PRODUCT_RALINK_RT2890 ||
197 id == PCI_PRODUCT_RALINK_RT2790 ||
198 id == PCI_PRODUCT_AWT_RT2890))
199 sc->sc_flags |= RT2860_ADVANCED_PS;
200
201 /* retrieve RF rev. no and various other things from EEPROM */
202 rt2860_read_eeprom(sc);
203 printf(", address %s\n", ether_sprintf(ic->ic_myaddr));
204 printf("%s: MAC/BBP RT%X (rev 0x%04X), RF %s (%dT%dR)\n",
205 sc->sc_dev.dv_xname, sc->mac_rev >> 16, sc->mac_rev & 0xffff,
206 rt2860_get_rf(sc->rf_rev), sc->ntxchains, sc->nrxchains);
207
208 /*
209 * Allocate Tx (4 EDCAs + HCCA + Mgt) and Rx rings.
210 */
211 for (qid = 0; qid < 6; qid++) {
212 if ((error = rt2860_alloc_tx_ring(sc, &sc->txq[qid])) != 0) {
213 printf("%s: could not allocate Tx ring %d\n",
214 sc->sc_dev.dv_xname, qid);
215 goto fail1;
216 }
217 }
218
219 if ((error = rt2860_alloc_rx_ring(sc, &sc->rxq)) != 0) {
220 printf("%s: could not allocate Rx ring\n",
221 sc->sc_dev.dv_xname);
222 goto fail1;
223 }
224
225 if ((error = rt2860_alloc_tx_pool(sc)) != 0) {
226 printf("%s: could not allocate Tx pool\n",
227 sc->sc_dev.dv_xname);
228 goto fail2;
229 }
230
231 /* mgmt ring is broken on RT2860C, use EDCA AC VO ring instead */
232 sc->mgtqid = (sc->mac_rev == 0x28600100) ? EDCA_AC_VO : 5;
233
234 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
235 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
236 ic->ic_state = IEEE80211_S_INIT;
237
238 /* set device capabilities */
239 ic->ic_caps =
240 IEEE80211_C_MONITOR | /* monitor mode supported */
241 #ifndef IEEE80211_STA_ONLY
242 IEEE80211_C_IBSS | /* IBSS mode supported */
243 IEEE80211_C_HOSTAP | /* HostAP mode supported */
244 #endif
245 IEEE80211_C_TXPMGT | /* tx power management */
246 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
247 IEEE80211_C_SHSLOT | /* short slot time supported */
248 IEEE80211_C_WEP | /* s/w WEP */
249 IEEE80211_C_RSN; /* WPA/RSN */
250
251 if (sc->rf_rev == RT2860_RF_2750 || sc->rf_rev == RT2860_RF_2850) {
252 /* set supported .11a rates */
253 ic->ic_sup_rates[IEEE80211_MODE_11A] =
254 ieee80211_std_rateset_11a;
255
256 /* set supported .11a channels */
257 for (i = 14; i < nitems(rt2860_rf2850); i++) {
258 uint8_t chan = rt2860_rf2850[i].chan;
259 ic->ic_channels[chan].ic_freq =
260 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ);
261 ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A;
262 }
263 }
264
265 /* set supported .11b and .11g rates */
266 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
267 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
268
269 /* set supported .11b and .11g channels (1 through 14) */
270 for (i = 1; i <= 14; i++) {
271 ic->ic_channels[i].ic_freq =
272 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
273 ic->ic_channels[i].ic_flags =
274 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
275 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
276 }
277
278 /* HW supports up to 255 STAs (0-254) in HostAP and IBSS modes */
279 ic->ic_max_aid = min(IEEE80211_AID_MAX, RT2860_WCID_MAX);
280
281 ifp->if_softc = sc;
282 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
283 ifp->if_init = rt2860_init;
284 ifp->if_ioctl = rt2860_ioctl;
285 ifp->if_start = rt2860_start;
286 ifp->if_watchdog = rt2860_watchdog;
287 IFQ_SET_READY(&ifp->if_snd);
288 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
289
290 if_attach(ifp);
291 ieee80211_ifattach(ifp);
292 ic->ic_newassoc = rt2860_newassoc;
293 ic->ic_updateslot = rt2860_updateslot;
294 ic->ic_updateedca = rt2860_updateedca;
295 ic->ic_set_key = rt2860_set_key;
296 ic->ic_delete_key = rt2860_delete_key;
297 /* override state transition machine */
298 sc->sc_newstate = ic->ic_newstate;
299 ic->ic_newstate = rt2860_newstate;
300 ieee80211_media_init(ifp, rt2860_media_change, ieee80211_media_status);
301
302 #if NBPFILTER > 0
303 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
304 sizeof (struct ieee80211_frame) + 64);
305
306 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
307 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
308 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2860_RX_RADIOTAP_PRESENT);
309
310 sc->sc_txtap_len = sizeof sc->sc_txtapu;
311 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
312 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2860_TX_RADIOTAP_PRESENT);
313 #endif
314 /*
315 * Make sure the interface is shutdown during reboot.
316 */
317 sc->sc_sdhook = shutdownhook_establish(rt2860_shutdown, sc);
318 if (sc->sc_sdhook == NULL) {
319 printf("%s: WARNING: unable to establish shutdown hook\n",
320 sc->sc_dev.dv_xname);
321 }
322
323 sc->sc_powerhook = powerhook_establish(rt2860_power, sc);
324 if (sc->sc_powerhook == NULL) {
325 printf("%s: WARNING: unable to establish power hook\n",
326 sc->sc_dev.dv_xname);
327 }
328
329 return 0;
330
331 fail2: rt2860_free_rx_ring(sc, &sc->rxq);
332 fail1: while (--qid >= 0)
333 rt2860_free_tx_ring(sc, &sc->txq[qid]);
334 return error;
335 }
336
337 int
338 rt2860_detach(void *xsc)
339 {
340 struct rt2860_softc *sc = xsc;
341 struct ifnet *ifp = &sc->sc_ic.ic_if;
342 int qid;
343
344 timeout_del(&sc->scan_to);
345 timeout_del(&sc->amrr_to);
346
347 ieee80211_ifdetach(ifp); /* free all nodes */
348 if_detach(ifp);
349
350 if (sc->sc_powerhook != NULL)
351 powerhook_disestablish(sc->sc_powerhook);
352
353 if (sc->sc_sdhook != NULL)
354 shutdownhook_disestablish(sc->sc_sdhook);
355
356 for (qid = 0; qid < 6; qid++)
357 rt2860_free_tx_ring(sc, &sc->txq[qid]);
358 rt2860_free_rx_ring(sc, &sc->rxq);
359 rt2860_free_tx_pool(sc);
360
361 return 0;
362 }
363
364 int
365 rt2860_alloc_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
366 {
367 int nsegs, size, error;
368
369 size = RT2860_TX_RING_COUNT * sizeof (struct rt2860_txd);
370
371 error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
372 BUS_DMA_NOWAIT, &ring->map);
373 if (error != 0) {
374 printf("%s: could not create DMA map\n", sc->sc_dev.dv_xname);
375 goto fail;
376 }
377
378 /* Tx rings must be 4-DWORD aligned */
379 error = bus_dmamem_alloc(sc->sc_dmat, size, 16, 0, &ring->seg, 1,
380 &nsegs, BUS_DMA_NOWAIT);
381 if (error != 0) {
382 printf("%s: could not allocate DMA memory\n",
383 sc->sc_dev.dv_xname);
384 goto fail;
385 }
386
387 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, size,
388 (caddr_t *)&ring->txd, BUS_DMA_NOWAIT);
389 if (error != 0) {
390 printf("%s: could not map DMA memory\n", sc->sc_dev.dv_xname);
391 goto fail;
392 }
393
394 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->txd, size, NULL,
395 BUS_DMA_NOWAIT);
396 if (error != 0) {
397 printf("%s: could not load DMA map\n", sc->sc_dev.dv_xname);
398 goto fail;
399 }
400
401 memset(ring->txd, 0, size);
402 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, size, BUS_DMASYNC_PREWRITE);
403
404 ring->paddr = ring->map->dm_segs[0].ds_addr;
405
406 return 0;
407
408 fail: rt2860_free_tx_ring(sc, ring);
409 return error;
410 }
411
412 void
413 rt2860_reset_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
414 {
415 struct rt2860_tx_data *data;
416 int i;
417
418 for (i = 0; i < RT2860_TX_RING_COUNT; i++) {
419 ring->txd[i].sdl0 &= ~htole16(RT2860_TX_DDONE);
420
421 if ((data = ring->data[i]) == NULL)
422 continue; /* nothing mapped in this slot */
423
424 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
425 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
426 bus_dmamap_unload(sc->sc_dmat, data->map);
427 m_freem(data->m);
428 data->m= NULL;
429 data->ni = NULL; /* node already freed */
430
431 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
432 ring->data[i] = NULL;
433 }
434
435 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
436 BUS_DMASYNC_PREWRITE);
437
438 ring->queued = 0;
439 ring->cur = ring->next = 0;
440 }
441
442 void
443 rt2860_free_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
444 {
445 struct rt2860_tx_data *data;
446 int i;
447
448 if (ring->txd != NULL) {
449 bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
450 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
451 bus_dmamap_unload(sc->sc_dmat, ring->map);
452 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->txd,
453 RT2860_TX_RING_COUNT * sizeof (struct rt2860_txd));
454 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
455 }
456 if (ring->map != NULL)
457 bus_dmamap_destroy(sc->sc_dmat, ring->map);
458
459 for (i = 0; i < RT2860_TX_RING_COUNT; i++) {
460 if ((data = ring->data[i]) == NULL)
461 continue; /* nothing mapped in this slot */
462
463 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
464 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
465 bus_dmamap_unload(sc->sc_dmat, data->map);
466 m_freem(data->m);
467
468 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
469 }
470 }
471
472 /*
473 * Allocate a pool of TX Wireless Information blocks.
474 */
475 int
476 rt2860_alloc_tx_pool(struct rt2860_softc *sc)
477 {
478 int i, nsegs, size, error;
479
480 size = RT2860_TX_POOL_COUNT * sizeof (struct rt2860_txwi);
481
482 /* init data_pool early in case of failure.. */
483 SLIST_INIT(&sc->data_pool);
484
485 error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
486 BUS_DMA_NOWAIT, &sc->txwi_map);
487 if (error != 0) {
488 printf("%s: could not create DMA map\n", sc->sc_dev.dv_xname);
489 goto fail;
490 }
491
492 error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0,
493 &sc->txwi_seg, 1, &nsegs, BUS_DMA_NOWAIT);
494 if (error != 0) {
495 printf("%s: could not allocate DMA memory\n",
496 sc->sc_dev.dv_xname);
497 goto fail;
498 }
499
500 error = bus_dmamem_map(sc->sc_dmat, &sc->txwi_seg, nsegs, size,
501 (caddr_t *)&sc->txwi, BUS_DMA_NOWAIT);
502 if (error != 0) {
503 printf("%s: could not map DMA memory\n", sc->sc_dev.dv_xname);
504 goto fail;
505 }
506
507 error = bus_dmamap_load(sc->sc_dmat, sc->txwi_map, sc->txwi, size,
508 NULL, BUS_DMA_NOWAIT);
509 if (error != 0) {
510 printf("%s: could not load DMA map\n", sc->sc_dev.dv_xname);
511 goto fail;
512 }
513
514 memset(sc->txwi, 0, size);
515 bus_dmamap_sync(sc->sc_dmat, sc->txwi_map, 0, size,
516 BUS_DMASYNC_PREWRITE);
517
518 for (i = 0; i < RT2860_TX_POOL_COUNT; i++) {
519 struct rt2860_tx_data *data = &sc->data[i];
520
521 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
522 RT2860_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT,
523 &data->map);
524 if (error != 0) {
525 printf("%s: could not create DMA map\n",
526 sc->sc_dev.dv_xname);
527 goto fail;
528 }
529
530 data->txwi = &sc->txwi[i];
531 data->paddr = sc->txwi_map->dm_segs[0].ds_addr +
532 i * sizeof (struct rt2860_txwi);
533
534 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
535 }
536
537 return 0;
538
539 fail: rt2860_free_tx_pool(sc);
540 return error;
541 }
542
543 void
544 rt2860_free_tx_pool(struct rt2860_softc *sc)
545 {
546 if (sc->txwi != NULL) {
547 bus_dmamap_sync(sc->sc_dmat, sc->txwi_map, 0,
548 sc->txwi_map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
549 bus_dmamap_unload(sc->sc_dmat, sc->txwi_map);
550 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->txwi,
551 RT2860_TX_POOL_COUNT * sizeof (struct rt2860_txwi));
552 bus_dmamem_free(sc->sc_dmat, &sc->txwi_seg, 1);
553 }
554 if (sc->txwi_map != NULL)
555 bus_dmamap_destroy(sc->sc_dmat, sc->txwi_map);
556
557 while (!SLIST_EMPTY(&sc->data_pool)) {
558 struct rt2860_tx_data *data;
559 data = SLIST_FIRST(&sc->data_pool);
560 bus_dmamap_destroy(sc->sc_dmat, data->map);
561 SLIST_REMOVE_HEAD(&sc->data_pool, next);
562 }
563 }
564
565 int
566 rt2860_alloc_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
567 {
568 int i, nsegs, size, error;
569
570 size = RT2860_RX_RING_COUNT * sizeof (struct rt2860_rxd);
571
572 error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
573 BUS_DMA_NOWAIT, &ring->map);
574 if (error != 0) {
575 printf("%s: could not create DMA map\n", sc->sc_dev.dv_xname);
576 goto fail;
577 }
578
579 /* Rx ring must be 4-DWORD aligned */
580 error = bus_dmamem_alloc(sc->sc_dmat, size, 16, 0, &ring->seg, 1,
581 &nsegs, BUS_DMA_NOWAIT);
582 if (error != 0) {
583 printf("%s: could not allocate DMA memory\n",
584 sc->sc_dev.dv_xname);
585 goto fail;
586 }
587
588 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, size,
589 (caddr_t *)&ring->rxd, BUS_DMA_NOWAIT);
590 if (error != 0) {
591 printf("%s: could not map DMA memory\n", sc->sc_dev.dv_xname);
592 goto fail;
593 }
594
595 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->rxd, size, NULL,
596 BUS_DMA_NOWAIT);
597 if (error != 0) {
598 printf("%s: could not load DMA map\n", sc->sc_dev.dv_xname);
599 goto fail;
600 }
601
602 memset(ring->rxd, 0, size);
603 ring->paddr = ring->map->dm_segs[0].ds_addr;
604
605 for (i = 0; i < RT2860_RX_RING_COUNT; i++) {
606 struct rt2860_rx_data *data = &ring->data[i];
607 struct rt2860_rxd *rxd = &ring->rxd[i];
608
609 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
610 0, BUS_DMA_NOWAIT, &data->map);
611 if (error != 0) {
612 printf("%s: could not create DMA map\n",
613 sc->sc_dev.dv_xname);
614 goto fail;
615 }
616
617 MGETHDR(data->m, M_DONTWAIT, MT_DATA);
618 if (data->m == NULL) {
619 printf("%s: could not allocate Rx mbuf\n",
620 sc->sc_dev.dv_xname);
621 error = ENOMEM;
622 goto fail;
623 }
624 MCLGET(data->m, M_DONTWAIT);
625 if (!(data->m->m_flags & M_EXT)) {
626 printf("%s: could not allocate Rx mbuf cluster\n",
627 sc->sc_dev.dv_xname);
628 error = ENOMEM;
629 goto fail;
630 }
631
632 error = bus_dmamap_load(sc->sc_dmat, data->map,
633 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
634 if (error != 0) {
635 printf("%s: could not load DMA map\n",
636 sc->sc_dev.dv_xname);
637 goto fail;
638 }
639
640 rxd->sdp0 = htole32(data->map->dm_segs[0].ds_addr);
641 rxd->sdl0 = htole16(MCLBYTES);
642 }
643
644 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, size, BUS_DMASYNC_PREWRITE);
645
646 return 0;
647
648 fail: rt2860_free_rx_ring(sc, ring);
649 return error;
650 }
651
652 void
653 rt2860_reset_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
654 {
655 int i;
656
657 for (i = 0; i < RT2860_RX_RING_COUNT; i++)
658 ring->rxd[i].sdl0 &= ~htole16(RT2860_RX_DDONE);
659
660 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
661 BUS_DMASYNC_PREWRITE);
662
663 ring->cur = 0;
664 }
665
666 void
667 rt2860_free_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
668 {
669 int i;
670
671 if (ring->rxd != NULL) {
672 bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
673 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
674 bus_dmamap_unload(sc->sc_dmat, ring->map);
675 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->rxd,
676 RT2860_RX_RING_COUNT * sizeof (struct rt2860_rxd));
677 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
678 }
679 if (ring->map != NULL)
680 bus_dmamap_destroy(sc->sc_dmat, ring->map);
681
682 for (i = 0; i < RT2860_RX_RING_COUNT; i++) {
683 struct rt2860_rx_data *data = &ring->data[i];
684
685 if (data->m != NULL) {
686 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
687 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
688 bus_dmamap_unload(sc->sc_dmat, data->map);
689 m_freem(data->m);
690 }
691 if (data->map != NULL)
692 bus_dmamap_destroy(sc->sc_dmat, data->map);
693 }
694 }
695
696 int
697 rt2860_media_change(struct ifnet *ifp)
698 {
699 int error;
700
701 error = ieee80211_media_change(ifp);
702 if (error != ENETRESET)
703 return error;
704
705 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
706 rt2860_init(ifp);
707
708 return 0;
709 }
710
711 /*
712 * This function is called periodically (every 200ms) during scanning to
713 * switch from one channel to another.
714 */
715 void
716 rt2860_next_scan(void *arg)
717 {
718 struct rt2860_softc *sc = arg;
719 struct ieee80211com *ic = &sc->sc_ic;
720 struct ifnet *ifp = &ic->ic_if;
721 int s;
722
723 s = splnet();
724 if (ic->ic_state == IEEE80211_S_SCAN)
725 ieee80211_next_scan(ifp);
726 splx(s);
727 }
728
729 void
730 rt2860_iter_func(void *arg, struct ieee80211_node *ni)
731 {
732 struct rt2860_softc *sc = arg;
733 uint8_t wcid;
734
735 wcid = RT2860_AID2WCID(ni->ni_associd);
736 ieee80211_amrr_choose(&sc->amrr, ni, &sc->amn[wcid]);
737 }
738
739 void
740 rt2860_updatestats(void *arg)
741 {
742 struct rt2860_softc *sc = arg;
743 struct ieee80211com *ic = &sc->sc_ic;
744 int s;
745
746 #ifndef IEEE80211_STA_ONLY
747 /*
748 * In IBSS or HostAP modes (when the hardware sends beacons), the
749 * MAC can run into a livelock and start sending CTS-to-self frames
750 * like crazy if protection is enabled. Fortunately, we can detect
751 * when such a situation occurs and reset the MAC.
752 */
753 if (ic->ic_curmode != IEEE80211_M_STA) {
754 /* check if we're in a livelock situation.. */
755 uint32_t tmp = RAL_READ(sc, RT2860_DEBUG);
756 if ((tmp & (1 << 29)) && (tmp & (1 << 7 | 1 << 5))) {
757 /* ..and reset MAC/BBP for a while.. */
758 DPRINTF(("CTS-to-self livelock detected\n"));
759 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_SRST);
760 DELAY(1);
761 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL,
762 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN);
763 }
764 }
765 #endif
766
767 s = splnet();
768 if (ic->ic_opmode == IEEE80211_M_STA)
769 rt2860_iter_func(sc, ic->ic_bss);
770 #ifndef IEEE80211_STA_ONLY
771 else
772 ieee80211_iterate_nodes(ic, rt2860_iter_func, arg);
773 #endif
774 splx(s);
775
776 timeout_add(&sc->amrr_to, hz / 2);
777 }
778
779 void
780 rt2860_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
781 {
782 struct rt2860_softc *sc = ic->ic_softc;
783 uint8_t wcid = 0;
784 int i;
785
786 if (isnew && ni->ni_associd != 0) {
787 /* only interested in true associations */
788 wcid = RT2860_AID2WCID(ni->ni_associd);
789
790 /* init WCID table entry */
791 RAL_WRITE_REGION_1(sc, RT2860_WCID_ENTRY(wcid),
792 ni->ni_macaddr, IEEE80211_ADDR_LEN);
793 }
794 ieee80211_amrr_node_init(&sc->amrr, &sc->amn[wcid]);
795
796 /* set rate to some reasonable initial value */
797 for (i = ni->ni_rates.rs_nrates - 1;
798 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
799 i--);
800 ni->ni_txrate = i;
801
802 DPRINTF(("new assoc isnew=%d addr=%s WCID=%d, initial rate=%d\n",
803 isnew, ether_sprintf(ni->ni_macaddr), wcid,
804 ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL));
805 }
806
807 int
808 rt2860_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
809 {
810 struct rt2860_softc *sc = ic->ic_if.if_softc;
811 enum ieee80211_state ostate;
812 uint32_t tmp;
813
814 ostate = ic->ic_state;
815 timeout_del(&sc->scan_to);
816 timeout_del(&sc->amrr_to);
817
818 if (ostate == IEEE80211_S_RUN) {
819 /* turn link LED off */
820 rt2860_set_leds(sc, RT2860_LED_RADIO);
821 }
822
823 switch (nstate) {
824 case IEEE80211_S_INIT:
825 if (ostate == IEEE80211_S_RUN) {
826 /* abort TSF synchronization */
827 tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
828 RAL_WRITE(sc, RT2860_BCN_TIME_CFG,
829 tmp & ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN |
830 RT2860_TBTT_TIMER_EN));
831 }
832 break;
833
834 case IEEE80211_S_SCAN:
835 rt2860_set_chan(sc, ic->ic_bss->ni_chan);
836 timeout_add(&sc->scan_to, hz / 5);
837 break;
838
839 case IEEE80211_S_AUTH:
840 case IEEE80211_S_ASSOC:
841 rt2860_set_chan(sc, ic->ic_bss->ni_chan);
842 break;
843
844 case IEEE80211_S_RUN:
845 rt2860_set_chan(sc, ic->ic_bss->ni_chan);
846
847 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
848 rt2860_updateslot(ic);
849 rt2860_enable_mrr(sc);
850 rt2860_set_txpreamble(sc);
851 rt2860_set_basicrates(sc);
852 rt2860_set_bssid(sc, ic->ic_bss->ni_bssid);
853 }
854
855 #ifndef IEEE80211_STA_ONLY
856 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
857 ic->ic_opmode == IEEE80211_M_IBSS)
858 rt2860_setup_beacon(sc);
859 #endif
860
861 if (ic->ic_opmode == IEEE80211_M_STA) {
862 /* fake a join to init the tx rate */
863 rt2860_newassoc(ic, ic->ic_bss, 1);
864 }
865
866 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
867 rt2860_enable_tsf_sync(sc);
868 timeout_add(&sc->amrr_to, hz / 2);
869 }
870
871 /* turn link LED on */
872 rt2860_set_leds(sc, RT2860_LED_RADIO |
873 (IEEE80211_IS_CHAN_2GHZ(ic->ic_bss->ni_chan) ?
874 RT2860_LED_LINK_2GHZ : RT2860_LED_LINK_5GHZ));
875 break;
876 }
877
878 return sc->sc_newstate(ic, nstate, arg);
879 }
880
881 /*
882 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46,
883 * 93C66 or 93C86).
884 */
885 uint16_t
886 rt2860_eeprom_read(struct rt2860_softc *sc, uint8_t addr)
887 {
888 uint32_t tmp;
889 uint16_t val;
890 int n;
891
892 /* clock C once before the first command */
893 RT2860_EEPROM_CTL(sc, 0);
894
895 RT2860_EEPROM_CTL(sc, RT2860_S);
896 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
897 RT2860_EEPROM_CTL(sc, RT2860_S);
898
899 /* write start bit (1) */
900 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D);
901 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D | RT2860_C);
902
903 /* write READ opcode (10) */
904 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D);
905 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D | RT2860_C);
906 RT2860_EEPROM_CTL(sc, RT2860_S);
907 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
908
909 /* write address (A5-A0 or A7-A0) */
910 n = ((RAL_READ(sc, RT2860_PCI_EECTRL) & 0x30) == 0) ? 5 : 7;
911 for (; n >= 0; n--) {
912 RT2860_EEPROM_CTL(sc, RT2860_S |
913 (((addr >> n) & 1) << RT2860_SHIFT_D));
914 RT2860_EEPROM_CTL(sc, RT2860_S |
915 (((addr >> n) & 1) << RT2860_SHIFT_D) | RT2860_C);
916 }
917
918 RT2860_EEPROM_CTL(sc, RT2860_S);
919
920 /* read data Q15-Q0 */
921 val = 0;
922 for (n = 15; n >= 0; n--) {
923 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
924 tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
925 val |= ((tmp & RT2860_Q) >> RT2860_SHIFT_Q) << n;
926 RT2860_EEPROM_CTL(sc, RT2860_S);
927 }
928
929 RT2860_EEPROM_CTL(sc, 0);
930
931 /* clear Chip Select and clock C */
932 RT2860_EEPROM_CTL(sc, RT2860_S);
933 RT2860_EEPROM_CTL(sc, 0);
934 RT2860_EEPROM_CTL(sc, RT2860_C);
935
936 return val;
937 }
938
939 void
940 rt2860_drain_stats_fifo(struct rt2860_softc *sc)
941 {
942 struct ifnet *ifp = &sc->sc_ic.ic_if;
943 struct ieee80211_amrr_node *amn;
944 uint32_t stat;
945 uint8_t wcid, mcs, pid;
946
947 /* drain Tx status FIFO (maxsize = 16) */
948 while ((stat = RAL_READ(sc, RT2860_TX_STAT_FIFO)) & RT2860_TXQ_VLD) {
949 DPRINTFN(4, ("tx stat 0x%08x\n", stat));
950
951 wcid = (stat >> 8) & 0xff;
952
953 /* if no ACK was requested, no feedback is available */
954 if (!(stat & RT2860_TXQ_ACKREQ) || wcid == 0xff)
955 continue;
956
957 /* update per-STA AMRR stats */
958 amn = &sc->amn[wcid];
959 amn->amn_txcnt++;
960 if (stat & RT2860_TXQ_OK) {
961 /*
962 * Check if there were retries, ie if the Tx success
963 * rate is different from the requested rate. Note
964 * that it works only because we do not allow rate
965 * fallback from OFDM to CCK.
966 */
967 mcs = (stat >> RT2860_TXQ_MCS_SHIFT) & 0x7f;
968 pid = (stat >> RT2860_TXQ_PID_SHIFT) & 0xf;
969 if (mcs + 1 != pid)
970 amn->amn_retrycnt++;
971 } else {
972 amn->amn_retrycnt++;
973 ifp->if_oerrors++;
974 }
975 }
976 }
977
978 void
979 rt2860_tx_intr(struct rt2860_softc *sc, int qid)
980 {
981 struct ieee80211com *ic = &sc->sc_ic;
982 struct ifnet *ifp = &ic->ic_if;
983 struct rt2860_tx_ring *ring = &sc->txq[qid];
984 uint32_t hw;
985
986 rt2860_drain_stats_fifo(sc);
987
988 hw = RAL_READ(sc, RT2860_TX_DTX_IDX(qid));
989 while (ring->next != hw) {
990 struct rt2860_txd *txd = &ring->txd[ring->next];
991 struct rt2860_tx_data *data = ring->data[ring->next];
992
993 if (data != NULL) {
994 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
995 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
996 bus_dmamap_unload(sc->sc_dmat, data->map);
997 m_freem(data->m);
998 data->m= NULL;
999 ieee80211_release_node(ic, data->ni);
1000 data->ni = NULL;
1001
1002 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
1003 ring->data[ring->next] = NULL;
1004
1005 ifp->if_opackets++;
1006 }
1007
1008 txd->sdl0 &= ~htole16(RT2860_TX_DDONE);
1009
1010 bus_dmamap_sync(sc->sc_dmat, ring->map,
1011 ring->next * sizeof (struct rt2860_txd),
1012 sizeof (struct rt2860_txd), BUS_DMASYNC_PREWRITE);
1013
1014 ring->queued--;
1015 ring->next = (ring->next + 1) % RT2860_TX_RING_COUNT;
1016 }
1017
1018 sc->sc_tx_timer = 0;
1019 ifp->if_flags &= ~IFF_OACTIVE;
1020 rt2860_start(ifp);
1021 }
1022
1023 void
1024 rt2860_rx_intr(struct rt2860_softc *sc)
1025 {
1026 struct ieee80211com *ic = &sc->sc_ic;
1027 struct ifnet *ifp = &ic->ic_if;
1028 struct ieee80211_frame *wh;
1029 struct ieee80211_rxinfo rxi;
1030 struct ieee80211_node *ni;
1031 struct mbuf *m, *mnew;
1032 uint8_t ant, rssi;
1033 int error;
1034 #if NBPFILTER > 0
1035 struct rt2860_rx_radiotap_header *tap = &sc->sc_rxtap;
1036 struct mbuf mb;
1037 uint16_t phy;
1038 #endif
1039
1040 for (;;) {
1041 struct rt2860_rx_data *data = &sc->rxq.data[sc->rxq.cur];
1042 struct rt2860_rxd *rxd = &sc->rxq.rxd[sc->rxq.cur];
1043 struct rt2860_rxwi *rxwi;
1044
1045 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1046 sc->rxq.cur * sizeof (struct rt2860_rxd),
1047 sizeof (struct rt2860_rxd), BUS_DMASYNC_POSTREAD);
1048
1049 if (!(rxd->sdl0 & htole16(RT2860_RX_DDONE)))
1050 break;
1051
1052 if (rxd->flags &
1053 htole32(RT2860_RX_CRCERR | RT2860_RX_ICVERR)) {
1054 ifp->if_ierrors++;
1055 goto skip;
1056 }
1057
1058 if (rxd->flags & htole32(RT2860_RX_MICERR)) {
1059 /* report MIC failures to net80211 for TKIP */
1060 ic->ic_stats.is_rx_locmicfail++;
1061 ieee80211_michael_mic_failure(ic, 0/* XXX */);
1062 ifp->if_ierrors++;
1063 goto skip;
1064 }
1065
1066 MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1067 if (mnew == NULL) {
1068 ifp->if_ierrors++;
1069 goto skip;
1070 }
1071 MCLGET(mnew, M_DONTWAIT);
1072 if (!(mnew->m_flags & M_EXT)) {
1073 m_freem(mnew);
1074 ifp->if_ierrors++;
1075 goto skip;
1076 }
1077
1078 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1079 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
1080 bus_dmamap_unload(sc->sc_dmat, data->map);
1081
1082 error = bus_dmamap_load(sc->sc_dmat, data->map,
1083 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
1084 if (error != 0) {
1085 m_freem(mnew);
1086
1087 /* try to reload the old mbuf */
1088 error = bus_dmamap_load(sc->sc_dmat, data->map,
1089 mtod(data->m, void *), MCLBYTES, NULL,
1090 BUS_DMA_NOWAIT);
1091 if (error != 0) {
1092 panic("%s: could not load old rx mbuf",
1093 sc->sc_dev.dv_xname);
1094 }
1095 /* physical address may have changed */
1096 rxd->sdp0 = htole32(data->map->dm_segs[0].ds_addr);
1097 ifp->if_ierrors++;
1098 goto skip;
1099 }
1100
1101 /*
1102 * New mbuf successfully loaded, update Rx ring and continue
1103 * processing.
1104 */
1105 m = data->m;
1106 data->m = mnew;
1107 rxd->sdp0 = htole32(data->map->dm_segs[0].ds_addr);
1108
1109 rxwi = mtod(m, struct rt2860_rxwi *);
1110
1111 /* finalize mbuf */
1112 m->m_pkthdr.rcvif = ifp;
1113 m->m_data = (caddr_t)(rxwi + 1);
1114 m->m_pkthdr.len = m->m_len = letoh16(rxwi->len) & 0xfff;
1115
1116 wh = mtod(m, struct ieee80211_frame *);
1117 rxi.rxi_flags = 0;
1118 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1119 /* frame is decrypted by hardware */
1120 wh->i_fc[1] &= ~IEEE80211_FC1_PROTECTED;
1121 rxi.rxi_flags |= IEEE80211_RXI_HWDEC;
1122 }
1123
1124 /* HW may insert 2 padding bytes after 802.11 header */
1125 if (rxd->flags & htole32(RT2860_RX_L2PAD)) {
1126 u_int hdrlen = ieee80211_get_hdrlen(wh);
1127 ovbcopy(wh, (caddr_t)wh + 2, hdrlen);
1128 m->m_data += 2;
1129 wh = mtod(m, struct ieee80211_frame *);
1130 }
1131
1132 ant = rt2860_maxrssi_chain(sc, rxwi);
1133 rssi = rxwi->rssi[ant];
1134
1135 #if NBPFILTER > 0
1136 if (sc->sc_drvbpf == NULL)
1137 goto skipbpf;
1138
1139 tap->wr_flags = 0;
1140 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1141 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1142 tap->wr_antsignal = rssi;
1143 tap->wr_antenna = ant;
1144 tap->wr_dbm_antsignal = rt2860_rssi2dbm(sc, rssi, ant);
1145 tap->wr_rate = 2; /* in case it can't be found below */
1146 phy = letoh16(rxwi->phy);
1147 switch (phy & RT2860_PHY_MODE) {
1148 case RT2860_PHY_CCK:
1149 switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) {
1150 case 0: tap->wr_rate = 2; break;
1151 case 1: tap->wr_rate = 4; break;
1152 case 2: tap->wr_rate = 11; break;
1153 case 3: tap->wr_rate = 22; break;
1154 }
1155 if (phy & RT2860_PHY_SHPRE)
1156 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
1157 break;
1158 case RT2860_PHY_OFDM:
1159 switch (phy & RT2860_PHY_MCS) {
1160 case 0: tap->wr_rate = 12; break;
1161 case 1: tap->wr_rate = 18; break;
1162 case 2: tap->wr_rate = 24; break;
1163 case 3: tap->wr_rate = 36; break;
1164 case 4: tap->wr_rate = 48; break;
1165 case 5: tap->wr_rate = 72; break;
1166 case 6: tap->wr_rate = 96; break;
1167 case 7: tap->wr_rate = 108; break;
1168 }
1169 break;
1170 }
1171 mb.m_data = (caddr_t)tap;
1172 mb.m_len = sc->sc_rxtap_len;
1173 mb.m_next = m;
1174 mb.m_nextpkt = NULL;
1175 mb.m_type = 0;
1176 mb.m_flags = 0;
1177 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
1178 skipbpf:
1179 #endif
1180 /* grab a reference to the source node */
1181 ni = ieee80211_find_rxnode(ic, wh);
1182
1183 /* send the frame to the 802.11 layer */
1184 rxi.rxi_rssi = rssi;
1185 rxi.rxi_tstamp = 0; /* unused */
1186 ieee80211_input(ifp, m, ni, &rxi);
1187
1188 /* node is no longer needed */
1189 ieee80211_release_node(ic, ni);
1190
1191 skip: rxd->sdl0 &= ~htole16(RT2860_RX_DDONE);
1192
1193 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1194 sc->rxq.cur * sizeof (struct rt2860_rxd),
1195 sizeof (struct rt2860_rxd), BUS_DMASYNC_PREWRITE);
1196
1197 sc->rxq.cur = (sc->rxq.cur + 1) % RT2860_RX_RING_COUNT;
1198 }
1199
1200 /* tell HW what we have processed */
1201 RAL_WRITE(sc, RT2860_RX_CALC_IDX,
1202 (sc->rxq.cur - 1) % RT2860_RX_RING_COUNT);
1203 }
1204
1205 int
1206 rt2860_intr(void *arg)
1207 {
1208 struct rt2860_softc *sc = arg;
1209 uint32_t r;
1210
1211 r = RAL_READ(sc, RT2860_INT_STATUS);
1212 if (r == 0xffffffff)
1213 return 0; /* device likely went away */
1214 if (r == 0)
1215 return 0; /* not for us */
1216
1217 /* acknowledge interrupts */
1218 RAL_WRITE(sc, RT2860_INT_STATUS, r);
1219
1220 if (r & RT2860_TX_COHERENT)
1221 /* TBD */;
1222
1223 if (r & RT2860_RX_COHERENT)
1224 /* TBD */;
1225
1226 if (r & RT2860_MAC_INT_2)
1227 rt2860_drain_stats_fifo(sc);
1228
1229 if (r & RT2860_TX_DONE_INT5)
1230 rt2860_tx_intr(sc, 5);
1231
1232 if (r & RT2860_RX_DONE_INT)
1233 rt2860_rx_intr(sc);
1234
1235 if (r & RT2860_TX_DONE_INT4)
1236 rt2860_tx_intr(sc, 4);
1237
1238 if (r & RT2860_TX_DONE_INT3)
1239 rt2860_tx_intr(sc, 3);
1240
1241 if (r & RT2860_TX_DONE_INT2)
1242 rt2860_tx_intr(sc, 2);
1243
1244 if (r & RT2860_TX_DONE_INT1)
1245 rt2860_tx_intr(sc, 1);
1246
1247 if (r & RT2860_TX_DONE_INT0)
1248 rt2860_tx_intr(sc, 0);
1249
1250 #ifndef IEEE80211_STA_ONLY
1251 if (r & RT2860_MAC_INT_1) { /* pre-TBTT */
1252 if ((sc->sc_flags & RT2860_UPD_BEACON) &&
1253 rt2860_setup_beacon(sc) == 0)
1254 sc->sc_flags &= ~RT2860_UPD_BEACON;
1255 }
1256 #endif
1257 if (r & RT2860_MAC_INT_0) { /* TBTT */
1258 struct ieee80211com *ic = &sc->sc_ic;
1259 /* check if protection mode has changed */
1260 if ((sc->sc_ic_flags ^ ic->ic_flags) & IEEE80211_F_USEPROT) {
1261 rt2860_updateprot(ic);
1262 sc->sc_ic_flags = ic->ic_flags;
1263 }
1264 }
1265
1266 if (r & RT2860_MAC_INT_3)
1267 /* TBD wakeup */;
1268
1269 return 1;
1270 }
1271
1272 /* quickly determine if a given rate is CCK or OFDM */
1273 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1274
1275 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
1276 #define RAL_SIFS_TIME 10
1277
1278 /*
1279 * Return the expected ack rate for a frame transmitted at rate `rate'.
1280 */
1281 int
1282 rt2860_ack_rate(struct ieee80211com *ic, int rate)
1283 {
1284 switch (rate) {
1285 /* CCK rates */
1286 case 2:
1287 return 2;
1288 case 4:
1289 case 11:
1290 case 22:
1291 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1292
1293 /* OFDM rates */
1294 case 12:
1295 case 18:
1296 return 12;
1297 case 24:
1298 case 36:
1299 return 24;
1300 case 48:
1301 case 72:
1302 case 96:
1303 case 108:
1304 return 48;
1305 }
1306
1307 /* default to 1Mbps */
1308 return 2;
1309 }
1310
1311 /*
1312 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1313 * The function automatically determines the operating mode depending on the
1314 * given rate. `flags' indicates whether short preamble is in use or not.
1315 */
1316 uint16_t
1317 rt2860_txtime(int len, int rate, uint32_t flags)
1318 {
1319 uint16_t txtime;
1320
1321 if (RAL_RATE_IS_OFDM(rate)) {
1322 /* IEEE Std 802.11g-2003, pp. 44 */
1323 txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1324 txtime = 16 + 4 + 4 * txtime + 6;
1325 } else {
1326 /* IEEE Std 802.11b-1999, pp. 28 */
1327 txtime = (16 * len + rate - 1) / rate;
1328 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1329 txtime += 72 + 24;
1330 else
1331 txtime += 144 + 48;
1332 }
1333 return txtime;
1334 }
1335
1336 uint8_t
1337 rt2860_rate2mcs(uint8_t rate)
1338 {
1339 switch (rate) {
1340 /* CCK rates */
1341 case 2: return 0;
1342 case 4: return 1;
1343 case 11: return 2;
1344 case 22: return 3;
1345 /* OFDM rates */
1346 case 12: return 0;
1347 case 18: return 1;
1348 case 24: return 2;
1349 case 36: return 3;
1350 case 48: return 4;
1351 case 72: return 5;
1352 case 96: return 6;
1353 case 108: return 7;
1354 }
1355 return 0; /* shouldn't get there */
1356 }
1357
1358 int
1359 rt2860_tx_data(struct rt2860_softc *sc, struct mbuf *m0,
1360 struct ieee80211_node *ni, int qid)
1361 {
1362 struct ieee80211com *ic = &sc->sc_ic;
1363 struct rt2860_tx_ring *ring = &sc->txq[qid];
1364 struct rt2860_tx_data *data;
1365 struct rt2860_txd *txd;
1366 struct rt2860_txwi *txwi;
1367 struct ieee80211_frame *wh;
1368 bus_dma_segment_t *seg;
1369 u_int hdrlen;
1370 uint16_t dur;
1371 uint8_t type, qsel, mcs, pid;
1372 int nsegs, ntxds, rate, error;
1373
1374 /* the data pool contains at least one element, pick the first */
1375 data = SLIST_FIRST(&sc->data_pool);
1376
1377 wh = mtod(m0, struct ieee80211_frame *);
1378 hdrlen = ieee80211_get_hdrlen(wh);
1379 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1380
1381 /* pickup a rate */
1382 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
1383 type != IEEE80211_FC0_TYPE_DATA)
1384 rate = ni->ni_rates.rs_rates[0];
1385 else if (ic->ic_fixed_rate != -1)
1386 rate = ic->ic_sup_rates[ic->ic_curmode].
1387 rs_rates[ic->ic_fixed_rate];
1388 else
1389 rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1390 rate &= IEEE80211_RATE_VAL;
1391
1392 /* get MCS code from rate */
1393 mcs = rt2860_rate2mcs(rate);
1394
1395 /* setup TX Wireless Information */
1396 txwi = data->txwi;
1397 memset(txwi, 0, sizeof (struct rt2860_txwi));
1398 txwi->wcid = (type == IEEE80211_FC0_TYPE_DATA) ?
1399 RT2860_AID2WCID(ni->ni_associd) : 0xff;
1400 txwi->len = htole16(m0->m_pkthdr.len);
1401 if (!RAL_RATE_IS_OFDM(rate)) {
1402 txwi->phy = htole16(RT2860_PHY_CCK);
1403 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1404 mcs |= RT2860_PHY_SHPRE;
1405 } else
1406 txwi->phy = htole16(RT2860_PHY_OFDM);
1407 txwi->phy |= htole16(mcs);
1408
1409 /*
1410 * We store the MCS code into the driver-private PacketID field.
1411 * The PacketID is latched into TX_STAT_FIFO when Tx completes so
1412 * that we know at which initial rate the frame was transmitted.
1413 * We add 1 to the MCS code because setting the PacketID field to
1414 * 0 means that we don't want feedback in TX_STAT_FIFO.
1415 */
1416 pid = (mcs + 1) & 0xf;
1417 txwi->len |= htole16(pid << RT2860_TX_PID_SHIFT);
1418
1419 /* check if RTS/CTS or CTS-to-self protection is required */
1420 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1421 (m0->m_pkthdr.len + IEEE80211_CRC_LEN > ic->ic_rtsthreshold ||
1422 ((ic->ic_flags & IEEE80211_F_USEPROT) && RAL_RATE_IS_OFDM(rate))))
1423 txwi->txop = RT2860_TX_TXOP_HT;
1424 else
1425 txwi->txop = RT2860_TX_TXOP_BACKOFF;
1426
1427 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1428 txwi->xflags |= RT2860_TX_ACK;
1429
1430 dur = rt2860_txtime(RAL_ACK_SIZE, rt2860_ack_rate(ic, rate),
1431 ic->ic_flags) + sc->sifs;
1432 *(uint16_t *)wh->i_dur = htole16(dur);
1433 }
1434 #ifndef IEEE80211_STA_ONLY
1435 /* ask MAC to insert timestamp into probe responses */
1436 if ((wh->i_fc[0] &
1437 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1438 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1439 /* NOTE: beacons do not pass through tx_data() */
1440 txwi->flags |= RT2860_TX_TS;
1441 #endif
1442
1443 #if NBPFILTER > 0
1444 if (sc->sc_drvbpf != NULL) {
1445 struct rt2860_tx_radiotap_header *tap = &sc->sc_txtap;
1446 struct mbuf mb;
1447
1448 tap->wt_flags = 0;
1449 tap->wt_rate = rate;
1450 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1451 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1452 tap->wt_hwqueue = qid;
1453 if (mcs & RT2860_PHY_SHPRE)
1454 tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
1455
1456 mb.m_data = (caddr_t)tap;
1457 mb.m_len = sc->sc_txtap_len;
1458 mb.m_next = m0;
1459 mb.m_nextpkt = NULL;
1460 mb.m_type = 0;
1461 mb.m_flags = 0;
1462 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
1463 }
1464 #endif
1465
1466 /* copy and trim 802.11 header */
1467 memcpy(&txwi->wh, wh, hdrlen);
1468 m_adj(m0, hdrlen);
1469
1470 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1471 BUS_DMA_NOWAIT);
1472 if (error != 0 && error != EFBIG) {
1473 printf("%s: could not map mbuf (error %d)\n",
1474 sc->sc_dev.dv_xname, error);
1475 m_freem(m0);
1476 return error;
1477 }
1478 if (error == 0) {
1479 /* determine how many TXDs are required */
1480 ntxds = 1 + (data->map->dm_nsegs / 2);
1481
1482 if (ring->queued + ntxds >= RT2860_TX_RING_COUNT) {
1483 /* not enough free TXDs, force mbuf defrag */
1484 bus_dmamap_unload(sc->sc_dmat, data->map);
1485 error = EFBIG;
1486 }
1487 }
1488 if (error != 0) { /* too many fragments, linearize */
1489 if (m_defrag(m0, M_DONTWAIT) != 0) {
1490 m_freem(m0);
1491 return ENOMEM;
1492 }
1493 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1494 BUS_DMA_NOWAIT);
1495 if (error != 0) {
1496 printf("%s: could not map mbuf (error %d)\n",
1497 sc->sc_dev.dv_xname, error);
1498 m_freem(m0);
1499 return error;
1500 }
1501
1502 /* determine how many TXDs are now required */
1503 ntxds = 1 + (data->map->dm_nsegs / 2);
1504
1505 if (ring->queued + ntxds >= RT2860_TX_RING_COUNT) {
1506 /* this is an hopeless case, drop the mbuf! */
1507 bus_dmamap_unload(sc->sc_dmat, data->map);
1508 m_freem(m0);
1509 return ENOMEM;
1510 }
1511 }
1512
1513 qsel = (qid < EDCA_NUM_AC) ? RT2860_TX_QSEL_EDCA : RT2860_TX_QSEL_MGMT;
1514
1515 /* first segment is TXWI + 802.11 header */
1516 txd = &ring->txd[ring->cur];
1517 txd->sdp0 = htole32(data->paddr);
1518 txd->sdl0 = htole16(16 + hdrlen);
1519 txd->flags = qsel;
1520
1521 /* setup payload segments */
1522 seg = data->map->dm_segs;
1523 for (nsegs = data->map->dm_nsegs; nsegs >= 2; nsegs -= 2) {
1524 txd->sdp1 = htole32(seg->ds_addr);
1525 txd->sdl1 = htole16(seg->ds_len);
1526 seg++;
1527 ring->cur = (ring->cur + 1) % RT2860_TX_RING_COUNT;
1528 /* grab a new Tx descriptor */
1529 txd = &ring->txd[ring->cur];
1530 txd->sdp0 = htole32(seg->ds_addr);
1531 txd->sdl0 = htole16(seg->ds_len);
1532 txd->flags = qsel;
1533 seg++;
1534 }
1535 /* finalize last segment */
1536 if (nsegs > 0) {
1537 txd->sdp1 = htole32(seg->ds_addr);
1538 txd->sdl1 = htole16(seg->ds_len | RT2860_TX_LS1);
1539 } else {
1540 txd->sdl0 |= htole16(RT2860_TX_LS0);
1541 txd->sdl1 = 0;
1542 }
1543
1544 /* remove from the free pool and link it into the SW Tx slot */
1545 SLIST_REMOVE_HEAD(&sc->data_pool, next);
1546 data->m = m0;
1547 data->ni = ni;
1548 ring->data[ring->cur] = data;
1549
1550 bus_dmamap_sync(sc->sc_dmat, sc->txwi_map,
1551 (caddr_t)txwi - (caddr_t)sc->txwi, sizeof (struct rt2860_txwi),
1552 BUS_DMASYNC_PREWRITE);
1553 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1554 BUS_DMASYNC_PREWRITE);
1555 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
1556 BUS_DMASYNC_PREWRITE);
1557
1558 DPRINTFN(4, ("sending frame qid=%d wcid=%d nsegs=%d rate=%d\n",
1559 qid, txwi->wcid, data->map->dm_nsegs, rate));
1560
1561 ring->queued += ntxds;
1562 ring->cur = (ring->cur + 1) % RT2860_TX_RING_COUNT;
1563
1564 /* kick Tx */
1565 RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), ring->cur);
1566
1567 return 0;
1568 }
1569
1570 void
1571 rt2860_start(struct ifnet *ifp)
1572 {
1573 struct rt2860_softc *sc = ifp->if_softc;
1574 struct ieee80211com *ic = &sc->sc_ic;
1575 struct ieee80211_node *ni;
1576 struct mbuf *m0;
1577
1578 /*
1579 * net80211 may still try to send management frames even if the
1580 * IFF_RUNNING flag is not set...
1581 */
1582 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1583 return;
1584
1585 for (;;) {
1586 IF_POLL(&ic->ic_mgtq, m0);
1587 if (m0 != NULL) {
1588 if (SLIST_EMPTY(&sc->data_pool) ||
1589 sc->txq[sc->mgtqid].queued >=
1590 RT2860_TX_RING_COUNT) {
1591 ifp->if_flags |= IFF_OACTIVE;
1592 break;
1593 }
1594 IF_DEQUEUE(&ic->ic_mgtq, m0);
1595
1596 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1597 m0->m_pkthdr.rcvif = NULL;
1598 #if NBPFILTER > 0
1599 if (ic->ic_rawbpf != NULL)
1600 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1601 #endif
1602 if (rt2860_tx_data(sc, m0, ni, sc->mgtqid) != 0)
1603 break;
1604
1605 } else {
1606 if (ic->ic_state != IEEE80211_S_RUN)
1607 break;
1608 IFQ_POLL(&ifp->if_snd, m0);
1609 if (m0 == NULL)
1610 break;
1611 if (SLIST_EMPTY(&sc->data_pool) ||
1612 sc->txq[EDCA_AC_BE].queued >=
1613 RT2860_TX_RING_COUNT) {
1614 ifp->if_flags |= IFF_OACTIVE;
1615 break;
1616 }
1617 IFQ_DEQUEUE(&ifp->if_snd, m0);
1618 #if NBPFILTER > 0
1619 if (ifp->if_bpf != NULL)
1620 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT);
1621 #endif
1622 m0 = ieee80211_encap(ifp, m0, &ni);
1623 if (m0 == NULL)
1624 continue;
1625 #if NBPFILTER > 0
1626 if (ic->ic_rawbpf != NULL)
1627 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1628 #endif
1629 if (rt2860_tx_data(sc, m0, ni, EDCA_AC_BE) != 0) {
1630 if (ni != NULL)
1631 ieee80211_release_node(ic, ni);
1632 ifp->if_oerrors++;
1633 break;
1634 }
1635 }
1636
1637 sc->sc_tx_timer = 5;
1638 ifp->if_timer = 1;
1639 }
1640 }
1641
1642 void
1643 rt2860_watchdog(struct ifnet *ifp)
1644 {
1645 struct rt2860_softc *sc = ifp->if_softc;
1646
1647 ifp->if_timer = 0;
1648
1649 if (sc->sc_tx_timer > 0) {
1650 if (--sc->sc_tx_timer == 0) {
1651 printf("%s: device timeout\n", sc->sc_dev.dv_xname);
1652 rt2860_init(ifp);
1653 ifp->if_oerrors++;
1654 return;
1655 }
1656 ifp->if_timer = 1;
1657 }
1658
1659 ieee80211_watchdog(ifp);
1660 }
1661
1662 int
1663 rt2860_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1664 {
1665 struct rt2860_softc *sc = ifp->if_softc;
1666 struct ieee80211com *ic = &sc->sc_ic;
1667 struct ifaddr *ifa;
1668 struct ifreq *ifr;
1669 int s, error = 0;
1670
1671 s = splnet();
1672
1673 switch (cmd) {
1674 case SIOCSIFADDR:
1675 ifa = (struct ifaddr *)data;
1676 ifp->if_flags |= IFF_UP;
1677 #ifdef INET
1678 if (ifa->ifa_addr->sa_family == AF_INET)
1679 arp_ifinit(&ic->ic_ac, ifa);
1680 #endif
1681 /* FALLTHROUGH */
1682 case SIOCSIFFLAGS:
1683 if (ifp->if_flags & IFF_UP) {
1684 if (!(ifp->if_flags & IFF_RUNNING))
1685 rt2860_init(ifp);
1686 } else {
1687 if (ifp->if_flags & IFF_RUNNING)
1688 rt2860_stop(ifp, 1);
1689 }
1690 break;
1691
1692 case SIOCADDMULTI:
1693 case SIOCDELMULTI:
1694 ifr = (struct ifreq *)data;
1695 error = (cmd == SIOCADDMULTI) ?
1696 ether_addmulti(ifr, &ic->ic_ac) :
1697 ether_delmulti(ifr, &ic->ic_ac);
1698
1699 if (error == ENETRESET)
1700 error = 0;
1701 break;
1702
1703 case SIOCS80211CHANNEL:
1704 /*
1705 * This allows for fast channel switching in monitor mode
1706 * (used by kismet). In IBSS mode, we must explicitly reset
1707 * the interface to generate a new beacon frame.
1708 */
1709 error = ieee80211_ioctl(ifp, cmd, data);
1710 if (error == ENETRESET &&
1711 ic->ic_opmode == IEEE80211_M_MONITOR) {
1712 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1713 (IFF_UP | IFF_RUNNING))
1714 rt2860_set_chan(sc, ic->ic_ibss_chan);
1715 error = 0;
1716 }
1717 break;
1718
1719 default:
1720 error = ieee80211_ioctl(ifp, cmd, data);
1721 }
1722
1723 if (error == ENETRESET) {
1724 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1725 (IFF_UP | IFF_RUNNING))
1726 rt2860_init(ifp);
1727 error = 0;
1728 }
1729
1730 splx(s);
1731
1732 return error;
1733 }
1734
1735 /*
1736 * Reading and writing from/to the BBP is different from RT2560 and RT2661.
1737 * We access the BBP through the 8051 microcontroller unit which means that
1738 * the microcode must be loaded first.
1739 */
1740 void
1741 rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
1742 {
1743 int ntries;
1744
1745 for (ntries = 0; ntries < 100; ntries++) {
1746 if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
1747 break;
1748 DELAY(1);
1749 }
1750 if (ntries == 100) {
1751 printf("%s: could not write to BBP through MCU\n",
1752 sc->sc_dev.dv_xname);
1753 return;
1754 }
1755
1756 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, RT2860_BBP_RW_PARALLEL |
1757 RT2860_BBP_CSR_KICK | reg << 8 | val);
1758
1759 (void)rt2860_mcu_cmd(sc, RT2860_MCU_CMD_BBP, 0);
1760 DELAY(1000);
1761 }
1762
1763 uint8_t
1764 rt2860_mcu_bbp_read(struct rt2860_softc *sc, uint8_t reg)
1765 {
1766 uint32_t val;
1767 int ntries;
1768
1769 for (ntries = 0; ntries < 100; ntries++) {
1770 if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
1771 break;
1772 DELAY(1);
1773 }
1774 if (ntries == 100) {
1775 printf("%s: could not read from BBP through MCU\n",
1776 sc->sc_dev.dv_xname);
1777 return 0;
1778 }
1779
1780 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, RT2860_BBP_RW_PARALLEL |
1781 RT2860_BBP_CSR_KICK | RT2860_BBP_CSR_READ | reg << 8);
1782
1783 (void)rt2860_mcu_cmd(sc, RT2860_MCU_CMD_BBP, 0);
1784 DELAY(1000);
1785
1786 for (ntries = 0; ntries < 100; ntries++) {
1787 val = RAL_READ(sc, RT2860_H2M_BBPAGENT);
1788 if (!(val & RT2860_BBP_CSR_KICK))
1789 return val & 0xff;
1790 DELAY(1);
1791 }
1792 printf("%s: could not read from BBP through MCU\n",
1793 sc->sc_dev.dv_xname);
1794
1795 return 0;
1796 }
1797
1798 /*
1799 * Write to one of the 4 programmable 24-bit RF registers.
1800 */
1801 void
1802 rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)
1803 {
1804 uint32_t tmp;
1805 int ntries;
1806
1807 for (ntries = 0; ntries < 100; ntries++) {
1808 if (!(RAL_READ(sc, RT2860_RF_CSR_CFG0) & RT2860_RF_REG_CTRL))
1809 break;
1810 DELAY(1);
1811 }
1812 if (ntries == 100) {
1813 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
1814 return;
1815 }
1816
1817 /* RF registers are 24-bit on the RT2860 */
1818 tmp = RT2860_RF_REG_CTRL | 24 << RT2860_RF_REG_WIDTH_SHIFT |
1819 (val & 0x3fffff) << 2 | (reg & 3);
1820 RAL_WRITE(sc, RT2860_RF_CSR_CFG0, tmp);
1821 }
1822
1823 /*
1824 * Send a command to the 8051 microcontroller unit.
1825 */
1826 int
1827 rt2860_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd, uint16_t arg)
1828 {
1829 int ntries;
1830
1831 for (ntries = 0; ntries < 100; ntries++) {
1832 if (!(RAL_READ(sc, RT2860_H2M_MAILBOX) & RT2860_H2M_BUSY))
1833 break;
1834 DELAY(2);
1835 }
1836 if (ntries == 100)
1837 return EIO;
1838
1839 RAL_WRITE(sc, RT2860_H2M_MAILBOX,
1840 RT2860_H2M_BUSY | RT2860_TOKEN_NO_INTR << 16 | arg);
1841 RAL_WRITE(sc, RT2860_HOST_CMD, cmd);
1842
1843 return 0;
1844 }
1845
1846 void
1847 rt2860_enable_mrr(struct rt2860_softc *sc)
1848 {
1849 #define CCK(mcs) (mcs)
1850 #define OFDM(mcs) (1 << 3 | (mcs))
1851 RAL_WRITE(sc, RT2860_LG_FBK_CFG0,
1852 OFDM(6) << 28 | /* 54->48 */
1853 OFDM(5) << 24 | /* 48->36 */
1854 OFDM(4) << 20 | /* 36->24 */
1855 OFDM(3) << 16 | /* 24->18 */
1856 OFDM(2) << 12 | /* 18->12 */
1857 OFDM(1) << 8 | /* 12-> 9 */
1858 OFDM(0) << 4 | /* 9-> 6 */
1859 OFDM(0)); /* 6-> 6 */
1860
1861 RAL_WRITE(sc, RT2860_LG_FBK_CFG1,
1862 CCK(2) << 12 | /* 11->5.5 */
1863 CCK(1) << 8 | /* 5.5-> 2 */
1864 CCK(0) << 4 | /* 2-> 1 */
1865 CCK(0)); /* 1-> 1 */
1866 #undef OFDM
1867 #undef CCK
1868 }
1869
1870 void
1871 rt2860_set_txpreamble(struct rt2860_softc *sc)
1872 {
1873 uint32_t tmp;
1874
1875 tmp = RAL_READ(sc, RT2860_AUTO_RSP_CFG);
1876 tmp &= ~RT2860_CCK_SHORT_EN;
1877 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1878 tmp |= RT2860_CCK_SHORT_EN;
1879 RAL_WRITE(sc, RT2860_AUTO_RSP_CFG, tmp);
1880 }
1881
1882 void
1883 rt2860_set_basicrates(struct rt2860_softc *sc)
1884 {
1885 struct ieee80211com *ic = &sc->sc_ic;
1886
1887 /* set basic rates mask */
1888 if (ic->ic_curmode == IEEE80211_MODE_11B)
1889 RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x003);
1890 else if (ic->ic_curmode == IEEE80211_MODE_11A)
1891 RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x150);
1892 else /* 11g */
1893 RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x15f);
1894 }
1895
1896 void
1897 rt2860_select_chan_group(struct rt2860_softc *sc, int group)
1898 {
1899 uint32_t tmp;
1900
1901 rt2860_mcu_bbp_write(sc, 62, 0x37 - sc->lna[group]);
1902 rt2860_mcu_bbp_write(sc, 63, 0x37 - sc->lna[group]);
1903 rt2860_mcu_bbp_write(sc, 64, 0x37 - sc->lna[group]);
1904 rt2860_mcu_bbp_write(sc, 82, (group == 0) ? 0x62 : 0xf2);
1905
1906 tmp = RAL_READ(sc, RT2860_TX_BAND_CFG);
1907 tmp &= ~(RT2860_5G_BAND_SEL_N | RT2860_5G_BAND_SEL_P);
1908 tmp |= (group == 0) ? RT2860_5G_BAND_SEL_N : RT2860_5G_BAND_SEL_P;
1909 RAL_WRITE(sc, RT2860_TX_BAND_CFG, tmp);
1910
1911 /* enable appropriate Power Amplifiers and Low Noise Amplifiers */
1912 tmp = RT2860_RFTR_EN | RT2860_TRSW_EN;
1913 if (group == 0) { /* 2GHz */
1914 tmp |= RT2860_PA_PE_G0_EN | RT2860_LNA_PE_G0_EN;
1915 if (sc->ntxchains > 1)
1916 tmp |= RT2860_PA_PE_G1_EN;
1917 if (sc->nrxchains > 1)
1918 tmp |= RT2860_LNA_PE_G1_EN;
1919 } else { /* 5GHz */
1920 tmp |= RT2860_PA_PE_A0_EN | RT2860_LNA_PE_A0_EN;
1921 if (sc->ntxchains > 1)
1922 tmp |= RT2860_PA_PE_A1_EN;
1923 if (sc->nrxchains > 1)
1924 tmp |= RT2860_LNA_PE_A1_EN;
1925 }
1926 RAL_WRITE(sc, RT2860_TX_PIN_CFG, tmp);
1927
1928 rt2860_mcu_bbp_write(sc, 66, 0x2e + sc->lna[group]);
1929 }
1930
1931 void
1932 rt2860_set_chan(struct rt2860_softc *sc, struct ieee80211_channel *c)
1933 {
1934 struct ieee80211com *ic = &sc->sc_ic;
1935 const struct rfprog *rfprog = rt2860_rf2850;
1936 uint32_t r2, r3, r4;
1937 int8_t txpow1, txpow2;
1938 u_int i, chan, group;
1939
1940 chan = ieee80211_chan2ieee(ic, c);
1941 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1942 return;
1943
1944 /* find the settings for this channel (we know it exists) */
1945 for (i = 0; rfprog[i].chan != chan; i++);
1946
1947 r2 = rfprog[i].r2;
1948 if (sc->ntxchains == 1)
1949 r2 |= 1 << 12; /* 1T: disable Tx chain 2 */
1950 if (sc->nrxchains == 1)
1951 r2 |= 1 << 15 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */
1952 else if (sc->nrxchains == 2)
1953 r2 |= 1 << 4; /* 2R: disable Rx chain 3 */
1954
1955 /* use Tx power values from EEPROM */
1956 txpow1 = sc->txpow1[i];
1957 txpow2 = sc->txpow2[i];
1958 if (IEEE80211_IS_CHAN_5GHZ(c)) {
1959 txpow1 = txpow1 << 1 | 1;
1960 txpow2 = txpow2 << 1 | 1;
1961 }
1962 r3 = rfprog[i].r3 | txpow1 << 7;
1963 r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4;
1964
1965 rt2860_rf_write(sc, RAL_RF1, rfprog[i].r1);
1966 rt2860_rf_write(sc, RAL_RF2, r2);
1967 rt2860_rf_write(sc, RAL_RF3, r3);
1968 rt2860_rf_write(sc, RAL_RF4, r4);
1969
1970 DELAY(200);
1971
1972 rt2860_rf_write(sc, RAL_RF1, rfprog[i].r1);
1973 rt2860_rf_write(sc, RAL_RF2, r2);
1974 rt2860_rf_write(sc, RAL_RF3, r3 | 1);
1975 rt2860_rf_write(sc, RAL_RF4, r4);
1976
1977 DELAY(200);
1978
1979 rt2860_rf_write(sc, RAL_RF1, rfprog[i].r1);
1980 rt2860_rf_write(sc, RAL_RF2, r2);
1981 rt2860_rf_write(sc, RAL_RF3, r3);
1982 rt2860_rf_write(sc, RAL_RF4, r4);
1983
1984 /* 802.11a uses a 16 microseconds short interframe space */
1985 sc->sifs = IEEE80211_IS_CHAN_5GHZ(c) ? 16 : 10;
1986
1987 /* determine channel group */
1988 if (chan <= 14)
1989 group = 0;
1990 else if (chan <= 64)
1991 group = 1;
1992 else if (chan <= 128)
1993 group = 2;
1994 else
1995 group = 3;
1996
1997 /* XXX necessary only when group has changed! */
1998 rt2860_select_chan_group(sc, group);
1999
2000 DELAY(1000);
2001 }
2002
2003 void
2004 rt2860_set_leds(struct rt2860_softc *sc, uint16_t which)
2005 {
2006 (void)rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LEDS,
2007 which | (sc->leds & 0x7f));
2008 }
2009
2010 void
2011 rt2860_set_bssid(struct rt2860_softc *sc, const uint8_t *bssid)
2012 {
2013 RAL_WRITE(sc, RT2860_MAC_BSSID_DW0,
2014 bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24);
2015 RAL_WRITE(sc, RT2860_MAC_BSSID_DW1,
2016 bssid[4] | bssid[5] << 8);
2017 }
2018
2019 void
2020 rt2860_set_macaddr(struct rt2860_softc *sc, const uint8_t *addr)
2021 {
2022 RAL_WRITE(sc, RT2860_MAC_ADDR_DW0,
2023 addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24);
2024 RAL_WRITE(sc, RT2860_MAC_ADDR_DW1,
2025 addr[4] | addr[5] << 8);
2026 }
2027
2028 void
2029 rt2860_updateslot(struct ieee80211com *ic)
2030 {
2031 struct rt2860_softc *sc = ic->ic_softc;
2032 uint32_t tmp;
2033
2034 #ifndef IEEE80211_STA_ONLY
2035 if (ic->ic_opmode == IEEE80211_M_HOSTAP)
2036 sc->sc_flags |= RT2860_UPD_BEACON;
2037 #endif
2038
2039 tmp = RAL_READ(sc, RT2860_BKOFF_SLOT_CFG);
2040 tmp &= ~0xff;
2041 tmp |= (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2042 RAL_WRITE(sc, RT2860_BKOFF_SLOT_CFG, tmp);
2043 }
2044
2045 void
2046 rt2860_updateprot(struct ieee80211com *ic)
2047 {
2048 struct rt2860_softc *sc = ic->ic_softc;
2049 uint32_t tmp;
2050
2051 tmp = RT2860_RTSTH_EN | RT2860_PROT_NAV_SHORT | RT2860_TXOP_ALLOW_ALL;
2052 /* setup protection frame rate (MCS code) */
2053 tmp |= (ic->ic_curmode == IEEE80211_MODE_11A) ? 0 : 3;
2054
2055 /* CCK frames don't require protection */
2056 RAL_WRITE(sc, RT2860_CCK_PROT_CFG, tmp);
2057
2058 if (ic->ic_flags & IEEE80211_F_USEPROT) {
2059 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
2060 tmp |= RT2860_PROT_CTRL_RTS_CTS;
2061 else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
2062 tmp |= RT2860_PROT_CTRL_CTS;
2063 }
2064 RAL_WRITE(sc, RT2860_OFDM_PROT_CFG, tmp);
2065 }
2066
2067 void
2068 rt2860_updateedca(struct ieee80211com *ic)
2069 {
2070 struct rt2860_softc *sc = ic->ic_softc;
2071 int aci;
2072
2073 /* update MAC TX configuration registers */
2074 for (aci = 0; aci < EDCA_NUM_AC; aci++) {
2075 RAL_WRITE(sc, RT2860_EDCA_AC_CFG(aci),
2076 ic->ic_edca_ac[aci].ac_ecwmax << 16 |
2077 ic->ic_edca_ac[aci].ac_ecwmin << 12 |
2078 ic->ic_edca_ac[aci].ac_aifsn << 8 |
2079 ic->ic_edca_ac[aci].ac_txoplimit);
2080 }
2081
2082 /* update SCH/DMA registers too */
2083 RAL_WRITE(sc, RT2860_WMM_AIFSN_CFG,
2084 ic->ic_edca_ac[EDCA_AC_VO].ac_aifsn << 12 |
2085 ic->ic_edca_ac[EDCA_AC_VI].ac_aifsn << 8 |
2086 ic->ic_edca_ac[EDCA_AC_BK].ac_aifsn << 4 |
2087 ic->ic_edca_ac[EDCA_AC_BE].ac_aifsn);
2088 RAL_WRITE(sc, RT2860_WMM_CWMIN_CFG,
2089 ic->ic_edca_ac[EDCA_AC_VO].ac_ecwmin << 12 |
2090 ic->ic_edca_ac[EDCA_AC_VI].ac_ecwmin << 8 |
2091 ic->ic_edca_ac[EDCA_AC_BK].ac_ecwmin << 4 |
2092 ic->ic_edca_ac[EDCA_AC_BE].ac_ecwmin);
2093 RAL_WRITE(sc, RT2860_WMM_CWMAX_CFG,
2094 ic->ic_edca_ac[EDCA_AC_VO].ac_ecwmax << 12 |
2095 ic->ic_edca_ac[EDCA_AC_VI].ac_ecwmax << 8 |
2096 ic->ic_edca_ac[EDCA_AC_BK].ac_ecwmax << 4 |
2097 ic->ic_edca_ac[EDCA_AC_BE].ac_ecwmax);
2098 RAL_WRITE(sc, RT2860_WMM_TXOP0_CFG,
2099 ic->ic_edca_ac[EDCA_AC_BK].ac_txoplimit << 16 |
2100 ic->ic_edca_ac[EDCA_AC_BE].ac_txoplimit);
2101 RAL_WRITE(sc, RT2860_WMM_TXOP1_CFG,
2102 ic->ic_edca_ac[EDCA_AC_VO].ac_txoplimit << 16 |
2103 ic->ic_edca_ac[EDCA_AC_VI].ac_txoplimit);
2104 }
2105
2106 int
2107 rt2860_set_key(struct ieee80211com *ic, struct ieee80211_node *ni,
2108 struct ieee80211_key *k)
2109 {
2110 struct rt2860_softc *sc = ic->ic_softc;
2111 bus_size_t base;
2112 uint32_t attr;
2113 uint8_t mode, wcid, iv[8];
2114
2115 /* map net80211 cipher to RT2860 security mode */
2116 switch (k->k_cipher) {
2117 case IEEE80211_CIPHER_WEP40:
2118 mode = RT2860_MODE_WEP40;
2119 break;
2120 case IEEE80211_CIPHER_WEP104:
2121 mode = RT2860_MODE_WEP104;
2122 break;
2123 case IEEE80211_CIPHER_TKIP:
2124 mode = RT2860_MODE_TKIP;
2125 break;
2126 case IEEE80211_CIPHER_CCMP:
2127 mode = RT2860_MODE_AES_CCMP;
2128 break;
2129 default:
2130 return EINVAL;
2131 }
2132
2133 if (k->k_flags & IEEE80211_KEY_GROUP) {
2134 /* install group key */
2135 base = RT2860_SKEY(0, k->k_id);
2136 if (k->k_cipher == IEEE80211_CIPHER_TKIP) {
2137 RAL_WRITE_REGION_1(sc, base, k->k_key, 16);
2138 #ifndef IEEE80211_STA_ONLY
2139 if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
2140 RAL_WRITE_REGION_1(sc, base + 16,
2141 &k->k_key[16], 8);
2142 RAL_WRITE_REGION_1(sc, base + 24,
2143 &k->k_key[24], 8);
2144 } else
2145 #endif
2146 {
2147 RAL_WRITE_REGION_1(sc, base + 16,
2148 &k->k_key[24], 8);
2149 RAL_WRITE_REGION_1(sc, base + 24,
2150 &k->k_key[16], 8);
2151 }
2152 } else
2153 RAL_WRITE_REGION_1(sc, base, k->k_key, k->k_len);
2154 attr = RAL_READ(sc, RT2860_SKEY_MODE_0_7);
2155 attr &= ~(0xf << (k->k_id * 4));
2156 attr |= mode << (k->k_id * 4);
2157 RAL_WRITE(sc, RT2860_SKEY_MODE_0_7, attr);
2158
2159 } else {
2160 /* install pairwise key */
2161 wcid = RT2860_AID2WCID(ni->ni_associd);
2162 base = RT2860_PKEY(wcid);
2163 if (k->k_cipher == IEEE80211_CIPHER_TKIP) {
2164 RAL_WRITE_REGION_1(sc, base, k->k_key, 16);
2165 #ifndef IEEE80211_STA_ONLY
2166 if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
2167 RAL_WRITE_REGION_1(sc, base + 16,
2168 &k->k_key[16], 8);
2169 RAL_WRITE_REGION_1(sc, base + 24,
2170 &k->k_key[24], 8);
2171 } else
2172 #endif
2173 {
2174 RAL_WRITE_REGION_1(sc, base + 16,
2175 &k->k_key[24], 8);
2176 RAL_WRITE_REGION_1(sc, base + 24,
2177 &k->k_key[16], 8);
2178 }
2179 } else
2180 RAL_WRITE_REGION_1(sc, base, k->k_key, k->k_len);
2181 /* set initial packet number in IV+EIV */
2182 if (k->k_cipher == IEEE80211_CIPHER_TKIP) {
2183 iv[0] = k->k_tsc >> 8;
2184 iv[1] = (iv[0] | 0x20) & 0x7f;
2185 iv[2] = k->k_tsc;
2186 } else /* CCMP */ {
2187 iv[0] = k->k_tsc;
2188 iv[1] = k->k_tsc >> 8;
2189 iv[2] = 0;
2190 }
2191 iv[3] = k->k_id << 6 | IEEE80211_WEP_EXTIV;
2192 iv[4] = k->k_tsc >> 16;
2193 iv[5] = k->k_tsc >> 24;
2194 iv[6] = k->k_tsc >> 32;
2195 iv[7] = k->k_tsc >> 40;
2196 RAL_WRITE_REGION_1(sc, RT2860_IVEIV(wcid), iv, 8);
2197
2198 attr = RAL_READ(sc, RT2860_WCID_ATTR(wcid));
2199 attr = (attr & ~0xf) | (mode << 1) | RT2860_RX_PKEY_EN;
2200 RAL_WRITE(sc, RT2860_WCID_ATTR(wcid), attr);
2201 }
2202 return 0;
2203 }
2204
2205 void
2206 rt2860_delete_key(struct ieee80211com *ic, struct ieee80211_node *ni,
2207 struct ieee80211_key *k)
2208 {
2209 struct rt2860_softc *sc = ic->ic_softc;
2210 uint32_t attr;
2211 uint8_t wcid;
2212
2213 if (k->k_flags & IEEE80211_KEY_GROUP) {
2214 /* remove group key */
2215 attr = RAL_READ(sc, RT2860_SKEY_MODE_0_7);
2216 attr &= ~(0xf << (k->k_id * 4));
2217 RAL_WRITE(sc, RT2860_SKEY_MODE_0_7, attr);
2218
2219 } else {
2220 /* remove pairwise key */
2221 wcid = RT2860_AID2WCID(ni->ni_associd);
2222 attr = RAL_READ(sc, RT2860_WCID_ATTR(wcid));
2223 attr &= ~0xf;
2224 RAL_WRITE(sc, RT2860_WCID_ATTR(wcid), attr);
2225 }
2226 }
2227
2228 int8_t
2229 rt2860_rssi2dbm(struct rt2860_softc *sc, uint8_t rssi, uint8_t rxchain)
2230 {
2231 struct ieee80211com *ic = &sc->sc_ic;
2232 struct ieee80211_channel *c = ic->ic_ibss_chan;
2233 int delta;
2234
2235 if (IEEE80211_IS_CHAN_5GHZ(c)) {
2236 u_int chan = ieee80211_chan2ieee(ic, c);
2237 delta = sc->rssi_5ghz[rxchain];
2238
2239 /* determine channel group */
2240 if (chan <= 64)
2241 delta -= sc->lna[1];
2242 else if (chan <= 128)
2243 delta -= sc->lna[2];
2244 else
2245 delta -= sc->lna[3];
2246 } else
2247 delta = sc->rssi_2ghz[rxchain] - sc->lna[0];
2248
2249 return -12 - delta - rssi;
2250 }
2251
2252 /*
2253 * Return the Rx chain with the highest RSSI for a given frame.
2254 */
2255 uint8_t
2256 rt2860_maxrssi_chain(struct rt2860_softc *sc, const struct rt2860_rxwi *rxwi)
2257 {
2258 uint8_t rxchain = 0;
2259
2260 if (sc->nrxchains > 1)
2261 if (rxwi->rssi[1] > rxwi->rssi[rxchain])
2262 rxchain = 1;
2263 if (sc->nrxchains > 2)
2264 if (rxwi->rssi[2] > rxwi->rssi[rxchain])
2265 rxchain = 2;
2266
2267 return rxchain;
2268 }
2269
2270 /*
2271 * Add `delta' (signed) to each 4-bit sub-word of a 32-bit word.
2272 * Used to adjust per-rate Tx power registers.
2273 */
2274 static __inline uint32_t
2275 b4inc(uint32_t b32, int8_t delta)
2276 {
2277 int8_t i, b4;
2278
2279 for (i = 0; i < 8; i++) {
2280 b4 = b32 & 0xf;
2281 b4 += delta;
2282 if (b4 < 0)
2283 b4 = 0;
2284 else if (b4 > 0xf)
2285 b4 = 0xf;
2286 b32 = b32 >> 4 | b4 << 28;
2287 }
2288 return b32;
2289 }
2290
2291 const char *
2292 rt2860_get_rf(uint8_t rev)
2293 {
2294 switch (rev) {
2295 case RT2860_RF_2820: return "RT2820";
2296 case RT2860_RF_2850: return "RT2850";
2297 case RT2860_RF_2720: return "RT2720";
2298 case RT2860_RF_2750: return "RT2750";
2299 default: return "unknown";
2300 }
2301 }
2302
2303 int
2304 rt2860_read_eeprom(struct rt2860_softc *sc)
2305 {
2306 struct ieee80211com *ic = &sc->sc_ic;
2307 uint16_t val;
2308 int8_t delta_2ghz, delta_5ghz;
2309 int ridx, ant, i;
2310
2311 /* read EEPROM version */
2312 val = rt2860_eeprom_read(sc, RT2860_EEPROM_VERSION);
2313 DPRINTF(("EEPROM rev=%d, FAE=%d\n", val & 0xff, val >> 8));
2314
2315 /* read MAC address */
2316 val = rt2860_eeprom_read(sc, RT2860_EEPROM_MAC01);
2317 ic->ic_myaddr[0] = val & 0xff;
2318 ic->ic_myaddr[1] = val >> 8;
2319 val = rt2860_eeprom_read(sc, RT2860_EEPROM_MAC23);
2320 ic->ic_myaddr[2] = val & 0xff;
2321 ic->ic_myaddr[3] = val >> 8;
2322 val = rt2860_eeprom_read(sc, RT2860_EEPROM_MAC45);
2323 ic->ic_myaddr[4] = val & 0xff;
2324 ic->ic_myaddr[5] = val >> 8;
2325
2326 /* read country code */
2327 val = rt2860_eeprom_read(sc, RT2860_EEPROM_COUNTRY);
2328 DPRINTF(("EEPROM region code=0x%04x\n", val));
2329
2330 /* read default BBP settings */
2331 for (i = 0; i < 8; i++) {
2332 val = rt2860_eeprom_read(sc, RT2860_EEPROM_BBP_BASE + i);
2333 sc->bbp[i].val = val & 0xff;
2334 sc->bbp[i].reg = val >> 8;
2335 DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val));
2336 }
2337
2338 /* read RF frequency offset from EEPROM */
2339 val = rt2860_eeprom_read(sc, RT2860_EEPROM_FREQ_LEDS);
2340 sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;
2341 DPRINTF(("EEPROM freq offset %d\n", sc->freq & 0xff));
2342
2343 if ((sc->leds = val >> 8) != 0xff) {
2344 /* read LEDs operating mode */
2345 sc->led[0] = rt2860_eeprom_read(sc, RT2860_EEPROM_LED1);
2346 sc->led[1] = rt2860_eeprom_read(sc, RT2860_EEPROM_LED2);
2347 sc->led[2] = rt2860_eeprom_read(sc, RT2860_EEPROM_LED3);
2348 } else {
2349 /* broken EEPROM, use default settings */
2350 sc->leds = 0x01;
2351 sc->led[0] = 0x5555;
2352 sc->led[1] = 0x2221;
2353 sc->led[2] = 0xa9f8;
2354 }
2355 DPRINTF(("EEPROM LED mode=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n",
2356 sc->leds, sc->led[0], sc->led[1], sc->led[2]));
2357
2358 /* read RF information */
2359 val = rt2860_eeprom_read(sc, RT2860_EEPROM_ANTENNA);
2360 if (val == 0xffff) {
2361 /* broken EEPROM, default to RF2820 1T2R */
2362 DPRINTF(("invalid EEPROM antenna info, using default\n"));
2363 sc->rf_rev = RT2860_RF_2820;
2364 sc->ntxchains = 1;
2365 sc->nrxchains = 2;
2366 } else {
2367 sc->rf_rev = (val >> 8) & 0xf;
2368 sc->ntxchains = (val >> 4) & 0xf;
2369 sc->nrxchains = val & 0xf;
2370 }
2371 DPRINTF(("EEPROM RF rev=0x%02x chains=%dT%dR\n",
2372 sc->rf_rev, sc->ntxchains, sc->nrxchains));
2373
2374 /* check if RF supports automatic Tx access gain control */
2375 val = rt2860_eeprom_read(sc, RT2860_EEPROM_CONFIG);
2376 DPRINTF(("EEPROM CFG 0x%04x\n", val));
2377 if ((val & 0xff) != 0xff)
2378 sc->calib_2ghz = sc->calib_5ghz = 0; /* XXX (val >> 1) & 1 */;
2379
2380 if (sc->sc_flags & RT2860_ADVANCED_PS) {
2381 /* read PCIe power save level */
2382 val = rt2860_eeprom_read(sc, RT2860_EEPROM_PCIE_PSLEVEL);
2383 if ((val & 0xff) != 0xff) {
2384 sc->pslevel = val & 0x3;
2385 val = rt2860_eeprom_read(sc, RT2860_EEPROM_REV);
2386 if (val >> 8 != 0x92 || !(val & 0x80))
2387 sc->pslevel = MIN(sc->pslevel, 1);
2388 DPRINTF(("EEPROM PCIe PS Level=%d\n", sc->pslevel));
2389 }
2390 }
2391 /* read power settings for 2GHz channels */
2392 for (i = 0; i < 14; i += 2) {
2393 val = rt2860_eeprom_read(sc,
2394 RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2);
2395 sc->txpow1[i + 0] = (int8_t)(val & 0xff);
2396 sc->txpow1[i + 1] = (int8_t)(val >> 8);
2397
2398 val = rt2860_eeprom_read(sc,
2399 RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2);
2400 sc->txpow2[i + 0] = (int8_t)(val & 0xff);
2401 sc->txpow2[i + 1] = (int8_t)(val >> 8);
2402 }
2403 /* fix broken Tx power entries */
2404 for (i = 0; i < 14; i++) {
2405 if (sc->txpow1[i] < 0 || sc->txpow1[i] > 31)
2406 sc->txpow1[i] = 5;
2407 if (sc->txpow2[i] < 0 || sc->txpow2[i] > 31)
2408 sc->txpow2[i] = 5;
2409 DPRINTF(("chan %d: power1=%d, power2=%d\n",
2410 rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i]));
2411 }
2412 /* read power settings for 5GHz channels */
2413 for (i = 0; i < 36; i += 2) {
2414 val = rt2860_eeprom_read(sc,
2415 RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2);
2416 sc->txpow1[i + 14] = (int8_t)(val & 0xff);
2417 sc->txpow1[i + 15] = (int8_t)(val >> 8);
2418
2419 val = rt2860_eeprom_read(sc,
2420 RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2);
2421 sc->txpow2[i + 14] = (int8_t)(val & 0xff);
2422 sc->txpow2[i + 15] = (int8_t)(val >> 8);
2423 }
2424 /* fix broken Tx power entries */
2425 for (i = 0; i < 36; i++) {
2426 if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15)
2427 sc->txpow1[14 + i] = 5;
2428 if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15)
2429 sc->txpow2[14 + i] = 5;
2430 DPRINTF(("chan %d: power1=%d, power2=%d\n",
2431 rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i],
2432 sc->txpow2[14 + i]));
2433 }
2434
2435 /* read Tx power compensation for each Tx rate */
2436 val = rt2860_eeprom_read(sc, RT2860_EEPROM_DELTAPWR);
2437 delta_2ghz = delta_5ghz = 0;
2438 if ((val & 0xff) != 0xff && (val & 0x80)) {
2439 delta_2ghz = val & 0xf;
2440 if (!(val & 0x40)) /* negative number */
2441 delta_2ghz = -delta_2ghz;
2442 }
2443 val >>= 8;
2444 if ((val & 0xff) != 0xff && (val & 0x80)) {
2445 delta_5ghz = val & 0xf;
2446 if (!(val & 0x40)) /* negative number */
2447 delta_5ghz = -delta_5ghz;
2448 }
2449 DPRINTF(("power compensation=%d (2GHz), %d (5GHz)\n",
2450 delta_2ghz, delta_5ghz));
2451
2452 for (ridx = 0; ridx < 5; ridx++) {
2453 uint32_t reg;
2454
2455 val = rt2860_eeprom_read(sc, RT2860_EEPROM_RPWR + ridx);
2456 reg = (uint32_t)val << 16;
2457 val = rt2860_eeprom_read(sc, RT2860_EEPROM_RPWR + ridx + 1);
2458 reg |= val;
2459
2460 sc->txpow20mhz[ridx] = reg;
2461 sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz);
2462 sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz);
2463
2464 DPRINTF(("ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, "
2465 "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx],
2466 sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx]));
2467 }
2468
2469 /* read factory-calibrated samples for temperature compensation */
2470 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI1_2GHZ);
2471 sc->tssi_2ghz[0] = val & 0xff; /* [-4] */
2472 sc->tssi_2ghz[1] = val >> 8; /* [-3] */
2473 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI2_2GHZ);
2474 sc->tssi_2ghz[2] = val & 0xff; /* [-2] */
2475 sc->tssi_2ghz[3] = val >> 8; /* [-1] */
2476 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI3_2GHZ);
2477 sc->tssi_2ghz[4] = val & 0xff; /* [+0] */
2478 sc->tssi_2ghz[5] = val >> 8; /* [+1] */
2479 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI4_2GHZ);
2480 sc->tssi_2ghz[6] = val & 0xff; /* [+2] */
2481 sc->tssi_2ghz[7] = val >> 8; /* [+3] */
2482 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI5_2GHZ);
2483 sc->tssi_2ghz[8] = val & 0xff; /* [+4] */
2484 sc->step_2ghz = val >> 8;
2485 DPRINTF(("TSSI 2GHz: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x "
2486 "0x%02x 0x%02x step=%d\n", sc->tssi_2ghz[0], sc->tssi_2ghz[1],
2487 sc->tssi_2ghz[2], sc->tssi_2ghz[3], sc->tssi_2ghz[4],
2488 sc->tssi_2ghz[5], sc->tssi_2ghz[6], sc->tssi_2ghz[7],
2489 sc->tssi_2ghz[8], sc->step_2ghz));
2490 /* check that ref value is correct, otherwise disable calibration */
2491 if (sc->tssi_2ghz[4] == 0xff)
2492 sc->calib_2ghz = 0;
2493
2494 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI1_5GHZ);
2495 sc->tssi_5ghz[0] = val & 0xff; /* [-4] */
2496 sc->tssi_5ghz[1] = val >> 8; /* [-3] */
2497 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI2_5GHZ);
2498 sc->tssi_5ghz[2] = val & 0xff; /* [-2] */
2499 sc->tssi_5ghz[3] = val >> 8; /* [-1] */
2500 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI3_5GHZ);
2501 sc->tssi_5ghz[4] = val & 0xff; /* [+0] */
2502 sc->tssi_5ghz[5] = val >> 8; /* [+1] */
2503 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI4_5GHZ);
2504 sc->tssi_5ghz[6] = val & 0xff; /* [+2] */
2505 sc->tssi_5ghz[7] = val >> 8; /* [+3] */
2506 val = rt2860_eeprom_read(sc, RT2860_EEPROM_TSSI5_5GHZ);
2507 sc->tssi_5ghz[8] = val & 0xff; /* [+4] */
2508 sc->step_5ghz = val >> 8;
2509 DPRINTF(("TSSI 5GHz: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x "
2510 "0x%02x 0x%02x step=%d\n", sc->tssi_5ghz[0], sc->tssi_5ghz[1],
2511 sc->tssi_5ghz[2], sc->tssi_5ghz[3], sc->tssi_5ghz[4],
2512 sc->tssi_5ghz[5], sc->tssi_5ghz[6], sc->tssi_5ghz[7],
2513 sc->tssi_5ghz[8], sc->step_5ghz));
2514 /* check that ref value is correct, otherwise disable calibration */
2515 if (sc->tssi_5ghz[4] == 0xff)
2516 sc->calib_5ghz = 0;
2517
2518 /* read RSSI offsets and LNA gains from EEPROM */
2519 val = rt2860_eeprom_read(sc, RT2860_EEPROM_RSSI1_2GHZ);
2520 sc->rssi_2ghz[0] = val & 0xff; /* Ant A */
2521 sc->rssi_2ghz[1] = val >> 8; /* Ant B */
2522 val = rt2860_eeprom_read(sc, RT2860_EEPROM_RSSI2_2GHZ);
2523 sc->rssi_2ghz[2] = val & 0xff; /* Ant C */
2524 sc->lna[2] = val >> 8; /* channel group 2 */
2525
2526 val = rt2860_eeprom_read(sc, RT2860_EEPROM_RSSI1_5GHZ);
2527 sc->rssi_5ghz[0] = val & 0xff; /* Ant A */
2528 sc->rssi_5ghz[1] = val >> 8; /* Ant B */
2529 val = rt2860_eeprom_read(sc, RT2860_EEPROM_RSSI2_5GHZ);
2530 sc->rssi_5ghz[2] = val & 0xff; /* Ant C */
2531 sc->lna[3] = val >> 8; /* channel group 3 */
2532
2533 val = rt2860_eeprom_read(sc, RT2860_EEPROM_LNA);
2534 sc->lna[0] = val & 0xff; /* channel group 0 */
2535 sc->lna[1] = val >> 8; /* channel group 1 */
2536
2537 /* fix broken 5GHz LNA entries */
2538 if (sc->lna[2] == 0 || sc->lna[2] == 0xff) {
2539 DPRINTF(("invalid LNA for channel group %d\n", 2));
2540 sc->lna[2] = sc->lna[1];
2541 }
2542 if (sc->lna[3] == 0 || sc->lna[3] == 0xff) {
2543 DPRINTF(("invalid LNA for channel group %d\n", 3));
2544 sc->lna[3] = sc->lna[1];
2545 }
2546
2547 /* fix broken RSSI offset entries */
2548 for (ant = 0; ant < 3; ant++) {
2549 if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) {
2550 DPRINTF(("invalid RSSI%d offset: %d (2GHz)\n",
2551 ant + 1, sc->rssi_2ghz[ant]));
2552 sc->rssi_2ghz[ant] = 0;
2553 }
2554 if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) {
2555 DPRINTF(("invalid RSSI%d offset: %d (5GHz)\n",
2556 ant + 1, sc->rssi_5ghz[ant]));
2557 sc->rssi_5ghz[ant] = 0;
2558 }
2559 }
2560
2561 return 0;
2562 }
2563
2564 int
2565 rt2860_bbp_init(struct rt2860_softc *sc)
2566 {
2567 int i, ntries;
2568
2569 /* wait for BBP to wake up */
2570 for (ntries = 0; ntries < 20; ntries++) {
2571 uint8_t bbp0 = rt2860_mcu_bbp_read(sc, 0);
2572 if (bbp0 != 0 && bbp0 != 0xff)
2573 break;
2574 }
2575 if (ntries == 20) {
2576 printf("%s: timeout waiting for BBP to wake up\n",
2577 sc->sc_dev.dv_xname);
2578 return ETIMEDOUT;
2579 }
2580
2581 /* initialize BBP registers to default values */
2582 for (i = 0; i < nitems(rt2860_def_bbp); i++) {
2583 rt2860_mcu_bbp_write(sc, rt2860_def_bbp[i].reg,
2584 rt2860_def_bbp[i].val);
2585 }
2586
2587 /* fix BBP69 and BBP73 for RT2860C */
2588 if (sc->mac_rev == 0x28600100) {
2589 rt2860_mcu_bbp_write(sc, 69, 0x16);
2590 rt2860_mcu_bbp_write(sc, 73, 0x12);
2591 }
2592
2593 return 0;
2594 }
2595
2596 int
2597 rt2860_init(struct ifnet *ifp)
2598 {
2599 struct rt2860_softc *sc = ifp->if_softc;
2600 struct ieee80211com *ic = &sc->sc_ic;
2601 uint32_t tmp;
2602 uint8_t bbp1, bbp3;
2603 int i, qid, ridx, ntries, error;
2604
2605 /* for CardBus, power on the socket */
2606 if (!(sc->sc_flags & RT2860_ENABLED)) {
2607 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
2608 printf("%s: could not enable device\n",
2609 sc->sc_dev.dv_xname);
2610 return EIO;
2611 }
2612 sc->sc_flags |= RT2860_ENABLED;
2613 }
2614
2615 rt2860_stop(ifp, 0);
2616
2617 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
2618 tmp &= 0xff0;
2619 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp | RT2860_TX_WB_DDONE);
2620
2621 RAL_WRITE(sc, RT2860_WPDMA_RST_IDX, 0xffffffff);
2622
2623 /* PBF hardware reset */
2624 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe1f);
2625 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe00);
2626
2627 if (!(sc->sc_flags & RT2860_FWLOADED)) {
2628 if ((error = rt2860_load_microcode(sc)) != 0) {
2629 printf("%s: could not load 8051 microcode\n",
2630 sc->sc_dev.dv_xname);
2631 rt2860_stop(ifp, 1);
2632 return error;
2633 }
2634 sc->sc_flags |= RT2860_FWLOADED;
2635 }
2636
2637 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
2638 rt2860_set_macaddr(sc, ic->ic_myaddr);
2639
2640 /* init Tx power for all Tx rates (from EEPROM) */
2641 for (ridx = 0; ridx < 5; ridx++) {
2642 if (sc->txpow20mhz[ridx] == 0xffffffff)
2643 continue;
2644 RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]);
2645 }
2646
2647 for (ntries = 0; ntries < 100; ntries++) {
2648 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
2649 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0)
2650 break;
2651 DELAY(1000);
2652 }
2653 if (ntries == 100) {
2654 printf("%s: timeout waiting for DMA engine\n",
2655 sc->sc_dev.dv_xname);
2656 rt2860_stop(ifp, 1);
2657 return ETIMEDOUT;
2658 }
2659 tmp &= 0xff0;
2660 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp | RT2860_TX_WB_DDONE);
2661
2662 /* reset Rx ring and all 6 Tx rings */
2663 RAL_WRITE(sc, RT2860_WPDMA_RST_IDX, 0x1003f);
2664
2665 /* PBF hardware reset */
2666 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe1f);
2667 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe00);
2668
2669 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST);
2670 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, 0);
2671
2672 for (i = 0; i < nitems(rt2860_def_mac); i++)
2673 RAL_WRITE(sc, rt2860_def_mac[i].reg, rt2860_def_mac[i].val);
2674
2675 /* wait while MAC is busy */
2676 for (ntries = 0; ntries < 100; ntries++) {
2677 if (!(RAL_READ(sc, RT2860_MAC_STATUS_REG) &
2678 (RT2860_RX_STATUS_BUSY | RT2860_TX_STATUS_BUSY)))
2679 break;
2680 DELAY(1000);
2681 }
2682 if (ntries == 100) {
2683 printf("%s: timeout waiting for MAC\n", sc->sc_dev.dv_xname);
2684 rt2860_stop(ifp, 1);
2685 return ETIMEDOUT;
2686 }
2687
2688 /* clear Host to MCU mailbox */
2689 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, 0);
2690 RAL_WRITE(sc, RT2860_H2M_MAILBOX, 0);
2691
2692 if ((error = rt2860_bbp_init(sc)) != 0) {
2693 rt2860_stop(ifp, 1);
2694 return error;
2695 }
2696
2697 /* init Tx rings (4 EDCAs + HCCA + Mgt) */
2698 for (qid = 0; qid < 6; qid++) {
2699 RAL_WRITE(sc, RT2860_TX_BASE_PTR(qid), sc->txq[qid].paddr);
2700 RAL_WRITE(sc, RT2860_TX_MAX_CNT(qid), RT2860_TX_RING_COUNT);
2701 RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), 0);
2702 }
2703
2704 /* init Rx ring */
2705 RAL_WRITE(sc, RT2860_RX_BASE_PTR, sc->rxq.paddr);
2706 RAL_WRITE(sc, RT2860_RX_MAX_CNT, RT2860_RX_RING_COUNT);
2707 RAL_WRITE(sc, RT2860_RX_CALC_IDX, RT2860_RX_RING_COUNT - 1);
2708
2709 /* setup maximum buffer sizes */
2710 RAL_WRITE(sc, RT2860_MAX_LEN_CFG, 1 << 12 |
2711 (MCLBYTES - sizeof (struct rt2860_rxwi) - 2));
2712
2713 for (ntries = 0; ntries < 100; ntries++) {
2714 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
2715 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0)
2716 break;
2717 DELAY(1000);
2718 }
2719 if (ntries == 100) {
2720 printf("%s: timeout waiting for DMA engine\n",
2721 sc->sc_dev.dv_xname);
2722 rt2860_stop(ifp, 1);
2723 return ETIMEDOUT;
2724 }
2725 tmp &= 0xff0;
2726 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp | RT2860_TX_WB_DDONE);
2727
2728 /* disable interrupts mitigation */
2729 RAL_WRITE(sc, RT2860_DELAY_INT_CFG, 0);
2730
2731 /* write vendor-specific BBP values (from EEPROM) */
2732 for (i = 0; i < 8; i++) {
2733 if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff)
2734 continue;
2735 rt2860_mcu_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);
2736 }
2737
2738 /* send LEDs operating mode to microcontroller */
2739 (void)rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0]);
2740 (void)rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1]);
2741 (void)rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2]);
2742
2743 /* disable non-existing Rx chains */
2744 bbp3 = rt2860_mcu_bbp_read(sc, 3);
2745 bbp3 &= ~(1 << 3 | 1 << 4);
2746 if (sc->nrxchains == 2)
2747 bbp3 |= 1 << 3;
2748 else if (sc->nrxchains == 3)
2749 bbp3 |= 1 << 4;
2750 rt2860_mcu_bbp_write(sc, 3, bbp3);
2751
2752 /* disable non-existing Tx chains */
2753 bbp1 = rt2860_mcu_bbp_read(sc, 1);
2754 if (sc->ntxchains == 1)
2755 bbp1 &= ~(1 << 3 | 1 << 4);
2756 rt2860_mcu_bbp_write(sc, 1, bbp1);
2757
2758 /* select default channel */
2759 ic->ic_bss->ni_chan = ic->ic_ibss_chan;
2760 rt2860_set_chan(sc, ic->ic_ibss_chan);
2761
2762 /* XXX not clear what the following 8051 command does.. */
2763 (void)rt2860_mcu_cmd(sc, RT2860_MCU_CMD_BOOT, 0);
2764
2765 /* set RTS threshold */
2766 tmp = RAL_READ(sc, RT2860_TX_RTS_CFG);
2767 tmp &= ~0xffff00;
2768 tmp |= ic->ic_rtsthreshold << 8;
2769
2770 /* setup initial protection mode */
2771 sc->sc_ic_flags = ic->ic_flags;
2772 rt2860_updateprot(ic);
2773
2774 /* enable Tx/Rx DMA engine */
2775 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN);
2776 for (ntries = 0; ntries < 200; ntries++) {
2777 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
2778 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0)
2779 break;
2780 DELAY(1000);
2781 }
2782 if (ntries == 200) {
2783 printf("%s: timeout waiting for DMA engine\n",
2784 sc->sc_dev.dv_xname);
2785 rt2860_stop(ifp, 1);
2786 return ETIMEDOUT;
2787 }
2788
2789 DELAY(50);
2790
2791 tmp |= RT2860_TX_WB_DDONE | RT2860_RX_DMA_EN | RT2860_TX_DMA_EN |
2792 RT2860_WPDMA_BT_SIZE64 << RT2860_WPDMA_BT_SIZE_SHIFT;
2793 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
2794
2795 /* turn radio LED on */
2796 rt2860_set_leds(sc, RT2860_LED_RADIO);
2797
2798 if (ic->ic_flags & IEEE80211_F_WEPON) {
2799 /* install WEP keys */
2800 for (i = 0; i < IEEE80211_WEP_NKID; i++)
2801 (void)rt2860_set_key(ic, NULL, &ic->ic_nw_keys[i]);
2802 }
2803
2804 /* set Rx filter */
2805 tmp = RT2860_DROP_CRC_ERR | RT2860_DROP_PHY_ERR;
2806 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2807 tmp |= RT2860_DROP_UC_NOME | RT2860_DROP_DUPL |
2808 RT2860_DROP_CTS | RT2860_DROP_BA | RT2860_DROP_ACK |
2809 RT2860_DROP_VER_ERR | RT2860_DROP_CTRL_RSV |
2810 RT2860_DROP_CFACK | RT2860_DROP_CFEND;
2811 if (ic->ic_opmode == IEEE80211_M_STA)
2812 tmp |= RT2860_DROP_RTS | RT2860_DROP_PSPOLL;
2813 }
2814 RAL_WRITE(sc, RT2860_RX_FILTR_CFG, tmp);
2815
2816 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL,
2817 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN);
2818
2819 /* clear pending interrupts */
2820 RAL_WRITE(sc, RT2860_INT_STATUS, 0xffffffff);
2821 /* enable interrupts */
2822 RAL_WRITE(sc, RT2860_INT_MASK, 0x3fffc);
2823
2824 if (sc->sc_flags & RT2860_ADVANCED_PS)
2825 (void)rt2860_mcu_cmd(sc, RT2860_MCU_CMD_PSLEVEL, sc->pslevel);
2826
2827 ifp->if_flags &= ~IFF_OACTIVE;
2828 ifp->if_flags |= IFF_RUNNING;
2829
2830 if (ic->ic_opmode != IEEE80211_M_MONITOR)
2831 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2832 else
2833 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2834
2835 return 0;
2836 }
2837
2838 void
2839 rt2860_stop(struct ifnet *ifp, int disable)
2840 {
2841 struct rt2860_softc *sc = ifp->if_softc;
2842 struct ieee80211com *ic = &sc->sc_ic;
2843 uint32_t tmp;
2844 int qid;
2845
2846 if (ifp->if_flags & IFF_RUNNING)
2847 rt2860_set_leds(sc, 0); /* turn all LEDs off */
2848
2849 sc->sc_tx_timer = 0;
2850 ifp->if_timer = 0;
2851 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2852
2853 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */
2854
2855 /* clear RX WCID search table */
2856 RAL_SET_REGION_4(sc, RT2860_WCID_ENTRY(0), 0, 512);
2857 /* clear pairwise key table */
2858 RAL_SET_REGION_4(sc, RT2860_PKEY(0), 0, 2048);
2859 /* clear IV/EIV table */
2860 RAL_SET_REGION_4(sc, RT2860_IVEIV(0), 0, 512);
2861 /* clear WCID attribute table */
2862 RAL_SET_REGION_4(sc, RT2860_WCID_ATTR(0), 0, 256);
2863 /* clear shared key table */
2864 RAL_SET_REGION_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32);
2865 /* clear shared key mode */
2866 RAL_SET_REGION_4(sc, RT2860_SKEY_MODE_0_7, 0, 4);
2867
2868 /* disable interrupts */
2869 RAL_WRITE(sc, RT2860_INT_MASK, 0);
2870
2871 /* disable Rx */
2872 tmp = RAL_READ(sc, RT2860_MAC_SYS_CTRL);
2873 tmp &= ~(RT2860_MAC_RX_EN | RT2860_MAC_TX_EN);
2874 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, tmp);
2875
2876 /* reset adapter */
2877 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST);
2878 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, 0);
2879
2880 /* reset Tx and Rx rings (and reclaim TXWIs) */
2881 for (qid = 0; qid < 6; qid++)
2882 rt2860_reset_tx_ring(sc, &sc->txq[qid]);
2883 rt2860_reset_rx_ring(sc, &sc->rxq);
2884
2885 sc->sc_flags &= ~RT2860_UPD_BEACON;
2886
2887 /* for CardBus, power down the socket */
2888 if (disable && sc->sc_disable != NULL) {
2889 if (sc->sc_flags & RT2860_ENABLED) {
2890 (*sc->sc_disable)(sc);
2891 sc->sc_flags &= ~(RT2860_ENABLED | RT2860_FWLOADED);
2892 }
2893 }
2894 }
2895
2896 int
2897 rt2860_load_microcode(struct rt2860_softc *sc)
2898 {
2899 u_char *ucode;
2900 size_t size;
2901 int error, ntries;
2902
2903 if ((error = loadfirmware("ral-rt2860", &ucode, &size)) != 0) {
2904 printf("%s: error %d, could not read firmware file %s\n",
2905 sc->sc_dev.dv_xname, error, "ral-rt2860");
2906 return error;
2907 }
2908
2909 /* set "host program ram write selection" bit */
2910 RAL_WRITE(sc, RT2860_SYS_CTRL, RT2860_HST_PM_SEL);
2911 /* write microcode image */
2912 RAL_WRITE_REGION_1(sc, RT2860_FW_BASE, ucode, size);
2913 /* kick microcontroller unit */
2914 RAL_WRITE(sc, RT2860_SYS_CTRL, 0);
2915 RAL_WRITE(sc, RT2860_SYS_CTRL, RT2860_MCU_RESET);
2916
2917 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, 0);
2918 RAL_WRITE(sc, RT2860_H2M_MAILBOX, 0);
2919
2920 free(ucode, M_DEVBUF);
2921
2922 /* wait until microcontroller is ready */
2923 for (ntries = 0; ntries < 1000; ntries++) {
2924 if (RAL_READ(sc, RT2860_SYS_CTRL) & RT2860_MCU_READY)
2925 break;
2926 DELAY(1000);
2927 }
2928 if (ntries == 1000) {
2929 printf("%s: timeout waiting for MCU to initialize\n",
2930 sc->sc_dev.dv_xname);
2931 return ETIMEDOUT;
2932 }
2933 return 0;
2934 }
2935
2936 /*
2937 * This function is called periodically to adjust Tx power based on
2938 * temperature variation.
2939 */
2940 void
2941 rt2860_calib(struct rt2860_softc *sc)
2942 {
2943 struct ieee80211com *ic = &sc->sc_ic;
2944 const uint8_t *tssi;
2945 uint8_t step, bbp49;
2946 int8_t ridx, d;
2947
2948 /* read current temperature */
2949 bbp49 = rt2860_mcu_bbp_read(sc, 49);
2950
2951 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_bss->ni_chan)) {
2952 tssi = &sc->tssi_2ghz[4];
2953 step = sc->step_2ghz;
2954 } else {
2955 tssi = &sc->tssi_5ghz[4];
2956 step = sc->step_5ghz;
2957 }
2958
2959 if (bbp49 < tssi[0]) { /* lower than reference */
2960 /* use higher Tx power than default */
2961 for (d = 0; d > -4 && bbp49 <= tssi[d - 1]; d--);
2962 } else if (bbp49 > tssi[0]) { /* greater than reference */
2963 /* use lower Tx power than default */
2964 for (d = 0; d < +4 && bbp49 >= tssi[d + 1]; d++);
2965 } else {
2966 /* use default Tx power */
2967 d = 0;
2968 }
2969 d *= step;
2970
2971 DPRINTF(("BBP49=0x%02x, adjusting Tx power by %d\n", bbp49, d));
2972
2973 /* write adjusted Tx power values for each Tx rate */
2974 for (ridx = 0; ridx < 5; ridx++) {
2975 if (sc->txpow20mhz[ridx] == 0xffffffff)
2976 continue;
2977 RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx),
2978 b4inc(sc->txpow20mhz[ridx], d));
2979 }
2980 }
2981
2982 #ifndef IEEE80211_STA_ONLY
2983 int
2984 rt2860_setup_beacon(struct rt2860_softc *sc)
2985 {
2986 struct ieee80211com *ic = &sc->sc_ic;
2987 struct rt2860_txwi txwi;
2988 struct mbuf *m;
2989 int rate;
2990
2991 if ((m = ieee80211_beacon_alloc(ic, ic->ic_bss)) == NULL)
2992 return ENOBUFS;
2993
2994 memset(&txwi, 0, sizeof txwi);
2995 txwi.wcid = 0xff;
2996 txwi.len = htole16(m->m_pkthdr.len);
2997 /* send beacons at the lowest available rate */
2998 rate = (ic->ic_curmode == IEEE80211_MODE_11A) ? 12 : 2;
2999 txwi.phy = htole16(rt2860_rate2mcs(rate));
3000 if (rate == 12)
3001 txwi.phy |= htole16(RT2860_PHY_OFDM);
3002 txwi.txop = RT2860_TX_TXOP_HT;
3003 txwi.flags = RT2860_TX_TS;
3004
3005 RAL_WRITE_REGION_1(sc, RT2860_BCN_BASE(0),
3006 (u_int8_t *)&txwi, 16);
3007 RAL_WRITE_REGION_1(sc, RT2860_BCN_BASE(0) + 16,
3008 mtod(m, uint8_t *), m->m_pkthdr.len);
3009
3010 m_freem(m);
3011
3012 return 0;
3013 }
3014 #endif
3015
3016 void
3017 rt2860_enable_tsf_sync(struct rt2860_softc *sc)
3018 {
3019 struct ieee80211com *ic = &sc->sc_ic;
3020 uint32_t tmp;
3021
3022 tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
3023
3024 tmp &= ~0x1fffff;
3025 tmp |= ic->ic_bss->ni_intval * 16;
3026 tmp |= RT2860_TSF_TIMER_EN | RT2860_TBTT_TIMER_EN;
3027 if (ic->ic_opmode == IEEE80211_M_STA) {
3028 /*
3029 * Local TSF is always updated with remote TSF on beacon
3030 * reception.
3031 */
3032 tmp |= 1 << RT2860_TSF_SYNC_MODE_SHIFT;
3033 }
3034 #ifndef IEEE80211_STA_ONLY
3035 else if (ic->ic_opmode == IEEE80211_M_IBSS) {
3036 tmp |= RT2860_BCN_TX_EN;
3037 /*
3038 * Local TSF is updated with remote TSF on beacon reception
3039 * only if the remote TSF is greater than local TSF.
3040 */
3041 tmp |= 2 << RT2860_TSF_SYNC_MODE_SHIFT;
3042 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
3043 tmp |= RT2860_BCN_TX_EN;
3044 /* SYNC with nobody */
3045 tmp |= 3 << RT2860_TSF_SYNC_MODE_SHIFT;
3046 }
3047 #endif
3048
3049 RAL_WRITE(sc, RT2860_BCN_TIME_CFG, tmp);
3050 }
3051
3052 void
3053 rt2860_power(int why, void *arg)
3054 {
3055 struct rt2860_softc *sc = arg;
3056 struct ifnet *ifp = &sc->sc_ic.ic_if;
3057 int s;
3058
3059 DPRINTF(("%s: rt2860_power(%d)\n", sc->sc_dev.dv_xname, why));
3060
3061 s = splnet();
3062 switch (why) {
3063 case PWR_SUSPEND:
3064 case PWR_STANDBY:
3065 rt2860_stop(ifp, 1);
3066 sc->sc_flags &= ~RT2860_FWLOADED;
3067 if (sc->sc_power != NULL)
3068 (*sc->sc_power)(sc, why);
3069 break;
3070 case PWR_RESUME:
3071 if (ifp->if_flags & IFF_UP) {
3072 rt2860_init(ifp);
3073 if (sc->sc_power != NULL)
3074 (*sc->sc_power)(sc, why);
3075 if (ifp->if_flags & IFF_RUNNING)
3076 rt2860_start(ifp);
3077 }
3078 break;
3079 }
3080 splx(s);
3081 }
3082
3083 void
3084 rt2860_shutdown(void *arg)
3085 {
3086 struct rt2860_softc *sc = arg;
3087 struct ifnet *ifp = &sc->sc_ic.ic_if;
3088
3089 rt2860_stop(ifp, 1);
3090 }
Cache object: e5f46d5bda05bf50bac833f1d6e0be41
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