Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/siop.c
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /* $NetBSD: siop.c,v 1.87.14.2 2010/11/20 20:12:56 riz Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 /* SYM53c7/8xx PCI-SCSI I/O Processors driver */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: siop.c,v 1.87.14.2 2010/11/20 20:12:56 riz Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/buf.h> 43 #include <sys/kernel.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/endian.h> 48 #include <sys/bus.h> 49 50 #include <dev/microcode/siop/siop.out> 51 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsi_message.h> 54 #include <dev/scsipi/scsipi_all.h> 55 56 #include <dev/scsipi/scsiconf.h> 57 58 #include <dev/ic/siopreg.h> 59 #include <dev/ic/siopvar_common.h> 60 #include <dev/ic/siopvar.h> 61 62 #include "opt_siop.h" 63 64 #ifndef DEBUG 65 #undef DEBUG 66 #endif 67 /* 68 #define SIOP_DEBUG 69 #define SIOP_DEBUG_DR 70 #define SIOP_DEBUG_INTR 71 #define SIOP_DEBUG_SCHED 72 #define DUMP_SCRIPT 73 */ 74 75 #define SIOP_STATS 76 77 #ifndef SIOP_DEFAULT_TARGET 78 #define SIOP_DEFAULT_TARGET 7 79 #endif 80 81 /* number of cmd descriptors per block */ 82 #define SIOP_NCMDPB (PAGE_SIZE / sizeof(struct siop_xfer)) 83 84 /* Number of scheduler slot (needs to match script) */ 85 #define SIOP_NSLOTS 40 86 87 void siop_reset(struct siop_softc *); 88 void siop_handle_reset(struct siop_softc *); 89 int siop_handle_qtag_reject(struct siop_cmd *); 90 void siop_scsicmd_end(struct siop_cmd *); 91 void siop_unqueue(struct siop_softc *, int, int); 92 static void siop_start(struct siop_softc *, struct siop_cmd *); 93 void siop_timeout(void *); 94 int siop_scsicmd(struct scsipi_xfer *); 95 void siop_scsipi_request(struct scsipi_channel *, 96 scsipi_adapter_req_t, void *); 97 void siop_dump_script(struct siop_softc *); 98 void siop_morecbd(struct siop_softc *); 99 struct siop_lunsw *siop_get_lunsw(struct siop_softc *); 100 void siop_add_reselsw(struct siop_softc *, int); 101 void siop_update_scntl3(struct siop_softc *, 102 struct siop_common_target *); 103 104 #ifdef SIOP_STATS 105 static int siop_stat_intr = 0; 106 static int siop_stat_intr_shortxfer = 0; 107 static int siop_stat_intr_sdp = 0; 108 static int siop_stat_intr_saveoffset = 0; 109 static int siop_stat_intr_done = 0; 110 static int siop_stat_intr_xferdisc = 0; 111 static int siop_stat_intr_lunresel = 0; 112 static int siop_stat_intr_qfull = 0; 113 void siop_printstats(void); 114 #define INCSTAT(x) x++ 115 #else 116 #define INCSTAT(x) 117 #endif 118 119 static inline void siop_script_sync(struct siop_softc *, int); 120 static inline void 121 siop_script_sync(sc, ops) 122 struct siop_softc *sc; 123 int ops; 124 { 125 if ((sc->sc_c.features & SF_CHIP_RAM) == 0) 126 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0, 127 PAGE_SIZE, ops); 128 } 129 130 static inline u_int32_t siop_script_read(struct siop_softc *, u_int); 131 static inline u_int32_t 132 siop_script_read(sc, offset) 133 struct siop_softc *sc; 134 u_int offset; 135 { 136 if (sc->sc_c.features & SF_CHIP_RAM) { 137 return bus_space_read_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 138 offset * 4); 139 } else { 140 return siop_ctoh32(&sc->sc_c, sc->sc_c.sc_script[offset]); 141 } 142 } 143 144 static inline void siop_script_write(struct siop_softc *, u_int, 145 u_int32_t); 146 static inline void 147 siop_script_write(sc, offset, val) 148 struct siop_softc *sc; 149 u_int offset; 150 u_int32_t val; 151 { 152 if (sc->sc_c.features & SF_CHIP_RAM) { 153 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 154 offset * 4, val); 155 } else { 156 sc->sc_c.sc_script[offset] = siop_htoc32(&sc->sc_c, val); 157 } 158 } 159 160 void 161 siop_attach(sc) 162 struct siop_softc *sc; 163 { 164 if (siop_common_attach(&sc->sc_c) != 0) 165 return; 166 167 TAILQ_INIT(&sc->free_list); 168 TAILQ_INIT(&sc->cmds); 169 TAILQ_INIT(&sc->lunsw_list); 170 sc->sc_currschedslot = 0; 171 #ifdef SIOP_DEBUG 172 printf("%s: script size = %d, PHY addr=0x%x, VIRT=%p\n", 173 device_xname(&sc->sc_c.sc_dev), (int)sizeof(siop_script), 174 (u_int32_t)sc->sc_c.sc_scriptaddr, sc->sc_c.sc_script); 175 #endif 176 177 sc->sc_c.sc_adapt.adapt_max_periph = SIOP_NTAG - 1; 178 sc->sc_c.sc_adapt.adapt_request = siop_scsipi_request; 179 180 /* Do a bus reset, so that devices fall back to narrow/async */ 181 siop_resetbus(&sc->sc_c); 182 /* 183 * siop_reset() will reset the chip, thus clearing pending interrupts 184 */ 185 siop_reset(sc); 186 #ifdef DUMP_SCRIPT 187 siop_dump_script(sc); 188 #endif 189 190 config_found((struct device*)sc, &sc->sc_c.sc_chan, scsiprint); 191 } 192 193 void 194 siop_reset(sc) 195 struct siop_softc *sc; 196 { 197 int i, j; 198 struct siop_lunsw *lunsw; 199 200 siop_common_reset(&sc->sc_c); 201 202 /* copy and patch the script */ 203 if (sc->sc_c.features & SF_CHIP_RAM) { 204 bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 0, 205 siop_script, sizeof(siop_script) / sizeof(siop_script[0])); 206 for (j = 0; j < 207 (sizeof(E_abs_msgin_Used) / sizeof(E_abs_msgin_Used[0])); 208 j++) { 209 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 210 E_abs_msgin_Used[j] * 4, 211 sc->sc_c.sc_scriptaddr + Ent_msgin_space); 212 } 213 if (sc->sc_c.features & SF_CHIP_LED0) { 214 bus_space_write_region_4(sc->sc_c.sc_ramt, 215 sc->sc_c.sc_ramh, 216 Ent_led_on1, siop_led_on, 217 sizeof(siop_led_on) / sizeof(siop_led_on[0])); 218 bus_space_write_region_4(sc->sc_c.sc_ramt, 219 sc->sc_c.sc_ramh, 220 Ent_led_on2, siop_led_on, 221 sizeof(siop_led_on) / sizeof(siop_led_on[0])); 222 bus_space_write_region_4(sc->sc_c.sc_ramt, 223 sc->sc_c.sc_ramh, 224 Ent_led_off, siop_led_off, 225 sizeof(siop_led_off) / sizeof(siop_led_off[0])); 226 } 227 } else { 228 for (j = 0; 229 j < (sizeof(siop_script) / sizeof(siop_script[0])); j++) { 230 sc->sc_c.sc_script[j] = 231 siop_htoc32(&sc->sc_c, siop_script[j]); 232 } 233 for (j = 0; j < 234 (sizeof(E_abs_msgin_Used) / sizeof(E_abs_msgin_Used[0])); 235 j++) { 236 sc->sc_c.sc_script[E_abs_msgin_Used[j]] = 237 siop_htoc32(&sc->sc_c, 238 sc->sc_c.sc_scriptaddr + Ent_msgin_space); 239 } 240 if (sc->sc_c.features & SF_CHIP_LED0) { 241 for (j = 0; j < (sizeof(siop_led_on) / 242 sizeof(siop_led_on[0])); j++) 243 sc->sc_c.sc_script[ 244 Ent_led_on1 / sizeof(siop_led_on[0]) + j 245 ] = siop_htoc32(&sc->sc_c, siop_led_on[j]); 246 for (j = 0; j < (sizeof(siop_led_on) / 247 sizeof(siop_led_on[0])); j++) 248 sc->sc_c.sc_script[ 249 Ent_led_on2 / sizeof(siop_led_on[0]) + j 250 ] = siop_htoc32(&sc->sc_c, siop_led_on[j]); 251 for (j = 0; j < (sizeof(siop_led_off) / 252 sizeof(siop_led_off[0])); j++) 253 sc->sc_c.sc_script[ 254 Ent_led_off / sizeof(siop_led_off[0]) + j 255 ] = siop_htoc32(&sc->sc_c, siop_led_off[j]); 256 } 257 } 258 sc->script_free_lo = sizeof(siop_script) / sizeof(siop_script[0]); 259 sc->script_free_hi = sc->sc_c.ram_size / 4; 260 sc->sc_ntargets = 0; 261 262 /* free used and unused lun switches */ 263 while((lunsw = TAILQ_FIRST(&sc->lunsw_list)) != NULL) { 264 #ifdef SIOP_DEBUG 265 printf("%s: free lunsw at offset %d\n", 266 device_xname(&sc->sc_c.sc_dev), lunsw->lunsw_off); 267 #endif 268 TAILQ_REMOVE(&sc->lunsw_list, lunsw, next); 269 free(lunsw, M_DEVBUF); 270 } 271 TAILQ_INIT(&sc->lunsw_list); 272 /* restore reselect switch */ 273 for (i = 0; i < sc->sc_c.sc_chan.chan_ntargets; i++) { 274 struct siop_target *target; 275 if (sc->sc_c.targets[i] == NULL) 276 continue; 277 #ifdef SIOP_DEBUG 278 printf("%s: restore sw for target %d\n", 279 device_xname(&sc->sc_c.sc_dev), i); 280 #endif 281 target = (struct siop_target *)sc->sc_c.targets[i]; 282 free(target->lunsw, M_DEVBUF); 283 target->lunsw = siop_get_lunsw(sc); 284 if (target->lunsw == NULL) { 285 aprint_error_dev(&sc->sc_c.sc_dev, "can't alloc lunsw for target %d\n", i); 286 break; 287 } 288 siop_add_reselsw(sc, i); 289 } 290 291 /* start script */ 292 if ((sc->sc_c.features & SF_CHIP_RAM) == 0) { 293 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0, 294 PAGE_SIZE, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 295 } 296 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, 297 sc->sc_c.sc_scriptaddr + Ent_reselect); 298 } 299 300 #if 0 301 #define CALL_SCRIPT(ent) do {\ 302 printf ("start script DSA 0x%lx DSP 0x%lx\n", \ 303 siop_cmd->cmd_c.dsa, \ 304 sc->sc_c.sc_scriptaddr + ent); \ 305 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \ 306 } while (0) 307 #else 308 #define CALL_SCRIPT(ent) do {\ 309 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \ 310 } while (0) 311 #endif 312 313 int 314 siop_intr(v) 315 void *v; 316 { 317 struct siop_softc *sc = v; 318 struct siop_target *siop_target; 319 struct siop_cmd *siop_cmd; 320 struct siop_lun *siop_lun; 321 struct scsipi_xfer *xs; 322 int istat, sist, sstat1, dstat = 0; /* XXX: gcc */ 323 u_int32_t irqcode; 324 int need_reset = 0; 325 int offset, target, lun, tag; 326 bus_addr_t dsa; 327 struct siop_cbd *cbdp; 328 int freetarget = 0; 329 int restart = 0; 330 331 istat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT); 332 if ((istat & (ISTAT_INTF | ISTAT_DIP | ISTAT_SIP)) == 0) 333 return 0; 334 INCSTAT(siop_stat_intr); 335 if (istat & ISTAT_INTF) { 336 printf("INTRF\n"); 337 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 338 SIOP_ISTAT, ISTAT_INTF); 339 } 340 if ((istat &(ISTAT_DIP | ISTAT_SIP | ISTAT_ABRT)) == 341 (ISTAT_DIP | ISTAT_ABRT)) { 342 /* clear abort */ 343 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 344 SIOP_ISTAT, 0); 345 } 346 /* use DSA to find the current siop_cmd */ 347 siop_cmd = NULL; 348 dsa = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA); 349 TAILQ_FOREACH(cbdp, &sc->cmds, next) { 350 if (dsa >= cbdp->xferdma->dm_segs[0].ds_addr && 351 dsa < cbdp->xferdma->dm_segs[0].ds_addr + PAGE_SIZE) { 352 dsa -= cbdp->xferdma->dm_segs[0].ds_addr; 353 siop_cmd = &cbdp->cmds[dsa / sizeof(struct siop_xfer)]; 354 siop_table_sync(siop_cmd, 355 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 356 break; 357 } 358 } 359 if (siop_cmd) { 360 xs = siop_cmd->cmd_c.xs; 361 siop_target = (struct siop_target *)siop_cmd->cmd_c.siop_target; 362 target = siop_cmd->cmd_c.xs->xs_periph->periph_target; 363 lun = siop_cmd->cmd_c.xs->xs_periph->periph_lun; 364 tag = siop_cmd->cmd_c.tag; 365 siop_lun = siop_target->siop_lun[lun]; 366 #ifdef DIAGNOSTIC 367 if (siop_cmd->cmd_c.status != CMDST_ACTIVE) { 368 printf("siop_cmd (lun %d) for DSA 0x%x " 369 "not active (%d)\n", lun, (u_int)dsa, 370 siop_cmd->cmd_c.status); 371 xs = NULL; 372 siop_target = NULL; 373 target = -1; 374 lun = -1; 375 tag = -1; 376 siop_lun = NULL; 377 siop_cmd = NULL; 378 } else if (siop_lun->siop_tag[tag].active != siop_cmd) { 379 printf("siop_cmd (lun %d tag %d) not in siop_lun " 380 "active (%p != %p)\n", lun, tag, siop_cmd, 381 siop_lun->siop_tag[tag].active); 382 } 383 #endif 384 } else { 385 xs = NULL; 386 siop_target = NULL; 387 target = -1; 388 lun = -1; 389 tag = -1; 390 siop_lun = NULL; 391 } 392 if (istat & ISTAT_DIP) { 393 dstat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 394 SIOP_DSTAT); 395 if (dstat & DSTAT_ABRT) { 396 /* was probably generated by a bus reset IOCTL */ 397 if ((dstat & DSTAT_DFE) == 0) 398 siop_clearfifo(&sc->sc_c); 399 goto reset; 400 } 401 if (dstat & DSTAT_SSI) { 402 printf("single step dsp 0x%08x dsa 0x08%x\n", 403 (int)(bus_space_read_4(sc->sc_c.sc_rt, 404 sc->sc_c.sc_rh, SIOP_DSP) - 405 sc->sc_c.sc_scriptaddr), 406 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 407 SIOP_DSA)); 408 if ((dstat & ~(DSTAT_DFE | DSTAT_SSI)) == 0 && 409 (istat & ISTAT_SIP) == 0) { 410 bus_space_write_1(sc->sc_c.sc_rt, 411 sc->sc_c.sc_rh, SIOP_DCNTL, 412 bus_space_read_1(sc->sc_c.sc_rt, 413 sc->sc_c.sc_rh, SIOP_DCNTL) | DCNTL_STD); 414 } 415 return 1; 416 } 417 418 if (dstat & ~(DSTAT_SIR | DSTAT_DFE | DSTAT_SSI)) { 419 printf("DMA IRQ:"); 420 if (dstat & DSTAT_IID) 421 printf(" Illegal instruction"); 422 if (dstat & DSTAT_BF) 423 printf(" bus fault"); 424 if (dstat & DSTAT_MDPE) 425 printf(" parity"); 426 if (dstat & DSTAT_DFE) 427 printf(" DMA fifo empty"); 428 else 429 siop_clearfifo(&sc->sc_c); 430 printf(", DSP=0x%x DSA=0x%x: ", 431 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 432 SIOP_DSP) - sc->sc_c.sc_scriptaddr), 433 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA)); 434 if (siop_cmd) 435 printf("last msg_in=0x%x status=0x%x\n", 436 siop_cmd->cmd_tables->msg_in[0], 437 siop_ctoh32(&sc->sc_c, 438 siop_cmd->cmd_tables->status)); 439 else 440 aprint_error_dev(&sc->sc_c.sc_dev, "current DSA invalid\n"); 441 need_reset = 1; 442 } 443 } 444 if (istat & ISTAT_SIP) { 445 if (istat & ISTAT_DIP) 446 delay(10); 447 /* 448 * Can't read sist0 & sist1 independently, or we have to 449 * insert delay 450 */ 451 sist = bus_space_read_2(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 452 SIOP_SIST0); 453 sstat1 = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 454 SIOP_SSTAT1); 455 #ifdef SIOP_DEBUG_INTR 456 printf("scsi interrupt, sist=0x%x sstat1=0x%x " 457 "DSA=0x%x DSP=0x%lx\n", sist, 458 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 459 SIOP_SSTAT1), 460 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 461 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 462 SIOP_DSP) - 463 sc->sc_c.sc_scriptaddr)); 464 #endif 465 if (sist & SIST0_RST) { 466 siop_handle_reset(sc); 467 /* no table to flush here */ 468 return 1; 469 } 470 if (sist & SIST0_SGE) { 471 if (siop_cmd) 472 scsipi_printaddr(xs->xs_periph); 473 else 474 printf("%s:", device_xname(&sc->sc_c.sc_dev)); 475 printf("scsi gross error\n"); 476 goto reset; 477 } 478 if ((sist & SIST0_MA) && need_reset == 0) { 479 if (siop_cmd) { 480 int scratcha0; 481 dstat = bus_space_read_1(sc->sc_c.sc_rt, 482 sc->sc_c.sc_rh, SIOP_DSTAT); 483 /* 484 * first restore DSA, in case we were in a S/G 485 * operation. 486 */ 487 bus_space_write_4(sc->sc_c.sc_rt, 488 sc->sc_c.sc_rh, 489 SIOP_DSA, siop_cmd->cmd_c.dsa); 490 scratcha0 = bus_space_read_1(sc->sc_c.sc_rt, 491 sc->sc_c.sc_rh, SIOP_SCRATCHA); 492 switch (sstat1 & SSTAT1_PHASE_MASK) { 493 case SSTAT1_PHASE_STATUS: 494 /* 495 * previous phase may be aborted for any reason 496 * ( for example, the target has less data to 497 * transfer than requested). Compute resid and 498 * just go to status, the command should 499 * terminate. 500 */ 501 INCSTAT(siop_stat_intr_shortxfer); 502 if (scratcha0 & A_flag_data) 503 siop_ma(&siop_cmd->cmd_c); 504 else if ((dstat & DSTAT_DFE) == 0) 505 siop_clearfifo(&sc->sc_c); 506 CALL_SCRIPT(Ent_status); 507 return 1; 508 case SSTAT1_PHASE_MSGIN: 509 /* 510 * target may be ready to disconnect 511 * Compute resid which would be used later 512 * if a save data pointer is needed. 513 */ 514 INCSTAT(siop_stat_intr_xferdisc); 515 if (scratcha0 & A_flag_data) 516 siop_ma(&siop_cmd->cmd_c); 517 else if ((dstat & DSTAT_DFE) == 0) 518 siop_clearfifo(&sc->sc_c); 519 bus_space_write_1(sc->sc_c.sc_rt, 520 sc->sc_c.sc_rh, SIOP_SCRATCHA, 521 scratcha0 & ~A_flag_data); 522 CALL_SCRIPT(Ent_msgin); 523 return 1; 524 } 525 aprint_error_dev(&sc->sc_c.sc_dev, "unexpected phase mismatch %d\n", 526 sstat1 & SSTAT1_PHASE_MASK); 527 } else { 528 aprint_error_dev(&sc->sc_c.sc_dev, "phase mismatch without command\n"); 529 } 530 need_reset = 1; 531 } 532 if (sist & SIST0_PAR) { 533 /* parity error, reset */ 534 if (siop_cmd) 535 scsipi_printaddr(xs->xs_periph); 536 else 537 printf("%s:", device_xname(&sc->sc_c.sc_dev)); 538 printf("parity error\n"); 539 goto reset; 540 } 541 if ((sist & (SIST1_STO << 8)) && need_reset == 0) { 542 /* selection time out, assume there's no device here */ 543 if (siop_cmd) { 544 siop_cmd->cmd_c.status = CMDST_DONE; 545 xs->error = XS_SELTIMEOUT; 546 freetarget = 1; 547 goto end; 548 } else { 549 aprint_error_dev(&sc->sc_c.sc_dev, "selection timeout without " 550 "command\n"); 551 need_reset = 1; 552 } 553 } 554 if (sist & SIST0_UDC) { 555 /* 556 * unexpected disconnect. Usually the target signals 557 * a fatal condition this way. Attempt to get sense. 558 */ 559 if (siop_cmd) { 560 siop_cmd->cmd_tables->status = 561 siop_htoc32(&sc->sc_c, SCSI_CHECK); 562 goto end; 563 } 564 aprint_error_dev(&sc->sc_c.sc_dev, "unexpected disconnect without " 565 "command\n"); 566 goto reset; 567 } 568 if (sist & (SIST1_SBMC << 8)) { 569 /* SCSI bus mode change */ 570 if (siop_modechange(&sc->sc_c) == 0 || need_reset == 1) 571 goto reset; 572 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { 573 /* 574 * we have a script interrupt, it will 575 * restart the script. 576 */ 577 goto scintr; 578 } 579 /* 580 * else we have to restart it ourselve, at the 581 * interrupted instruction. 582 */ 583 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 584 SIOP_DSP, 585 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 586 SIOP_DSP) - 8); 587 return 1; 588 } 589 /* Else it's an unhandled exception (for now). */ 590 aprint_error_dev(&sc->sc_c.sc_dev, "unhandled scsi interrupt, sist=0x%x sstat1=0x%x " 591 "DSA=0x%x DSP=0x%x\n", sist, 592 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 593 SIOP_SSTAT1), 594 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 595 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 596 SIOP_DSP) - sc->sc_c.sc_scriptaddr)); 597 if (siop_cmd) { 598 siop_cmd->cmd_c.status = CMDST_DONE; 599 xs->error = XS_SELTIMEOUT; 600 goto end; 601 } 602 need_reset = 1; 603 } 604 if (need_reset) { 605 reset: 606 /* fatal error, reset the bus */ 607 siop_resetbus(&sc->sc_c); 608 /* no table to flush here */ 609 return 1; 610 } 611 612 scintr: 613 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { /* script interrupt */ 614 irqcode = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 615 SIOP_DSPS); 616 #ifdef SIOP_DEBUG_INTR 617 printf("script interrupt 0x%x\n", irqcode); 618 #endif 619 /* 620 * no command, or an inactive command is only valid for a 621 * reselect interrupt 622 */ 623 if ((irqcode & 0x80) == 0) { 624 if (siop_cmd == NULL) { 625 aprint_error_dev(&sc->sc_c.sc_dev, 626 "script interrupt (0x%x) with invalid DSA !!!\n", 627 irqcode); 628 goto reset; 629 } 630 if (siop_cmd->cmd_c.status != CMDST_ACTIVE) { 631 aprint_error_dev(&sc->sc_c.sc_dev, "command with invalid status " 632 "(IRQ code 0x%x current status %d) !\n", 633 irqcode, siop_cmd->cmd_c.status); 634 xs = NULL; 635 } 636 } 637 switch(irqcode) { 638 case A_int_err: 639 printf("error, DSP=0x%x\n", 640 (int)(bus_space_read_4(sc->sc_c.sc_rt, 641 sc->sc_c.sc_rh, SIOP_DSP) - sc->sc_c.sc_scriptaddr)); 642 if (xs) { 643 xs->error = XS_SELTIMEOUT; 644 goto end; 645 } else { 646 goto reset; 647 } 648 case A_int_reseltarg: 649 aprint_error_dev(&sc->sc_c.sc_dev, "reselect with invalid target\n"); 650 goto reset; 651 case A_int_resellun: 652 INCSTAT(siop_stat_intr_lunresel); 653 target = bus_space_read_1(sc->sc_c.sc_rt, 654 sc->sc_c.sc_rh, SIOP_SCRATCHA) & 0xf; 655 lun = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 656 SIOP_SCRATCHA + 1); 657 tag = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 658 SIOP_SCRATCHA + 2); 659 siop_target = 660 (struct siop_target *)sc->sc_c.targets[target]; 661 if (siop_target == NULL) { 662 printf("%s: reselect with invalid target %d\n", 663 device_xname(&sc->sc_c.sc_dev), target); 664 goto reset; 665 } 666 siop_lun = siop_target->siop_lun[lun]; 667 if (siop_lun == NULL) { 668 printf("%s: target %d reselect with invalid " 669 "lun %d\n", device_xname(&sc->sc_c.sc_dev), 670 target, lun); 671 goto reset; 672 } 673 if (siop_lun->siop_tag[tag].active == NULL) { 674 printf("%s: target %d lun %d tag %d reselect " 675 "without command\n", 676 device_xname(&sc->sc_c.sc_dev), 677 target, lun, tag); 678 goto reset; 679 } 680 siop_cmd = siop_lun->siop_tag[tag].active; 681 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 682 SIOP_DSP, siop_cmd->cmd_c.dsa + 683 sizeof(struct siop_common_xfer) + 684 Ent_ldsa_reload_dsa); 685 siop_table_sync(siop_cmd, BUS_DMASYNC_PREWRITE); 686 return 1; 687 case A_int_reseltag: 688 printf("%s: reselect with invalid tag\n", 689 device_xname(&sc->sc_c.sc_dev)); 690 goto reset; 691 case A_int_msgin: 692 { 693 int msgin = bus_space_read_1(sc->sc_c.sc_rt, 694 sc->sc_c.sc_rh, SIOP_SFBR); 695 if (msgin == MSG_MESSAGE_REJECT) { 696 int msg, extmsg; 697 if (siop_cmd->cmd_tables->msg_out[0] & 0x80) { 698 /* 699 * message was part of a identify + 700 * something else. Identify shouldn't 701 * have been rejected. 702 */ 703 msg = 704 siop_cmd->cmd_tables->msg_out[1]; 705 extmsg = 706 siop_cmd->cmd_tables->msg_out[3]; 707 } else { 708 msg = siop_cmd->cmd_tables->msg_out[0]; 709 extmsg = 710 siop_cmd->cmd_tables->msg_out[2]; 711 } 712 if (msg == MSG_MESSAGE_REJECT) { 713 /* MSG_REJECT for a MSG_REJECT !*/ 714 if (xs) 715 scsipi_printaddr(xs->xs_periph); 716 else 717 printf("%s: ", 718 device_xname(&sc->sc_c.sc_dev)); 719 printf("our reject message was " 720 "rejected\n"); 721 goto reset; 722 } 723 if (msg == MSG_EXTENDED && 724 extmsg == MSG_EXT_WDTR) { 725 /* WDTR rejected, initiate sync */ 726 if ((siop_target->target_c.flags & 727 TARF_SYNC) == 0) { 728 siop_target->target_c.status = 729 TARST_OK; 730 siop_update_xfer_mode(&sc->sc_c, 731 target); 732 /* no table to flush here */ 733 CALL_SCRIPT(Ent_msgin_ack); 734 return 1; 735 } 736 siop_target->target_c.status = 737 TARST_SYNC_NEG; 738 siop_sdtr_msg(&siop_cmd->cmd_c, 0, 739 sc->sc_c.st_minsync, 740 sc->sc_c.maxoff); 741 siop_table_sync(siop_cmd, 742 BUS_DMASYNC_PREREAD | 743 BUS_DMASYNC_PREWRITE); 744 CALL_SCRIPT(Ent_send_msgout); 745 return 1; 746 } else if (msg == MSG_EXTENDED && 747 extmsg == MSG_EXT_SDTR) { 748 /* sync rejected */ 749 siop_target->target_c.offset = 0; 750 siop_target->target_c.period = 0; 751 siop_target->target_c.status = TARST_OK; 752 siop_update_xfer_mode(&sc->sc_c, 753 target); 754 /* no table to flush here */ 755 CALL_SCRIPT(Ent_msgin_ack); 756 return 1; 757 } else if (msg == MSG_SIMPLE_Q_TAG || 758 msg == MSG_HEAD_OF_Q_TAG || 759 msg == MSG_ORDERED_Q_TAG) { 760 if (siop_handle_qtag_reject( 761 siop_cmd) == -1) 762 goto reset; 763 CALL_SCRIPT(Ent_msgin_ack); 764 return 1; 765 } 766 if (xs) 767 scsipi_printaddr(xs->xs_periph); 768 else 769 printf("%s: ", 770 device_xname(&sc->sc_c.sc_dev)); 771 if (msg == MSG_EXTENDED) { 772 printf("scsi message reject, extended " 773 "message sent was 0x%x\n", extmsg); 774 } else { 775 printf("scsi message reject, message " 776 "sent was 0x%x\n", msg); 777 } 778 /* no table to flush here */ 779 CALL_SCRIPT(Ent_msgin_ack); 780 return 1; 781 } 782 if (msgin == MSG_IGN_WIDE_RESIDUE) { 783 /* use the extmsgdata table to get the second byte */ 784 siop_cmd->cmd_tables->t_extmsgdata.count = 785 siop_htoc32(&sc->sc_c, 1); 786 siop_table_sync(siop_cmd, 787 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 788 CALL_SCRIPT(Ent_get_extmsgdata); 789 return 1; 790 } 791 if (xs) 792 scsipi_printaddr(xs->xs_periph); 793 else 794 printf("%s: ", device_xname(&sc->sc_c.sc_dev)); 795 printf("unhandled message 0x%x\n", 796 siop_cmd->cmd_tables->msg_in[0]); 797 siop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT; 798 siop_cmd->cmd_tables->t_msgout.count = 799 siop_htoc32(&sc->sc_c, 1); 800 siop_table_sync(siop_cmd, 801 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 802 CALL_SCRIPT(Ent_send_msgout); 803 return 1; 804 } 805 case A_int_extmsgin: 806 #ifdef SIOP_DEBUG_INTR 807 printf("extended message: msg 0x%x len %d\n", 808 siop_cmd->cmd_tables->msg_in[2], 809 siop_cmd->cmd_tables->msg_in[1]); 810 #endif 811 if (siop_cmd->cmd_tables->msg_in[1] > 812 sizeof(siop_cmd->cmd_tables->msg_in) - 2) 813 aprint_error_dev(&sc->sc_c.sc_dev, "extended message too big (%d)\n", 814 siop_cmd->cmd_tables->msg_in[1]); 815 siop_cmd->cmd_tables->t_extmsgdata.count = 816 siop_htoc32(&sc->sc_c, 817 siop_cmd->cmd_tables->msg_in[1] - 1); 818 siop_table_sync(siop_cmd, 819 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 820 CALL_SCRIPT(Ent_get_extmsgdata); 821 return 1; 822 case A_int_extmsgdata: 823 #ifdef SIOP_DEBUG_INTR 824 { 825 int i; 826 printf("extended message: 0x%x, data:", 827 siop_cmd->cmd_tables->msg_in[2]); 828 for (i = 3; i < 2 + siop_cmd->cmd_tables->msg_in[1]; 829 i++) 830 printf(" 0x%x", 831 siop_cmd->cmd_tables->msg_in[i]); 832 printf("\n"); 833 } 834 #endif 835 if (siop_cmd->cmd_tables->msg_in[0] == 836 MSG_IGN_WIDE_RESIDUE) { 837 /* we got the second byte of MSG_IGN_WIDE_RESIDUE */ 838 if (siop_cmd->cmd_tables->msg_in[3] != 1) 839 printf("MSG_IGN_WIDE_RESIDUE: " 840 "bad len %d\n", 841 siop_cmd->cmd_tables->msg_in[3]); 842 switch (siop_iwr(&siop_cmd->cmd_c)) { 843 case SIOP_NEG_MSGOUT: 844 siop_table_sync(siop_cmd, 845 BUS_DMASYNC_PREREAD | 846 BUS_DMASYNC_PREWRITE); 847 CALL_SCRIPT(Ent_send_msgout); 848 return(1); 849 case SIOP_NEG_ACK: 850 CALL_SCRIPT(Ent_msgin_ack); 851 return(1); 852 default: 853 panic("invalid retval from " 854 "siop_iwr()"); 855 } 856 return(1); 857 } 858 if (siop_cmd->cmd_tables->msg_in[2] == MSG_EXT_WDTR) { 859 switch (siop_wdtr_neg(&siop_cmd->cmd_c)) { 860 case SIOP_NEG_MSGOUT: 861 siop_update_scntl3(sc, 862 siop_cmd->cmd_c.siop_target); 863 siop_table_sync(siop_cmd, 864 BUS_DMASYNC_PREREAD | 865 BUS_DMASYNC_PREWRITE); 866 CALL_SCRIPT(Ent_send_msgout); 867 return(1); 868 case SIOP_NEG_ACK: 869 siop_update_scntl3(sc, 870 siop_cmd->cmd_c.siop_target); 871 CALL_SCRIPT(Ent_msgin_ack); 872 return(1); 873 default: 874 panic("invalid retval from " 875 "siop_wdtr_neg()"); 876 } 877 return(1); 878 } 879 if (siop_cmd->cmd_tables->msg_in[2] == MSG_EXT_SDTR) { 880 switch (siop_sdtr_neg(&siop_cmd->cmd_c)) { 881 case SIOP_NEG_MSGOUT: 882 siop_update_scntl3(sc, 883 siop_cmd->cmd_c.siop_target); 884 siop_table_sync(siop_cmd, 885 BUS_DMASYNC_PREREAD | 886 BUS_DMASYNC_PREWRITE); 887 CALL_SCRIPT(Ent_send_msgout); 888 return(1); 889 case SIOP_NEG_ACK: 890 siop_update_scntl3(sc, 891 siop_cmd->cmd_c.siop_target); 892 CALL_SCRIPT(Ent_msgin_ack); 893 return(1); 894 default: 895 panic("invalid retval from " 896 "siop_wdtr_neg()"); 897 } 898 return(1); 899 } 900 /* send a message reject */ 901 siop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT; 902 siop_cmd->cmd_tables->t_msgout.count = 903 siop_htoc32(&sc->sc_c, 1); 904 siop_table_sync(siop_cmd, 905 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 906 CALL_SCRIPT(Ent_send_msgout); 907 return 1; 908 case A_int_disc: 909 INCSTAT(siop_stat_intr_sdp); 910 offset = bus_space_read_1(sc->sc_c.sc_rt, 911 sc->sc_c.sc_rh, SIOP_SCRATCHA + 1); 912 #ifdef SIOP_DEBUG_DR 913 printf("disconnect offset %d\n", offset); 914 #endif 915 siop_sdp(&siop_cmd->cmd_c, offset); 916 /* we start again with no offset */ 917 siop_cmd->saved_offset = SIOP_NOOFFSET; 918 siop_table_sync(siop_cmd, 919 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 920 CALL_SCRIPT(Ent_script_sched); 921 return 1; 922 case A_int_saveoffset: 923 INCSTAT(siop_stat_intr_saveoffset); 924 offset = bus_space_read_1(sc->sc_c.sc_rt, 925 sc->sc_c.sc_rh, SIOP_SCRATCHA + 1); 926 #ifdef SIOP_DEBUG_DR 927 printf("saveoffset offset %d\n", offset); 928 #endif 929 siop_cmd->saved_offset = offset; 930 CALL_SCRIPT(Ent_script_sched); 931 return 1; 932 case A_int_resfail: 933 printf("reselect failed\n"); 934 CALL_SCRIPT(Ent_script_sched); 935 return 1; 936 case A_int_done: 937 if (xs == NULL) { 938 printf("%s: done without command, DSA=0x%lx\n", 939 device_xname(&sc->sc_c.sc_dev), 940 (u_long)siop_cmd->cmd_c.dsa); 941 siop_cmd->cmd_c.status = CMDST_FREE; 942 CALL_SCRIPT(Ent_script_sched); 943 return 1; 944 } 945 #ifdef SIOP_DEBUG_INTR 946 printf("done, DSA=0x%lx target id 0x%x last msg " 947 "in=0x%x status=0x%x\n", (u_long)siop_cmd->cmd_c.dsa, 948 siop_ctoh32(&sc->sc_c, siop_cmd->cmd_tables->id), 949 siop_cmd->cmd_tables->msg_in[0], 950 siop_ctoh32(&sc->sc_c, 951 siop_cmd->cmd_tables->status)); 952 #endif 953 INCSTAT(siop_stat_intr_done); 954 /* update resid. */ 955 offset = bus_space_read_1(sc->sc_c.sc_rt, 956 sc->sc_c.sc_rh, SIOP_SCRATCHA + 1); 957 /* 958 * if we got a disconnect between the last data phase 959 * and the status phase, offset will be 0. In this 960 * case, siop_cmd->saved_offset will have the proper 961 * value if it got updated by the controller 962 */ 963 if (offset == 0 && 964 siop_cmd->saved_offset != SIOP_NOOFFSET) 965 offset = siop_cmd->saved_offset; 966 siop_update_resid(&siop_cmd->cmd_c, offset); 967 siop_cmd->cmd_c.status = CMDST_DONE; 968 goto end; 969 default: 970 printf("unknown irqcode %x\n", irqcode); 971 if (xs) { 972 xs->error = XS_SELTIMEOUT; 973 goto end; 974 } 975 goto reset; 976 } 977 return 1; 978 } 979 /* We just should't get there */ 980 panic("siop_intr: I shouldn't be there !"); 981 982 end: 983 /* 984 * restart the script now if command completed properly 985 * Otherwise wait for siop_scsicmd_end(), we may need to cleanup the 986 * queue 987 */ 988 xs->status = siop_ctoh32(&sc->sc_c, siop_cmd->cmd_tables->status); 989 if (xs->status == SCSI_OK) 990 CALL_SCRIPT(Ent_script_sched); 991 else 992 restart = 1; 993 siop_lun->siop_tag[tag].active = NULL; 994 siop_scsicmd_end(siop_cmd); 995 if (freetarget && siop_target->target_c.status == TARST_PROBING) 996 siop_del_dev(sc, target, lun); 997 if (restart) 998 CALL_SCRIPT(Ent_script_sched); 999 if (sc->sc_flags & SCF_CHAN_NOSLOT) { 1000 /* a command terminated, so we have free slots now */ 1001 sc->sc_flags &= ~SCF_CHAN_NOSLOT; 1002 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1); 1003 } 1004 1005 return 1; 1006 } 1007 1008 void 1009 siop_scsicmd_end(siop_cmd) 1010 struct siop_cmd *siop_cmd; 1011 { 1012 struct scsipi_xfer *xs = siop_cmd->cmd_c.xs; 1013 struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc; 1014 1015 switch(xs->status) { 1016 case SCSI_OK: 1017 xs->error = XS_NOERROR; 1018 break; 1019 case SCSI_BUSY: 1020 xs->error = XS_BUSY; 1021 break; 1022 case SCSI_CHECK: 1023 xs->error = XS_BUSY; 1024 /* remove commands in the queue and scheduler */ 1025 siop_unqueue(sc, xs->xs_periph->periph_target, 1026 xs->xs_periph->periph_lun); 1027 break; 1028 case SCSI_QUEUE_FULL: 1029 INCSTAT(siop_stat_intr_qfull); 1030 #ifdef SIOP_DEBUG 1031 printf("%s:%d:%d: queue full (tag %d)\n", 1032 device_xname(&sc->sc_c.sc_dev), 1033 xs->xs_periph->periph_target, 1034 xs->xs_periph->periph_lun, siop_cmd->cmd_c.tag); 1035 #endif 1036 xs->error = XS_BUSY; 1037 break; 1038 case SCSI_SIOP_NOCHECK: 1039 /* 1040 * don't check status, xs->error is already valid 1041 */ 1042 break; 1043 case SCSI_SIOP_NOSTATUS: 1044 /* 1045 * the status byte was not updated, cmd was 1046 * aborted 1047 */ 1048 xs->error = XS_SELTIMEOUT; 1049 break; 1050 default: 1051 scsipi_printaddr(xs->xs_periph); 1052 printf("invalid status code %d\n", xs->status); 1053 xs->error = XS_DRIVER_STUFFUP; 1054 } 1055 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1056 bus_dmamap_sync(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data, 0, 1057 siop_cmd->cmd_c.dmamap_data->dm_mapsize, 1058 (xs->xs_control & XS_CTL_DATA_IN) ? 1059 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1060 bus_dmamap_unload(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data); 1061 } 1062 bus_dmamap_unload(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_cmd); 1063 if ((xs->xs_control & XS_CTL_POLL) == 0) 1064 callout_stop(&xs->xs_callout); 1065 siop_cmd->cmd_c.status = CMDST_FREE; 1066 TAILQ_INSERT_TAIL(&sc->free_list, siop_cmd, next); 1067 #if 0 1068 if (xs->resid != 0) 1069 printf("resid %d datalen %d\n", xs->resid, xs->datalen); 1070 #endif 1071 scsipi_done (xs); 1072 } 1073 1074 void 1075 siop_unqueue(sc, target, lun) 1076 struct siop_softc *sc; 1077 int target; 1078 int lun; 1079 { 1080 int slot, tag; 1081 struct siop_cmd *siop_cmd; 1082 struct siop_lun *siop_lun = 1083 ((struct siop_target *)sc->sc_c.targets[target])->siop_lun[lun]; 1084 1085 /* first make sure to read valid data */ 1086 siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1087 1088 for (tag = 1; tag < SIOP_NTAG; tag++) { 1089 /* look for commands in the scheduler, not yet started */ 1090 if (siop_lun->siop_tag[tag].active == NULL) 1091 continue; 1092 siop_cmd = siop_lun->siop_tag[tag].active; 1093 for (slot = 0; slot <= sc->sc_currschedslot; slot++) { 1094 if (siop_script_read(sc, 1095 (Ent_script_sched_slot0 / 4) + slot * 2 + 1) == 1096 siop_cmd->cmd_c.dsa + 1097 sizeof(struct siop_common_xfer) + 1098 Ent_ldsa_select) 1099 break; 1100 } 1101 if (slot > sc->sc_currschedslot) 1102 continue; /* didn't find it */ 1103 if (siop_script_read(sc, 1104 (Ent_script_sched_slot0 / 4) + slot * 2) == 0x80000000) 1105 continue; /* already started */ 1106 /* clear the slot */ 1107 siop_script_write(sc, (Ent_script_sched_slot0 / 4) + slot * 2, 1108 0x80000000); 1109 /* ask to requeue */ 1110 siop_cmd->cmd_c.xs->error = XS_REQUEUE; 1111 siop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1112 siop_lun->siop_tag[tag].active = NULL; 1113 siop_scsicmd_end(siop_cmd); 1114 } 1115 /* update sc_currschedslot */ 1116 sc->sc_currschedslot = 0; 1117 for (slot = SIOP_NSLOTS - 1; slot >= 0; slot--) { 1118 if (siop_script_read(sc, 1119 (Ent_script_sched_slot0 / 4) + slot * 2) != 0x80000000) 1120 sc->sc_currschedslot = slot; 1121 } 1122 } 1123 1124 /* 1125 * handle a rejected queue tag message: the command will run untagged, 1126 * has to adjust the reselect script. 1127 */ 1128 int 1129 siop_handle_qtag_reject(siop_cmd) 1130 struct siop_cmd *siop_cmd; 1131 { 1132 struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc; 1133 int target = siop_cmd->cmd_c.xs->xs_periph->periph_target; 1134 int lun = siop_cmd->cmd_c.xs->xs_periph->periph_lun; 1135 int tag = siop_cmd->cmd_tables->msg_out[2]; 1136 struct siop_lun *siop_lun = 1137 ((struct siop_target*)sc->sc_c.targets[target])->siop_lun[lun]; 1138 1139 #ifdef SIOP_DEBUG 1140 printf("%s:%d:%d: tag message %d (%d) rejected (status %d)\n", 1141 device_xname(&sc->sc_c.sc_dev), target, lun, tag, siop_cmd->cmd_c.tag, 1142 siop_cmd->cmd_c.status); 1143 #endif 1144 1145 if (siop_lun->siop_tag[0].active != NULL) { 1146 printf("%s: untagged command already running for target %d " 1147 "lun %d (status %d)\n", device_xname(&sc->sc_c.sc_dev), 1148 target, lun, siop_lun->siop_tag[0].active->cmd_c.status); 1149 return -1; 1150 } 1151 /* clear tag slot */ 1152 siop_lun->siop_tag[tag].active = NULL; 1153 /* add command to non-tagged slot */ 1154 siop_lun->siop_tag[0].active = siop_cmd; 1155 siop_cmd->cmd_c.tag = 0; 1156 /* adjust reselect script if there is one */ 1157 if (siop_lun->siop_tag[0].reseloff > 0) { 1158 siop_script_write(sc, 1159 siop_lun->siop_tag[0].reseloff + 1, 1160 siop_cmd->cmd_c.dsa + sizeof(struct siop_common_xfer) + 1161 Ent_ldsa_reload_dsa); 1162 siop_table_sync(siop_cmd, BUS_DMASYNC_PREWRITE); 1163 } 1164 return 0; 1165 } 1166 1167 /* 1168 * handle a bus reset: reset chip, unqueue all active commands, free all 1169 * target struct and report lossage to upper layer. 1170 * As the upper layer may requeue immediatly we have to first store 1171 * all active commands in a temporary queue. 1172 */ 1173 void 1174 siop_handle_reset(sc) 1175 struct siop_softc *sc; 1176 { 1177 struct siop_cmd *siop_cmd; 1178 struct siop_lun *siop_lun; 1179 int target, lun, tag; 1180 /* 1181 * scsi bus reset. reset the chip and restart 1182 * the queue. Need to clean up all active commands 1183 */ 1184 printf("%s: scsi bus reset\n", device_xname(&sc->sc_c.sc_dev)); 1185 /* stop, reset and restart the chip */ 1186 siop_reset(sc); 1187 if (sc->sc_flags & SCF_CHAN_NOSLOT) { 1188 /* chip has been reset, all slots are free now */ 1189 sc->sc_flags &= ~SCF_CHAN_NOSLOT; 1190 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1); 1191 } 1192 /* 1193 * Process all commands: first commands being executed 1194 */ 1195 for (target = 0; target < sc->sc_c.sc_chan.chan_ntargets; 1196 target++) { 1197 if (sc->sc_c.targets[target] == NULL) 1198 continue; 1199 for (lun = 0; lun < 8; lun++) { 1200 struct siop_target *siop_target = 1201 (struct siop_target *)sc->sc_c.targets[target]; 1202 siop_lun = siop_target->siop_lun[lun]; 1203 if (siop_lun == NULL) 1204 continue; 1205 for (tag = 0; tag < 1206 ((sc->sc_c.targets[target]->flags & TARF_TAG) ? 1207 SIOP_NTAG : 1); 1208 tag++) { 1209 siop_cmd = siop_lun->siop_tag[tag].active; 1210 if (siop_cmd == NULL) 1211 continue; 1212 scsipi_printaddr(siop_cmd->cmd_c.xs->xs_periph); 1213 printf("command with tag id %d reset\n", tag); 1214 siop_cmd->cmd_c.xs->error = 1215 (siop_cmd->cmd_c.flags & CMDFL_TIMEOUT) ? 1216 XS_TIMEOUT : XS_RESET; 1217 siop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1218 siop_lun->siop_tag[tag].active = NULL; 1219 siop_cmd->cmd_c.status = CMDST_DONE; 1220 siop_scsicmd_end(siop_cmd); 1221 } 1222 } 1223 sc->sc_c.targets[target]->status = TARST_ASYNC; 1224 sc->sc_c.targets[target]->flags &= ~TARF_ISWIDE; 1225 sc->sc_c.targets[target]->period = 1226 sc->sc_c.targets[target]->offset = 0; 1227 siop_update_xfer_mode(&sc->sc_c, target); 1228 } 1229 1230 scsipi_async_event(&sc->sc_c.sc_chan, ASYNC_EVENT_RESET, NULL); 1231 } 1232 1233 void 1234 siop_scsipi_request(chan, req, arg) 1235 struct scsipi_channel *chan; 1236 scsipi_adapter_req_t req; 1237 void *arg; 1238 { 1239 struct scsipi_xfer *xs; 1240 struct scsipi_periph *periph; 1241 struct siop_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1242 struct siop_cmd *siop_cmd; 1243 struct siop_target *siop_target; 1244 int s, error, i; 1245 int target; 1246 int lun; 1247 1248 switch (req) { 1249 case ADAPTER_REQ_RUN_XFER: 1250 xs = arg; 1251 periph = xs->xs_periph; 1252 target = periph->periph_target; 1253 lun = periph->periph_lun; 1254 1255 s = splbio(); 1256 #ifdef SIOP_DEBUG_SCHED 1257 printf("starting cmd for %d:%d\n", target, lun); 1258 #endif 1259 siop_cmd = TAILQ_FIRST(&sc->free_list); 1260 if (siop_cmd == NULL) { 1261 xs->error = XS_RESOURCE_SHORTAGE; 1262 scsipi_done(xs); 1263 splx(s); 1264 return; 1265 } 1266 TAILQ_REMOVE(&sc->free_list, siop_cmd, next); 1267 #ifdef DIAGNOSTIC 1268 if (siop_cmd->cmd_c.status != CMDST_FREE) 1269 panic("siop_scsicmd: new cmd not free"); 1270 #endif 1271 siop_target = (struct siop_target*)sc->sc_c.targets[target]; 1272 if (siop_target == NULL) { 1273 #ifdef SIOP_DEBUG 1274 printf("%s: alloc siop_target for target %d\n", 1275 device_xname(&sc->sc_c.sc_dev), target); 1276 #endif 1277 sc->sc_c.targets[target] = 1278 malloc(sizeof(struct siop_target), 1279 M_DEVBUF, M_NOWAIT|M_ZERO); 1280 if (sc->sc_c.targets[target] == NULL) { 1281 aprint_error_dev(&sc->sc_c.sc_dev, "can't malloc memory for " 1282 "target %d\n", target); 1283 xs->error = XS_RESOURCE_SHORTAGE; 1284 scsipi_done(xs); 1285 TAILQ_INSERT_TAIL(&sc->free_list, 1286 siop_cmd, next); 1287 splx(s); 1288 return; 1289 } 1290 siop_target = 1291 (struct siop_target*)sc->sc_c.targets[target]; 1292 siop_target->target_c.status = TARST_PROBING; 1293 siop_target->target_c.flags = 0; 1294 siop_target->target_c.id = 1295 sc->sc_c.clock_div << 24; /* scntl3 */ 1296 siop_target->target_c.id |= target << 16; /* id */ 1297 /* siop_target->target_c.id |= 0x0 << 8; scxfer is 0 */ 1298 1299 /* get a lun switch script */ 1300 siop_target->lunsw = siop_get_lunsw(sc); 1301 if (siop_target->lunsw == NULL) { 1302 aprint_error_dev(&sc->sc_c.sc_dev, "can't alloc lunsw for target %d\n", 1303 target); 1304 xs->error = XS_RESOURCE_SHORTAGE; 1305 scsipi_done(xs); 1306 TAILQ_INSERT_TAIL(&sc->free_list, 1307 siop_cmd, next); 1308 splx(s); 1309 return; 1310 } 1311 for (i=0; i < 8; i++) 1312 siop_target->siop_lun[i] = NULL; 1313 siop_add_reselsw(sc, target); 1314 } 1315 if (siop_target->siop_lun[lun] == NULL) { 1316 siop_target->siop_lun[lun] = 1317 malloc(sizeof(struct siop_lun), M_DEVBUF, 1318 M_NOWAIT|M_ZERO); 1319 if (siop_target->siop_lun[lun] == NULL) { 1320 aprint_error_dev(&sc->sc_c.sc_dev, "can't alloc siop_lun for " 1321 "target %d lun %d\n", 1322 target, lun); 1323 xs->error = XS_RESOURCE_SHORTAGE; 1324 scsipi_done(xs); 1325 TAILQ_INSERT_TAIL(&sc->free_list, 1326 siop_cmd, next); 1327 splx(s); 1328 return; 1329 } 1330 } 1331 siop_cmd->cmd_c.siop_target = sc->sc_c.targets[target]; 1332 siop_cmd->cmd_c.xs = xs; 1333 siop_cmd->cmd_c.flags = 0; 1334 siop_cmd->cmd_c.status = CMDST_READY; 1335 1336 /* load the DMA maps */ 1337 error = bus_dmamap_load(sc->sc_c.sc_dmat, 1338 siop_cmd->cmd_c.dmamap_cmd, 1339 xs->cmd, xs->cmdlen, NULL, BUS_DMA_NOWAIT); 1340 if (error) { 1341 aprint_error_dev(&sc->sc_c.sc_dev, "unable to load cmd DMA map: %d\n", 1342 error); 1343 xs->error = (error == EAGAIN) ? 1344 XS_RESOURCE_SHORTAGE : XS_DRIVER_STUFFUP; 1345 scsipi_done(xs); 1346 siop_cmd->cmd_c.status = CMDST_FREE; 1347 TAILQ_INSERT_TAIL(&sc->free_list, siop_cmd, next); 1348 splx(s); 1349 return; 1350 } 1351 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1352 error = bus_dmamap_load(sc->sc_c.sc_dmat, 1353 siop_cmd->cmd_c.dmamap_data, xs->data, xs->datalen, 1354 NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1355 ((xs->xs_control & XS_CTL_DATA_IN) ? 1356 BUS_DMA_READ : BUS_DMA_WRITE)); 1357 if (error) { 1358 aprint_error_dev(&sc->sc_c.sc_dev, 1359 "unable to load data DMA map: %d", 1360 error); 1361 xs->error = (error == EAGAIN) ? 1362 XS_RESOURCE_SHORTAGE : XS_DRIVER_STUFFUP; 1363 scsipi_done(xs); 1364 bus_dmamap_unload(sc->sc_c.sc_dmat, 1365 siop_cmd->cmd_c.dmamap_cmd); 1366 siop_cmd->cmd_c.status = CMDST_FREE; 1367 TAILQ_INSERT_TAIL(&sc->free_list, 1368 siop_cmd, next); 1369 splx(s); 1370 return; 1371 } 1372 bus_dmamap_sync(sc->sc_c.sc_dmat, 1373 siop_cmd->cmd_c.dmamap_data, 0, 1374 siop_cmd->cmd_c.dmamap_data->dm_mapsize, 1375 (xs->xs_control & XS_CTL_DATA_IN) ? 1376 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1377 } 1378 bus_dmamap_sync(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_cmd, 0, 1379 siop_cmd->cmd_c.dmamap_cmd->dm_mapsize, 1380 BUS_DMASYNC_PREWRITE); 1381 1382 if (xs->xs_tag_type) { 1383 /* use tag_id + 1, tag 0 is reserved for untagged cmds*/ 1384 siop_cmd->cmd_c.tag = xs->xs_tag_id + 1; 1385 } else { 1386 siop_cmd->cmd_c.tag = 0; 1387 } 1388 siop_setuptables(&siop_cmd->cmd_c); 1389 siop_cmd->saved_offset = SIOP_NOOFFSET; 1390 siop_table_sync(siop_cmd, 1391 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1392 siop_start(sc, siop_cmd); 1393 if (xs->xs_control & XS_CTL_POLL) { 1394 /* poll for command completion */ 1395 while ((xs->xs_status & XS_STS_DONE) == 0) { 1396 delay(1000); 1397 siop_intr(sc); 1398 } 1399 } 1400 splx(s); 1401 return; 1402 1403 case ADAPTER_REQ_GROW_RESOURCES: 1404 #ifdef SIOP_DEBUG 1405 printf("%s grow resources (%d)\n", device_xname(&sc->sc_c.sc_dev), 1406 sc->sc_c.sc_adapt.adapt_openings); 1407 #endif 1408 siop_morecbd(sc); 1409 return; 1410 1411 case ADAPTER_REQ_SET_XFER_MODE: 1412 { 1413 struct scsipi_xfer_mode *xm = arg; 1414 if (sc->sc_c.targets[xm->xm_target] == NULL) 1415 return; 1416 s = splbio(); 1417 if (xm->xm_mode & PERIPH_CAP_TQING) 1418 sc->sc_c.targets[xm->xm_target]->flags |= TARF_TAG; 1419 if ((xm->xm_mode & PERIPH_CAP_WIDE16) && 1420 (sc->sc_c.features & SF_BUS_WIDE)) 1421 sc->sc_c.targets[xm->xm_target]->flags |= TARF_WIDE; 1422 if (xm->xm_mode & PERIPH_CAP_SYNC) 1423 sc->sc_c.targets[xm->xm_target]->flags |= TARF_SYNC; 1424 if ((xm->xm_mode & (PERIPH_CAP_SYNC | PERIPH_CAP_WIDE16)) || 1425 sc->sc_c.targets[xm->xm_target]->status == TARST_PROBING) 1426 sc->sc_c.targets[xm->xm_target]->status = 1427 TARST_ASYNC; 1428 1429 for (lun = 0; lun < sc->sc_c.sc_chan.chan_nluns; lun++) { 1430 if (scsipi_lookup_periph(chan, 1431 xm->xm_target, lun) != NULL) { 1432 /* allocate a lun sw entry for this device */ 1433 siop_add_dev(sc, xm->xm_target, lun); 1434 } 1435 } 1436 1437 splx(s); 1438 } 1439 } 1440 } 1441 1442 static void 1443 siop_start(sc, siop_cmd) 1444 struct siop_softc *sc; 1445 struct siop_cmd *siop_cmd; 1446 { 1447 struct siop_lun *siop_lun; 1448 struct siop_xfer *siop_xfer; 1449 u_int32_t dsa; 1450 int timeout; 1451 int target, lun, slot; 1452 1453 /* 1454 * first make sure to read valid data 1455 */ 1456 siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1457 1458 /* 1459 * The queue management here is a bit tricky: the script always looks 1460 * at the slot from first to last, so if we always use the first 1461 * free slot commands can stay at the tail of the queue ~forever. 1462 * The algorithm used here is to restart from the head when we know 1463 * that the queue is empty, and only add commands after the last one. 1464 * When we're at the end of the queue wait for the script to clear it. 1465 * The best thing to do here would be to implement a circular queue, 1466 * but using only 53c720 features this can be "interesting". 1467 * A mid-way solution could be to implement 2 queues and swap orders. 1468 */ 1469 slot = sc->sc_currschedslot; 1470 /* 1471 * If the instruction is 0x80000000 (JUMP foo, IF FALSE) the slot is 1472 * free. As this is the last used slot, all previous slots are free, 1473 * we can restart from 0. 1474 */ 1475 if (siop_script_read(sc, (Ent_script_sched_slot0 / 4) + slot * 2) == 1476 0x80000000) { 1477 slot = sc->sc_currschedslot = 0; 1478 } else { 1479 slot++; 1480 } 1481 target = siop_cmd->cmd_c.xs->xs_periph->periph_target; 1482 lun = siop_cmd->cmd_c.xs->xs_periph->periph_lun; 1483 siop_lun = 1484 ((struct siop_target*)sc->sc_c.targets[target])->siop_lun[lun]; 1485 /* if non-tagged command active, panic: this shouldn't happen */ 1486 if (siop_lun->siop_tag[0].active != NULL) { 1487 panic("siop_start: tagged cmd while untagged running"); 1488 } 1489 #ifdef DIAGNOSTIC 1490 /* sanity check the tag if needed */ 1491 if (siop_cmd->cmd_c.flags & CMDFL_TAG) { 1492 if (siop_lun->siop_tag[siop_cmd->cmd_c.tag].active != NULL) 1493 panic("siop_start: tag not free"); 1494 if (siop_cmd->cmd_c.tag >= SIOP_NTAG) { 1495 scsipi_printaddr(siop_cmd->cmd_c.xs->xs_periph); 1496 printf(": tag id %d\n", siop_cmd->cmd_c.tag); 1497 panic("siop_start: invalid tag id"); 1498 } 1499 } 1500 #endif 1501 /* 1502 * find a free scheduler slot and load it. 1503 */ 1504 for (; slot < SIOP_NSLOTS; slot++) { 1505 /* 1506 * If cmd if 0x80000000 the slot is free 1507 */ 1508 if (siop_script_read(sc, 1509 (Ent_script_sched_slot0 / 4) + slot * 2) == 1510 0x80000000) 1511 break; 1512 } 1513 if (slot == SIOP_NSLOTS) { 1514 /* 1515 * no more free slot, no need to continue. freeze the queue 1516 * and requeue this command. 1517 */ 1518 scsipi_channel_freeze(&sc->sc_c.sc_chan, 1); 1519 sc->sc_flags |= SCF_CHAN_NOSLOT; 1520 siop_cmd->cmd_c.xs->error = XS_REQUEUE; 1521 siop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1522 siop_scsicmd_end(siop_cmd); 1523 return; 1524 } 1525 #ifdef SIOP_DEBUG_SCHED 1526 printf("using slot %d for DSA 0x%lx\n", slot, 1527 (u_long)siop_cmd->cmd_c.dsa); 1528 #endif 1529 /* mark command as active */ 1530 if (siop_cmd->cmd_c.status == CMDST_READY) 1531 siop_cmd->cmd_c.status = CMDST_ACTIVE; 1532 else 1533 panic("siop_start: bad status"); 1534 siop_lun->siop_tag[siop_cmd->cmd_c.tag].active = siop_cmd; 1535 /* patch scripts with DSA addr */ 1536 dsa = siop_cmd->cmd_c.dsa; 1537 /* first reselect switch, if we have an entry */ 1538 if (siop_lun->siop_tag[siop_cmd->cmd_c.tag].reseloff > 0) 1539 siop_script_write(sc, 1540 siop_lun->siop_tag[siop_cmd->cmd_c.tag].reseloff + 1, 1541 dsa + sizeof(struct siop_common_xfer) + 1542 Ent_ldsa_reload_dsa); 1543 /* CMD script: MOVE MEMORY addr */ 1544 siop_xfer = (struct siop_xfer*)siop_cmd->cmd_tables; 1545 siop_xfer->resel[E_ldsa_abs_slot_Used[0]] = 1546 siop_htoc32(&sc->sc_c, sc->sc_c.sc_scriptaddr + 1547 Ent_script_sched_slot0 + slot * 8); 1548 siop_table_sync(siop_cmd, BUS_DMASYNC_PREWRITE); 1549 /* scheduler slot: JUMP ldsa_select */ 1550 siop_script_write(sc, 1551 (Ent_script_sched_slot0 / 4) + slot * 2 + 1, 1552 dsa + sizeof(struct siop_common_xfer) + Ent_ldsa_select); 1553 /* handle timeout */ 1554 if ((siop_cmd->cmd_c.xs->xs_control & XS_CTL_POLL) == 0) { 1555 /* start exire timer */ 1556 timeout = mstohz(siop_cmd->cmd_c.xs->timeout); 1557 if (timeout == 0) 1558 timeout = 1; 1559 callout_reset( &siop_cmd->cmd_c.xs->xs_callout, 1560 timeout, siop_timeout, siop_cmd); 1561 } 1562 /* 1563 * Change JUMP cmd so that this slot will be handled 1564 */ 1565 siop_script_write(sc, (Ent_script_sched_slot0 / 4) + slot * 2, 1566 0x80080000); 1567 sc->sc_currschedslot = slot; 1568 1569 /* make sure SCRIPT processor will read valid data */ 1570 siop_script_sync(sc,BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1571 /* Signal script it has some work to do */ 1572 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 1573 SIOP_ISTAT, ISTAT_SIGP); 1574 /* and wait for IRQ */ 1575 return; 1576 } 1577 1578 void 1579 siop_timeout(v) 1580 void *v; 1581 { 1582 struct siop_cmd *siop_cmd = v; 1583 struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc; 1584 int s; 1585 1586 scsipi_printaddr(siop_cmd->cmd_c.xs->xs_periph); 1587 printf("command timeout, CDB: "); 1588 scsipi_print_cdb(siop_cmd->cmd_c.xs->cmd); 1589 printf("\n"); 1590 1591 s = splbio(); 1592 /* reset the scsi bus */ 1593 siop_resetbus(&sc->sc_c); 1594 1595 /* deactivate callout */ 1596 callout_stop(&siop_cmd->cmd_c.xs->xs_callout); 1597 /* mark command as being timed out; siop_intr will handle it */ 1598 /* 1599 * mark command has being timed out and just return; 1600 * the bus reset will generate an interrupt, 1601 * it will be handled in siop_intr() 1602 */ 1603 siop_cmd->cmd_c.flags |= CMDFL_TIMEOUT; 1604 splx(s); 1605 return; 1606 1607 } 1608 1609 void 1610 siop_dump_script(sc) 1611 struct siop_softc *sc; 1612 { 1613 int i; 1614 for (i = 0; i < PAGE_SIZE / 4; i += 2) { 1615 printf("0x%04x: 0x%08x 0x%08x", i * 4, 1616 siop_ctoh32(&sc->sc_c, sc->sc_c.sc_script[i]), 1617 siop_ctoh32(&sc->sc_c, sc->sc_c.sc_script[i+1])); 1618 if ((siop_ctoh32(&sc->sc_c, 1619 sc->sc_c.sc_script[i]) & 0xe0000000) == 0xc0000000) { 1620 i++; 1621 printf(" 0x%08x", siop_ctoh32(&sc->sc_c, 1622 sc->sc_c.sc_script[i+1])); 1623 } 1624 printf("\n"); 1625 } 1626 } 1627 1628 void 1629 siop_morecbd(sc) 1630 struct siop_softc *sc; 1631 { 1632 int error, off, i, j, s; 1633 bus_dma_segment_t seg; 1634 int rseg; 1635 struct siop_cbd *newcbd; 1636 struct siop_xfer *xfer; 1637 bus_addr_t dsa; 1638 u_int32_t *scr; 1639 1640 /* allocate a new list head */ 1641 newcbd = malloc(sizeof(struct siop_cbd), M_DEVBUF, M_NOWAIT|M_ZERO); 1642 if (newcbd == NULL) { 1643 aprint_error_dev(&sc->sc_c.sc_dev, "can't allocate memory for command descriptors head\n"); 1644 return; 1645 } 1646 1647 /* allocate cmd list */ 1648 newcbd->cmds = malloc(sizeof(struct siop_cmd) * SIOP_NCMDPB, 1649 M_DEVBUF, M_NOWAIT|M_ZERO); 1650 if (newcbd->cmds == NULL) { 1651 aprint_error_dev(&sc->sc_c.sc_dev, "can't allocate memory for command descriptors\n"); 1652 goto bad3; 1653 } 1654 error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, &seg, 1655 1, &rseg, BUS_DMA_NOWAIT); 1656 if (error) { 1657 aprint_error_dev(&sc->sc_c.sc_dev, "unable to allocate cbd DMA memory, error = %d\n", 1658 error); 1659 goto bad2; 1660 } 1661 error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE, 1662 (void **)&newcbd->xfers, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1663 if (error) { 1664 aprint_error_dev(&sc->sc_c.sc_dev, "unable to map cbd DMA memory, error = %d\n", 1665 error); 1666 goto bad2; 1667 } 1668 error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, 1669 BUS_DMA_NOWAIT, &newcbd->xferdma); 1670 if (error) { 1671 aprint_error_dev(&sc->sc_c.sc_dev, "unable to create cbd DMA map, error = %d\n", 1672 error); 1673 goto bad1; 1674 } 1675 error = bus_dmamap_load(sc->sc_c.sc_dmat, newcbd->xferdma, newcbd->xfers, 1676 PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 1677 if (error) { 1678 aprint_error_dev(&sc->sc_c.sc_dev, "unable to load cbd DMA map, error = %d\n", 1679 error); 1680 goto bad0; 1681 } 1682 #ifdef DEBUG 1683 printf("%s: alloc newcdb at PHY addr 0x%lx\n", device_xname(&sc->sc_c.sc_dev), 1684 (unsigned long)newcbd->xferdma->dm_segs[0].ds_addr); 1685 #endif 1686 off = (sc->sc_c.features & SF_CHIP_BE) ? 3 : 0; 1687 for (i = 0; i < SIOP_NCMDPB; i++) { 1688 error = bus_dmamap_create(sc->sc_c.sc_dmat, MAXPHYS, SIOP_NSG, 1689 MAXPHYS, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1690 &newcbd->cmds[i].cmd_c.dmamap_data); 1691 if (error) { 1692 aprint_error_dev(&sc->sc_c.sc_dev, "unable to create data DMA map for cbd: " 1693 "error %d\n", error); 1694 goto bad0; 1695 } 1696 error = bus_dmamap_create(sc->sc_c.sc_dmat, 1697 sizeof(struct scsipi_generic), 1, 1698 sizeof(struct scsipi_generic), 0, 1699 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1700 &newcbd->cmds[i].cmd_c.dmamap_cmd); 1701 if (error) { 1702 aprint_error_dev(&sc->sc_c.sc_dev, "unable to create cmd DMA map for cbd %d\n", error); 1703 goto bad0; 1704 } 1705 newcbd->cmds[i].cmd_c.siop_sc = &sc->sc_c; 1706 newcbd->cmds[i].siop_cbdp = newcbd; 1707 xfer = &newcbd->xfers[i]; 1708 newcbd->cmds[i].cmd_tables = (struct siop_common_xfer *)xfer; 1709 memset(newcbd->cmds[i].cmd_tables, 0, sizeof(struct siop_xfer)); 1710 dsa = newcbd->xferdma->dm_segs[0].ds_addr + 1711 i * sizeof(struct siop_xfer); 1712 newcbd->cmds[i].cmd_c.dsa = dsa; 1713 newcbd->cmds[i].cmd_c.status = CMDST_FREE; 1714 xfer->siop_tables.t_msgout.count= siop_htoc32(&sc->sc_c, 1); 1715 xfer->siop_tables.t_msgout.addr = siop_htoc32(&sc->sc_c, dsa); 1716 xfer->siop_tables.t_msgin.count= siop_htoc32(&sc->sc_c, 1); 1717 xfer->siop_tables.t_msgin.addr = siop_htoc32(&sc->sc_c, 1718 dsa + offsetof(struct siop_common_xfer, msg_in)); 1719 xfer->siop_tables.t_extmsgin.count= siop_htoc32(&sc->sc_c, 2); 1720 xfer->siop_tables.t_extmsgin.addr = siop_htoc32(&sc->sc_c, 1721 dsa + offsetof(struct siop_common_xfer, msg_in) + 1); 1722 xfer->siop_tables.t_extmsgdata.addr = siop_htoc32(&sc->sc_c, 1723 dsa + offsetof(struct siop_common_xfer, msg_in) + 3); 1724 xfer->siop_tables.t_status.count= siop_htoc32(&sc->sc_c, 1); 1725 xfer->siop_tables.t_status.addr = siop_htoc32(&sc->sc_c, 1726 dsa + offsetof(struct siop_common_xfer, status) + off); 1727 /* The select/reselect script */ 1728 scr = &xfer->resel[0]; 1729 for (j = 0; j < sizeof(load_dsa) / sizeof(load_dsa[0]); j++) 1730 scr[j] = siop_htoc32(&sc->sc_c, load_dsa[j]); 1731 /* 1732 * 0x78000000 is a 'move data8 to reg'. data8 is the second 1733 * octet, reg offset is the third. 1734 */ 1735 scr[Ent_rdsa0 / 4] = siop_htoc32(&sc->sc_c, 1736 0x78100000 | ((dsa & 0x000000ff) << 8)); 1737 scr[Ent_rdsa1 / 4] = siop_htoc32(&sc->sc_c, 1738 0x78110000 | ( dsa & 0x0000ff00 )); 1739 scr[Ent_rdsa2 / 4] = siop_htoc32(&sc->sc_c, 1740 0x78120000 | ((dsa & 0x00ff0000) >> 8)); 1741 scr[Ent_rdsa3 / 4] = siop_htoc32(&sc->sc_c, 1742 0x78130000 | ((dsa & 0xff000000) >> 16)); 1743 scr[E_ldsa_abs_reselected_Used[0]] = siop_htoc32(&sc->sc_c, 1744 sc->sc_c.sc_scriptaddr + Ent_reselected); 1745 scr[E_ldsa_abs_reselect_Used[0]] = siop_htoc32(&sc->sc_c, 1746 sc->sc_c.sc_scriptaddr + Ent_reselect); 1747 scr[E_ldsa_abs_selected_Used[0]] = siop_htoc32(&sc->sc_c, 1748 sc->sc_c.sc_scriptaddr + Ent_selected); 1749 scr[E_ldsa_abs_data_Used[0]] = siop_htoc32(&sc->sc_c, 1750 dsa + sizeof(struct siop_common_xfer) + Ent_ldsa_data); 1751 /* JUMP foo, IF FALSE - used by MOVE MEMORY to clear the slot */ 1752 scr[Ent_ldsa_data / 4] = siop_htoc32(&sc->sc_c, 0x80000000); 1753 s = splbio(); 1754 TAILQ_INSERT_TAIL(&sc->free_list, &newcbd->cmds[i], next); 1755 splx(s); 1756 #ifdef SIOP_DEBUG 1757 printf("tables[%d]: in=0x%x out=0x%x status=0x%x\n", i, 1758 siop_ctoh32(&sc->sc_c, 1759 newcbd->cmds[i].cmd_tables->t_msgin.addr), 1760 siop_ctoh32(&sc->sc_c, 1761 newcbd->cmds[i].cmd_tables->t_msgout.addr), 1762 siop_ctoh32(&sc->sc_c, 1763 newcbd->cmds[i].cmd_tables->t_status.addr)); 1764 #endif 1765 } 1766 s = splbio(); 1767 TAILQ_INSERT_TAIL(&sc->cmds, newcbd, next); 1768 sc->sc_c.sc_adapt.adapt_openings += SIOP_NCMDPB; 1769 splx(s); 1770 return; 1771 bad0: 1772 bus_dmamap_unload(sc->sc_c.sc_dmat, newcbd->xferdma); 1773 bus_dmamap_destroy(sc->sc_c.sc_dmat, newcbd->xferdma); 1774 bad1: 1775 bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg); 1776 bad2: 1777 free(newcbd->cmds, M_DEVBUF); 1778 bad3: 1779 free(newcbd, M_DEVBUF); 1780 return; 1781 } 1782 1783 struct siop_lunsw * 1784 siop_get_lunsw(sc) 1785 struct siop_softc *sc; 1786 { 1787 struct siop_lunsw *lunsw; 1788 int i; 1789 1790 if (sc->script_free_lo + (sizeof(lun_switch) / sizeof(lun_switch[0])) >= 1791 sc->script_free_hi) 1792 return NULL; 1793 lunsw = TAILQ_FIRST(&sc->lunsw_list); 1794 if (lunsw != NULL) { 1795 #ifdef SIOP_DEBUG 1796 printf("siop_get_lunsw got lunsw at offset %d\n", 1797 lunsw->lunsw_off); 1798 #endif 1799 TAILQ_REMOVE(&sc->lunsw_list, lunsw, next); 1800 return lunsw; 1801 } 1802 lunsw = malloc(sizeof(struct siop_lunsw), M_DEVBUF, M_NOWAIT|M_ZERO); 1803 if (lunsw == NULL) 1804 return NULL; 1805 #ifdef SIOP_DEBUG 1806 printf("allocating lunsw at offset %d\n", sc->script_free_lo); 1807 #endif 1808 if (sc->sc_c.features & SF_CHIP_RAM) { 1809 bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 1810 sc->script_free_lo * 4, lun_switch, 1811 sizeof(lun_switch) / sizeof(lun_switch[0])); 1812 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 1813 (sc->script_free_lo + E_abs_lunsw_return_Used[0]) * 4, 1814 sc->sc_c.sc_scriptaddr + Ent_lunsw_return); 1815 } else { 1816 for (i = 0; i < sizeof(lun_switch) / sizeof(lun_switch[0]); 1817 i++) 1818 sc->sc_c.sc_script[sc->script_free_lo + i] = 1819 siop_htoc32(&sc->sc_c, lun_switch[i]); 1820 sc->sc_c.sc_script[ 1821 sc->script_free_lo + E_abs_lunsw_return_Used[0]] = 1822 siop_htoc32(&sc->sc_c, 1823 sc->sc_c.sc_scriptaddr + Ent_lunsw_return); 1824 } 1825 lunsw->lunsw_off = sc->script_free_lo; 1826 lunsw->lunsw_size = sizeof(lun_switch) / sizeof(lun_switch[0]); 1827 sc->script_free_lo += lunsw->lunsw_size; 1828 siop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1829 return lunsw; 1830 } 1831 1832 void 1833 siop_add_reselsw(sc, target) 1834 struct siop_softc *sc; 1835 int target; 1836 { 1837 int i, j; 1838 struct siop_target *siop_target; 1839 struct siop_lun *siop_lun; 1840 1841 siop_target = (struct siop_target *)sc->sc_c.targets[target]; 1842 /* 1843 * add an entry to resel switch 1844 */ 1845 siop_script_sync(sc, BUS_DMASYNC_POSTWRITE); 1846 for (i = 0; i < 15; i++) { 1847 siop_target->reseloff = Ent_resel_targ0 / 4 + i * 2; 1848 if ((siop_script_read(sc, siop_target->reseloff) & 0xff) 1849 == 0xff) { /* it's free */ 1850 #ifdef SIOP_DEBUG 1851 printf("siop: target %d slot %d offset %d\n", 1852 target, i, siop_target->reseloff); 1853 #endif 1854 /* JUMP abs_foo, IF target | 0x80; */ 1855 siop_script_write(sc, siop_target->reseloff, 1856 0x800c0080 | target); 1857 siop_script_write(sc, siop_target->reseloff + 1, 1858 sc->sc_c.sc_scriptaddr + 1859 siop_target->lunsw->lunsw_off * 4 + 1860 Ent_lun_switch_entry); 1861 break; 1862 } 1863 } 1864 if (i == 15) /* no free slot, shouldn't happen */ 1865 panic("siop: resel switch full"); 1866 1867 sc->sc_ntargets++; 1868 for (i = 0; i < 8; i++) { 1869 siop_lun = siop_target->siop_lun[i]; 1870 if (siop_lun == NULL) 1871 continue; 1872 if (siop_lun->reseloff > 0) { 1873 siop_lun->reseloff = 0; 1874 for (j = 0; j < SIOP_NTAG; j++) 1875 siop_lun->siop_tag[j].reseloff = 0; 1876 siop_add_dev(sc, target, i); 1877 } 1878 } 1879 siop_update_scntl3(sc, sc->sc_c.targets[target]); 1880 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1881 } 1882 1883 void 1884 siop_update_scntl3(sc, _siop_target) 1885 struct siop_softc *sc; 1886 struct siop_common_target *_siop_target; 1887 { 1888 struct siop_target *siop_target = (struct siop_target *)_siop_target; 1889 /* MOVE target->id >> 24 TO SCNTL3 */ 1890 siop_script_write(sc, 1891 siop_target->lunsw->lunsw_off + (Ent_restore_scntl3 / 4), 1892 0x78030000 | ((siop_target->target_c.id >> 16) & 0x0000ff00)); 1893 /* MOVE target->id >> 8 TO SXFER */ 1894 siop_script_write(sc, 1895 siop_target->lunsw->lunsw_off + (Ent_restore_scntl3 / 4) + 2, 1896 0x78050000 | (siop_target->target_c.id & 0x0000ff00)); 1897 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1898 } 1899 1900 void 1901 siop_add_dev(sc, target, lun) 1902 struct siop_softc *sc; 1903 int target; 1904 int lun; 1905 { 1906 struct siop_lunsw *lunsw; 1907 struct siop_target *siop_target = 1908 (struct siop_target *)sc->sc_c.targets[target]; 1909 struct siop_lun *siop_lun = siop_target->siop_lun[lun]; 1910 int i, ntargets; 1911 1912 if (siop_lun->reseloff > 0) 1913 return; 1914 lunsw = siop_target->lunsw; 1915 if ((lunsw->lunsw_off + lunsw->lunsw_size) < sc->script_free_lo) { 1916 /* 1917 * can't extend this slot. Probably not worth trying to deal 1918 * with this case 1919 */ 1920 #ifdef DEBUG 1921 aprint_error_dev(&sc->sc_c.sc_dev, "%d:%d: can't allocate a lun sw slot\n", target, lun); 1922 #endif 1923 return; 1924 } 1925 /* count how many free targets we still have to probe */ 1926 ntargets = sc->sc_c.sc_chan.chan_ntargets - 1 - sc->sc_ntargets; 1927 1928 /* 1929 * we need 8 bytes for the lun sw additional entry, and 1930 * eventually sizeof(tag_switch) for the tag switch entry. 1931 * Keep enough free space for the free targets that could be 1932 * probed later. 1933 */ 1934 if (sc->script_free_lo + 2 + 1935 (ntargets * sizeof(lun_switch) / sizeof(lun_switch[0])) >= 1936 ((siop_target->target_c.flags & TARF_TAG) ? 1937 sc->script_free_hi - (sizeof(tag_switch) / sizeof(tag_switch[0])) : 1938 sc->script_free_hi)) { 1939 /* 1940 * not enough space, probably not worth dealing with it. 1941 * We can hold 13 tagged-queuing capable devices in the 4k RAM. 1942 */ 1943 #ifdef DEBUG 1944 aprint_error_dev(&sc->sc_c.sc_dev, "%d:%d: not enough memory for a lun sw slot\n", target, lun); 1945 #endif 1946 return; 1947 } 1948 #ifdef SIOP_DEBUG 1949 printf("%s:%d:%d: allocate lun sw entry\n", 1950 device_xname(&sc->sc_c.sc_dev), target, lun); 1951 #endif 1952 /* INT int_resellun */ 1953 siop_script_write(sc, sc->script_free_lo, 0x98080000); 1954 siop_script_write(sc, sc->script_free_lo + 1, A_int_resellun); 1955 /* Now the slot entry: JUMP abs_foo, IF lun */ 1956 siop_script_write(sc, sc->script_free_lo - 2, 1957 0x800c0000 | lun); 1958 siop_script_write(sc, sc->script_free_lo - 1, 0); 1959 siop_lun->reseloff = sc->script_free_lo - 2; 1960 lunsw->lunsw_size += 2; 1961 sc->script_free_lo += 2; 1962 if (siop_target->target_c.flags & TARF_TAG) { 1963 /* we need a tag switch */ 1964 sc->script_free_hi -= 1965 sizeof(tag_switch) / sizeof(tag_switch[0]); 1966 if (sc->sc_c.features & SF_CHIP_RAM) { 1967 bus_space_write_region_4(sc->sc_c.sc_ramt, 1968 sc->sc_c.sc_ramh, 1969 sc->script_free_hi * 4, tag_switch, 1970 sizeof(tag_switch) / sizeof(tag_switch[0])); 1971 } else { 1972 for(i = 0; 1973 i < sizeof(tag_switch) / sizeof(tag_switch[0]); 1974 i++) { 1975 sc->sc_c.sc_script[sc->script_free_hi + i] = 1976 siop_htoc32(&sc->sc_c, tag_switch[i]); 1977 } 1978 } 1979 siop_script_write(sc, 1980 siop_lun->reseloff + 1, 1981 sc->sc_c.sc_scriptaddr + sc->script_free_hi * 4 + 1982 Ent_tag_switch_entry); 1983 1984 for (i = 0; i < SIOP_NTAG; i++) { 1985 siop_lun->siop_tag[i].reseloff = 1986 sc->script_free_hi + (Ent_resel_tag0 / 4) + i * 2; 1987 } 1988 } else { 1989 /* non-tag case; just work with the lun switch */ 1990 siop_lun->siop_tag[0].reseloff = 1991 siop_target->siop_lun[lun]->reseloff; 1992 } 1993 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1994 } 1995 1996 void 1997 siop_del_dev(sc, target, lun) 1998 struct siop_softc *sc; 1999 int target; 2000 int lun; 2001 { 2002 int i; 2003 struct siop_target *siop_target; 2004 2005 #ifdef SIOP_DEBUG 2006 printf("%s:%d:%d: free lun sw entry\n", 2007 device_xname(&sc->sc_c.sc_dev), target, lun); 2008 #endif 2009 if (sc->sc_c.targets[target] == NULL) 2010 return; 2011 siop_target = (struct siop_target *)sc->sc_c.targets[target]; 2012 free(siop_target->siop_lun[lun], M_DEVBUF); 2013 siop_target->siop_lun[lun] = NULL; 2014 /* XXX compact sw entry too ? */ 2015 /* check if we can free the whole target */ 2016 for (i = 0; i < 8; i++) { 2017 if (siop_target->siop_lun[i] != NULL) 2018 return; 2019 } 2020 #ifdef SIOP_DEBUG 2021 printf("%s: free siop_target for target %d lun %d lunsw offset %d\n", 2022 device_xname(&sc->sc_c.sc_dev), target, lun, 2023 siop_target->lunsw->lunsw_off); 2024 #endif 2025 /* 2026 * nothing here, free the target struct and resel 2027 * switch entry 2028 */ 2029 siop_script_write(sc, siop_target->reseloff, 0x800c00ff); 2030 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 2031 TAILQ_INSERT_TAIL(&sc->lunsw_list, siop_target->lunsw, next); 2032 free(sc->sc_c.targets[target], M_DEVBUF); 2033 sc->sc_c.targets[target] = NULL; 2034 sc->sc_ntargets--; 2035 } 2036 2037 #ifdef SIOP_STATS 2038 void 2039 siop_printstats() 2040 { 2041 printf("siop_stat_intr %d\n", siop_stat_intr); 2042 printf("siop_stat_intr_shortxfer %d\n", siop_stat_intr_shortxfer); 2043 printf("siop_stat_intr_xferdisc %d\n", siop_stat_intr_xferdisc); 2044 printf("siop_stat_intr_sdp %d\n", siop_stat_intr_sdp); 2045 printf("siop_stat_intr_saveoffset %d\n", siop_stat_intr_saveoffset); 2046 printf("siop_stat_intr_done %d\n", siop_stat_intr_done); 2047 printf("siop_stat_intr_lunresel %d\n", siop_stat_intr_lunresel); 2048 printf("siop_stat_intr_qfull %d\n", siop_stat_intr_qfull); 2049 } 2050 #endif
Cache object: 80d7e875771266bf65bd2a0f35a4b707
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]