The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/siopvar_common.h

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    1 /*      $OpenBSD: siopvar_common.h,v 1.32 2020/07/22 13:16:04 krw Exp $ */
    2 /*      $NetBSD: siopvar_common.h,v 1.33 2005/11/18 23:10:32 bouyer Exp $ */
    3 
    4 /*
    5  * Copyright (c) 2000 Manuel Bouyer.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   26  *
   27  */
   28 
   29 /* common struct and routines used by siop and esiop */
   30 
   31 #ifndef SIOP_DEFAULT_TARGET
   32 #define SIOP_DEFAULT_TARGET 7
   33 #endif
   34 
   35 /* tables used by SCRIPT */
   36 typedef struct scr_table {
   37         u_int32_t count;
   38         u_int32_t addr;
   39 } __packed scr_table_t;
   40 
   41 /* Number of scatter/gather entries */
   42 /* XXX Ensure alignment of siop_xfer's. */
   43 #define SIOP_NSG        17      /* XXX (MAXPHYS/PAGE_SIZE + 1) */
   44 #define SIOP_MAXFER     ((SIOP_NSG - 1) * PAGE_SIZE)
   45 
   46 /*
   47  * This structure interfaces the SCRIPT with the driver; it describes a full
   48  * transfer. If you change something here, don't forget to update offsets in
   49  * {s,es}iop.ss
   50  */
   51 struct siop_common_xfer {
   52         u_int8_t msg_out[16];           /*   0 */
   53         u_int8_t msg_in[16];            /*  16 */
   54         u_int32_t status;               /*  32 */
   55         u_int32_t pad1;                 /*  36 */
   56         u_int32_t id;                   /*  40 */
   57         struct scsi_generic xscmd;      /*  44 */
   58         scr_table_t t_msgin;            /*  60 */
   59         scr_table_t t_extmsgin;         /*  68 */
   60         scr_table_t t_extmsgdata;       /*  76 */
   61         scr_table_t t_msgout;           /*  84 */
   62         scr_table_t cmd;                /*  92 */
   63         scr_table_t t_status;           /* 100 */
   64         scr_table_t data[SIOP_NSG];     /* 108 */
   65 } __packed;
   66 
   67 /* status can hold the SCSI_* status values, and 2 additional values: */
   68 #define SCSI_SIOP_NOCHECK       0xfe    /* don't check the scsi status */
   69 #define SCSI_SIOP_NOSTATUS      0xff    /* device didn't report status */
   70 
   71 /* offset is initialised to SIOP_NOOFFSET, used to check if it was updated */
   72 #define SIOP_NOOFFSET 0xffffffff
   73 
   74 /*
   75  * This describes a command handled by the SCSI controller
   76  */
   77 struct siop_common_cmd {
   78         struct siop_common_softc *siop_sc; /* points back to our adapter */
   79         struct siop_common_target *siop_target; /* pointer to our target def */
   80         struct scsi_xfer *xs; /* xfer from the upper level */
   81         struct siop_common_xfer *siop_tables; /* tables for this cmd */
   82         struct scsi_sense_data *sense;
   83         bus_addr_t      dsa; /* DSA value to load */
   84         bus_dmamap_t    dmamap_data;
   85         int status;
   86         int flags;
   87         int tag;        /* tag used for tagged command queuing */
   88         int resid;      /* valid when CMDFL_RESID is set */
   89 };
   90 
   91 /* status defs */
   92 #define CMDST_FREE              0 /* cmd slot is free */
   93 #define CMDST_READY             1 /* cmd slot is waiting for processing */
   94 #define CMDST_ACTIVE            2 /* cmd slot is being processed */
   95 #define CMDST_SENSE             3 /* cmd slot is requesting sense */
   96 #define CMDST_SENSE_ACTIVE      4 /* request sense active */
   97 #define CMDST_SENSE_DONE        5 /* request sense done */
   98 #define CMDST_DONE              6 /* cmd slot has been processed */
   99 /* flags defs */
  100 #define CMDFL_TIMEOUT   0x0001 /* cmd timed out */
  101 #define CMDFL_TAG       0x0002 /* tagged cmd */
  102 #define CMDFL_RESID     0x0004 /* current offset in table is partial */
  103 
  104 /* per-target struct */
  105 struct siop_common_target {
  106         int status;     /* target status, see below */
  107         int flags;      /* target flags, see below */
  108         u_int32_t id;   /* for SELECT FROM */
  109         int period;
  110         int offset;
  111 };
  112 
  113 /* target status */
  114 #define TARST_PROBING   0 /* target is being probed */
  115 #define TARST_ASYNC     1 /* target needs sync/wide negotiation */
  116 #define TARST_WIDE_NEG  2 /* target is doing wide negotiation */
  117 #define TARST_SYNC_NEG  3 /* target is doing sync negotiation */
  118 #define TARST_PPR_NEG   4 /* target is doing sync negotiation */
  119 #define TARST_OK        5 /* sync/wide agreement is valid */
  120 
  121 /* target flags */
  122 #define TARF_SYNC       0x01 /* target can do sync */
  123 #define TARF_WIDE       0x02 /* target can do wide */
  124 #define TARF_TAG        0x04 /* target can do tags */
  125 #define TARF_DT         0x08 /* target can do DT clocking */
  126 #define TARF_ISWIDE     0x10 /* target is wide */
  127 #define TARF_ISDT       0x20 /* target is doing DT clocking */
  128 
  129 /* Driver internal state */
  130 struct siop_common_softc {
  131         struct device sc_dev;
  132         u_int16_t sc_id;                /* adapter's target on bus */
  133         int features;                   /* chip's features */
  134         int ram_size;
  135         int maxburst;
  136         int maxoff;
  137         int clock_div;                  /* async. clock divider (scntl3) */
  138         int clock_period;               /* clock period (ns * 10) */
  139         int st_minsync;                 /* min and max sync period, */
  140         int dt_minsync;
  141         int st_maxsync;                 /* as sent in or PPR messages */
  142         int dt_maxsync;
  143         int mode;                       /* current SE/LVD/HVD mode */
  144         bus_space_tag_t sc_rt;          /* bus_space registers tag */
  145         bus_space_handle_t sc_rh;       /* bus_space registers handle */
  146         bus_addr_t sc_raddr;            /* register addresses */
  147         bus_space_tag_t sc_ramt;        /* bus_space ram tag */
  148         bus_space_handle_t sc_ramh;     /* bus_space ram handle */
  149         bus_dma_tag_t sc_dmat;          /* bus DMA tag */
  150         void (*sc_reset)(struct siop_common_softc*); /* reset callback */
  151         bus_dmamap_t  sc_scriptdma;     /* DMA map for script */
  152         bus_addr_t sc_scriptaddr;       /* on-board ram or physical address */
  153         u_int32_t *sc_script;           /* script location in memory */
  154         struct siop_common_target *targets[16]; /* per-target states */
  155 };
  156 
  157 /* features */
  158 #define SF_BUS_WIDE     0x00000001 /* wide bus */
  159 #define SF_BUS_ULTRA    0x00000002 /* Ultra (20MHz) bus */
  160 #define SF_BUS_ULTRA2   0x00000004 /* Ultra2 (40MHz) bus */
  161 #define SF_BUS_ULTRA3   0x00000008 /* Ultra3 (80MHz) bus */
  162 #define SF_BUS_DIFF     0x00000010 /* differential bus */
  163 
  164 #define SF_CHIP_LED0    0x00000100 /* led on GPIO0 */
  165 #define SF_CHIP_LEDC    0x00000200 /* led on GPIO0 with hardware control */
  166 #define SF_CHIP_DBLR    0x00000400 /* clock doubler or quadrupler */
  167 #define SF_CHIP_QUAD    0x00000800 /* clock quadrupler, with PPL */
  168 #define SF_CHIP_FIFO    0x00001000 /* large fifo */
  169 #define SF_CHIP_PF      0x00002000 /* Instructions prefetch */
  170 #define SF_CHIP_RAM     0x00004000 /* on-board RAM */
  171 #define SF_CHIP_LS      0x00008000 /* load/store instruction */
  172 #define SF_CHIP_10REGS  0x00010000 /* 10 scratch registers */
  173 #define SF_CHIP_DFBC    0x00020000 /* Use DFBC register */
  174 #define SF_CHIP_DT      0x00040000 /* DT clocking */
  175 #define SF_CHIP_GEBUG   0x00080000 /* SCSI gross error bug */
  176 #define SF_CHIP_AAIP    0x00100000 /* Always generate AIP regardless of SNCTL4*/
  177 #define SF_CHIP_BE      0x00200000 /* big-endian */
  178 
  179 #define SF_PCI_RL       0x01000000 /* PCI read line */
  180 #define SF_PCI_RM       0x02000000 /* PCI read multiple */
  181 #define SF_PCI_BOF      0x04000000 /* PCI burst opcode fetch */
  182 #define SF_PCI_CLS      0x08000000 /* PCI cache line size */
  183 #define SF_PCI_WRI      0x10000000 /* PCI write and invalidate */
  184 
  185 int     siop_common_attach(struct siop_common_softc *);
  186 void    siop_common_reset(struct siop_common_softc *);
  187 void    siop_setuptables(struct siop_common_cmd *);
  188 int     siop_modechange(struct siop_common_softc *);
  189 
  190 int     siop_wdtr_neg(struct siop_common_cmd *);
  191 int     siop_sdtr_neg(struct siop_common_cmd *);
  192 int     siop_ppr_neg(struct siop_common_cmd *);
  193 void    siop_sdtr_msg(struct siop_common_cmd *, int, int, int);
  194 void    siop_wdtr_msg(struct siop_common_cmd *, int, int);
  195 void    siop_ppr_msg(struct siop_common_cmd *, int, int, int);
  196 void    siop_update_xfer_mode(struct siop_common_softc *, int);
  197 int     siop_iwr(struct siop_common_cmd *);
  198 /* actions to take at return of siop_wdtr_neg() and siop_sdtr_neg() */
  199 #define SIOP_NEG_NOP    0x0
  200 #define SIOP_NEG_MSGOUT 0x1
  201 #define SIOP_NEG_ACK    0x2
  202 
  203 void    siop_ma(struct siop_common_cmd *);
  204 void    siop_sdp(struct siop_common_cmd *, int);
  205 void    siop_update_resid(struct siop_common_cmd *, int);
  206 void    siop_clearfifo(struct siop_common_softc *);
  207 void    siop_resetbus(struct siop_common_softc *);
  208 
  209 #define siop_htoc32(sc, x) \
  210   (((sc)->features & SF_CHIP_BE) ? htobe32((x)) : htole32((x)))
  211 
  212 #define siop_ctoh32(sc, x) \
  213   (((sc)->features & SF_CHIP_BE) ? betoh32((x)) : letoh32((x)))

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