1 /* $NetBSD: sl811hsreg.h,v 1.6 2016/09/24 15:06:29 skrll Exp $ */
2
3 /*
4 * Not (c) 2007 Matthew Orgass
5 * This file is public domain, meaning anyone can make any use of part or all
6 * of this file including copying into other works without credit. Any use,
7 * modified or not, is solely the responsibility of the user. If this file is
8 * part of a collection then use in the collection is governed by the terms of
9 * the collection.
10 */
11
12 /*
13 * ScanLogic SL811HS USB Host Controller
14 */
15
16 /*
17 * note: pcmcia attachment uses 4 byte port with data repeated the last three
18 * bytes; using 0x2 instead of 0x1 solves bus corruption on the Vadem Clio
19 * C-1000. The main driver does not use these IDX and PORT values.
20 */
21 #define SL11_IDX_ADDR (0x00)
22 #define SL11_IDX_DATA (0x01)
23 #define SL11_PORTSTART (0x00)
24 #define SL11_PORTSIZE (0x02)
25
26 #define SL11_E0BASE (0x00) /* Base of Control0 */
27 #define SL11_E0CTRL (0x00) /* Host Control Register */
28 #define SL11_E0ADDR (0x01) /* Host Base Address */
29 #define SL11_E0LEN (0x02) /* Host Base Length */
30 #define SL11_E0STAT (0x03) /* USB Status (Read) */
31 #define SL11_E0PID SL11_E0STAT /* Host PID, Device Endpoint (Write) */
32 #define SL11_E0CONT (0x04) /* Transfer Count (Read) */
33 #define SL11_E0DEV SL11_E0CONT /* Host Device Address (Write) */
34
35 #define SL11_E1BASE (0x08) /* Base of Control1 */
36 #define SL11_E1CTRL (SL11_E1BASE + SL11_E0CTRL)
37 #define SL11_E1ADDR (SL11_E1BASE + SL11_E0ADDR)
38 #define SL11_E1LEN (SL11_E1BASE + SL11_E0LEN)
39 #define SL11_E1STAT (SL11_E1BASE + SL11_E0STAT)
40 #define SL11_E1PID (SL11_E1BASE + SL11_E0PID)
41 #define SL11_E1CONT (SL11_E1BASE + SL11_E0CONT)
42 #define SL11_E1DEV (SL11_E1BASE + SL11_E0DEV)
43
44 #define SL11_CTRL (0x05) /* Control Register1 */
45 #define SL11_IER (0x06) /* Interrupt Enable Register */
46 #define SL11_ISR (0x0d) /* Interrupt Status Register */
47 #define SL11_SOFTIME (0x0e) /* SOF Counter Low (Write) */
48 #define SL11_REV SL11_SOFTIME /* HW Revision Register (Read) */
49 #define SL811_CSOF (0x0f) /* SOF Counter High(R), Control2(W) */
50 #define SL11_MEM (0x10) /* Memory Buffer (0x10 - 0xff) */
51
52 #define SL11_EPCTRL_ARM (0x01)
53 #define SL11_EPCTRL_ENABLE (0x02)
54 #define SL11_EPCTRL_ARM_ENABLE (SL11_EPCTRL_ARM|SL11_EPCTRL_ENABLE)
55 #define SL11_EPCTRL_DIRECTION (0x04)
56 #define SL11_EPCTRL_ISO (0x10)
57 #define SL11_EPCTRL_SOF (0x20)
58 #define SL11_EPCTRL_DATATOGGLE (0x40)
59 #define SL11_EPCTRL_PREAMBLE (0x80)
60
61 #define SL11_PID_BITS (0xf0)
62 #define SL11_EP_BITS (0x0f)
63
64 #define SL11_PID_OUT (0x10)
65 #define SL11_PID_IN (0x90)
66 #define SL11_PID_SOF (0x50)
67 #define SL11_PID_SETUP (0xd0)
68
69 #define SLHCI_PID_SWAP_IN_OUT (0x80) /* xor to swap IN and OUT */
70
71 #define SL11_EPSTAT_ACK (0x01)
72 #define SL11_EPSTAT_ERROR (0x02)
73 #define SL11_EPSTAT_TIMEOUT (0x04)
74 #define SL11_EPSTAT_SEQUENCE (0x08)
75 #define SL11_EPSTAT_SETUP (0x10)
76 #define SL11_EPSTAT_OVERFLOW (0x20)
77 #define SL11_EPSTAT_NAK (0x40)
78 #define SL11_EPSTAT_STALL (0x80)
79 #define SL11_EPSTAT_STATBITS ( \
80 SL11_EPSTAT_ACK | \
81 SL11_EPSTAT_ERROR | \
82 SL11_EPSTAT_TIMEOUT | \
83 SL11_EPSTAT_SETUP | \
84 SL11_EPSTAT_OVERFLOW | \
85 SL11_EPSTAT_NAK | \
86 SL11_EPSTAT_STALL \
87 )
88 #define SL11_EPSTAT_ERRBITS ( \
89 SL11_EPSTAT_ERROR | \
90 SL11_EPSTAT_TIMEOUT | \
91 SL11_EPSTAT_NAK | \
92 SL11_EPSTAT_STALL \
93 )
94
95 #define SL11_CTRL_ENABLESOF (0x01)
96 /* #define SL11_CTRL_EOF2 (0x04) XXX ? Reserved in 1.5 */
97 #define SL11_CTRL_RESETENGINE (0x08)
98 #define SL11_CTRL_JKSTATE (0x10)
99 #define SL11_CTRL_LOWSPEED (0x20)
100 #define SL11_CTRL_SUSPEND (0x40)
101
102 #define SL11_IER_USBA (0x01) /* USB-A done */
103 #define SL11_IER_USBB (0x02) /* USB-B done */
104 #define SL11_IER_BABBLE (0x04) /* Babble detection */
105 #define SL11_IER_SOF (0x10) /* 1ms Start Of Frame timer */
106 #define SL11_IER_INSERT (0x20) /* Slave Insert/Remove detection */
107 #define SL11_IER_DEVDET (0x40) /* USB Device Detect */
108 #define SL11_IER_RESUME (0x40) /* USB Resume */
109 #define SLHCI_NORMAL_INTERRUPTS (0x33) /* A, B, SOFTIMER, INSERT */
110
111 #define SL11_ISR_USBA (0x01) /* USB-A done */
112 #define SL11_ISR_USBB (0x02) /* USB-B done */
113 #define SL11_ISR_BABBLE (0x04) /* Babble detection or reserved */
114 #define SL11_ISR_RES (0x08) /* Reserved */
115 #define SL11_ISR_SOF (0x10) /* 1ms Start Of Frame timer */
116 #define SL11_ISR_INSERT (0x20) /* Slave Insert/Remove detection */
117 #define SL11_ISR_NODEV (0x40) /* USB Device Not Present */
118 #define SL11_ISR_RESUME (0x40) /* USB Resume */
119 #define SL11_ISR_DATA (0x80) /* Value of the Data+ pin */
120
121 #define SL11_REV_USBA (0x01) /* USB-A */
122 #define SL11_REV_USBB (0x02) /* USB-B */
123 #define SL11_REV_REVMASK (0xf0) /* HW Revision */
124
125 #define SL11_GET_REV(x) ((x) >> 4)
126 #define SLTYPE_SL11H (0x00) /* SL11H not supported */
127 #define SLTYPE_SL811HS (0x01)
128 #define SLTYPE_SL811HS_R12 SLTYPE_SL811HS
129 #define SLTYPE_SL811HS_R14 (0x02)
130 #define SLTYPE_SL811HS_R15 SLTYPE_SL811HS_R14
131
132 #define SLHCI_USBAB (0x03) /* USB A/B bits in IER/ISR/flags */
133
134 #define SL811_CSOF_SOFMASK (0x3f) /* SOF High Counter */
135 #define SL811_CSOF_POLARITY (0x40) /* Change polarity */
136 #define SL811_CSOF_MASTER (0x80) /* Master/Slave selection */
137
138 #define SL11_BUFFER_START (0x10) /* Start of buffer memory */
139 #define SL11_BUFFER_END (0xff) /* End of buffer memory */
140
141 #define SL11_MAX_PACKET_SIZE 240
142
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