1 /* $NetBSD: smc83c170var.h,v 1.9 2005/02/04 02:10:37 perry Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 #ifndef _DEV_IC_SMC83C170VAR_H_
41 #define _DEV_IC_SMC83C170VAR_H_
42
43 #include <sys/callout.h>
44
45 /*
46 * Misc. definitions for the Standard Microsystems Corp. 83C170
47 * Ethernet PCI Integrated Controller (EPIC/100) driver.
48 */
49
50 /*
51 * Transmit descriptor list size.
52 */
53 #define EPIC_NTXDESC 128
54 #define EPIC_NTXDESC_MASK (EPIC_NTXDESC - 1)
55 #define EPIC_NEXTTX(x) ((x + 1) & EPIC_NTXDESC_MASK)
56
57 /*
58 * Receive descriptor list size.
59 */
60 #define EPIC_NRXDESC 64
61 #define EPIC_NRXDESC_MASK (EPIC_NRXDESC - 1)
62 #define EPIC_NEXTRX(x) ((x + 1) & EPIC_NRXDESC_MASK)
63
64 /*
65 * Control structures are DMA'd to the EPIC chip. We allocate them in
66 * a single clump that maps to a single DMA segment to make several things
67 * easier.
68 */
69 struct epic_control_data {
70 /*
71 * The transmit descriptors.
72 */
73 struct epic_txdesc ecd_txdescs[EPIC_NTXDESC];
74
75 /*
76 * The receive descriptors.
77 */
78 struct epic_rxdesc ecd_rxdescs[EPIC_NRXDESC];
79
80 /*
81 * The transmit fraglists.
82 */
83 struct epic_fraglist ecd_txfrags[EPIC_NTXDESC];
84 };
85
86 #define EPIC_CDOFF(x) offsetof(struct epic_control_data, x)
87 #define EPIC_CDTXOFF(x) EPIC_CDOFF(ecd_txdescs[(x)])
88 #define EPIC_CDRXOFF(x) EPIC_CDOFF(ecd_rxdescs[(x)])
89 #define EPIC_CDFLOFF(x) EPIC_CDOFF(ecd_txfrags[(x)])
90
91 /*
92 * Software state for transmit and receive desciptors.
93 */
94 struct epic_descsoft {
95 struct mbuf *ds_mbuf; /* head of mbuf chain */
96 bus_dmamap_t ds_dmamap; /* our DMA map */
97 };
98
99 /*
100 * Software state per device.
101 */
102 struct epic_softc {
103 struct device sc_dev; /* generic device information */
104 bus_space_tag_t sc_st; /* bus space tag */
105 bus_space_handle_t sc_sh; /* bus space handle */
106 bus_dma_tag_t sc_dmat; /* bus DMA tag */
107 struct ethercom sc_ethercom; /* ethernet common data */
108 void *sc_sdhook; /* shutdown hook */
109
110 int sc_hwflags; /* info about board */
111 #define EPIC_HAS_BNC 0x01 /* BNC on serial interface */
112 #define EPIC_HAS_MII_FIBER 0x02 /* fiber on MII lxtphy */
113 #define EPIC_DUPLEXLED_ON_694 0x04 /* duplex LED by software */
114
115 struct mii_data sc_mii; /* MII/media information */
116 struct callout sc_mii_callout; /* MII callout */
117
118 bus_dmamap_t sc_cddmamap; /* control data DMA map */
119 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
120 bus_dmamap_t sc_nulldmamap; /* DMA map for the pad buffer */
121 #define sc_nulldma sc_nulldmamap->dm_segs[0].ds_addr
122
123 /*
124 * Software state for transmit and receive descriptors.
125 */
126 struct epic_descsoft sc_txsoft[EPIC_NTXDESC];
127 struct epic_descsoft sc_rxsoft[EPIC_NRXDESC];
128
129 /*
130 * Control data structures.
131 */
132 struct epic_control_data *sc_control_data;
133
134 int sc_txpending; /* number of TX requests pending */
135 int sc_txdirty; /* first dirty TX descriptor */
136 int sc_txlast; /* last used TX descriptor */
137
138 int sc_rxptr; /* next ready RX descriptor */
139
140 u_int sc_serinst; /* ifmedia instance for serial mode */
141 };
142
143 #define EPIC_CDTXADDR(sc, x) ((sc)->sc_cddma + EPIC_CDTXOFF((x)))
144 #define EPIC_CDRXADDR(sc, x) ((sc)->sc_cddma + EPIC_CDRXOFF((x)))
145 #define EPIC_CDFLADDR(sc, x) ((sc)->sc_cddma + EPIC_CDFLOFF((x)))
146
147 #define EPIC_CDTX(sc, x) (&(sc)->sc_control_data->ecd_txdescs[(x)])
148 #define EPIC_CDRX(sc, x) (&(sc)->sc_control_data->ecd_rxdescs[(x)])
149 #define EPIC_CDFL(sc, x) (&(sc)->sc_control_data->ecd_txfrags[(x)])
150
151 #define EPIC_DSTX(sc, x) (&(sc)->sc_txsoft[(x)])
152 #define EPIC_DSRX(sc, x) (&(sc)->sc_rxsoft[(x)])
153
154 #define EPIC_CDTXSYNC(sc, x, ops) \
155 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
156 EPIC_CDTXOFF((x)), sizeof(struct epic_txdesc), (ops))
157
158 #define EPIC_CDRXSYNC(sc, x, ops) \
159 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
160 EPIC_CDRXOFF((x)), sizeof(struct epic_rxdesc), (ops))
161
162 #define EPIC_CDFLSYNC(sc, x, ops) \
163 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
164 EPIC_CDFLOFF((x)), sizeof(struct epic_fraglist), (ops))
165
166 #define EPIC_INIT_RXDESC(sc, x) \
167 do { \
168 struct epic_descsoft *__ds = EPIC_DSRX((sc), (x)); \
169 struct epic_rxdesc *__rxd = EPIC_CDRX((sc), (x)); \
170 struct mbuf *__m = __ds->ds_mbuf; \
171 \
172 /* \
173 * Note we scoot the packet forward 2 bytes in the buffer \
174 * so that the payload after the Ethernet header is aligned \
175 * to a 4 byte boundary. \
176 */ \
177 __m->m_data = __m->m_ext.ext_buf + 2; \
178 __rxd->er_bufaddr = __ds->ds_dmamap->dm_segs[0].ds_addr + 2; \
179 __rxd->er_control = RXCTL_BUFLENGTH(__m->m_ext.ext_size - 2); \
180 __rxd->er_rxstatus = ER_RXSTAT_OWNER; \
181 __rxd->er_nextdesc = EPIC_CDRXADDR((sc), EPIC_NEXTRX((x))); \
182 EPIC_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
183 } while (/* CONSTCOND */ 0)
184
185 #ifdef _KERNEL
186 void epic_attach(struct epic_softc *);
187 int epic_intr(void *);
188 #endif /* _KERNEL */
189
190 #endif /* _DEV_IC_SMC83C170VAR_H_ */
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