Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/smc93cx6.c
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1 /* $NetBSD: smc93cx6.c,v 1.12 2005/12/11 12:21:28 christos Exp $ */ 2 3 /* 4 * Interface for the 93C66/56/46/26/06 serial eeprom parts. 5 * 6 * Copyright (c) 1995, 1996 Daniel M. Eischen 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice immediately at the beginning of the file, without modification, 14 * this list of conditions, and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Absolutely no warranty of function or purpose is made by the author 19 * Daniel M. Eischen. 20 * 4. Modifications may be freely made to this file if the above conditions 21 * are met. 22 * 23 * $FreeBSD: src/sys/dev/aic7xxx/93cx6.c,v 1.5 2000/01/07 23:08:17 gibbs Exp $ 24 */ 25 26 /* 27 * The instruction set of the 93C66/56/46/26/06 chips are as follows: 28 * 29 * Start OP * 30 * Function Bit Code Address** Data Description 31 * ------------------------------------------------------------------- 32 * READ 1 10 A5 - A0 Reads data stored in memory, 33 * starting at specified address 34 * EWEN 1 00 11XXXX Write enable must precede 35 * all programming modes 36 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0 37 * WRITE 1 01 A5 - A0 D15 - D0 Writes register 38 * ERAL 1 00 10XXXX Erase all registers 39 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers 40 * EWDS 1 00 00XXXX Disables all programming 41 * instructions 42 * *Note: A value of X for address is a don't care condition. 43 * **Note: There are 8 address bits for the 93C56/66 chips unlike 44 * the 93C46/26/06 chips which have 6 address bits. 45 * 46 * The 93C46 has a four wire interface: clock, chip select, data in, and 47 * data out. In order to perform one of the above functions, you need 48 * to enable the chip select for a clock period (typically a minimum of 49 * 1 usec, with the clock high and low a minimum of 750 and 250 nsec 50 * respectively). While the chip select remains high, you can clock in 51 * the instructions (above) starting with the start bit, followed by the 52 * OP code, Address, and Data (if needed). For the READ instruction, the 53 * requested 16-bit register contents is read from the data out line but 54 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB 55 * first). The clock cycling from low to high initiates the next data 56 * bit to be sent from the chip. 57 * 58 */ 59 60 #include <sys/cdefs.h> 61 __KERNEL_RCSID(0, "$NetBSD: smc93cx6.c,v 1.12 2005/12/11 12:21:28 christos Exp $"); 62 63 #ifndef __NetBSD__ 64 #include "opt_aic7xxx.h" 65 #endif 66 67 #include <sys/param.h> 68 #include <sys/systm.h> 69 #ifdef __NetBSD__ 70 #include <machine/bus.h> 71 #include <dev/ic/smc93cx6var.h> 72 #else 73 #include <machine/bus_memio.h> 74 #include <machine/bus_pio.h> 75 #include <machine/bus.h> 76 #include <dev/aic7xxx/93cx6.h> 77 #endif 78 79 /* 80 * Right now, we only have to read the SEEPROM. But we make it easier to 81 * add other 93Cx6 functions. 82 */ 83 static struct seeprom_cmd { 84 unsigned char len; 85 unsigned char bits[3]; 86 } seeprom_read = {3, {1, 1, 0}}; 87 88 /* XXX bus barriers */ 89 #define CLOCK_PULSE(sd, rdy) do { \ 90 /* \ 91 * Wait for the SEERDY to go high; about 800 ns. \ 92 */ \ 93 int cpi = 1000; \ 94 if (rdy == 0) { \ 95 DELAY(4); /* more than long enough */ \ 96 break; \ 97 } \ 98 while ((SEEPROM_STATUS_INB(sd) & rdy) == 0 && cpi-- > 0) { \ 99 ; /* Do nothing */ \ 100 } \ 101 (void)SEEPROM_INB(sd); /* Clear clock */ \ 102 } while (0) 103 104 /* 105 * Read the serial EEPROM and returns 1 if successful and 0 if 106 * not successful. 107 */ 108 int 109 read_seeprom(sd, buf, start_addr, count) 110 struct seeprom_descriptor *sd; 111 u_int16_t *buf; 112 bus_size_t start_addr; 113 bus_size_t count; 114 { 115 int i = 0; 116 u_int k = 0; 117 u_int16_t v; 118 u_int32_t temp; 119 120 /* 121 * Read the requested registers of the seeprom. The loop 122 * will range from 0 to count-1. 123 */ 124 for (k = start_addr; k < count + start_addr; k++) { 125 /* Send chip select for one clock cycle. */ 126 temp = sd->sd_MS ^ sd->sd_CS; 127 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 128 CLOCK_PULSE(sd, sd->sd_RDY); 129 130 /* 131 * Now we're ready to send the read command followed by the 132 * address of the 16-bit register we want to read. 133 */ 134 for (i = 0; i < seeprom_read.len; i++) { 135 if (seeprom_read.bits[i] != 0) 136 temp ^= sd->sd_DO; 137 SEEPROM_OUTB(sd, temp); 138 CLOCK_PULSE(sd, sd->sd_RDY); 139 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 140 CLOCK_PULSE(sd, sd->sd_RDY); 141 if (seeprom_read.bits[i] != 0) 142 temp ^= sd->sd_DO; 143 } 144 /* Send the 6 or 8 bit address (MSB first, LSB last). */ 145 for (i = (sd->sd_chip - 1); i >= 0; i--) { 146 if ((k & (1 << i)) != 0) 147 temp ^= sd->sd_DO; 148 SEEPROM_OUTB(sd, temp); 149 CLOCK_PULSE(sd, sd->sd_RDY); 150 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 151 CLOCK_PULSE(sd, sd->sd_RDY); 152 if ((k & (1 << i)) != 0) 153 temp ^= sd->sd_DO; 154 } 155 156 /* 157 * Now read the 16 bit register. An initial 0 precedes the 158 * register contents which begins with bit 15 (MSB) and ends 159 * with bit 0 (LSB). The initial 0 will be shifted off the 160 * top of our word as we let the loop run from 0 to 16. 161 */ 162 v = 0; 163 for (i = 16; i >= 0; i--) { 164 SEEPROM_OUTB(sd, temp); 165 CLOCK_PULSE(sd, sd->sd_RDY); 166 v <<= 1; 167 if (SEEPROM_DATA_INB(sd) & sd->sd_DI) 168 v |= 1; 169 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 170 CLOCK_PULSE(sd, sd->sd_RDY); 171 } 172 173 buf[k - start_addr] = v; 174 175 /* Reset the chip select for the next command cycle. */ 176 temp = sd->sd_MS; 177 SEEPROM_OUTB(sd, temp); 178 CLOCK_PULSE(sd, sd->sd_RDY); 179 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 180 CLOCK_PULSE(sd, sd->sd_RDY); 181 SEEPROM_OUTB(sd, temp); 182 CLOCK_PULSE(sd, sd->sd_RDY); 183 } 184 #ifdef AHC_DUMP_EEPROM 185 printf("\nSerial EEPROM:\n\t"); 186 for (k = 0; k < count; k = k + 1) { 187 if (((k % 8) == 0) && (k != 0)) { 188 printf ("\n\t"); 189 } 190 printf (" 0x%x", buf[k]); 191 } 192 printf ("\n"); 193 #endif 194 return (1); 195 }
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