FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/we.c
1 /* $NetBSD: we.c,v 1.5 2003/01/15 22:20:07 bouyer Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
42 * adapters.
43 *
44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
45 *
46 * Copyright (C) 1993, David Greenman. This software may be used, modified,
47 * copied, distributed, and sold, in both source and binary form provided that
48 * the above copyright and these terms are retained. Under no circumstances is
49 * the author responsible for the proper functioning of this software, nor does
50 * the author assume any responsibility for damages incurred with its use.
51 */
52
53 /*
54 * Device driver for the Western Digital/SMC 8003 and 8013 series,
55 * and the SMC Elite Ultra (8216).
56 */
57
58 #include <sys/cdefs.h>
59 __KERNEL_RCSID(0, "$NetBSD: we.c,v 1.5 2003/01/15 22:20:07 bouyer Exp $");
60
61 #include <sys/param.h>
62 #include <sys/systm.h>
63 #include <sys/device.h>
64 #include <sys/socket.h>
65 #include <sys/mbuf.h>
66 #include <sys/syslog.h>
67
68 #include <net/if.h>
69 #include <net/if_dl.h>
70 #include <net/if_types.h>
71 #include <net/if_media.h>
72
73 #include <net/if_ether.h>
74
75 #include <machine/bus.h>
76 #include <machine/bswap.h>
77 #include <machine/intr.h>
78
79 #include <dev/isa/isareg.h>
80 #include <dev/isa/isavar.h>
81
82 #include <dev/ic/dp8390reg.h>
83 #include <dev/ic/dp8390var.h>
84 #include <dev/ic/wereg.h>
85 #include <dev/ic/wevar.h>
86
87 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
88 #define bus_space_read_region_stream_2 bus_space_read_region_2
89 #define bus_space_write_stream_2 bus_space_write_2
90 #define bus_space_write_region_stream_2 bus_space_write_region_2
91 #endif
92
93 static void we_set_media __P((struct we_softc *, int));
94
95 static void we_media_init __P((struct dp8390_softc *));
96
97 static int we_mediachange __P((struct dp8390_softc *));
98 static void we_mediastatus __P((struct dp8390_softc *, struct ifmediareq *));
99
100 static void we_recv_int __P((struct dp8390_softc *));
101 static void we_init_card __P((struct dp8390_softc *));
102 static int we_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int));
103 static int we_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short));
104 static void we_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *));
105 static int we_test_mem __P((struct dp8390_softc *));
106
107 static __inline void we_readmem __P((struct we_softc *, int, u_int8_t *, int));
108
109 /*
110 * Delay needed when switching 16-bit access to shared memory.
111 */
112 #define WE_DELAY(wsc) delay(3)
113
114 /*
115 * Enable card RAM, and 16-bit access.
116 */
117 #define WE_MEM_ENABLE(wsc) \
118 do { \
119 if ((wsc)->sc_16bitp) \
120 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
121 WE_LAAR, (wsc)->sc_laar_proto | WE_LAAR_M16EN); \
122 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
123 WE_MSR, wsc->sc_msr_proto | WE_MSR_MENB); \
124 WE_DELAY((wsc)); \
125 } while (0)
126
127 /*
128 * Disable card RAM, and 16-bit access.
129 */
130 #define WE_MEM_DISABLE(wsc) \
131 do { \
132 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
133 WE_MSR, (wsc)->sc_msr_proto); \
134 if ((wsc)->sc_16bitp) \
135 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
136 WE_LAAR, (wsc)->sc_laar_proto); \
137 WE_DELAY((wsc)); \
138 } while (0)
139
140 int
141 we_config(self, wsc, typestr)
142 struct device *self;
143 struct we_softc *wsc;
144 const char *typestr;
145 {
146 struct dp8390_softc *sc = &wsc->sc_dp8390;
147 u_int8_t x;
148 int i, forced_16bit = 0;
149
150 /*
151 * Allow user to override 16-bit mode. 8-bit takes precedence.
152 */
153 if (self->dv_cfdata->cf_flags & DP8390_FORCE_16BIT_MODE) {
154 wsc->sc_16bitp = 1;
155 forced_16bit = 1;
156 }
157 if (self->dv_cfdata->cf_flags & DP8390_FORCE_8BIT_MODE)
158 wsc->sc_16bitp = 0;
159
160 /* Registers are linear. */
161 for (i = 0; i < 16; i++)
162 sc->sc_reg_map[i] = i;
163
164 /* Now we can use the NIC_{GET,PUT}() macros. */
165
166 printf("%s: %s Ethernet (%s-bit)\n", sc->sc_dev.dv_xname,
167 typestr, wsc->sc_16bitp ? "16" : "8");
168
169 /* Get station address from EEPROM. */
170 for (i = 0; i < ETHER_ADDR_LEN; i++)
171 sc->sc_enaddr[i] = bus_space_read_1(wsc->sc_asict,
172 wsc->sc_asich, WE_PROM + i);
173
174 /*
175 * Set upper address bits and 8/16 bit access to shared memory.
176 */
177 if (sc->is790) {
178 wsc->sc_laar_proto =
179 bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE_LAAR) &
180 ~WE_LAAR_M16EN;
181 bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE_LAAR,
182 wsc->sc_laar_proto | (wsc->sc_16bitp ? WE_LAAR_M16EN : 0));
183 } else if ((wsc->sc_type & WE_SOFTCONFIG) ||
184 #ifdef TOSH_ETHER
185 (wsc->sc_type == WE_TYPE_TOSHIBA1) ||
186 (wsc->sc_type == WE_TYPE_TOSHIBA4) ||
187 #endif
188 (forced_16bit) ||
189 (wsc->sc_type == WE_TYPE_WD8013EBT)) {
190 wsc->sc_laar_proto = (wsc->sc_maddr >> 19) & WE_LAAR_ADDRHI;
191 if (wsc->sc_16bitp)
192 wsc->sc_laar_proto |= WE_LAAR_L16EN;
193 bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE_LAAR,
194 wsc->sc_laar_proto | (wsc->sc_16bitp ? WE_LAAR_M16EN : 0));
195 }
196
197 /*
198 * Set address and enable interface shared memory.
199 */
200 if (sc->is790) {
201 /* XXX MAGIC CONSTANTS XXX */
202 x = bus_space_read_1(wsc->sc_asict, wsc->sc_asich, 0x04);
203 bus_space_write_1(wsc->sc_asict, wsc->sc_asich, 0x04, x | 0x80);
204 bus_space_write_1(wsc->sc_asict, wsc->sc_asich, 0x0b,
205 ((wsc->sc_maddr >> 13) & 0x0f) |
206 ((wsc->sc_maddr >> 11) & 0x40) |
207 (bus_space_read_1(wsc->sc_asict, wsc->sc_asich, 0x0b) & 0xb0));
208 bus_space_write_1(wsc->sc_asict, wsc->sc_asich, 0x04, x);
209 wsc->sc_msr_proto = 0x00;
210 sc->cr_proto = 0x00;
211 } else {
212 #ifdef TOSH_ETHER
213 if (wsc->sc_type == WE_TYPE_TOSHIBA1 ||
214 wsc->sc_type == WE_TYPE_TOSHIBA4) {
215 bus_space_write_1(wsc->sc_asict, wsc->sc_asich,
216 WE_MSR + 1,
217 ((wsc->sc_maddr >> 8) & 0xe0) | 0x04);
218 bus_space_write_1(wsc->sc_asict, wsc->sc_asich,
219 WE_MSR + 2,
220 ((wsc->sc_maddr >> 16) & 0x0f));
221 wsc->sc_msr_proto = WE_MSR_POW;
222 } else
223 #endif
224 wsc->sc_msr_proto = (wsc->sc_maddr >> 13) &
225 WE_MSR_ADDR;
226
227 sc->cr_proto = ED_CR_RD2;
228 }
229
230 bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE_MSR,
231 wsc->sc_msr_proto | WE_MSR_MENB);
232 WE_DELAY(wsc);
233
234 /*
235 * DCR gets:
236 *
237 * FIFO threshold to 8, No auto-init Remote DMA,
238 * byte order=80x86.
239 *
240 * 16-bit cards also get word-wide DMA transfers.
241 */
242 sc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS |
243 (wsc->sc_16bitp ? ED_DCR_WTS : 0);
244
245 sc->test_mem = we_test_mem;
246 sc->ring_copy = we_ring_copy;
247 sc->write_mbuf = we_write_mbuf;
248 sc->read_hdr = we_read_hdr;
249 sc->recv_int = we_recv_int;
250 sc->init_card = we_init_card;
251
252 sc->sc_mediachange = we_mediachange;
253 sc->sc_mediastatus = we_mediastatus;
254
255 sc->mem_start = 0;
256 /* sc->mem_size has to be set by frontend */
257
258 sc->sc_flags = self->dv_cfdata->cf_flags;
259
260 /* Do generic parts of attach. */
261 if (wsc->sc_type & WE_SOFTCONFIG)
262 sc->sc_media_init = we_media_init;
263 else
264 sc->sc_media_init = dp8390_media_init;
265 if (dp8390_config(sc)) {
266 printf("%s: configuration failed\n", sc->sc_dev.dv_xname);
267 return (1);
268 }
269
270 /*
271 * Disable 16-bit access to shared memory - we leave it disabled
272 * so that:
273 *
274 * (1) machines reboot properly when the board is set to
275 * 16-bit mode and there are conflicting 8-bit devices
276 * within the same 128k address space as this board's
277 * shared memory, and
278 *
279 * (2) so that other 8-bit devices with shared memory
280 * in this same 128k address space will work.
281 */
282 WE_MEM_DISABLE(wsc);
283
284 return (0);
285 }
286
287 static int
288 we_test_mem(sc)
289 struct dp8390_softc *sc;
290 {
291 struct we_softc *wsc = (struct we_softc *)sc;
292 bus_space_tag_t memt = sc->sc_buft;
293 bus_space_handle_t memh = sc->sc_bufh;
294 bus_size_t memsize = sc->mem_size;
295 int i;
296
297 if (wsc->sc_16bitp)
298 bus_space_set_region_2(memt, memh, 0, 0, memsize >> 1);
299 else
300 bus_space_set_region_1(memt, memh, 0, 0, memsize);
301
302 if (wsc->sc_16bitp) {
303 for (i = 0; i < memsize; i += 2) {
304 if (bus_space_read_2(memt, memh, i) != 0)
305 goto fail;
306 }
307 } else {
308 for (i = 0; i < memsize; i++) {
309 if (bus_space_read_1(memt, memh, i) != 0)
310 goto fail;
311 }
312 }
313
314 return (0);
315
316 fail:
317 printf("%s: failed to clear shared memory at offset 0x%x\n",
318 sc->sc_dev.dv_xname, i);
319 WE_MEM_DISABLE(wsc);
320 return (1);
321 }
322
323 /*
324 * Given a NIC memory source address and a host memory destination address,
325 * copy 'len' from NIC to host using shared memory. The 'len' is rounded
326 * up to a word - ok as long as mbufs are word-sized.
327 */
328 static __inline void
329 we_readmem(wsc, from, to, len)
330 struct we_softc *wsc;
331 int from;
332 u_int8_t *to;
333 int len;
334 {
335 bus_space_tag_t memt = wsc->sc_dp8390.sc_buft;
336 bus_space_handle_t memh = wsc->sc_dp8390.sc_bufh;
337
338 if (len & 1)
339 ++len;
340
341 if (wsc->sc_16bitp)
342 bus_space_read_region_stream_2(memt, memh, from,
343 (u_int16_t *)to, len >> 1);
344 else
345 bus_space_read_region_1(memt, memh, from,
346 to, len);
347 }
348
349 static int
350 we_write_mbuf(sc, m, buf)
351 struct dp8390_softc *sc;
352 struct mbuf *m;
353 int buf;
354 {
355 struct we_softc *wsc = (struct we_softc *)sc;
356 bus_space_tag_t memt = wsc->sc_dp8390.sc_buft;
357 bus_space_handle_t memh = wsc->sc_dp8390.sc_bufh;
358 u_int8_t *data, savebyte[2];
359 int savelen, len, leftover;
360 #ifdef DIAGNOSTIC
361 u_int8_t *lim;
362 #endif
363
364 savelen = m->m_pkthdr.len;
365
366 WE_MEM_ENABLE(wsc);
367
368 /*
369 * 8-bit boards are simple; no alignment tricks are necessary.
370 */
371 if (wsc->sc_16bitp == 0) {
372 for (; m != NULL; buf += m->m_len, m = m->m_next)
373 bus_space_write_region_1(memt, memh,
374 buf, mtod(m, u_int8_t *), m->m_len);
375 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
376 bus_space_set_region_1(memt, memh,
377 buf, 0, ETHER_MIN_LEN - ETHER_CRC_LEN - savelen);
378 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
379 }
380 goto out;
381 }
382
383 /* Start out with no leftover data. */
384 leftover = 0;
385 savebyte[0] = savebyte[1] = 0;
386
387 for (; m != NULL; m = m->m_next) {
388 len = m->m_len;
389 if (len == 0)
390 continue;
391 data = mtod(m, u_int8_t *);
392 #ifdef DIAGNOSTIC
393 lim = data + len;
394 #endif
395 while (len > 0) {
396 if (leftover) {
397 /*
398 * Data left over (from mbuf or realignment).
399 * Buffer the next byte, and write it and
400 * the leftover data out.
401 */
402 savebyte[1] = *data++;
403 len--;
404 bus_space_write_stream_2(memt, memh, buf,
405 *(u_int16_t *)savebyte);
406 buf += 2;
407 leftover = 0;
408 } else if (BUS_SPACE_ALIGNED_POINTER(data, u_int16_t)
409 == 0) {
410 /*
411 * Unaligned dta; buffer the next byte.
412 */
413 savebyte[0] = *data++;
414 len--;
415 leftover = 1;
416 } else {
417 /*
418 * Aligned data; output contiguous words as
419 * much as we can, then buffer the remaining
420 * byte, if any.
421 */
422 leftover = len & 1;
423 len &= ~1;
424 bus_space_write_region_stream_2(memt, memh,
425 buf, (u_int16_t *)data, len >> 1);
426 data += len;
427 buf += len;
428 if (leftover)
429 savebyte[0] = *data++;
430 len = 0;
431 }
432 }
433 if (len < 0)
434 panic("we_write_mbuf: negative len");
435 #ifdef DIAGNOSTIC
436 if (data != lim)
437 panic("we_write_mbuf: data != lim");
438 #endif
439 }
440 if (leftover) {
441 savebyte[1] = 0;
442 bus_space_write_stream_2(memt, memh, buf,
443 *(u_int16_t *)savebyte);
444 buf += 2;
445 }
446 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
447 bus_space_set_region_2(memt, memh,
448 buf, 0, (ETHER_MIN_LEN - ETHER_CRC_LEN - savelen) >> 1);
449 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
450 }
451
452 out:
453 WE_MEM_DISABLE(wsc);
454
455 return (savelen);
456 }
457
458 static int
459 we_ring_copy(sc, src, dst, amount)
460 struct dp8390_softc *sc;
461 int src;
462 caddr_t dst;
463 u_short amount;
464 {
465 struct we_softc *wsc = (struct we_softc *)sc;
466 u_short tmp_amount;
467
468 /* Does copy wrap to lower addr in ring buffer? */
469 if (src + amount > sc->mem_end) {
470 tmp_amount = sc->mem_end - src;
471
472 /* Copy amount up to end of NIC memory. */
473 we_readmem(wsc, src, dst, tmp_amount);
474
475 amount -= tmp_amount;
476 src = sc->mem_ring;
477 dst += tmp_amount;
478 }
479
480 we_readmem(wsc, src, dst, amount);
481
482 return (src + amount);
483 }
484
485 static void
486 we_read_hdr(sc, packet_ptr, packet_hdrp)
487 struct dp8390_softc *sc;
488 int packet_ptr;
489 struct dp8390_ring *packet_hdrp;
490 {
491 struct we_softc *wsc = (struct we_softc *)sc;
492
493 we_readmem(wsc, packet_ptr, (u_int8_t *)packet_hdrp,
494 sizeof(struct dp8390_ring));
495 #if BYTE_ORDER == BIG_ENDIAN
496 packet_hdrp->count = bswap16(packet_hdrp->count);
497 #endif
498 }
499
500 static void
501 we_recv_int(sc)
502 struct dp8390_softc *sc;
503 {
504 struct we_softc *wsc = (struct we_softc *)sc;
505
506 WE_MEM_ENABLE(wsc);
507 dp8390_rint(sc);
508 WE_MEM_DISABLE(wsc);
509 }
510
511 static void
512 we_media_init(struct dp8390_softc *sc)
513 {
514 struct we_softc *wsc = (void *) sc;
515 int defmedia = IFM_ETHER;
516 u_int8_t x;
517
518 if (sc->is790) {
519 x = bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE790_HWR);
520 bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE790_HWR,
521 x | WE790_HWR_SWH);
522 if (bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE790_GCR) &
523 WE790_GCR_GPOUT)
524 defmedia |= IFM_10_2;
525 else
526 defmedia |= IFM_10_5;
527 bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE790_HWR,
528 x & ~WE790_HWR_SWH);
529 } else {
530 x = bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE_IRR);
531 if (x & WE_IRR_OUT2)
532 defmedia |= IFM_10_2;
533 else
534 defmedia |= IFM_10_5;
535 }
536
537 ifmedia_init(&sc->sc_media, 0, dp8390_mediachange, dp8390_mediastatus);
538 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_10_2, 0, NULL);
539 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_10_5, 0, NULL);
540 ifmedia_set(&sc->sc_media, defmedia);
541 }
542
543 static int
544 we_mediachange(sc)
545 struct dp8390_softc *sc;
546 {
547
548 /*
549 * Current media is already set up. Just reset the interface
550 * to let the new value take hold. The new media will be
551 * set up in we_init_card() called via dp8390_init().
552 */
553 dp8390_reset(sc);
554 return (0);
555 }
556
557 static void
558 we_mediastatus(sc, ifmr)
559 struct dp8390_softc *sc;
560 struct ifmediareq *ifmr;
561 {
562 struct ifmedia *ifm = &sc->sc_media;
563
564 /*
565 * The currently selected media is always the active media.
566 */
567 ifmr->ifm_active = ifm->ifm_cur->ifm_media;
568 }
569
570 static void
571 we_init_card(sc)
572 struct dp8390_softc *sc;
573 {
574 struct we_softc *wsc = (struct we_softc *)sc;
575 struct ifmedia *ifm = &sc->sc_media;
576
577 if (wsc->sc_init_hook)
578 (*wsc->sc_init_hook)(wsc);
579
580 we_set_media(wsc, ifm->ifm_cur->ifm_media);
581 }
582
583 static void
584 we_set_media(wsc, media)
585 struct we_softc *wsc;
586 int media;
587 {
588 struct dp8390_softc *sc = &wsc->sc_dp8390;
589 bus_space_tag_t asict = wsc->sc_asict;
590 bus_space_handle_t asich = wsc->sc_asich;
591 u_int8_t hwr, gcr, irr;
592
593 if (sc->is790) {
594 hwr = bus_space_read_1(asict, asich, WE790_HWR);
595 bus_space_write_1(asict, asich, WE790_HWR,
596 hwr | WE790_HWR_SWH);
597 gcr = bus_space_read_1(asict, asich, WE790_GCR);
598 if (IFM_SUBTYPE(media) == IFM_10_2)
599 gcr |= WE790_GCR_GPOUT;
600 else
601 gcr &= ~WE790_GCR_GPOUT;
602 bus_space_write_1(asict, asich, WE790_GCR,
603 gcr | WE790_GCR_LIT);
604 bus_space_write_1(asict, asich, WE790_HWR,
605 hwr & ~WE790_HWR_SWH);
606 return;
607 }
608
609 irr = bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE_IRR);
610 if (IFM_SUBTYPE(media) == IFM_10_2)
611 irr |= WE_IRR_OUT2;
612 else
613 irr &= ~WE_IRR_OUT2;
614 bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE_IRR, irr);
615 }
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