The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ieee1394/fwohcivar.h

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    1 /*      $NetBSD: fwohcivar.h,v 1.22 2005/02/27 00:27:17 perry Exp $     */
    2 
    3 /*-
    4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Matt Thomas of the 3am Software Foundry.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *        This product includes software developed by the NetBSD
   21  *        Foundation, Inc. and its contributors.
   22  * 4. Neither the name of The NetBSD Foundation nor the names of its
   23  *    contributors may be used to endorse or promote products derived
   24  *    from this software without specific prior written permission.
   25  *
   26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   36  * POSSIBILITY OF SUCH DAMAGE.
   37  */
   38 
   39 #ifndef _DEV_IEEE1394_FWOHCIVAR_H_
   40 #define _DEV_IEEE1394_FWOHCIVAR_H_
   41 
   42 #include <sys/callout.h>
   43 #include <sys/queue.h>
   44 
   45 #include <machine/bus.h>
   46 
   47 #define OHCI_PAGE_SIZE          0x0800
   48 #define OHCI_BUF_ARRQ_CNT       16
   49 #define OHCI_BUF_ARRS_CNT       8
   50 #define OHCI_BUF_ATRQ_CNT       (8*8)
   51 #define OHCI_BUF_ATRS_CNT       (8*8)
   52 #define OHCI_BUF_IR_CNT         8
   53 #define OHCI_BUF_CNT                                                    \
   54         (OHCI_BUF_ARRQ_CNT + OHCI_BUF_ARRS_CNT + OHCI_BUF_ATRQ_CNT +    \
   55             OHCI_BUF_ATRS_CNT + OHCI_BUF_IR_CNT + 1 + 1)
   56 
   57 #define OHCI_LOOP               1000
   58 #define OHCI_SELFID_TIMEOUT     (hz * 3)
   59 #define OHCI_ASYNC_STREAM       0x100
   60 
   61 struct fwohci_softc;
   62 struct fwohci_pkt;
   63 struct mbuf;
   64 
   65 struct fwohci_buf {
   66         TAILQ_ENTRY(fwohci_buf) fb_list;
   67         bus_dma_segment_t fb_seg;
   68         int fb_nseg;
   69         bus_dmamap_t fb_dmamap;         /* DMA map of the buffer */
   70         caddr_t fb_buf;                 /* kernel virtual addr of the buffer */
   71         struct fwohci_desc *fb_desc;    /* kernel virtual addr of descriptor */
   72         bus_addr_t fb_daddr;            /* physical addr of the descriptor */
   73         int fb_off;
   74         struct mbuf *fb_m;
   75         void *fb_statusarg;
   76         void (*fb_callback)(struct device *, struct mbuf *);
   77         int (*fb_statuscb)(struct fwohci_softc *, void *, struct fwohci_pkt *);
   78 };
   79 
   80 struct fwohci_pkt {
   81         int     fp_tcode;
   82         int     fp_hlen;
   83         int     fp_dlen;
   84         u_int32_t fp_hdr[4];
   85         struct uio fp_uio;
   86         struct iovec fp_iov[6];
   87         u_int32_t *fp_trail;
   88         struct mbuf *fp_m;
   89         u_int16_t fp_status;
   90         void *fp_statusarg;
   91         int (*fp_statuscb)(struct fwohci_softc *, void *, struct fwohci_pkt *);
   92         void (*fp_callback)(struct device *, struct mbuf *);
   93 };
   94 
   95 struct fwohci_handler {
   96         LIST_ENTRY(fwohci_handler) fh_list;
   97         u_int32_t       fh_tcode;       /* ARRQ   / ARRS   / IR   */
   98         u_int32_t       fh_key1;        /* addrhi / srcid  / chan */
   99         u_int32_t       fh_key2;        /* addrlo / tlabel / tag  */
  100         u_int32_t       fh_key3;        /* for addr's a possible range. */
  101         int             (*fh_handler)(struct fwohci_softc *, void *,
  102             struct fwohci_pkt *);
  103         void            *fh_handarg;
  104 };
  105 
  106 struct fwohci_ctx {
  107         int     fc_ctx;
  108         int     fc_type;        /* FWOHCI_CTX_(ASYNC|ISO_SINGLE|ISO_MULTI) */
  109         int     fc_bufcnt;
  110         u_int32_t       *fc_branch;
  111         TAILQ_HEAD(fwohci_buf_s, fwohci_buf) fc_buf;
  112         struct fwohci_buf_s fc_buf2; /* for iso */
  113         LIST_HEAD(, fwohci_handler) fc_handler;
  114         struct fwohci_buf *fc_buffers;
  115 };
  116 
  117 
  118 
  119 struct fwohci_ir_ctx {
  120         struct fwohci_softc *irc_sc;
  121 
  122         int irc_num;            /* context number */
  123         int irc_flags;          /* IEEE1394_IR_* */
  124         int irc_status;
  125 #define IRC_STATUS_READY                0x0001
  126 #define IRC_STATUS_RUN                  0x0002
  127 #define IRC_STATUS_SLEEPING             0x0004
  128 #define IRC_STATUS_RECEIVE              0x0008
  129 
  130         int irc_pktcount;
  131 
  132         int irc_channel;        /* channel number */
  133         int irc_tagbm;          /* tag bitmap */
  134         int irc_maxsize;        /* maxmum data size for a packet */
  135 
  136         int irc_maxqueuelen;    /* for debug purpose */
  137         int irc_maxqueuepos;
  138 
  139         struct fwohci_desc *irc_readtop;        /* where data start */
  140         struct fwohci_desc *irc_writeend;       /* where branch addr is 0 */
  141         u_int32_t irc_savedbranch;
  142 
  143         struct fwohci_iso_buf *irc_buf_ptr;
  144 
  145         /* data for descriptor */
  146         bus_dma_segment_t irc_desc_seg;
  147         bus_dmamap_t irc_desc_dmamap;
  148         int irc_desc_num;       /* number of descriptors */
  149         int irc_desc_size;      /* actual size in byte */
  150         struct fwohci_desc *irc_desc_map; /* Do not change */
  151         int irc_desc_nsegs;
  152 
  153         volatile void *irc_waitchan;    /* wait channel */
  154         struct selinfo irc_sel;
  155 
  156         /* data for buffer */
  157         bus_dma_segment_t irc_buf_segs[16];
  158         bus_dmamap_t irc_buf_dmamap;
  159         int irc_buf_totalsize;
  160         int irc_buf_nsegs;
  161         u_int8_t *irc_buf;
  162 
  163         /* for debug purpose */
  164 #ifdef FWOHCI_WAIT_DEBUG
  165         u_int16_t irc_cycle[3]; /* 0 for wait time, 1 for intr time */
  166 #endif
  167 };
  168 
  169 
  170 
  171 /*
  172  * Context dedicated for isochronous transmit.  Two data structure are
  173  * defined.
  174  */
  175 struct fwohci_it_ctx;
  176 
  177 #define IEEE1394_IT_PKTHDR      0x0001
  178 
  179 struct fwohci_it_dmabuf {
  180         struct fwohci_it_ctx *itd_ctx;
  181         int itd_num;
  182         int itd_flags;
  183 #define ITD_FLAGS_LOCK          0x0001
  184 #define ITD_FLAGS_UNLOCK        0x0000
  185 #define ITD_FLAGS_LOCK_MASK     0x0001
  186 
  187         /* memory for descriptor */
  188         struct fwohci_desc *itd_desc;   /* top of descriptor */
  189         bus_addr_t itd_desc_phys;       /* physical addr of 1st descriptor */
  190         int itd_descsize;               /* number of total descriptors */
  191         struct fwohci_desc *itd_lastdesc;       /* last valid descriptor */
  192 
  193         int itd_maxpacket;              /* maximum packets for the buffer */
  194         int itd_npacket;                /* number of valid packets */
  195         int itd_maxsize;                /* maximum packet size */
  196 
  197         /* DMA buffer */
  198 #define FWOHCI_MAX_ITDATASEG    8
  199         bus_dma_segment_t itd_seg[FWOHCI_MAX_ITDATASEG];
  200         bus_dmamap_t itd_dmamap;
  201         int itd_size;                   /* count in byte */
  202         u_int8_t *itd_buf;
  203         int itd_nsegs;
  204 
  205         /* header store descriptor */
  206         struct fwohci_desc *itd_store;
  207         bus_addr_t itd_store_phys;
  208 
  209         u_int32_t itd_savedbranch;
  210 
  211 #if 0
  212         int fwohci_itd_construct(struct fwohci_it_ctx *,
  213             struct fwohci_it_dmabuf *, int, struct fwohci_desc *, int,
  214             int, paddr_t);
  215         void fwohci_itd_destruct(struct fwohci_it_dmabuf *);
  216         int fwohci_itd_writedata(struct fwohci_it_dmabuf *, int,
  217             struct ieee1394_it_datalist *);
  218         int fwohci_itd_link(struct fwohci_it_dmabuf *,
  219             struct fwohci_it_dmabuf *);
  220         bus_addr_t fwohci_itd_list_head(struct fwohci_it_dmabuf *);
  221         void fwohci_itd_clean(struct fwohci_it_dmabuf *);
  222         int fwohci_itd_isfilled(struct fwohci_it_dmabuf *);
  223         int fwohci_itd_hasdata(struct fwohci_it_dmabuf *);
  224         int fwohci_itd_isfull(struct fwohci_it_dmabuf *);
  225 #endif
  226 #define fwohci_itd_list_head(itd)       (itd)->itd_desc_phys
  227 #define fwohci_itd_hasdata(itd)         (itd)->itd_npacket
  228 #define fwohci_itd_isfull(itd)                                          \
  229                 ((itd)->itd_npacket == (itd)->itd_maxpacket)
  230 #define fwohci_itd_islocked(itd)                                        \
  231                 ((itd)->itd_flags & ITD_FLAGS_LOCK)
  232 };
  233 
  234 
  235 struct fwohci_it_ctx {
  236         struct fwohci_softc *itc_sc;
  237 
  238         int itc_num;            /* context number */
  239 
  240         volatile int itc_flags; /* flags */
  241 #define ITC_FLAGS_RUN           0x0001
  242 
  243         int itc_channel;        /* channel number */
  244         int itc_tag;            /* tag */
  245         int itc_maxsize;        /* maxmum data size for a packet */
  246         int itc_speed;          /* speed */
  247 
  248         struct fwohci_it_dmabuf *itc_buf; /* array for fwohci_it_dmabuf */
  249         int itc_bufnum;         /* const: num of elements in itc_buf array */
  250 
  251 #if 1
  252         volatile struct fwohci_it_dmabuf *itc_buf_start;
  253         struct fwohci_it_dmabuf *itc_buf_end;
  254         struct fwohci_it_dmabuf *itc_buf_linkend;
  255 #endif
  256         volatile int16_t itc_buf_cnt;   /* # buffers which contain data */
  257 #if 0
  258         int16_t itc_bufidx_start;
  259         int16_t itc_bufidx_end;
  260         int16_t itc_bufidx_linkend;
  261 #endif
  262 
  263         /* data for descriptor */
  264         bus_dma_segment_t itc_dseg;
  265         bus_dmamap_t itc_ddmamap;
  266         int itc_descsize;       /* count in byte */
  267         u_int8_t *itc_descmap;
  268         int itc_dnsegs;
  269 
  270         volatile u_int32_t *itc_scratch; /* descriptor decoder will write */
  271         u_int32_t itc_scratch_paddr;
  272 
  273         volatile void *itc_waitchan;    /* wait channel */
  274 
  275         int itc_outpkt;         /* only for debugging */
  276 
  277 #if 0
  278         struct fwohci_it_ctx *fwohci_it_ctx_construct(int);
  279         void fwohci_it_ctx_destruct(struct fwohci_it_ctx *);
  280         void fwohci_it_ctx_intr(struct fwohci_it_ctx *);
  281         int fwohci_it_ctx_writedata(ieee1394_it_tag_t, int,
  282             struct ieee1394_it_datalist *);
  283 private:
  284         void fwohci_it_ctx_run(struct fwohci_it_ctx *);
  285         void fwohci_it_intr(struct fwohci_softc *, struct fwohci_it_ctx *);
  286 #endif
  287 #define INC_BUF(itc, buf)                                               \
  288         do {                                                            \
  289                 if (++buf == (itc)->itc_buf + (itc)->itc_bufnum) {      \
  290                         buf = &(itc)->itc_buf[0];                       \
  291                 }                                                       \
  292         } while (0)
  293 };
  294 
  295 struct fwohci_uidtbl {
  296         int             fu_valid;
  297         u_int8_t        fu_uid[8];
  298 };
  299 
  300 /*
  301  * Needed to keep track of outstanding packets during a read op. Since the
  302  * packet stream is asynch it's possible to parse a response packet before the
  303  * ack bits are processed. In this case something needs to track whether the
  304  * abuf is still valid before possibly attempting to use items from within it.
  305  */
  306 
  307 struct fwohci_cb {
  308         struct ieee1394_abuf *ab;
  309         int count;
  310         int abuf_valid;
  311 };
  312 
  313 struct fwohci_softc {
  314         struct ieee1394_softc sc_sc1394;
  315         struct evcnt sc_intrcnt;
  316         struct evcnt sc_isocnt;
  317         struct evcnt sc_ascnt;
  318         struct evcnt sc_itintrcnt;
  319 
  320         bus_space_tag_t sc_memt;
  321         bus_space_handle_t sc_memh;
  322         bus_dma_tag_t sc_dmat;
  323         bus_size_t sc_memsize;
  324 #if 0
  325 
  326 /* Mandatory structures to get the link enabled
  327  */
  328         bus_dmamap_t sc_configrom_map;
  329         bus_dmamap_t sc_selfid_map;
  330         u_int32_t *sc_selfid_buf;
  331         u_int32_t *sc_configrom;
  332 #endif
  333 
  334         bus_dma_segment_t sc_dseg;
  335         int sc_dnseg;
  336         bus_dmamap_t sc_ddmamap;
  337         struct fwohci_desc *sc_desc;
  338         u_int8_t *sc_descmap;
  339         int sc_descsize;
  340         int sc_isoctx;
  341         int sc_itctx;
  342 
  343         void *sc_shutdownhook;
  344         void *sc_powerhook;
  345         struct callout sc_selfid_callout;
  346         int sc_selfid_fail;
  347 
  348         struct fwohci_ctx *sc_ctx_arrq;
  349         struct fwohci_ctx *sc_ctx_arrs;
  350         struct fwohci_ctx *sc_ctx_atrq;
  351         struct fwohci_ctx *sc_ctx_atrs;
  352         struct fwohci_ctx **sc_ctx_as; /* previously sc_ctx_ir */
  353         struct fwohci_buf sc_buf_cnfrom;
  354         struct fwohci_buf sc_buf_selfid;
  355 
  356         struct fwohci_ir_ctx **sc_ctx_ir;
  357         struct fwohci_it_ctx **sc_ctx_it;
  358 
  359         struct proc *sc_event_thread;
  360 
  361         int sc_dying;
  362         u_int32_t sc_intmask;
  363         u_int32_t sc_iso;
  364 
  365         u_int8_t sc_csr[CSR_SB_END];
  366 
  367         struct fwohci_uidtbl *sc_uidtbl;
  368         u_int16_t sc_nodeid;                    /* Full Node ID of this node */
  369         u_int8_t sc_rootid;                     /* Phy ID of Root */
  370         u_int8_t sc_irmid;                      /* Phy ID of IRM */
  371         u_int8_t sc_tlabel;                     /* Transaction Label */
  372 
  373         LIST_HEAD(, ieee1394_softc) sc_nodelist;
  374 };
  375 
  376 int fwohci_init (struct fwohci_softc *, const struct evcnt *);
  377 int fwohci_intr (void *);
  378 int fwohci_print (void *, const char *);
  379 int fwohci_detach(struct fwohci_softc *, int);
  380 int fwohci_activate(struct device *, enum devact);
  381 
  382 /* Macros to read and write the OHCI registers
  383  */
  384 #define OHCI_CSR_WRITE(sc, reg, val) \
  385         bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, reg, htole32(val))
  386 #define OHCI_CSR_READ(sc, reg) \
  387         le32toh(bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, reg))
  388 
  389 #define FWOHCI_CTX_ASYNC        0
  390 #define FWOHCI_CTX_ISO_SINGLE   1       /* for async stream */
  391 #define FWOHCI_CTX_ISO_MULTI    2       /* for isochronous */
  392 
  393 /* Locators. */
  394 
  395 #include "locators.h"
  396 
  397 #define fwbuscf_idhi cf_loc[FWBUSCF_IDHI]
  398 #define FWBUS_UNK_IDHI FWBUSCF_IDHI_DEFAULT
  399 
  400 #define fwbuscf_idlo cf_loc[FWBUSCF_IDLO]
  401 #define FWBUS_UNK_IDLO FWBUSCF_IDLO_DEFAULT
  402 
  403 #endif  /* _DEV_IEEE1394_FWOHCIVAR_H_ */

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