fwphyreg.h

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    1 /*      $NetBSD: fwphyreg.h,v 1.3 2010/03/29 03:05:28 kiyohara Exp $    */
    2 /*-
    3  * Copyright (C) 2003
    4  *      Hidetoshi Shimokawa. All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  * 3. All advertising materials mentioning features or use of this software
   15  *    must display the following acknowledgement:
   16  *
   17  *      This product includes software developed by Hidetoshi Shimokawa.
   18  *
   19  * 4. Neither the name of the author nor the names of its contributors
   20  *    may be used to endorse or promote products derived from this software
   21  *    without specific prior written permission.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33  * SUCH DAMAGE.
   34  *
   35  * $FreeBSD: src/sys/dev/firewire/fwphyreg.h,v 1.4 2009/02/12 03:05:42 sbruno Exp $
   36  */
   37 
   38 #ifndef _FWPHYREG_H_
   39 #define _FWPHYREG_H_
   40 
   41 /*
   42  * IEEE 1394a
   43  * Figure 5B - 1
   44  */
   45 struct phyreg_base {
   46 #if BYTE_ORDER == BIG_ENDIAN
   47         uint8_t phy_id:6,
   48                 r:1,
   49                 cps:1;
   50         uint8_t rhb:1,
   51                 ibr:1,
   52                 gap_count:6;
   53         uint8_t extended:3,
   54                 num_ports:5;
   55         uint8_t phy_speed:3,
   56                 :1,
   57                 delay:4;
   58         uint8_t lctrl:1,
   59                 c:1,
   60                 jitter:3,
   61                 pwr_class:3;
   62         uint8_t wdie:1,
   63                 isbr:1,
   64                 ctoi:1,
   65                 cpsi:1,
   66                 stoi:1,
   67                 pei:1,
   68                 eaa:1,
   69                 emc:1;
   70         uint8_t legacy_spd:3,
   71                 blink:1,
   72                 bridge:2,
   73                 :2;
   74         uint8_t page_select:3,
   75                 :1,
   76                 port_select:4;
   77 #else
   78         uint8_t cps:1,
   79                 r:1,
   80                 phy_id:6;
   81         uint8_t gap_count:6,
   82                 ibr:1,
   83                 rhb:1;
   84         uint8_t num_ports:5,
   85                 extended:3;
   86         uint8_t delay:4,
   87                 :1,
   88                 phy_speed:3;
   89         uint8_t pwr_class:3,
   90                 jitter:3,
   91                 c:1,
   92                 lctrl:1;
   93         uint8_t emc:1,
   94                 eaa:1,
   95                 pei:1,
   96                 stoi:1,
   97                 cpsi:1,
   98                 ctoi:1,
   99                 isbr:1,
  100                 wdie:1;
  101         uint8_t :2,
  102                 bridge:2,
  103                 blink:1,
  104                 legacy_spd:3;
  105         uint8_t port_select:4,
  106                 :1,
  107                 page_select:3;
  108 #endif
  109 };
  110 
  111 /*
  112  * IEEE 1394a
  113  * Figure 5B - 2
  114  */
  115 struct phyreg_page0 {
  116 #if BYTE_ORDER == BIG_ENDIAN
  117         uint8_t astat:2,
  118                 bstat:2,
  119                 ch:1,
  120                 con:1,
  121                 rxok:1,
  122                 dis:1;
  123         uint8_t negotiated_speed:3,
  124                 pie:1,
  125                 fault:1,
  126                 stanby_fault:1,
  127                 disscrm:1,
  128                 b_only:1;
  129         uint8_t dc_connected:1,
  130                 max_port_speed:3,
  131                 lpp:1,
  132                 cable_speed:3;
  133         uint8_t connection_unreliable:1,
  134                 :3,
  135                 beta_mode:1,
  136                 :3;
  137         uint8_t port_error;
  138         uint8_t :5,
  139                 loop_disable:1,
  140                 in_standby:1,
  141                 hard_disable:1;
  142         uint8_t :8;
  143         uint8_t :8;
  144 #else
  145         uint8_t dis:1,
  146                 rxok:1,
  147                 con:1,
  148                 ch:1,
  149                 bstat:2,
  150                 astat:2;
  151         uint8_t b_only:1,
  152                 disscrm:1,
  153                 stanby_fault:1,
  154                 fault:1,
  155                 pie:1,
  156                 negotiated_speed:3;
  157         uint8_t cable_speed:3,
  158                 lpp:1,
  159                 max_port_speed:3,
  160                 dc_connected:1;
  161         uint8_t :3,
  162                 beta_mode:1,
  163                 :3,
  164                 connection_unreliable:1;
  165         uint8_t port_error;
  166         uint8_t hard_disable:1,
  167                 in_standby:1,
  168                 loop_disable:1,
  169                 :5;
  170         uint8_t :8;
  171         uint8_t :8;
  172 #endif
  173 };
  174 
  175 /*
  176  * IEEE 1394a
  177  * Figure 5B - 3
  178  */
  179 struct phyreg_page1 {
  180         uint8_t compliance;
  181         uint8_t :8;
  182         uint8_t vendor_id[3];
  183         uint8_t product_id[3];
  184 };
  185 
  186 #endif  /* _FWPHYREG_H_ */

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FreeBSD/Linux Kernel Cross Reference sys/dev/ieee1394/fwphyreg.h

FreeBSD/Linux Kernel Cross Reference
sys/dev/ieee1394/fwphyreg.h