The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/iicbus/pmic/rockchip/rk805reg.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  * $FreeBSD$
   28  */
   29 
   30 #ifndef _RK805REG_H_
   31 #define  _RK805REG_H_
   32 
   33 /* RTC registers */
   34 #define RK805_RTC_SECS          0x00
   35 #define  RK805_RTC_SECS_MASK    0x7f
   36 #define RK805_RTC_MINUTES       0x01
   37 #define  RK805_RTC_MINUTES_MASK 0x7f
   38 #define RK805_RTC_HOURS         0x02
   39 #define  RK805_RTC_HOURS_MASK   0x3f
   40 #define RK805_RTC_HOURS_PM      0x80
   41 #define RK805_RTC_DAYS          0x03
   42 #define  RK805_RTC_DAYS_MASK    0x3f
   43 #define RK805_RTC_MONTHS        0x04
   44 #define  RK805_RTC_MONTHS_MASK  0x1f
   45 #define RK805_RTC_YEARS         0x05
   46 #define RK805_RTC_WEEKS         0x06 /* day of week */
   47 #define  RK805_RTC_WEEKS_MASK   0x07
   48 #define RK805_ALARM_SECONDS     0x8
   49 #define RK805_ALARM_MINUTES     0x9
   50 #define RK805_ALARM_HOURS       0xA
   51 #define RK805_ALARM_DAYS        0xB
   52 #define RK805_ALARM_MONTHS      0xC
   53 #define RK805_ALARM_YEARS       0xD
   54 #define RK805_RTC_CTRL          0x10
   55 #define  RK805_RTC_CTRL_STOP    (1 << 0)
   56 #define  RK805_RTC_AMPM_MODE    (1 << 3)
   57 #define  RK805_RTC_GET_TIME     (1 << 6)
   58 #define  RK805_RTC_READSEL      (1 << 7)
   59 #define RK805_CLK32KOUT         0x20
   60 
   61 /* Version registers */
   62 #define RK805_CHIP_NAME         0x17
   63 #define RK805_CHIP_VER          0x18
   64 #define RK805_OTP_VER           0x19
   65 
   66 /* Power channel enable registers */
   67 #define RK805_DCDC_EN           0x23
   68 #define RK805_SLP_DCDC_EN       0x25
   69 #define RK805_SLP_LDO_EN        0x26
   70 #define RK805_LDO_EN            0x27
   71 #define RK805_BUCK_LDO_SLP_LP   0x2A
   72 
   73 /* Buck and LDO configuration registers */
   74 #define RK805_BUCK1_CONFIG      0x2E
   75 #define RK805_BUCK1_ON_VSEL     0x2F
   76 #define RK805_BUCK1_SLEEP_VSEL  0x30
   77 #define RK805_BUCK2_CONFIG      0x32
   78 #define RK805_BUCK2_ON_VSEL     0x33
   79 #define RK805_BUCK2_SLEEP_VSEL  0x34
   80 #define RK805_BUCK3_CONFIG      0x36
   81 #define RK805_BUCK4_CONFIG      0x37
   82 #define RK805_BUCK4_ON_VSEL     0x38
   83 #define RK805_BUCK4_SLEEP_VSEL  0x39
   84 #define RK805_LDO1_ON_VSEL      0x3B
   85 #define RK805_LDO1_SLEEP_VSEL   0x3C
   86 #define RK805_LDO2_ON_VSEL      0x3D
   87 #define RK805_LDO2_SLEEP_VSEL   0x3E
   88 #define RK805_LDO3_ON_VSEL      0x3F
   89 #define RK805_LDO3_SLEEP_VSEL   0x40
   90 
   91 #define RK805_DEV_CTRL          0x4B
   92 #define  RK805_DEV_CTRL_OFF     (1 << 0)
   93 #define  RK805_DEV_CTRL_SLP     (1 << 1)
   94 
   95 enum rk805_regulator {
   96         RK805_BUCK1 = 0,
   97         RK805_BUCK2,
   98         RK805_BUCK3,
   99         RK805_BUCK4,
  100         RK805_LDO1,
  101         RK805_LDO2,
  102         RK805_LDO3,
  103 };
  104 
  105 #endif /* _RK805REG_H_ */

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