FreeBSD/Linux Kernel Cross Reference
sys/dev/iir/iir.c
1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 2000-04 ICP vortex GmbH
5 * Copyright (c) 2002-04 Intel Corporation
6 * Copyright (c) 2003-04 Adaptec Inc.
7 * All Rights Reserved
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions, and the following disclaimer,
14 * without modification, immediately at the beginning of the file.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34 /*
35 * iir.c: SCSI dependent code for the Intel Integrated RAID Controller driver
36 *
37 * Written by: Achim Leubner <achim_leubner@adaptec.com>
38 * Fixes/Additions: Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>
39 *
40 * credits: Niklas Hallqvist; OpenBSD driver for the ICP Controllers.
41 * Mike Smith; Some driver source code.
42 * FreeBSD.ORG; Great O/S to work on and for.
43 *
44 * $Id: iir.c 1.5 2004/03/30 10:17:53 achim Exp $"
45 */
46
47 #include <sys/cdefs.h>
48 __FBSDID("$FreeBSD: releng/12.0/sys/dev/iir/iir.c 326255 2017-11-27 14:52:40Z pfg $");
49
50 #define _IIR_C_
51
52 /* #include "opt_iir.h" */
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/endian.h>
56 #include <sys/eventhandler.h>
57 #include <sys/malloc.h>
58 #include <sys/kernel.h>
59 #include <sys/bus.h>
60
61 #include <machine/bus.h>
62 #include <machine/stdarg.h>
63
64 #include <cam/cam.h>
65 #include <cam/cam_ccb.h>
66 #include <cam/cam_sim.h>
67 #include <cam/cam_xpt_sim.h>
68 #include <cam/cam_debug.h>
69 #include <cam/scsi/scsi_all.h>
70 #include <cam/scsi/scsi_message.h>
71
72 #include <dev/iir/iir.h>
73
74 static MALLOC_DEFINE(M_GDTBUF, "iirbuf", "iir driver buffer");
75
76 #ifdef GDT_DEBUG
77 int gdt_debug = GDT_DEBUG;
78 #ifdef __SERIAL__
79 #define MAX_SERBUF 160
80 static void ser_init(void);
81 static void ser_puts(char *str);
82 static void ser_putc(int c);
83 static char strbuf[MAX_SERBUF+1];
84 #ifdef __COM2__
85 #define COM_BASE 0x2f8
86 #else
87 #define COM_BASE 0x3f8
88 #endif
89 static void ser_init()
90 {
91 unsigned port=COM_BASE;
92
93 outb(port+3, 0x80);
94 outb(port+1, 0);
95 /* 19200 Baud, if 9600: outb(12,port) */
96 outb(port, 6);
97 outb(port+3, 3);
98 outb(port+1, 0);
99 }
100
101 static void ser_puts(char *str)
102 {
103 char *ptr;
104
105 ser_init();
106 for (ptr=str;*ptr;++ptr)
107 ser_putc((int)(*ptr));
108 }
109
110 static void ser_putc(int c)
111 {
112 unsigned port=COM_BASE;
113
114 while ((inb(port+5) & 0x20)==0);
115 outb(port, c);
116 if (c==0x0a)
117 {
118 while ((inb(port+5) & 0x20)==0);
119 outb(port, 0x0d);
120 }
121 }
122
123 int ser_printf(const char *fmt, ...)
124 {
125 va_list args;
126 int i;
127
128 va_start(args,fmt);
129 i = vsprintf(strbuf,fmt,args);
130 ser_puts(strbuf);
131 va_end(args);
132 return i;
133 }
134 #endif
135 #endif
136
137 /* controller cnt. */
138 int gdt_cnt = 0;
139 /* event buffer */
140 static gdt_evt_str ebuffer[GDT_MAX_EVENTS];
141 static int elastidx, eoldidx;
142 static struct mtx elock;
143 MTX_SYSINIT(iir_elock, &elock, "iir events", MTX_DEF);
144 /* statistics */
145 gdt_statist_t gdt_stat;
146
147 /* Definitions for our use of the SIM private CCB area */
148 #define ccb_sim_ptr spriv_ptr0
149 #define ccb_priority spriv_field1
150
151 static void iir_action(struct cam_sim *sim, union ccb *ccb);
152 static int iir_intr_locked(struct gdt_softc *gdt);
153 static void iir_poll(struct cam_sim *sim);
154 static void iir_shutdown(void *arg, int howto);
155 static void iir_timeout(void *arg);
156
157 static void gdt_eval_mapping(u_int32_t size, int *cyls, int *heads,
158 int *secs);
159 static int gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb,
160 u_int8_t service, u_int16_t opcode,
161 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3);
162 static int gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *ccb,
163 int timeout);
164
165 static struct gdt_ccb *gdt_get_ccb(struct gdt_softc *gdt);
166
167 static int gdt_sync_event(struct gdt_softc *gdt, int service,
168 u_int8_t index, struct gdt_ccb *gccb);
169 static int gdt_async_event(struct gdt_softc *gdt, int service);
170 static struct gdt_ccb *gdt_raw_cmd(struct gdt_softc *gdt,
171 union ccb *ccb);
172 static struct gdt_ccb *gdt_cache_cmd(struct gdt_softc *gdt,
173 union ccb *ccb);
174 static struct gdt_ccb *gdt_ioctl_cmd(struct gdt_softc *gdt,
175 gdt_ucmd_t *ucmd);
176 static void gdt_internal_cache_cmd(struct gdt_softc *gdt, union ccb *ccb);
177
178 static void gdtmapmem(void *arg, bus_dma_segment_t *dm_segs,
179 int nseg, int error);
180 static void gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs,
181 int nseg, int error);
182
183 int
184 iir_init(struct gdt_softc *gdt)
185 {
186 u_int16_t cdev_cnt;
187 int i, id, drv_cyls, drv_hds, drv_secs;
188 struct gdt_ccb *gccb;
189
190 GDT_DPRINTF(GDT_D_DEBUG, ("iir_init()\n"));
191
192 gdt->sc_state = GDT_POLLING;
193 gdt_clear_events();
194 bzero(&gdt_stat, sizeof(gdt_statist_t));
195
196 SLIST_INIT(&gdt->sc_free_gccb);
197 SLIST_INIT(&gdt->sc_pending_gccb);
198 TAILQ_INIT(&gdt->sc_ccb_queue);
199 TAILQ_INIT(&gdt->sc_ucmd_queue);
200
201 /* DMA tag for mapping buffers into device visible space. */
202 if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0,
203 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
204 /*highaddr*/BUS_SPACE_MAXADDR,
205 /*filter*/NULL, /*filterarg*/NULL,
206 /*maxsize*/DFLTPHYS,
207 /*nsegments*/GDT_MAXSG,
208 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
209 /*flags*/BUS_DMA_ALLOCNOW,
210 /*lockfunc*/busdma_lock_mutex,
211 /*lockarg*/&gdt->sc_lock,
212 &gdt->sc_buffer_dmat) != 0) {
213 device_printf(gdt->sc_devnode,
214 "bus_dma_tag_create(..., gdt->sc_buffer_dmat) failed\n");
215 return (1);
216 }
217 gdt->sc_init_level++;
218
219 /* DMA tag for our ccb structures */
220 if (bus_dma_tag_create(gdt->sc_parent_dmat,
221 /*alignment*/1,
222 /*boundary*/0,
223 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
224 /*highaddr*/BUS_SPACE_MAXADDR,
225 /*filter*/NULL,
226 /*filterarg*/NULL,
227 GDT_MAXCMDS * GDT_SCRATCH_SZ, /* maxsize */
228 /*nsegments*/1,
229 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
230 /*flags*/0, /*lockfunc*/busdma_lock_mutex,
231 /*lockarg*/&gdt->sc_lock,
232 &gdt->sc_gcscratch_dmat) != 0) {
233 device_printf(gdt->sc_devnode,
234 "bus_dma_tag_create(...,gdt->sc_gcscratch_dmat) failed\n");
235 return (1);
236 }
237 gdt->sc_init_level++;
238
239 /* Allocation for our ccb scratch area */
240 if (bus_dmamem_alloc(gdt->sc_gcscratch_dmat, (void **)&gdt->sc_gcscratch,
241 BUS_DMA_NOWAIT, &gdt->sc_gcscratch_dmamap) != 0) {
242 device_printf(gdt->sc_devnode,
243 "bus_dmamem_alloc(...,&gdt->sc_gccbs,...) failed\n");
244 return (1);
245 }
246 gdt->sc_init_level++;
247
248 /* And permanently map them */
249 bus_dmamap_load(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap,
250 gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ,
251 gdtmapmem, &gdt->sc_gcscratch_busbase, /*flags*/0);
252 gdt->sc_init_level++;
253
254 /* Clear them out. */
255 bzero(gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ);
256
257 /* Initialize the ccbs */
258 gdt->sc_gccbs = malloc(sizeof(struct gdt_ccb) * GDT_MAXCMDS, M_GDTBUF,
259 M_NOWAIT | M_ZERO);
260 if (gdt->sc_gccbs == NULL) {
261 device_printf(gdt->sc_devnode, "no memory for gccbs.\n");
262 return (1);
263 }
264 for (i = GDT_MAXCMDS-1; i >= 0; i--) {
265 gccb = &gdt->sc_gccbs[i];
266 gccb->gc_cmd_index = i + 2;
267 gccb->gc_flags = GDT_GCF_UNUSED;
268 gccb->gc_map_flag = FALSE;
269 if (bus_dmamap_create(gdt->sc_buffer_dmat, /*flags*/0,
270 &gccb->gc_dmamap) != 0)
271 return(1);
272 gccb->gc_map_flag = TRUE;
273 gccb->gc_scratch = &gdt->sc_gcscratch[GDT_SCRATCH_SZ * i];
274 gccb->gc_scratch_busbase = gdt->sc_gcscratch_busbase + GDT_SCRATCH_SZ * i;
275 callout_init_mtx(&gccb->gc_timeout, &gdt->sc_lock, 0);
276 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle);
277 }
278 gdt->sc_init_level++;
279
280 /* create the control device */
281 gdt->sc_dev = gdt_make_dev(gdt);
282
283 /* allocate ccb for gdt_internal_cmd() */
284 mtx_lock(&gdt->sc_lock);
285 gccb = gdt_get_ccb(gdt);
286 if (gccb == NULL) {
287 mtx_unlock(&gdt->sc_lock);
288 device_printf(gdt->sc_devnode, "No free command index found\n");
289 return (1);
290 }
291 bzero(gccb->gc_cmd, GDT_CMD_SZ);
292
293 if (!gdt_internal_cmd(gdt, gccb, GDT_SCREENSERVICE, GDT_INIT,
294 0, 0, 0)) {
295 device_printf(gdt->sc_devnode,
296 "Screen service initialization error %d\n", gdt->sc_status);
297 gdt_free_ccb(gdt, gccb);
298 mtx_unlock(&gdt->sc_lock);
299 return (1);
300 }
301
302 gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_UNFREEZE_IO,
303 0, 0, 0);
304
305 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INIT,
306 GDT_LINUX_OS, 0, 0)) {
307 device_printf(gdt->sc_devnode, "Cache service initialization error %d\n",
308 gdt->sc_status);
309 gdt_free_ccb(gdt, gccb);
310 mtx_unlock(&gdt->sc_lock);
311 return (1);
312 }
313 cdev_cnt = (u_int16_t)gdt->sc_info;
314 gdt->sc_fw_vers = gdt->sc_service;
315
316 /* Detect number of buses */
317 gdt_enc32(gccb->gc_scratch + GDT_IOC_VERSION, GDT_IOC_NEWEST);
318 gccb->gc_scratch[GDT_IOC_LIST_ENTRIES] = GDT_MAXBUS;
319 gccb->gc_scratch[GDT_IOC_FIRST_CHAN] = 0;
320 gccb->gc_scratch[GDT_IOC_LAST_CHAN] = GDT_MAXBUS - 1;
321 gdt_enc32(gccb->gc_scratch + GDT_IOC_LIST_OFFSET, GDT_IOC_HDR_SZ);
322 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
323 GDT_IOCHAN_RAW_DESC, GDT_INVALID_CHANNEL,
324 GDT_IOC_HDR_SZ + GDT_MAXBUS * GDT_RAWIOC_SZ)) {
325 gdt->sc_bus_cnt = gccb->gc_scratch[GDT_IOC_CHAN_COUNT];
326 for (i = 0; i < gdt->sc_bus_cnt; i++) {
327 id = gccb->gc_scratch[GDT_IOC_HDR_SZ +
328 i * GDT_RAWIOC_SZ + GDT_RAWIOC_PROC_ID];
329 gdt->sc_bus_id[i] = id < GDT_MAXID_FC ? id : 0xff;
330 }
331 } else {
332 /* New method failed, use fallback. */
333 for (i = 0; i < GDT_MAXBUS; i++) {
334 gdt_enc32(gccb->gc_scratch + GDT_GETCH_CHANNEL_NO, i);
335 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
336 GDT_SCSI_CHAN_CNT | GDT_L_CTRL_PATTERN,
337 GDT_IO_CHANNEL | GDT_INVALID_CHANNEL,
338 GDT_GETCH_SZ)) {
339 if (i == 0) {
340 device_printf(gdt->sc_devnode, "Cannot get channel count, "
341 "error %d\n", gdt->sc_status);
342 gdt_free_ccb(gdt, gccb);
343 mtx_unlock(&gdt->sc_lock);
344 return (1);
345 }
346 break;
347 }
348 gdt->sc_bus_id[i] =
349 (gccb->gc_scratch[GDT_GETCH_SIOP_ID] < GDT_MAXID_FC) ?
350 gccb->gc_scratch[GDT_GETCH_SIOP_ID] : 0xff;
351 }
352 gdt->sc_bus_cnt = i;
353 }
354 /* add one "virtual" channel for the host drives */
355 gdt->sc_virt_bus = gdt->sc_bus_cnt;
356 gdt->sc_bus_cnt++;
357
358 if (!gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_INIT,
359 0, 0, 0)) {
360 device_printf(gdt->sc_devnode,
361 "Raw service initialization error %d\n", gdt->sc_status);
362 gdt_free_ccb(gdt, gccb);
363 mtx_unlock(&gdt->sc_lock);
364 return (1);
365 }
366
367 /* Set/get features raw service (scatter/gather) */
368 gdt->sc_raw_feat = 0;
369 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_SET_FEAT,
370 GDT_SCATTER_GATHER, 0, 0)) {
371 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_GET_FEAT,
372 0, 0, 0)) {
373 gdt->sc_raw_feat = gdt->sc_info;
374 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) {
375 panic("%s: Scatter/Gather Raw Service "
376 "required but not supported!\n",
377 device_get_nameunit(gdt->sc_devnode));
378 gdt_free_ccb(gdt, gccb);
379 mtx_unlock(&gdt->sc_lock);
380 return (1);
381 }
382 }
383 }
384
385 /* Set/get features cache service (scatter/gather) */
386 gdt->sc_cache_feat = 0;
387 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_SET_FEAT,
388 0, GDT_SCATTER_GATHER, 0)) {
389 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_GET_FEAT,
390 0, 0, 0)) {
391 gdt->sc_cache_feat = gdt->sc_info;
392 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) {
393 panic("%s: Scatter/Gather Cache Service "
394 "required but not supported!\n",
395 device_get_nameunit(gdt->sc_devnode));
396 gdt_free_ccb(gdt, gccb);
397 mtx_unlock(&gdt->sc_lock);
398 return (1);
399 }
400 }
401 }
402
403 /* OEM */
404 gdt_enc32(gccb->gc_scratch + GDT_OEM_VERSION, 0x01);
405 gdt_enc32(gccb->gc_scratch + GDT_OEM_BUFSIZE, sizeof(gdt_oem_record_t));
406 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
407 GDT_OEM_STR_RECORD, GDT_INVALID_CHANNEL,
408 sizeof(gdt_oem_str_record_t))) {
409 strncpy(gdt->oem_name, ((gdt_oem_str_record_t *)
410 gccb->gc_scratch)->text.scsi_host_drive_inquiry_vendor_id, 7);
411 gdt->oem_name[7]='\0';
412 } else {
413 /* Old method, based on PCI ID */
414 if (gdt->sc_vendor == INTEL_VENDOR_ID_IIR)
415 strcpy(gdt->oem_name,"Intel ");
416 else
417 strcpy(gdt->oem_name,"ICP ");
418 }
419
420 /* Scan for cache devices */
421 for (i = 0; i < cdev_cnt && i < GDT_MAX_HDRIVES; i++) {
422 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INFO,
423 i, 0, 0)) {
424 gdt->sc_hdr[i].hd_present = 1;
425 gdt->sc_hdr[i].hd_size = gdt->sc_info;
426
427 /*
428 * Evaluate mapping (sectors per head, heads per cyl)
429 */
430 gdt->sc_hdr[i].hd_size &= ~GDT_SECS32;
431 if (gdt->sc_info2 == 0)
432 gdt_eval_mapping(gdt->sc_hdr[i].hd_size,
433 &drv_cyls, &drv_hds, &drv_secs);
434 else {
435 drv_hds = gdt->sc_info2 & 0xff;
436 drv_secs = (gdt->sc_info2 >> 8) & 0xff;
437 drv_cyls = gdt->sc_hdr[i].hd_size / drv_hds /
438 drv_secs;
439 }
440 gdt->sc_hdr[i].hd_heads = drv_hds;
441 gdt->sc_hdr[i].hd_secs = drv_secs;
442 /* Round the size */
443 gdt->sc_hdr[i].hd_size = drv_cyls * drv_hds * drv_secs;
444
445 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE,
446 GDT_DEVTYPE, i, 0, 0))
447 gdt->sc_hdr[i].hd_devtype = gdt->sc_info;
448 }
449 }
450
451 GDT_DPRINTF(GDT_D_INIT, ("dpmem %x %d-bus %d cache device%s\n",
452 gdt->sc_dpmembase,
453 gdt->sc_bus_cnt, cdev_cnt,
454 cdev_cnt == 1 ? "" : "s"));
455 gdt_free_ccb(gdt, gccb);
456 mtx_unlock(&gdt->sc_lock);
457
458 atomic_add_int(&gdt_cnt, 1);
459 return (0);
460 }
461
462 void
463 iir_free(struct gdt_softc *gdt)
464 {
465 int i;
466
467 GDT_DPRINTF(GDT_D_INIT, ("iir_free()\n"));
468
469 switch (gdt->sc_init_level) {
470 default:
471 gdt_destroy_dev(gdt->sc_dev);
472 case 5:
473 for (i = GDT_MAXCMDS-1; i >= 0; i--)
474 if (gdt->sc_gccbs[i].gc_map_flag) {
475 callout_drain(&gdt->sc_gccbs[i].gc_timeout);
476 bus_dmamap_destroy(gdt->sc_buffer_dmat,
477 gdt->sc_gccbs[i].gc_dmamap);
478 }
479 bus_dmamap_unload(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap);
480 free(gdt->sc_gccbs, M_GDTBUF);
481 case 4:
482 bus_dmamem_free(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch, gdt->sc_gcscratch_dmamap);
483 case 3:
484 bus_dma_tag_destroy(gdt->sc_gcscratch_dmat);
485 case 2:
486 bus_dma_tag_destroy(gdt->sc_buffer_dmat);
487 case 1:
488 bus_dma_tag_destroy(gdt->sc_parent_dmat);
489 case 0:
490 break;
491 }
492 }
493
494 void
495 iir_attach(struct gdt_softc *gdt)
496 {
497 struct cam_devq *devq;
498 int i;
499
500 GDT_DPRINTF(GDT_D_INIT, ("iir_attach()\n"));
501
502 /*
503 * Create the device queue for our SIM.
504 * XXX Throttle this down since the card has problems under load.
505 */
506 devq = cam_simq_alloc(32);
507 if (devq == NULL)
508 return;
509
510 for (i = 0; i < gdt->sc_bus_cnt; i++) {
511 /*
512 * Construct our SIM entry
513 */
514 gdt->sims[i] = cam_sim_alloc(iir_action, iir_poll, "iir",
515 gdt, device_get_unit(gdt->sc_devnode), &gdt->sc_lock,
516 /*untagged*/1, /*tagged*/GDT_MAXCMDS, devq);
517 mtx_lock(&gdt->sc_lock);
518 if (xpt_bus_register(gdt->sims[i], gdt->sc_devnode, i) != CAM_SUCCESS) {
519 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0);
520 mtx_unlock(&gdt->sc_lock);
521 break;
522 }
523
524 if (xpt_create_path(&gdt->paths[i], /*periph*/NULL,
525 cam_sim_path(gdt->sims[i]),
526 CAM_TARGET_WILDCARD,
527 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
528 xpt_bus_deregister(cam_sim_path(gdt->sims[i]));
529 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0);
530 mtx_unlock(&gdt->sc_lock);
531 break;
532 }
533 mtx_unlock(&gdt->sc_lock);
534 }
535 if (i > 0)
536 EVENTHANDLER_REGISTER(shutdown_final, iir_shutdown,
537 gdt, SHUTDOWN_PRI_DEFAULT);
538 /* iir_watchdog(gdt); */
539 gdt->sc_state = GDT_NORMAL;
540 }
541
542 static void
543 gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, int *secs)
544 {
545 *cyls = size / GDT_HEADS / GDT_SECS;
546 if (*cyls < GDT_MAXCYLS) {
547 *heads = GDT_HEADS;
548 *secs = GDT_SECS;
549 } else {
550 /* Too high for 64 * 32 */
551 *cyls = size / GDT_MEDHEADS / GDT_MEDSECS;
552 if (*cyls < GDT_MAXCYLS) {
553 *heads = GDT_MEDHEADS;
554 *secs = GDT_MEDSECS;
555 } else {
556 /* Too high for 127 * 63 */
557 *cyls = size / GDT_BIGHEADS / GDT_BIGSECS;
558 *heads = GDT_BIGHEADS;
559 *secs = GDT_BIGSECS;
560 }
561 }
562 }
563
564 static int
565 gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *gccb,
566 int timeout)
567 {
568 int rv = 0;
569
570 GDT_DPRINTF(GDT_D_INIT,
571 ("gdt_wait(%p, %p, %d)\n", gdt, gccb, timeout));
572
573 gdt->sc_state |= GDT_POLL_WAIT;
574 do {
575 if (iir_intr_locked(gdt) == gccb->gc_cmd_index) {
576 rv = 1;
577 break;
578 }
579 DELAY(1);
580 } while (--timeout);
581 gdt->sc_state &= ~GDT_POLL_WAIT;
582
583 while (gdt->sc_test_busy(gdt))
584 DELAY(1); /* XXX correct? */
585
586 return (rv);
587 }
588
589 static int
590 gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb,
591 u_int8_t service, u_int16_t opcode,
592 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3)
593 {
594 int retries;
595
596 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cmd(%p, %d, %d, %d, %d, %d)\n",
597 gdt, service, opcode, arg1, arg2, arg3));
598
599 bzero(gccb->gc_cmd, GDT_CMD_SZ);
600
601 for (retries = GDT_RETRIES; ; ) {
602 gccb->gc_service = service;
603 gccb->gc_flags = GDT_GCF_INTERNAL;
604
605 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
606 gccb->gc_cmd_index);
607 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode);
608
609 switch (service) {
610 case GDT_CACHESERVICE:
611 if (opcode == GDT_IOCTL) {
612 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
613 GDT_IOCTL_SUBFUNC, arg1);
614 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
615 GDT_IOCTL_CHANNEL, arg2);
616 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION +
617 GDT_IOCTL_PARAM_SIZE, (u_int16_t)arg3);
618 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM,
619 gccb->gc_scratch_busbase);
620 } else {
621 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION +
622 GDT_CACHE_DEVICENO, (u_int16_t)arg1);
623 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
624 GDT_CACHE_BLOCKNO, arg2);
625 }
626 break;
627
628 case GDT_SCSIRAWSERVICE:
629 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
630 GDT_RAW_DIRECTION, arg1);
631 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] =
632 (u_int8_t)arg2;
633 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] =
634 (u_int8_t)arg3;
635 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] =
636 (u_int8_t)(arg3 >> 8);
637 }
638
639 gdt->sc_set_sema0(gdt);
640 gccb->gc_cmd_len = GDT_CMD_SZ;
641 gdt->sc_cmd_off = 0;
642 gdt->sc_cmd_cnt = 0;
643 gdt->sc_copy_cmd(gdt, gccb);
644 gdt->sc_release_event(gdt);
645 DELAY(20);
646 if (!gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT))
647 return (0);
648 if (gdt->sc_status != GDT_S_BSY || --retries == 0)
649 break;
650 DELAY(1);
651 }
652 return (gdt->sc_status == GDT_S_OK);
653 }
654
655 static struct gdt_ccb *
656 gdt_get_ccb(struct gdt_softc *gdt)
657 {
658 struct gdt_ccb *gccb;
659
660 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_get_ccb(%p)\n", gdt));
661
662 mtx_assert(&gdt->sc_lock, MA_OWNED);
663 gccb = SLIST_FIRST(&gdt->sc_free_gccb);
664 if (gccb != NULL) {
665 SLIST_REMOVE_HEAD(&gdt->sc_free_gccb, sle);
666 SLIST_INSERT_HEAD(&gdt->sc_pending_gccb, gccb, sle);
667 ++gdt_stat.cmd_index_act;
668 if (gdt_stat.cmd_index_act > gdt_stat.cmd_index_max)
669 gdt_stat.cmd_index_max = gdt_stat.cmd_index_act;
670 }
671 return (gccb);
672 }
673
674 void
675 gdt_free_ccb(struct gdt_softc *gdt, struct gdt_ccb *gccb)
676 {
677
678 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_free_ccb(%p, %p)\n", gdt, gccb));
679
680 mtx_assert(&gdt->sc_lock, MA_OWNED);
681 gccb->gc_flags = GDT_GCF_UNUSED;
682 SLIST_REMOVE(&gdt->sc_pending_gccb, gccb, gdt_ccb, sle);
683 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle);
684 --gdt_stat.cmd_index_act;
685 if (gdt->sc_state & GDT_SHUTDOWN)
686 wakeup(gccb);
687 }
688
689 void
690 gdt_next(struct gdt_softc *gdt)
691 {
692 union ccb *ccb;
693 gdt_ucmd_t *ucmd;
694 struct cam_sim *sim;
695 int bus, target, lun;
696 int next_cmd;
697
698 struct ccb_scsiio *csio;
699 struct ccb_hdr *ccbh;
700 struct gdt_ccb *gccb = NULL;
701 u_int8_t cmd;
702
703 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_next(%p)\n", gdt));
704
705 mtx_assert(&gdt->sc_lock, MA_OWNED);
706 if (gdt->sc_test_busy(gdt)) {
707 if (!(gdt->sc_state & GDT_POLLING)) {
708 return;
709 }
710 while (gdt->sc_test_busy(gdt))
711 DELAY(1);
712 }
713
714 gdt->sc_cmd_cnt = gdt->sc_cmd_off = 0;
715 next_cmd = TRUE;
716 for (;;) {
717 /* I/Os in queue? controller ready? */
718 if (!TAILQ_FIRST(&gdt->sc_ucmd_queue) &&
719 !TAILQ_FIRST(&gdt->sc_ccb_queue))
720 break;
721
722 /* 1.: I/Os without ccb (IOCTLs) */
723 ucmd = TAILQ_FIRST(&gdt->sc_ucmd_queue);
724 if (ucmd != NULL) {
725 TAILQ_REMOVE(&gdt->sc_ucmd_queue, ucmd, links);
726 if ((gccb = gdt_ioctl_cmd(gdt, ucmd)) == NULL) {
727 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links);
728 break;
729 }
730 break;
731 /* wenn mehrere Kdos. zulassen: if (!gdt_polling) continue; */
732 }
733
734 /* 2.: I/Os with ccb */
735 ccb = (union ccb *)TAILQ_FIRST(&gdt->sc_ccb_queue);
736 /* ist dann immer != NULL, da oben getestet */
737 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr;
738 bus = cam_sim_bus(sim);
739 target = ccb->ccb_h.target_id;
740 lun = ccb->ccb_h.target_lun;
741
742 TAILQ_REMOVE(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe);
743 --gdt_stat.req_queue_act;
744 /* ccb->ccb_h.func_code is XPT_SCSI_IO */
745 GDT_DPRINTF(GDT_D_QUEUE, ("XPT_SCSI_IO flags 0x%x)\n",
746 ccb->ccb_h.flags));
747 csio = &ccb->csio;
748 ccbh = &ccb->ccb_h;
749 cmd = scsiio_cdb_ptr(csio)[0];
750 /* Max CDB length is 12 bytes, can't be phys addr */
751 if (csio->cdb_len > 12 || (ccbh->flags & CAM_CDB_PHYS)) {
752 ccbh->status = CAM_REQ_INVALID;
753 --gdt_stat.io_count_act;
754 xpt_done(ccb);
755 } else if (bus != gdt->sc_virt_bus) {
756 /* raw service command */
757 if ((gccb = gdt_raw_cmd(gdt, ccb)) == NULL) {
758 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h,
759 sim_links.tqe);
760 ++gdt_stat.req_queue_act;
761 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
762 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
763 next_cmd = FALSE;
764 }
765 } else if (target >= GDT_MAX_HDRIVES ||
766 !gdt->sc_hdr[target].hd_present || lun != 0) {
767 ccbh->status = CAM_DEV_NOT_THERE;
768 --gdt_stat.io_count_act;
769 xpt_done(ccb);
770 } else {
771 /* cache service command */
772 if (cmd == READ_6 || cmd == WRITE_6 ||
773 cmd == READ_10 || cmd == WRITE_10) {
774 if ((gccb = gdt_cache_cmd(gdt, ccb)) == NULL) {
775 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h,
776 sim_links.tqe);
777 ++gdt_stat.req_queue_act;
778 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
779 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
780 next_cmd = FALSE;
781 }
782 } else {
783 gdt_internal_cache_cmd(gdt, ccb);
784 }
785 }
786 if ((gdt->sc_state & GDT_POLLING) || !next_cmd)
787 break;
788 }
789 if (gdt->sc_cmd_cnt > 0)
790 gdt->sc_release_event(gdt);
791
792 if ((gdt->sc_state & GDT_POLLING) && gdt->sc_cmd_cnt > 0) {
793 gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT);
794 }
795 }
796
797 static struct gdt_ccb *
798 gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb)
799 {
800 struct gdt_ccb *gccb;
801 struct cam_sim *sim;
802 int error;
803
804 GDT_DPRINTF(GDT_D_CMD, ("gdt_raw_cmd(%p, %p)\n", gdt, ccb));
805
806 if (roundup(GDT_CMD_UNION + GDT_RAW_SZ, sizeof(u_int32_t)) +
807 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET >
808 gdt->sc_ic_all_size) {
809 GDT_DPRINTF(GDT_D_INVALID, ("%s: gdt_raw_cmd(): DPMEM overflow\n",
810 device_get_nameunit(gdt->sc_devnode)));
811 return (NULL);
812 }
813
814 gccb = gdt_get_ccb(gdt);
815 if (gccb == NULL) {
816 GDT_DPRINTF(GDT_D_INVALID, ("%s: No free command index found\n",
817 device_get_nameunit(gdt->sc_devnode)));
818 return (gccb);
819 }
820 bzero(gccb->gc_cmd, GDT_CMD_SZ);
821 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr;
822 gccb->gc_ccb = ccb;
823 gccb->gc_service = GDT_SCSIRAWSERVICE;
824 gccb->gc_flags = GDT_GCF_SCSI;
825
826 if (gdt->sc_cmd_cnt == 0)
827 gdt->sc_set_sema0(gdt);
828 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
829 gccb->gc_cmd_index);
830 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE);
831
832 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION,
833 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
834 GDT_DATA_IN : GDT_DATA_OUT);
835 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN,
836 ccb->csio.dxfer_len);
837 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN,
838 ccb->csio.cdb_len);
839 bcopy(ccb->csio.cdb_io.cdb_bytes, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD,
840 ccb->csio.cdb_len);
841 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] =
842 ccb->ccb_h.target_id;
843 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] =
844 ccb->ccb_h.target_lun;
845 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] =
846 cam_sim_bus(sim);
847 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN,
848 sizeof(struct scsi_sense_data));
849 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA,
850 gccb->gc_scratch_busbase);
851
852 error = bus_dmamap_load_ccb(gdt->sc_buffer_dmat,
853 gccb->gc_dmamap,
854 ccb,
855 gdtexecuteccb,
856 gccb, /*flags*/0);
857 if (error == EINPROGRESS) {
858 xpt_freeze_simq(sim, 1);
859 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
860 }
861
862 return (gccb);
863 }
864
865 static struct gdt_ccb *
866 gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb)
867 {
868 struct gdt_ccb *gccb;
869 struct cam_sim *sim;
870 u_int8_t *cmdp;
871 u_int16_t opcode;
872 u_int32_t blockno, blockcnt;
873 int error;
874
875 GDT_DPRINTF(GDT_D_CMD, ("gdt_cache_cmd(%p, %p)\n", gdt, ccb));
876
877 if (roundup(GDT_CMD_UNION + GDT_CACHE_SZ, sizeof(u_int32_t)) +
878 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET >
879 gdt->sc_ic_all_size) {
880 GDT_DPRINTF(GDT_D_INVALID, ("%s: gdt_cache_cmd(): DPMEM overflow\n",
881 device_get_nameunit(gdt->sc_devnode)));
882 return (NULL);
883 }
884
885 gccb = gdt_get_ccb(gdt);
886 if (gccb == NULL) {
887 GDT_DPRINTF(GDT_D_DEBUG, ("%s: No free command index found\n",
888 device_get_nameunit(gdt->sc_devnode)));
889 return (gccb);
890 }
891 bzero(gccb->gc_cmd, GDT_CMD_SZ);
892 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr;
893 gccb->gc_ccb = ccb;
894 gccb->gc_service = GDT_CACHESERVICE;
895 gccb->gc_flags = GDT_GCF_SCSI;
896
897 if (gdt->sc_cmd_cnt == 0)
898 gdt->sc_set_sema0(gdt);
899 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
900 gccb->gc_cmd_index);
901 cmdp = ccb->csio.cdb_io.cdb_bytes;
902 opcode = (*cmdp == WRITE_6 || *cmdp == WRITE_10) ? GDT_WRITE : GDT_READ;
903 if ((gdt->sc_state & GDT_SHUTDOWN) && opcode == GDT_WRITE)
904 opcode = GDT_WRITE_THR;
905 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode);
906
907 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO,
908 ccb->ccb_h.target_id);
909 if (ccb->csio.cdb_len == 6) {
910 struct scsi_rw_6 *rw = (struct scsi_rw_6 *)cmdp;
911 blockno = scsi_3btoul(rw->addr) & ((SRW_TOPADDR<<16) | 0xffff);
912 blockcnt = rw->length ? rw->length : 0x100;
913 } else {
914 struct scsi_rw_10 *rw = (struct scsi_rw_10 *)cmdp;
915 blockno = scsi_4btoul(rw->addr);
916 blockcnt = scsi_2btoul(rw->length);
917 }
918 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO,
919 blockno);
920 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT,
921 blockcnt);
922
923 error = bus_dmamap_load_ccb(gdt->sc_buffer_dmat,
924 gccb->gc_dmamap,
925 ccb,
926 gdtexecuteccb,
927 gccb, /*flags*/0);
928 if (error == EINPROGRESS) {
929 xpt_freeze_simq(sim, 1);
930 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
931 }
932 return (gccb);
933 }
934
935 static struct gdt_ccb *
936 gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd)
937 {
938 struct gdt_ccb *gccb;
939 u_int32_t cnt;
940
941 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_ioctl_cmd(%p, %p)\n", gdt, ucmd));
942
943 gccb = gdt_get_ccb(gdt);
944 if (gccb == NULL) {
945 GDT_DPRINTF(GDT_D_DEBUG, ("%s: No free command index found\n",
946 device_get_nameunit(gdt->sc_devnode)));
947 return (gccb);
948 }
949 bzero(gccb->gc_cmd, GDT_CMD_SZ);
950 gccb->gc_ucmd = ucmd;
951 gccb->gc_service = ucmd->service;
952 gccb->gc_flags = GDT_GCF_IOCTL;
953
954 /* check DPMEM space, copy data buffer from user space */
955 if (ucmd->service == GDT_CACHESERVICE) {
956 if (ucmd->OpCode == GDT_IOCTL) {
957 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_IOCTL_SZ,
958 sizeof(u_int32_t));
959 cnt = ucmd->u.ioctl.param_size;
960 if (cnt > GDT_SCRATCH_SZ) {
961 device_printf(gdt->sc_devnode,
962 "Scratch buffer too small (%d/%d)\n", GDT_SCRATCH_SZ, cnt);
963 gdt_free_ccb(gdt, gccb);
964 return (NULL);
965 }
966 } else {
967 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST +
968 GDT_SG_SZ, sizeof(u_int32_t));
969 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE;
970 if (cnt > GDT_SCRATCH_SZ) {
971 device_printf(gdt->sc_devnode,
972 "Scratch buffer too small (%d/%d)\n", GDT_SCRATCH_SZ, cnt);
973 gdt_free_ccb(gdt, gccb);
974 return (NULL);
975 }
976 }
977 } else {
978 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST +
979 GDT_SG_SZ, sizeof(u_int32_t));
980 cnt = ucmd->u.raw.sdlen;
981 if (cnt + ucmd->u.raw.sense_len > GDT_SCRATCH_SZ) {
982 device_printf(gdt->sc_devnode, "Scratch buffer too small (%d/%d)\n",
983 GDT_SCRATCH_SZ, cnt + ucmd->u.raw.sense_len);
984 gdt_free_ccb(gdt, gccb);
985 return (NULL);
986 }
987 }
988 if (cnt != 0)
989 bcopy(ucmd->data, gccb->gc_scratch, cnt);
990
991 if (gdt->sc_cmd_off + gccb->gc_cmd_len + GDT_DPMEM_COMMAND_OFFSET >
992 gdt->sc_ic_all_size) {
993 GDT_DPRINTF(GDT_D_INVALID, ("%s: gdt_ioctl_cmd(): DPMEM overflow\n",
994 device_get_nameunit(gdt->sc_devnode)));
995 gdt_free_ccb(gdt, gccb);
996 return (NULL);
997 }
998
999 if (gdt->sc_cmd_cnt == 0)
1000 gdt->sc_set_sema0(gdt);
1001
1002 /* fill cmd structure */
1003 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1004 gccb->gc_cmd_index);
1005 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE,
1006 ucmd->OpCode);
1007
1008 if (ucmd->service == GDT_CACHESERVICE) {
1009 if (ucmd->OpCode == GDT_IOCTL) {
1010 /* IOCTL */
1011 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_PARAM_SIZE,
1012 ucmd->u.ioctl.param_size);
1013 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_SUBFUNC,
1014 ucmd->u.ioctl.subfunc);
1015 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_CHANNEL,
1016 ucmd->u.ioctl.channel);
1017 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM,
1018 gccb->gc_scratch_busbase);
1019 } else {
1020 /* cache service command */
1021 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO,
1022 ucmd->u.cache.DeviceNo);
1023 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO,
1024 ucmd->u.cache.BlockNo);
1025 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT,
1026 ucmd->u.cache.BlockCnt);
1027 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR,
1028 0xffffffffUL);
1029 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ,
1030 1);
1031 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1032 GDT_SG_PTR, gccb->gc_scratch_busbase);
1033 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1034 GDT_SG_LEN, ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE);
1035 }
1036 } else {
1037 /* raw service command */
1038 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION,
1039 ucmd->u.raw.direction);
1040 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA,
1041 0xffffffffUL);
1042 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN,
1043 ucmd->u.raw.sdlen);
1044 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN,
1045 ucmd->u.raw.clen);
1046 bcopy(ucmd->u.raw.cmd, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD,
1047 12);
1048 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] =
1049 ucmd->u.raw.target;
1050 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] =
1051 ucmd->u.raw.lun;
1052 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] =
1053 ucmd->u.raw.bus;
1054 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN,
1055 ucmd->u.raw.sense_len);
1056 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA,
1057 gccb->gc_scratch_busbase + ucmd->u.raw.sdlen);
1058 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ,
1059 1);
1060 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1061 GDT_SG_PTR, gccb->gc_scratch_busbase);
1062 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1063 GDT_SG_LEN, ucmd->u.raw.sdlen);
1064 }
1065
1066 gdt_stat.sg_count_act = 1;
1067 gdt->sc_copy_cmd(gdt, gccb);
1068 return (gccb);
1069 }
1070
1071 static void
1072 gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb)
1073 {
1074 int t;
1075
1076 t = ccb->ccb_h.target_id;
1077 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cache_cmd(%p, %p, 0x%x, %d)\n",
1078 gdt, ccb, ccb->csio.cdb_io.cdb_bytes[0], t));
1079
1080 switch (ccb->csio.cdb_io.cdb_bytes[0]) {
1081 case TEST_UNIT_READY:
1082 case START_STOP:
1083 break;
1084 case REQUEST_SENSE:
1085 GDT_DPRINTF(GDT_D_MISC, ("REQUEST_SENSE\n"));
1086 break;
1087 case INQUIRY:
1088 {
1089 struct scsi_inquiry_data inq;
1090 size_t copylen = MIN(sizeof(inq), ccb->csio.dxfer_len);
1091
1092 bzero(&inq, sizeof(inq));
1093 inq.device = (gdt->sc_hdr[t].hd_devtype & 4) ?
1094 T_CDROM : T_DIRECT;
1095 inq.dev_qual2 = (gdt->sc_hdr[t].hd_devtype & 1) ? 0x80 : 0;
1096 inq.version = SCSI_REV_2;
1097 inq.response_format = 2;
1098 inq.additional_length = 32;
1099 inq.flags = SID_CmdQue | SID_Sync;
1100 strncpy(inq.vendor, gdt->oem_name, sizeof(inq.vendor));
1101 snprintf(inq.product, sizeof(inq.product),
1102 "Host Drive #%02d", t);
1103 strncpy(inq.revision, " ", sizeof(inq.revision));
1104 bcopy(&inq, ccb->csio.data_ptr, copylen );
1105 if( ccb->csio.dxfer_len > copylen )
1106 bzero( ccb->csio.data_ptr+copylen,
1107 ccb->csio.dxfer_len - copylen );
1108 break;
1109 }
1110 case MODE_SENSE_6:
1111 {
1112 struct mpd_data {
1113 struct scsi_mode_hdr_6 hd;
1114 struct scsi_mode_block_descr bd;
1115 struct scsi_control_page cp;
1116 } mpd;
1117 size_t copylen = MIN(sizeof(mpd), ccb->csio.dxfer_len);
1118 u_int8_t page;
1119
1120 /*mpd = (struct mpd_data *)ccb->csio.data_ptr;*/
1121 bzero(&mpd, sizeof(mpd));
1122 mpd.hd.datalen = sizeof(struct scsi_mode_hdr_6) +
1123 sizeof(struct scsi_mode_block_descr);
1124 mpd.hd.dev_specific = (gdt->sc_hdr[t].hd_devtype & 2) ? 0x80 : 0;
1125 mpd.hd.block_descr_len = sizeof(struct scsi_mode_block_descr);
1126 mpd.bd.block_len[0] = (GDT_SECTOR_SIZE & 0x00ff0000) >> 16;
1127 mpd.bd.block_len[1] = (GDT_SECTOR_SIZE & 0x0000ff00) >> 8;
1128 mpd.bd.block_len[2] = (GDT_SECTOR_SIZE & 0x000000ff);
1129
1130 bcopy(&mpd, ccb->csio.data_ptr, copylen );
1131 if( ccb->csio.dxfer_len > copylen )
1132 bzero( ccb->csio.data_ptr+copylen,
1133 ccb->csio.dxfer_len - copylen );
1134 page=((struct scsi_mode_sense_6 *)ccb->csio.cdb_io.cdb_bytes)->page;
1135 switch (page) {
1136 default:
1137 GDT_DPRINTF(GDT_D_MISC, ("MODE_SENSE_6: page 0x%x\n", page));
1138 break;
1139 }
1140 break;
1141 }
1142 case READ_CAPACITY:
1143 {
1144 struct scsi_read_capacity_data rcd;
1145 size_t copylen = MIN(sizeof(rcd), ccb->csio.dxfer_len);
1146
1147 /*rcd = (struct scsi_read_capacity_data *)ccb->csio.data_ptr;*/
1148 bzero(&rcd, sizeof(rcd));
1149 scsi_ulto4b(gdt->sc_hdr[t].hd_size - 1, rcd.addr);
1150 scsi_ulto4b(GDT_SECTOR_SIZE, rcd.length);
1151 bcopy(&rcd, ccb->csio.data_ptr, copylen );
1152 if( ccb->csio.dxfer_len > copylen )
1153 bzero( ccb->csio.data_ptr+copylen,
1154 ccb->csio.dxfer_len - copylen );
1155 break;
1156 }
1157 default:
1158 GDT_DPRINTF(GDT_D_MISC, ("gdt_internal_cache_cmd(%d) unknown\n",
1159 ccb->csio.cdb_io.cdb_bytes[0]));
1160 break;
1161 }
1162 ccb->ccb_h.status |= CAM_REQ_CMP;
1163 --gdt_stat.io_count_act;
1164 xpt_done(ccb);
1165 }
1166
1167 static void
1168 gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1169 {
1170 bus_addr_t *busaddrp;
1171
1172 busaddrp = (bus_addr_t *)arg;
1173 *busaddrp = dm_segs->ds_addr;
1174 }
1175
1176 static void
1177 gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1178 {
1179 struct gdt_ccb *gccb;
1180 union ccb *ccb;
1181 struct gdt_softc *gdt;
1182 int i;
1183
1184 gccb = (struct gdt_ccb *)arg;
1185 ccb = gccb->gc_ccb;
1186 gdt = cam_sim_softc((struct cam_sim *)ccb->ccb_h.ccb_sim_ptr);
1187 mtx_assert(&gdt->sc_lock, MA_OWNED);
1188
1189 GDT_DPRINTF(GDT_D_CMD, ("gdtexecuteccb(%p, %p, %p, %d, %d)\n",
1190 gdt, gccb, dm_segs, nseg, error));
1191 gdt_stat.sg_count_act = nseg;
1192 if (nseg > gdt_stat.sg_count_max)
1193 gdt_stat.sg_count_max = nseg;
1194
1195 /* Copy the segments into our SG list */
1196 if (gccb->gc_service == GDT_CACHESERVICE) {
1197 for (i = 0; i < nseg; ++i) {
1198 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1199 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr);
1200 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1201 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len);
1202 dm_segs++;
1203 }
1204 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ,
1205 nseg);
1206 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR,
1207 0xffffffffUL);
1208
1209 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST +
1210 nseg * GDT_SG_SZ, sizeof(u_int32_t));
1211 } else {
1212 for (i = 0; i < nseg; ++i) {
1213 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1214 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr);
1215 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1216 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len);
1217 dm_segs++;
1218 }
1219 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ,
1220 nseg);
1221 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA,
1222 0xffffffffUL);
1223
1224 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST +
1225 nseg * GDT_SG_SZ, sizeof(u_int32_t));
1226 }
1227
1228 if (nseg != 0) {
1229 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap,
1230 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
1231 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
1232 }
1233
1234 /* We must NOT abort the command here if CAM_REQ_INPROG is not set,
1235 * because command semaphore is already set!
1236 */
1237
1238 ccb->ccb_h.status |= CAM_SIM_QUEUED;
1239 /* timeout handling */
1240 callout_reset_sbt(&gccb->gc_timeout, SBT_1MS * ccb->ccb_h.timeout, 0,
1241 iir_timeout, (caddr_t)gccb, 0);
1242
1243 gdt->sc_copy_cmd(gdt, gccb);
1244 }
1245
1246
1247 static void
1248 iir_action( struct cam_sim *sim, union ccb *ccb )
1249 {
1250 struct gdt_softc *gdt;
1251 int bus, target, lun;
1252
1253 gdt = (struct gdt_softc *)cam_sim_softc( sim );
1254 mtx_assert(&gdt->sc_lock, MA_OWNED);
1255 ccb->ccb_h.ccb_sim_ptr = sim;
1256 bus = cam_sim_bus(sim);
1257 target = ccb->ccb_h.target_id;
1258 lun = ccb->ccb_h.target_lun;
1259 GDT_DPRINTF(GDT_D_CMD,
1260 ("iir_action(%p) func 0x%x cmd 0x%x bus %d target %d lun %d\n",
1261 gdt, ccb->ccb_h.func_code, ccb->csio.cdb_io.cdb_bytes[0],
1262 bus, target, lun));
1263 ++gdt_stat.io_count_act;
1264 if (gdt_stat.io_count_act > gdt_stat.io_count_max)
1265 gdt_stat.io_count_max = gdt_stat.io_count_act;
1266
1267 switch (ccb->ccb_h.func_code) {
1268 case XPT_SCSI_IO:
1269 TAILQ_INSERT_TAIL(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe);
1270 ++gdt_stat.req_queue_act;
1271 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
1272 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
1273 gdt_next(gdt);
1274 break;
1275 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
1276 case XPT_ABORT: /* Abort the specified CCB */
1277 /* XXX Implement */
1278 ccb->ccb_h.status = CAM_REQ_INVALID;
1279 --gdt_stat.io_count_act;
1280 xpt_done(ccb);
1281 break;
1282 case XPT_SET_TRAN_SETTINGS:
1283 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1284 --gdt_stat.io_count_act;
1285 xpt_done(ccb);
1286 break;
1287 case XPT_GET_TRAN_SETTINGS:
1288 /* Get default/user set transfer settings for the target */
1289 {
1290 struct ccb_trans_settings *cts = &ccb->cts;
1291 struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi;
1292 struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
1293
1294 cts->protocol = PROTO_SCSI;
1295 cts->protocol_version = SCSI_REV_2;
1296 cts->transport = XPORT_SPI;
1297 cts->transport_version = 2;
1298
1299 if (cts->type == CTS_TYPE_USER_SETTINGS) {
1300 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
1301 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
1302 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
1303 spi->sync_period = 25; /* 10MHz */
1304 if (spi->sync_period != 0)
1305 spi->sync_offset = 15;
1306
1307 spi->valid = CTS_SPI_VALID_SYNC_RATE
1308 | CTS_SPI_VALID_SYNC_OFFSET
1309 | CTS_SPI_VALID_BUS_WIDTH
1310 | CTS_SPI_VALID_DISC;
1311 scsi->valid = CTS_SCSI_VALID_TQ;
1312 ccb->ccb_h.status = CAM_REQ_CMP;
1313 } else {
1314 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1315 }
1316 --gdt_stat.io_count_act;
1317 xpt_done(ccb);
1318 break;
1319 }
1320 case XPT_CALC_GEOMETRY:
1321 {
1322 struct ccb_calc_geometry *ccg;
1323 u_int32_t secs_per_cylinder;
1324
1325 ccg = &ccb->ccg;
1326 ccg->heads = gdt->sc_hdr[target].hd_heads;
1327 ccg->secs_per_track = gdt->sc_hdr[target].hd_secs;
1328 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
1329 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
1330 ccb->ccb_h.status = CAM_REQ_CMP;
1331 --gdt_stat.io_count_act;
1332 xpt_done(ccb);
1333 break;
1334 }
1335 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
1336 {
1337 /* XXX Implement */
1338 ccb->ccb_h.status = CAM_REQ_CMP;
1339 --gdt_stat.io_count_act;
1340 xpt_done(ccb);
1341 break;
1342 }
1343 case XPT_TERM_IO: /* Terminate the I/O process */
1344 /* XXX Implement */
1345 ccb->ccb_h.status = CAM_REQ_INVALID;
1346 --gdt_stat.io_count_act;
1347 xpt_done(ccb);
1348 break;
1349 case XPT_PATH_INQ: /* Path routing inquiry */
1350 {
1351 struct ccb_pathinq *cpi = &ccb->cpi;
1352
1353 cpi->version_num = 1;
1354 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
1355 cpi->hba_inquiry |= PI_WIDE_16;
1356 cpi->target_sprt = 1;
1357 cpi->hba_misc = 0;
1358 cpi->hba_eng_cnt = 0;
1359 if (bus == gdt->sc_virt_bus)
1360 cpi->max_target = GDT_MAX_HDRIVES - 1;
1361 else if (gdt->sc_class & GDT_FC)
1362 cpi->max_target = GDT_MAXID_FC - 1;
1363 else
1364 cpi->max_target = GDT_MAXID - 1;
1365 cpi->max_lun = 7;
1366 cpi->unit_number = cam_sim_unit(sim);
1367 cpi->bus_id = bus;
1368 cpi->initiator_id =
1369 (bus == gdt->sc_virt_bus ? 127 : gdt->sc_bus_id[bus]);
1370 cpi->base_transfer_speed = 3300;
1371 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1372 if (gdt->sc_vendor == INTEL_VENDOR_ID_IIR)
1373 strlcpy(cpi->hba_vid, "Intel Corp.", HBA_IDLEN);
1374 else
1375 strlcpy(cpi->hba_vid, "ICP vortex ", HBA_IDLEN);
1376 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1377 cpi->transport = XPORT_SPI;
1378 cpi->transport_version = 2;
1379 cpi->protocol = PROTO_SCSI;
1380 cpi->protocol_version = SCSI_REV_2;
1381 cpi->ccb_h.status = CAM_REQ_CMP;
1382 --gdt_stat.io_count_act;
1383 xpt_done(ccb);
1384 break;
1385 }
1386 default:
1387 GDT_DPRINTF(GDT_D_INVALID, ("gdt_next(%p) cmd 0x%x invalid\n",
1388 gdt, ccb->ccb_h.func_code));
1389 ccb->ccb_h.status = CAM_REQ_INVALID;
1390 --gdt_stat.io_count_act;
1391 xpt_done(ccb);
1392 break;
1393 }
1394 }
1395
1396 static void
1397 iir_poll( struct cam_sim *sim )
1398 {
1399 struct gdt_softc *gdt;
1400
1401 gdt = (struct gdt_softc *)cam_sim_softc( sim );
1402 GDT_DPRINTF(GDT_D_CMD, ("iir_poll sim %p gdt %p\n", sim, gdt));
1403 iir_intr_locked(gdt);
1404 }
1405
1406 static void
1407 iir_timeout(void *arg)
1408 {
1409 GDT_DPRINTF(GDT_D_TIMEOUT, ("iir_timeout(%p)\n", gccb));
1410 }
1411
1412 static void
1413 iir_shutdown( void *arg, int howto )
1414 {
1415 struct gdt_softc *gdt;
1416 struct gdt_ccb *gccb;
1417 gdt_ucmd_t *ucmd;
1418 int i;
1419
1420 gdt = (struct gdt_softc *)arg;
1421 GDT_DPRINTF(GDT_D_CMD, ("iir_shutdown(%p, %d)\n", gdt, howto));
1422
1423 device_printf(gdt->sc_devnode,
1424 "Flushing all Host Drives. Please wait ... ");
1425
1426 /* allocate ucmd buffer */
1427 ucmd = malloc(sizeof(gdt_ucmd_t), M_GDTBUF, M_NOWAIT);
1428 if (ucmd == NULL) {
1429 printf("\n");
1430 device_printf(gdt->sc_devnode,
1431 "iir_shutdown(): Cannot allocate resource\n");
1432 return;
1433 }
1434 bzero(ucmd, sizeof(gdt_ucmd_t));
1435
1436 /* wait for pending IOs */
1437 mtx_lock(&gdt->sc_lock);
1438 gdt->sc_state = GDT_SHUTDOWN;
1439 if ((gccb = SLIST_FIRST(&gdt->sc_pending_gccb)) != NULL)
1440 mtx_sleep(gccb, &gdt->sc_lock, PCATCH | PRIBIO, "iirshw", 100 * hz);
1441
1442 /* flush */
1443 for (i = 0; i < GDT_MAX_HDRIVES; ++i) {
1444 if (gdt->sc_hdr[i].hd_present) {
1445 ucmd->service = GDT_CACHESERVICE;
1446 ucmd->OpCode = GDT_FLUSH;
1447 ucmd->u.cache.DeviceNo = i;
1448 TAILQ_INSERT_TAIL(&gdt->sc_ucmd_queue, ucmd, links);
1449 ucmd->complete_flag = FALSE;
1450 gdt_next(gdt);
1451 if (!ucmd->complete_flag)
1452 mtx_sleep(ucmd, &gdt->sc_lock, PCATCH | PRIBIO, "iirshw",
1453 10 * hz);
1454 }
1455 }
1456 mtx_unlock(&gdt->sc_lock);
1457
1458 free(ucmd, M_DEVBUF);
1459 printf("Done.\n");
1460 }
1461
1462 void
1463 iir_intr(void *arg)
1464 {
1465 struct gdt_softc *gdt = arg;
1466
1467 mtx_lock(&gdt->sc_lock);
1468 iir_intr_locked(gdt);
1469 mtx_unlock(&gdt->sc_lock);
1470 }
1471
1472 int
1473 iir_intr_locked(struct gdt_softc *gdt)
1474 {
1475 struct gdt_intr_ctx ctx;
1476 struct gdt_ccb *gccb;
1477 gdt_ucmd_t *ucmd;
1478 u_int32_t cnt;
1479
1480 GDT_DPRINTF(GDT_D_INTR, ("gdt_intr(%p)\n", gdt));
1481
1482 mtx_assert(&gdt->sc_lock, MA_OWNED);
1483
1484 /* If polling and we were not called from gdt_wait, just return */
1485 if ((gdt->sc_state & GDT_POLLING) &&
1486 !(gdt->sc_state & GDT_POLL_WAIT))
1487 return (0);
1488
1489 ctx.istatus = gdt->sc_get_status(gdt);
1490 if (ctx.istatus == 0x00) {
1491 gdt->sc_status = GDT_S_NO_STATUS;
1492 return (ctx.istatus);
1493 }
1494
1495 gdt->sc_intr(gdt, &ctx);
1496
1497 gdt->sc_status = ctx.cmd_status;
1498 gdt->sc_service = ctx.service;
1499 gdt->sc_info = ctx.info;
1500 gdt->sc_info2 = ctx.info2;
1501
1502 if (ctx.istatus == GDT_ASYNCINDEX) {
1503 gdt_async_event(gdt, ctx.service);
1504 return (ctx.istatus);
1505 }
1506 if (ctx.istatus == GDT_SPEZINDEX) {
1507 GDT_DPRINTF(GDT_D_INVALID,
1508 ("%s: Service unknown or not initialized!\n",
1509 device_get_nameunit(gdt->sc_devnode)));
1510 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver);
1511 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum;
1512 gdt_store_event(GDT_ES_DRIVER, 4, &gdt->sc_dvr);
1513 return (ctx.istatus);
1514 }
1515
1516 gccb = &gdt->sc_gccbs[ctx.istatus - 2];
1517 ctx.service = gccb->gc_service;
1518
1519 switch (gccb->gc_flags) {
1520 case GDT_GCF_UNUSED:
1521 GDT_DPRINTF(GDT_D_INVALID, ("%s: Index (%d) to unused command!\n",
1522 device_get_nameunit(gdt->sc_devnode), ctx.istatus));
1523 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver);
1524 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum;
1525 gdt->sc_dvr.eu.driver.index = ctx.istatus;
1526 gdt_store_event(GDT_ES_DRIVER, 1, &gdt->sc_dvr);
1527 gdt_free_ccb(gdt, gccb);
1528 break;
1529
1530 case GDT_GCF_INTERNAL:
1531 break;
1532
1533 case GDT_GCF_IOCTL:
1534 ucmd = gccb->gc_ucmd;
1535 if (gdt->sc_status == GDT_S_BSY) {
1536 GDT_DPRINTF(GDT_D_DEBUG, ("iir_intr(%p) ioctl: gccb %p busy\n",
1537 gdt, gccb));
1538 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links);
1539 } else {
1540 ucmd->status = gdt->sc_status;
1541 ucmd->info = gdt->sc_info;
1542 ucmd->complete_flag = TRUE;
1543 if (ucmd->service == GDT_CACHESERVICE) {
1544 if (ucmd->OpCode == GDT_IOCTL) {
1545 cnt = ucmd->u.ioctl.param_size;
1546 if (cnt != 0)
1547 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1548 } else {
1549 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE;
1550 if (cnt != 0)
1551 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1552 }
1553 } else {
1554 cnt = ucmd->u.raw.sdlen;
1555 if (cnt != 0)
1556 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1557 if (ucmd->u.raw.sense_len != 0)
1558 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1559 }
1560 gdt_free_ccb(gdt, gccb);
1561 /* wakeup */
1562 wakeup(ucmd);
1563 }
1564 gdt_next(gdt);
1565 break;
1566
1567 default:
1568 gdt_free_ccb(gdt, gccb);
1569 gdt_sync_event(gdt, ctx.service, ctx.istatus, gccb);
1570 gdt_next(gdt);
1571 break;
1572 }
1573
1574 return (ctx.istatus);
1575 }
1576
1577 int
1578 gdt_async_event(struct gdt_softc *gdt, int service)
1579 {
1580 struct gdt_ccb *gccb;
1581
1582 GDT_DPRINTF(GDT_D_INTR, ("gdt_async_event(%p, %d)\n", gdt, service));
1583
1584 if (service == GDT_SCREENSERVICE) {
1585 if (gdt->sc_status == GDT_MSG_REQUEST) {
1586 while (gdt->sc_test_busy(gdt))
1587 DELAY(1);
1588 gccb = gdt_get_ccb(gdt);
1589 if (gccb == NULL) {
1590 device_printf(gdt->sc_devnode, "No free command index found\n");
1591 return (1);
1592 }
1593 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1594 gccb->gc_service = service;
1595 gccb->gc_flags = GDT_GCF_SCREEN;
1596 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1597 gccb->gc_cmd_index);
1598 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ);
1599 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE,
1600 GDT_MSG_INV_HANDLE);
1601 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR,
1602 gccb->gc_scratch_busbase);
1603 gdt->sc_set_sema0(gdt);
1604 gdt->sc_cmd_off = 0;
1605 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ,
1606 sizeof(u_int32_t));
1607 gdt->sc_cmd_cnt = 0;
1608 gdt->sc_copy_cmd(gdt, gccb);
1609 device_printf(gdt->sc_devnode, "[PCI %d/%d] ", gdt->sc_bus,
1610 gdt->sc_slot);
1611 gdt->sc_release_event(gdt);
1612 }
1613
1614 } else {
1615 if ((gdt->sc_fw_vers & 0xff) >= 0x1a) {
1616 gdt->sc_dvr.size = 0;
1617 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum;
1618 gdt->sc_dvr.eu.async.status = gdt->sc_status;
1619 /* severity and event_string already set! */
1620 } else {
1621 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.async);
1622 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum;
1623 gdt->sc_dvr.eu.async.service = service;
1624 gdt->sc_dvr.eu.async.status = gdt->sc_status;
1625 gdt->sc_dvr.eu.async.info = gdt->sc_info;
1626 *(u_int32_t *)gdt->sc_dvr.eu.async.scsi_coord = gdt->sc_info2;
1627 }
1628 gdt_store_event(GDT_ES_ASYNC, service, &gdt->sc_dvr);
1629 device_printf(gdt->sc_devnode, "%s\n", gdt->sc_dvr.event_string);
1630 }
1631
1632 return (0);
1633 }
1634
1635 int
1636 gdt_sync_event(struct gdt_softc *gdt, int service,
1637 u_int8_t index, struct gdt_ccb *gccb)
1638 {
1639 union ccb *ccb;
1640
1641 GDT_DPRINTF(GDT_D_INTR,
1642 ("gdt_sync_event(%p, %d, %d, %p)\n", gdt,service,index,gccb));
1643
1644 ccb = gccb->gc_ccb;
1645
1646 if (service == GDT_SCREENSERVICE) {
1647 u_int32_t msg_len;
1648
1649 msg_len = gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_LEN);
1650 if (msg_len)
1651 if (!(gccb->gc_scratch[GDT_SCR_MSG_ANSWER] &&
1652 gccb->gc_scratch[GDT_SCR_MSG_EXT])) {
1653 gccb->gc_scratch[GDT_SCR_MSG_TEXT + msg_len] = '\0';
1654 printf("%s",&gccb->gc_scratch[GDT_SCR_MSG_TEXT]);
1655 }
1656
1657 if (gccb->gc_scratch[GDT_SCR_MSG_EXT] &&
1658 !gccb->gc_scratch[GDT_SCR_MSG_ANSWER]) {
1659 while (gdt->sc_test_busy(gdt))
1660 DELAY(1);
1661 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1662 gccb = gdt_get_ccb(gdt);
1663 if (gccb == NULL) {
1664 device_printf(gdt->sc_devnode, "No free command index found\n");
1665 return (1);
1666 }
1667 gccb->gc_service = service;
1668 gccb->gc_flags = GDT_GCF_SCREEN;
1669 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1670 gccb->gc_cmd_index);
1671 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ);
1672 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE,
1673 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]);
1674 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR,
1675 gccb->gc_scratch_busbase);
1676 gdt->sc_set_sema0(gdt);
1677 gdt->sc_cmd_off = 0;
1678 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ,
1679 sizeof(u_int32_t));
1680 gdt->sc_cmd_cnt = 0;
1681 gdt->sc_copy_cmd(gdt, gccb);
1682 gdt->sc_release_event(gdt);
1683 return (0);
1684 }
1685
1686 if (gccb->gc_scratch[GDT_SCR_MSG_ANSWER] &&
1687 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN)) {
1688 /* default answers (getchar() not possible) */
1689 if (gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) == 1) {
1690 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 0);
1691 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 1);
1692 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 0;
1693 } else {
1694 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN,
1695 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) - 2);
1696 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 2);
1697 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 1;
1698 gccb->gc_scratch[GDT_SCR_MSG_TEXT + 1] = 0;
1699 }
1700 gccb->gc_scratch[GDT_SCR_MSG_EXT] = 0;
1701 gccb->gc_scratch[GDT_SCR_MSG_ANSWER] = 0;
1702 while (gdt->sc_test_busy(gdt))
1703 DELAY(1);
1704 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1705 gccb = gdt_get_ccb(gdt);
1706 if (gccb == NULL) {
1707 device_printf(gdt->sc_devnode, "No free command index found\n");
1708 return (1);
1709 }
1710 gccb->gc_service = service;
1711 gccb->gc_flags = GDT_GCF_SCREEN;
1712 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1713 gccb->gc_cmd_index);
1714 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE);
1715 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE,
1716 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]);
1717 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR,
1718 gccb->gc_scratch_busbase);
1719 gdt->sc_set_sema0(gdt);
1720 gdt->sc_cmd_off = 0;
1721 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ,
1722 sizeof(u_int32_t));
1723 gdt->sc_cmd_cnt = 0;
1724 gdt->sc_copy_cmd(gdt, gccb);
1725 gdt->sc_release_event(gdt);
1726 return (0);
1727 }
1728 printf("\n");
1729 return (0);
1730 } else {
1731 callout_stop(&gccb->gc_timeout);
1732 if (gdt->sc_status == GDT_S_BSY) {
1733 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_sync_event(%p) gccb %p busy\n",
1734 gdt, gccb));
1735 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe);
1736 ++gdt_stat.req_queue_act;
1737 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
1738 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
1739 return (2);
1740 }
1741
1742 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap,
1743 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
1744 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1745 bus_dmamap_unload(gdt->sc_buffer_dmat, gccb->gc_dmamap);
1746
1747 ccb->csio.resid = 0;
1748 if (gdt->sc_status == GDT_S_OK) {
1749 ccb->ccb_h.status |= CAM_REQ_CMP;
1750 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1751 } else {
1752 /* error */
1753 if (gccb->gc_service == GDT_CACHESERVICE) {
1754 struct scsi_sense_data *sense;
1755
1756 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID;
1757 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1758 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
1759 bzero(&ccb->csio.sense_data, ccb->csio.sense_len);
1760 sense = &ccb->csio.sense_data;
1761 scsi_set_sense_data(sense,
1762 /*sense_format*/ SSD_TYPE_NONE,
1763 /*current_error*/ 1,
1764 /*sense_key*/ SSD_KEY_NOT_READY,
1765 /*asc*/ 0x4,
1766 /*ascq*/ 0x01,
1767 SSD_ELEM_NONE);
1768
1769 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.sync);
1770 gdt->sc_dvr.eu.sync.ionode = gdt->sc_hanum;
1771 gdt->sc_dvr.eu.sync.service = service;
1772 gdt->sc_dvr.eu.sync.status = gdt->sc_status;
1773 gdt->sc_dvr.eu.sync.info = gdt->sc_info;
1774 gdt->sc_dvr.eu.sync.hostdrive = ccb->ccb_h.target_id;
1775 if (gdt->sc_status >= 0x8000)
1776 gdt_store_event(GDT_ES_SYNC, 0, &gdt->sc_dvr);
1777 else
1778 gdt_store_event(GDT_ES_SYNC, service, &gdt->sc_dvr);
1779 } else {
1780 /* raw service */
1781 if (gdt->sc_status != GDT_S_RAW_SCSI || gdt->sc_info >= 0x100) {
1782 ccb->ccb_h.status = CAM_DEV_NOT_THERE;
1783 } else {
1784 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR|CAM_AUTOSNS_VALID;
1785 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1786 ccb->csio.scsi_status = gdt->sc_info;
1787 bcopy(gccb->gc_scratch, &ccb->csio.sense_data,
1788 ccb->csio.sense_len);
1789 }
1790 }
1791 }
1792 --gdt_stat.io_count_act;
1793 xpt_done(ccb);
1794 }
1795 return (0);
1796 }
1797
1798 /* Controller event handling functions */
1799 void gdt_store_event(u_int16_t source, u_int16_t idx,
1800 gdt_evt_data *evt)
1801 {
1802 gdt_evt_str *e;
1803 struct timeval tv;
1804
1805 GDT_DPRINTF(GDT_D_MISC, ("gdt_store_event(%d, %d)\n", source, idx));
1806 if (source == 0) /* no source -> no event */
1807 return;
1808
1809 mtx_lock(&elock);
1810 if (ebuffer[elastidx].event_source == source &&
1811 ebuffer[elastidx].event_idx == idx &&
1812 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
1813 !memcmp((char *)&ebuffer[elastidx].event_data.eu,
1814 (char *)&evt->eu, evt->size)) ||
1815 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
1816 !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
1817 (char *)&evt->event_string)))) {
1818 e = &ebuffer[elastidx];
1819 getmicrotime(&tv);
1820 e->last_stamp = tv.tv_sec;
1821 ++e->same_count;
1822 } else {
1823 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */
1824 ++elastidx;
1825 if (elastidx == GDT_MAX_EVENTS)
1826 elastidx = 0;
1827 if (elastidx == eoldidx) { /* reached mark ? */
1828 ++eoldidx;
1829 if (eoldidx == GDT_MAX_EVENTS)
1830 eoldidx = 0;
1831 }
1832 }
1833 e = &ebuffer[elastidx];
1834 e->event_source = source;
1835 e->event_idx = idx;
1836 getmicrotime(&tv);
1837 e->first_stamp = e->last_stamp = tv.tv_sec;
1838 e->same_count = 1;
1839 e->event_data = *evt;
1840 e->application = 0;
1841 }
1842 mtx_unlock(&elock);
1843 }
1844
1845 int gdt_read_event(int handle, gdt_evt_str *estr)
1846 {
1847 gdt_evt_str *e;
1848 int eindex;
1849
1850 GDT_DPRINTF(GDT_D_MISC, ("gdt_read_event(%d)\n", handle));
1851 mtx_lock(&elock);
1852 if (handle == -1)
1853 eindex = eoldidx;
1854 else
1855 eindex = handle;
1856 estr->event_source = 0;
1857
1858 if (eindex >= GDT_MAX_EVENTS) {
1859 mtx_unlock(&elock);
1860 return eindex;
1861 }
1862 e = &ebuffer[eindex];
1863 if (e->event_source != 0) {
1864 if (eindex != elastidx) {
1865 if (++eindex == GDT_MAX_EVENTS)
1866 eindex = 0;
1867 } else {
1868 eindex = -1;
1869 }
1870 memcpy(estr, e, sizeof(gdt_evt_str));
1871 }
1872 mtx_unlock(&elock);
1873 return eindex;
1874 }
1875
1876 void gdt_readapp_event(u_int8_t application, gdt_evt_str *estr)
1877 {
1878 gdt_evt_str *e;
1879 int found = FALSE;
1880 int eindex;
1881
1882 GDT_DPRINTF(GDT_D_MISC, ("gdt_readapp_event(%d)\n", application));
1883 mtx_lock(&elock);
1884 eindex = eoldidx;
1885 for (;;) {
1886 e = &ebuffer[eindex];
1887 if (e->event_source == 0)
1888 break;
1889 if ((e->application & application) == 0) {
1890 e->application |= application;
1891 found = TRUE;
1892 break;
1893 }
1894 if (eindex == elastidx)
1895 break;
1896 if (++eindex == GDT_MAX_EVENTS)
1897 eindex = 0;
1898 }
1899 if (found)
1900 memcpy(estr, e, sizeof(gdt_evt_str));
1901 else
1902 estr->event_source = 0;
1903 mtx_unlock(&elock);
1904 }
1905
1906 void gdt_clear_events()
1907 {
1908 GDT_DPRINTF(GDT_D_MISC, ("gdt_clear_events\n"));
1909
1910 mtx_lock(&elock);
1911 eoldidx = elastidx = 0;
1912 ebuffer[0].event_source = 0;
1913 mtx_unlock(&elock);
1914 }
Cache object: 1cf397e65c04432b6b972575e6a98458
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