Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/iir/iir.c
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1 /*- 2 * Copyright (c) 2000-04 ICP vortex GmbH 3 * Copyright (c) 2002-04 Intel Corporation 4 * Copyright (c) 2003-04 Adaptec Inc. 5 * All Rights Reserved 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 /* 33 * iir.c: SCSI dependant code for the Intel Integrated RAID Controller driver 34 * 35 * Written by: Achim Leubner <achim_leubner@adaptec.com> 36 * Fixes/Additions: Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com> 37 * 38 * credits: Niklas Hallqvist; OpenBSD driver for the ICP Controllers. 39 * Mike Smith; Some driver source code. 40 * FreeBSD.ORG; Great O/S to work on and for. 41 * 42 * $Id: iir.c 1.5 2004/03/30 10:17:53 achim Exp $" 43 */ 44 45 #include <sys/cdefs.h> 46 __FBSDID("$FreeBSD: releng/6.0/sys/dev/iir/iir.c 146734 2005-05-29 04:42:30Z nyan $"); 47 48 #define _IIR_C_ 49 50 /* #include "opt_iir.h" */ 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/endian.h> 54 #include <sys/eventhandler.h> 55 #include <sys/malloc.h> 56 #include <sys/kernel.h> 57 #include <sys/bus.h> 58 59 #include <machine/bus.h> 60 #include <machine/clock.h> 61 #include <machine/stdarg.h> 62 63 #include <cam/cam.h> 64 #include <cam/cam_ccb.h> 65 #include <cam/cam_sim.h> 66 #include <cam/cam_xpt_sim.h> 67 #include <cam/cam_debug.h> 68 #include <cam/scsi/scsi_all.h> 69 #include <cam/scsi/scsi_message.h> 70 71 #include <vm/vm.h> 72 #include <vm/pmap.h> 73 74 #include <dev/iir/iir.h> 75 76 struct gdt_softc *gdt_wait_gdt; 77 int gdt_wait_index; 78 79 #ifdef GDT_DEBUG 80 int gdt_debug = GDT_DEBUG; 81 #ifdef __SERIAL__ 82 #define MAX_SERBUF 160 83 static void ser_init(void); 84 static void ser_puts(char *str); 85 static void ser_putc(int c); 86 static char strbuf[MAX_SERBUF+1]; 87 #ifdef __COM2__ 88 #define COM_BASE 0x2f8 89 #else 90 #define COM_BASE 0x3f8 91 #endif 92 static void ser_init() 93 { 94 unsigned port=COM_BASE; 95 96 outb(port+3, 0x80); 97 outb(port+1, 0); 98 /* 19200 Baud, if 9600: outb(12,port) */ 99 outb(port, 6); 100 outb(port+3, 3); 101 outb(port+1, 0); 102 } 103 104 static void ser_puts(char *str) 105 { 106 char *ptr; 107 108 ser_init(); 109 for (ptr=str;*ptr;++ptr) 110 ser_putc((int)(*ptr)); 111 } 112 113 static void ser_putc(int c) 114 { 115 unsigned port=COM_BASE; 116 117 while ((inb(port+5) & 0x20)==0); 118 outb(port, c); 119 if (c==0x0a) 120 { 121 while ((inb(port+5) & 0x20)==0); 122 outb(port, 0x0d); 123 } 124 } 125 126 int ser_printf(const char *fmt, ...) 127 { 128 va_list args; 129 int i; 130 131 va_start(args,fmt); 132 i = vsprintf(strbuf,fmt,args); 133 ser_puts(strbuf); 134 va_end(args); 135 return i; 136 } 137 #endif 138 #endif 139 140 /* The linked list of softc structures */ 141 struct gdt_softc_list gdt_softcs = TAILQ_HEAD_INITIALIZER(gdt_softcs); 142 /* controller cnt. */ 143 int gdt_cnt = 0; 144 /* event buffer */ 145 static gdt_evt_str ebuffer[GDT_MAX_EVENTS]; 146 static int elastidx, eoldidx; 147 /* statistics */ 148 gdt_statist_t gdt_stat; 149 150 /* Definitions for our use of the SIM private CCB area */ 151 #define ccb_sim_ptr spriv_ptr0 152 #define ccb_priority spriv_field1 153 154 static void iir_action(struct cam_sim *sim, union ccb *ccb); 155 static void iir_poll(struct cam_sim *sim); 156 static void iir_shutdown(void *arg, int howto); 157 static void iir_timeout(void *arg); 158 static void iir_watchdog(void *arg); 159 160 static void gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, 161 int *secs); 162 static int gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 163 u_int8_t service, u_int16_t opcode, 164 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3); 165 static int gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *ccb, 166 int timeout); 167 168 static struct gdt_ccb *gdt_get_ccb(struct gdt_softc *gdt); 169 static u_int32_t gdt_ccb_vtop(struct gdt_softc *gdt, 170 struct gdt_ccb *gccb); 171 172 static int gdt_sync_event(struct gdt_softc *gdt, int service, 173 u_int8_t index, struct gdt_ccb *gccb); 174 static int gdt_async_event(struct gdt_softc *gdt, int service); 175 static struct gdt_ccb *gdt_raw_cmd(struct gdt_softc *gdt, 176 union ccb *ccb, int *lock); 177 static struct gdt_ccb *gdt_cache_cmd(struct gdt_softc *gdt, 178 union ccb *ccb, int *lock); 179 static struct gdt_ccb *gdt_ioctl_cmd(struct gdt_softc *gdt, 180 gdt_ucmd_t *ucmd, int *lock); 181 static void gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb); 182 183 static void gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, 184 int nseg, int error); 185 static void gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, 186 int nseg, int error); 187 188 int 189 iir_init(struct gdt_softc *gdt) 190 { 191 u_int16_t cdev_cnt; 192 int i, id, drv_cyls, drv_hds, drv_secs; 193 struct gdt_ccb *gccb; 194 195 GDT_DPRINTF(GDT_D_DEBUG, ("iir_init()\n")); 196 197 gdt->sc_state = GDT_POLLING; 198 gdt_clear_events(); 199 bzero(&gdt_stat, sizeof(gdt_statist_t)); 200 201 SLIST_INIT(&gdt->sc_free_gccb); 202 SLIST_INIT(&gdt->sc_pending_gccb); 203 TAILQ_INIT(&gdt->sc_ccb_queue); 204 TAILQ_INIT(&gdt->sc_ucmd_queue); 205 TAILQ_INSERT_TAIL(&gdt_softcs, gdt, links); 206 207 /* DMA tag for mapping buffers into device visible space. */ 208 if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0, 209 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 210 /*highaddr*/BUS_SPACE_MAXADDR, 211 /*filter*/NULL, /*filterarg*/NULL, 212 /*maxsize*/MAXBSIZE, /*nsegments*/GDT_MAXSG, 213 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 214 /*flags*/BUS_DMA_ALLOCNOW, 215 /*lockfunc*/busdma_lock_mutex, /*lockarg*/&Giant, 216 &gdt->sc_buffer_dmat) != 0) { 217 printf("iir%d: bus_dma_tag_create(...,gdt->sc_buffer_dmat) failed\n", 218 gdt->sc_hanum); 219 return (1); 220 } 221 gdt->sc_init_level++; 222 223 /* DMA tag for our ccb structures */ 224 if (bus_dma_tag_create(gdt->sc_parent_dmat, 225 /*alignment*/1, 226 /*boundary*/0, 227 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 228 /*highaddr*/BUS_SPACE_MAXADDR, 229 /*filter*/NULL, 230 /*filterarg*/NULL, 231 GDT_MAXCMDS * sizeof(struct gdt_ccb), /* maxsize */ 232 /*nsegments*/1, 233 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 234 /*flags*/0, /*lockfunc*/busdma_lock_mutex, 235 /*lockarg*/&Giant, &gdt->sc_gccb_dmat) != 0) { 236 printf("iir%d: bus_dma_tag_create(...,gdt->sc_gccb_dmat) failed\n", 237 gdt->sc_hanum); 238 return (1); 239 } 240 gdt->sc_init_level++; 241 242 /* Allocation for our ccbs */ 243 if (bus_dmamem_alloc(gdt->sc_gccb_dmat, (void **)&gdt->sc_gccbs, 244 BUS_DMA_NOWAIT, &gdt->sc_gccb_dmamap) != 0) { 245 printf("iir%d: bus_dmamem_alloc(...,&gdt->sc_gccbs,...) failed\n", 246 gdt->sc_hanum); 247 return (1); 248 } 249 gdt->sc_init_level++; 250 251 /* And permanently map them */ 252 bus_dmamap_load(gdt->sc_gccb_dmat, gdt->sc_gccb_dmamap, 253 gdt->sc_gccbs, GDT_MAXCMDS * sizeof(struct gdt_ccb), 254 gdtmapmem, &gdt->sc_gccb_busbase, /*flags*/0); 255 gdt->sc_init_level++; 256 257 /* Clear them out. */ 258 bzero(gdt->sc_gccbs, GDT_MAXCMDS * sizeof(struct gdt_ccb)); 259 260 /* Initialize the ccbs */ 261 for (i = GDT_MAXCMDS-1; i >= 0; i--) { 262 gdt->sc_gccbs[i].gc_cmd_index = i + 2; 263 gdt->sc_gccbs[i].gc_flags = GDT_GCF_UNUSED; 264 gdt->sc_gccbs[i].gc_map_flag = FALSE; 265 if (bus_dmamap_create(gdt->sc_buffer_dmat, /*flags*/0, 266 &gdt->sc_gccbs[i].gc_dmamap) != 0) 267 return(1); 268 gdt->sc_gccbs[i].gc_map_flag = TRUE; 269 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, &gdt->sc_gccbs[i], sle); 270 } 271 gdt->sc_init_level++; 272 273 /* create the control device */ 274 gdt->sc_dev = gdt_make_dev(gdt->sc_hanum); 275 276 /* allocate ccb for gdt_internal_cmd() */ 277 gccb = gdt_get_ccb(gdt); 278 if (gccb == NULL) { 279 printf("iir%d: No free command index found\n", 280 gdt->sc_hanum); 281 return (1); 282 } 283 284 if (!gdt_internal_cmd(gdt, gccb, GDT_SCREENSERVICE, GDT_INIT, 285 0, 0, 0)) { 286 printf("iir%d: Screen service initialization error %d\n", 287 gdt->sc_hanum, gdt->sc_status); 288 gdt_free_ccb(gdt, gccb); 289 return (1); 290 } 291 292 gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_UNFREEZE_IO, 293 0, 0, 0); 294 295 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INIT, 296 GDT_LINUX_OS, 0, 0)) { 297 printf("iir%d: Cache service initialization error %d\n", 298 gdt->sc_hanum, gdt->sc_status); 299 gdt_free_ccb(gdt, gccb); 300 return (1); 301 } 302 cdev_cnt = (u_int16_t)gdt->sc_info; 303 gdt->sc_fw_vers = gdt->sc_service; 304 305 /* Detect number of buses */ 306 gdt_enc32(gccb->gc_scratch + GDT_IOC_VERSION, GDT_IOC_NEWEST); 307 gccb->gc_scratch[GDT_IOC_LIST_ENTRIES] = GDT_MAXBUS; 308 gccb->gc_scratch[GDT_IOC_FIRST_CHAN] = 0; 309 gccb->gc_scratch[GDT_IOC_LAST_CHAN] = GDT_MAXBUS - 1; 310 gdt_enc32(gccb->gc_scratch + GDT_IOC_LIST_OFFSET, GDT_IOC_HDR_SZ); 311 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 312 GDT_IOCHAN_RAW_DESC, GDT_INVALID_CHANNEL, 313 GDT_IOC_HDR_SZ + GDT_MAXBUS * GDT_RAWIOC_SZ)) { 314 gdt->sc_bus_cnt = gccb->gc_scratch[GDT_IOC_CHAN_COUNT]; 315 for (i = 0; i < gdt->sc_bus_cnt; i++) { 316 id = gccb->gc_scratch[GDT_IOC_HDR_SZ + 317 i * GDT_RAWIOC_SZ + GDT_RAWIOC_PROC_ID]; 318 gdt->sc_bus_id[i] = id < GDT_MAXID_FC ? id : 0xff; 319 } 320 } else { 321 /* New method failed, use fallback. */ 322 for (i = 0; i < GDT_MAXBUS; i++) { 323 gdt_enc32(gccb->gc_scratch + GDT_GETCH_CHANNEL_NO, i); 324 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 325 GDT_SCSI_CHAN_CNT | GDT_L_CTRL_PATTERN, 326 GDT_IO_CHANNEL | GDT_INVALID_CHANNEL, 327 GDT_GETCH_SZ)) { 328 if (i == 0) { 329 printf("iir%d: Cannot get channel count, " 330 "error %d\n", gdt->sc_hanum, gdt->sc_status); 331 gdt_free_ccb(gdt, gccb); 332 return (1); 333 } 334 break; 335 } 336 gdt->sc_bus_id[i] = 337 (gccb->gc_scratch[GDT_GETCH_SIOP_ID] < GDT_MAXID_FC) ? 338 gccb->gc_scratch[GDT_GETCH_SIOP_ID] : 0xff; 339 } 340 gdt->sc_bus_cnt = i; 341 } 342 /* add one "virtual" channel for the host drives */ 343 gdt->sc_virt_bus = gdt->sc_bus_cnt; 344 gdt->sc_bus_cnt++; 345 346 if (!gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_INIT, 347 0, 0, 0)) { 348 printf("iir%d: Raw service initialization error %d\n", 349 gdt->sc_hanum, gdt->sc_status); 350 gdt_free_ccb(gdt, gccb); 351 return (1); 352 } 353 354 /* Set/get features raw service (scatter/gather) */ 355 gdt->sc_raw_feat = 0; 356 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_SET_FEAT, 357 GDT_SCATTER_GATHER, 0, 0)) { 358 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_GET_FEAT, 359 0, 0, 0)) { 360 gdt->sc_raw_feat = gdt->sc_info; 361 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 362 panic("iir%d: Scatter/Gather Raw Service " 363 "required but not supported!\n", gdt->sc_hanum); 364 gdt_free_ccb(gdt, gccb); 365 return (1); 366 } 367 } 368 } 369 370 /* Set/get features cache service (scatter/gather) */ 371 gdt->sc_cache_feat = 0; 372 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_SET_FEAT, 373 0, GDT_SCATTER_GATHER, 0)) { 374 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_GET_FEAT, 375 0, 0, 0)) { 376 gdt->sc_cache_feat = gdt->sc_info; 377 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 378 panic("iir%d: Scatter/Gather Cache Service " 379 "required but not supported!\n", gdt->sc_hanum); 380 gdt_free_ccb(gdt, gccb); 381 return (1); 382 } 383 } 384 } 385 386 /* OEM */ 387 gdt_enc32(gccb->gc_scratch + GDT_OEM_VERSION, 0x01); 388 gdt_enc32(gccb->gc_scratch + GDT_OEM_BUFSIZE, sizeof(gdt_oem_record_t)); 389 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 390 GDT_OEM_STR_RECORD, GDT_INVALID_CHANNEL, 391 sizeof(gdt_oem_str_record_t))) { 392 strncpy(gdt->oem_name, ((gdt_oem_str_record_t *) 393 gccb->gc_scratch)->text.scsi_host_drive_inquiry_vendor_id, 7); 394 gdt->oem_name[7]='\0'; 395 } else { 396 /* Old method, based on PCI ID */ 397 if (gdt->sc_vendor == INTEL_VENDOR_ID) 398 strcpy(gdt->oem_name,"Intel "); 399 else 400 strcpy(gdt->oem_name,"ICP "); 401 } 402 403 /* Scan for cache devices */ 404 for (i = 0; i < cdev_cnt && i < GDT_MAX_HDRIVES; i++) { 405 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INFO, 406 i, 0, 0)) { 407 gdt->sc_hdr[i].hd_present = 1; 408 gdt->sc_hdr[i].hd_size = gdt->sc_info; 409 410 /* 411 * Evaluate mapping (sectors per head, heads per cyl) 412 */ 413 gdt->sc_hdr[i].hd_size &= ~GDT_SECS32; 414 if (gdt->sc_info2 == 0) 415 gdt_eval_mapping(gdt->sc_hdr[i].hd_size, 416 &drv_cyls, &drv_hds, &drv_secs); 417 else { 418 drv_hds = gdt->sc_info2 & 0xff; 419 drv_secs = (gdt->sc_info2 >> 8) & 0xff; 420 drv_cyls = gdt->sc_hdr[i].hd_size / drv_hds / 421 drv_secs; 422 } 423 gdt->sc_hdr[i].hd_heads = drv_hds; 424 gdt->sc_hdr[i].hd_secs = drv_secs; 425 /* Round the size */ 426 gdt->sc_hdr[i].hd_size = drv_cyls * drv_hds * drv_secs; 427 428 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, 429 GDT_DEVTYPE, i, 0, 0)) 430 gdt->sc_hdr[i].hd_devtype = gdt->sc_info; 431 } 432 } 433 434 GDT_DPRINTF(GDT_D_INIT, ("dpmem %x %d-bus %d cache device%s\n", 435 gdt->sc_dpmembase, 436 gdt->sc_bus_cnt, cdev_cnt, 437 cdev_cnt == 1 ? "" : "s")); 438 gdt_free_ccb(gdt, gccb); 439 440 gdt_cnt++; 441 return (0); 442 } 443 444 void 445 iir_free(struct gdt_softc *gdt) 446 { 447 int i; 448 449 GDT_DPRINTF(GDT_D_INIT, ("iir_free()\n")); 450 451 switch (gdt->sc_init_level) { 452 default: 453 gdt_destroy_dev(gdt->sc_dev); 454 case 5: 455 for (i = GDT_MAXCMDS-1; i >= 0; i--) 456 if (gdt->sc_gccbs[i].gc_map_flag) 457 bus_dmamap_destroy(gdt->sc_buffer_dmat, 458 gdt->sc_gccbs[i].gc_dmamap); 459 bus_dmamap_unload(gdt->sc_gccb_dmat, gdt->sc_gccb_dmamap); 460 case 4: 461 bus_dmamem_free(gdt->sc_gccb_dmat, gdt->sc_gccbs, gdt->sc_gccb_dmamap); 462 case 3: 463 bus_dma_tag_destroy(gdt->sc_gccb_dmat); 464 case 2: 465 bus_dma_tag_destroy(gdt->sc_buffer_dmat); 466 case 1: 467 bus_dma_tag_destroy(gdt->sc_parent_dmat); 468 case 0: 469 break; 470 } 471 TAILQ_REMOVE(&gdt_softcs, gdt, links); 472 } 473 474 void 475 iir_attach(struct gdt_softc *gdt) 476 { 477 struct cam_devq *devq; 478 int i; 479 480 GDT_DPRINTF(GDT_D_INIT, ("iir_attach()\n")); 481 482 /* 483 * Create the device queue for our SIM. 484 */ 485 devq = cam_simq_alloc(GDT_MAXCMDS); 486 if (devq == NULL) 487 return; 488 489 for (i = 0; i < gdt->sc_bus_cnt; i++) { 490 /* 491 * Construct our SIM entry 492 */ 493 gdt->sims[i] = cam_sim_alloc(iir_action, iir_poll, "iir", 494 gdt, gdt->sc_hanum, /*untagged*/2, 495 /*tagged*/GDT_MAXCMDS, devq); 496 if (xpt_bus_register(gdt->sims[i], i) != CAM_SUCCESS) { 497 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0); 498 break; 499 } 500 501 if (xpt_create_path(&gdt->paths[i], /*periph*/NULL, 502 cam_sim_path(gdt->sims[i]), 503 CAM_TARGET_WILDCARD, 504 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 505 xpt_bus_deregister(cam_sim_path(gdt->sims[i])); 506 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0); 507 break; 508 } 509 } 510 if (i > 0) 511 EVENTHANDLER_REGISTER(shutdown_final, iir_shutdown, 512 gdt, SHUTDOWN_PRI_DEFAULT); 513 /* iir_watchdog(gdt); */ 514 gdt->sc_state = GDT_NORMAL; 515 } 516 517 static void 518 gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, int *secs) 519 { 520 *cyls = size / GDT_HEADS / GDT_SECS; 521 if (*cyls < GDT_MAXCYLS) { 522 *heads = GDT_HEADS; 523 *secs = GDT_SECS; 524 } else { 525 /* Too high for 64 * 32 */ 526 *cyls = size / GDT_MEDHEADS / GDT_MEDSECS; 527 if (*cyls < GDT_MAXCYLS) { 528 *heads = GDT_MEDHEADS; 529 *secs = GDT_MEDSECS; 530 } else { 531 /* Too high for 127 * 63 */ 532 *cyls = size / GDT_BIGHEADS / GDT_BIGSECS; 533 *heads = GDT_BIGHEADS; 534 *secs = GDT_BIGSECS; 535 } 536 } 537 } 538 539 static int 540 gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *gccb, 541 int timeout) 542 { 543 int rv = 0; 544 545 GDT_DPRINTF(GDT_D_INIT, 546 ("gdt_wait(%p, %p, %d)\n", gdt, gccb, timeout)); 547 548 gdt->sc_state |= GDT_POLL_WAIT; 549 do { 550 iir_intr(gdt); 551 if (gdt == gdt_wait_gdt && 552 gccb->gc_cmd_index == gdt_wait_index) { 553 rv = 1; 554 break; 555 } 556 DELAY(1); 557 } while (--timeout); 558 gdt->sc_state &= ~GDT_POLL_WAIT; 559 560 while (gdt->sc_test_busy(gdt)) 561 DELAY(1); /* XXX correct? */ 562 563 return (rv); 564 } 565 566 static int 567 gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 568 u_int8_t service, u_int16_t opcode, 569 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3) 570 { 571 int retries; 572 573 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cmd(%p, %d, %d, %d, %d, %d)\n", 574 gdt, service, opcode, arg1, arg2, arg3)); 575 576 bzero(gdt->sc_cmd, GDT_CMD_SZ); 577 578 for (retries = GDT_RETRIES; ; ) { 579 gccb->gc_service = service; 580 gccb->gc_flags = GDT_GCF_INTERNAL; 581 582 gdt->sc_set_sema0(gdt); 583 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 584 gccb->gc_cmd_index); 585 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, opcode); 586 587 switch (service) { 588 case GDT_CACHESERVICE: 589 if (opcode == GDT_IOCTL) { 590 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + 591 GDT_IOCTL_SUBFUNC, arg1); 592 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + 593 GDT_IOCTL_CHANNEL, arg2); 594 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + 595 GDT_IOCTL_PARAM_SIZE, (u_int16_t)arg3); 596 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 597 gdt_ccb_vtop(gdt, gccb) + 598 offsetof(struct gdt_ccb, gc_scratch[0])); 599 } else { 600 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + 601 GDT_CACHE_DEVICENO, (u_int16_t)arg1); 602 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + 603 GDT_CACHE_BLOCKNO, arg2); 604 } 605 break; 606 607 case GDT_SCSIRAWSERVICE: 608 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + 609 GDT_RAW_DIRECTION, arg1); 610 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 611 (u_int8_t)arg2; 612 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 613 (u_int8_t)arg3; 614 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 615 (u_int8_t)(arg3 >> 8); 616 } 617 618 gdt->sc_cmd_len = GDT_CMD_SZ; 619 gdt->sc_cmd_off = 0; 620 gdt->sc_cmd_cnt = 0; 621 gdt->sc_copy_cmd(gdt, gccb); 622 gdt->sc_release_event(gdt); 623 DELAY(20); 624 if (!gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT)) 625 return (0); 626 if (gdt->sc_status != GDT_S_BSY || --retries == 0) 627 break; 628 DELAY(1); 629 } 630 return (gdt->sc_status == GDT_S_OK); 631 } 632 633 static struct gdt_ccb * 634 gdt_get_ccb(struct gdt_softc *gdt) 635 { 636 struct gdt_ccb *gccb; 637 int lock; 638 639 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_get_ccb(%p)\n", gdt)); 640 641 lock = splcam(); 642 gccb = SLIST_FIRST(&gdt->sc_free_gccb); 643 if (gccb != NULL) { 644 SLIST_REMOVE_HEAD(&gdt->sc_free_gccb, sle); 645 SLIST_INSERT_HEAD(&gdt->sc_pending_gccb, gccb, sle); 646 ++gdt_stat.cmd_index_act; 647 if (gdt_stat.cmd_index_act > gdt_stat.cmd_index_max) 648 gdt_stat.cmd_index_max = gdt_stat.cmd_index_act; 649 } 650 splx(lock); 651 return (gccb); 652 } 653 654 void 655 gdt_free_ccb(struct gdt_softc *gdt, struct gdt_ccb *gccb) 656 { 657 int lock; 658 659 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_free_ccb(%p, %p)\n", gdt, gccb)); 660 661 lock = splcam(); 662 gccb->gc_flags = GDT_GCF_UNUSED; 663 SLIST_REMOVE(&gdt->sc_pending_gccb, gccb, gdt_ccb, sle); 664 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle); 665 --gdt_stat.cmd_index_act; 666 splx(lock); 667 if (gdt->sc_state & GDT_SHUTDOWN) 668 wakeup(gccb); 669 } 670 671 static u_int32_t 672 gdt_ccb_vtop(struct gdt_softc *gdt, struct gdt_ccb *gccb) 673 { 674 return (gdt->sc_gccb_busbase 675 + (u_int32_t)((caddr_t)gccb - (caddr_t)gdt->sc_gccbs)); 676 } 677 678 void 679 gdt_next(struct gdt_softc *gdt) 680 { 681 int lock; 682 union ccb *ccb; 683 gdt_ucmd_t *ucmd; 684 struct cam_sim *sim; 685 int bus, target, lun; 686 int next_cmd; 687 688 struct ccb_scsiio *csio; 689 struct ccb_hdr *ccbh; 690 struct gdt_ccb *gccb = NULL; 691 u_int8_t cmd; 692 693 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_next(%p)\n", gdt)); 694 695 lock = splcam(); 696 if (gdt->sc_test_busy(gdt)) { 697 if (!(gdt->sc_state & GDT_POLLING)) { 698 splx(lock); 699 return; 700 } 701 while (gdt->sc_test_busy(gdt)) 702 DELAY(1); 703 } 704 705 gdt->sc_cmd_cnt = gdt->sc_cmd_off = 0; 706 next_cmd = TRUE; 707 for (;;) { 708 /* I/Os in queue? controller ready? */ 709 if (!TAILQ_FIRST(&gdt->sc_ucmd_queue) && 710 !TAILQ_FIRST(&gdt->sc_ccb_queue)) 711 break; 712 713 /* 1.: I/Os without ccb (IOCTLs) */ 714 ucmd = TAILQ_FIRST(&gdt->sc_ucmd_queue); 715 if (ucmd != NULL) { 716 TAILQ_REMOVE(&gdt->sc_ucmd_queue, ucmd, links); 717 if ((gccb = gdt_ioctl_cmd(gdt, ucmd, &lock)) == NULL) { 718 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 719 break; 720 } 721 break; 722 /* wenn mehrere Kdos. zulassen: if (!gdt_polling) continue; */ 723 } 724 725 /* 2.: I/Os with ccb */ 726 ccb = (union ccb *)TAILQ_FIRST(&gdt->sc_ccb_queue); 727 /* ist dann immer != NULL, da oben getestet */ 728 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 729 bus = cam_sim_bus(sim); 730 target = ccb->ccb_h.target_id; 731 lun = ccb->ccb_h.target_lun; 732 733 TAILQ_REMOVE(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 734 --gdt_stat.req_queue_act; 735 /* ccb->ccb_h.func_code is XPT_SCSI_IO */ 736 GDT_DPRINTF(GDT_D_QUEUE, ("XPT_SCSI_IO flags 0x%x)\n", 737 ccb->ccb_h.flags)); 738 csio = &ccb->csio; 739 ccbh = &ccb->ccb_h; 740 cmd = csio->cdb_io.cdb_bytes[0]; 741 /* Max CDB length is 12 bytes */ 742 if (csio->cdb_len > 12) { 743 ccbh->status = CAM_REQ_INVALID; 744 --gdt_stat.io_count_act; 745 xpt_done(ccb); 746 } else if (bus != gdt->sc_virt_bus) { 747 /* raw service command */ 748 if ((gccb = gdt_raw_cmd(gdt, ccb, &lock)) == NULL) { 749 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 750 sim_links.tqe); 751 ++gdt_stat.req_queue_act; 752 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 753 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 754 next_cmd = FALSE; 755 } 756 } else if (target >= GDT_MAX_HDRIVES || 757 !gdt->sc_hdr[target].hd_present || lun != 0) { 758 ccbh->status = CAM_DEV_NOT_THERE; 759 --gdt_stat.io_count_act; 760 xpt_done(ccb); 761 } else { 762 /* cache service command */ 763 if (cmd == READ_6 || cmd == WRITE_6 || 764 cmd == READ_10 || cmd == WRITE_10) { 765 if ((gccb = gdt_cache_cmd(gdt, ccb, &lock)) == NULL) { 766 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 767 sim_links.tqe); 768 ++gdt_stat.req_queue_act; 769 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 770 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 771 next_cmd = FALSE; 772 } 773 } else { 774 splx(lock); 775 gdt_internal_cache_cmd(gdt, ccb); 776 lock = splcam(); 777 } 778 } 779 if ((gdt->sc_state & GDT_POLLING) || !next_cmd) 780 break; 781 } 782 if (gdt->sc_cmd_cnt > 0) 783 gdt->sc_release_event(gdt); 784 785 splx(lock); 786 787 if ((gdt->sc_state & GDT_POLLING) && gdt->sc_cmd_cnt > 0) { 788 gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT); 789 } 790 } 791 792 static struct gdt_ccb * 793 gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb, int *lock) 794 { 795 struct gdt_ccb *gccb; 796 struct cam_sim *sim; 797 798 GDT_DPRINTF(GDT_D_CMD, ("gdt_raw_cmd(%p, %p)\n", gdt, ccb)); 799 800 if (roundup(GDT_CMD_UNION + GDT_RAW_SZ, sizeof(u_int32_t)) + 801 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 802 gdt->sc_ic_all_size) { 803 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_raw_cmd(): DPMEM overflow\n", 804 gdt->sc_hanum)); 805 return (NULL); 806 } 807 808 bzero(gdt->sc_cmd, GDT_CMD_SZ); 809 810 gccb = gdt_get_ccb(gdt); 811 if (gccb == NULL) { 812 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: No free command index found\n", 813 gdt->sc_hanum)); 814 return (gccb); 815 } 816 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 817 gccb->gc_ccb = ccb; 818 gccb->gc_service = GDT_SCSIRAWSERVICE; 819 gccb->gc_flags = GDT_GCF_SCSI; 820 821 if (gdt->sc_cmd_cnt == 0) 822 gdt->sc_set_sema0(gdt); 823 splx(*lock); 824 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 825 gccb->gc_cmd_index); 826 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 827 828 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 829 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 830 GDT_DATA_IN : GDT_DATA_OUT); 831 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 832 ccb->csio.dxfer_len); 833 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 834 ccb->csio.cdb_len); 835 bcopy(ccb->csio.cdb_io.cdb_bytes, gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 836 ccb->csio.cdb_len); 837 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 838 ccb->ccb_h.target_id; 839 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 840 ccb->ccb_h.target_lun; 841 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 842 cam_sim_bus(sim); 843 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 844 sizeof(struct scsi_sense_data)); 845 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 846 gdt_ccb_vtop(gdt, gccb) + 847 offsetof(struct gdt_ccb, gc_scratch[0])); 848 849 /* 850 * If we have any data to send with this command, 851 * map it into bus space. 852 */ 853 /* Only use S/G if there is a transfer */ 854 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 855 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 856 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 857 int s; 858 int error; 859 860 /* vorher unlock von splcam() ??? */ 861 s = splsoftvm(); 862 error = 863 bus_dmamap_load(gdt->sc_buffer_dmat, 864 gccb->gc_dmamap, 865 ccb->csio.data_ptr, 866 ccb->csio.dxfer_len, 867 gdtexecuteccb, 868 gccb, /*flags*/0); 869 if (error == EINPROGRESS) { 870 xpt_freeze_simq(sim, 1); 871 gccb->gc_state |= CAM_RELEASE_SIMQ; 872 } 873 splx(s); 874 } else { 875 panic("iir: CAM_DATA_PHYS not supported"); 876 } 877 } else { 878 struct bus_dma_segment *segs; 879 880 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 881 panic("iir%d: iir_action - Physical " 882 "segment pointers unsupported", gdt->sc_hanum); 883 884 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 885 panic("iir%d: iir_action - Virtual " 886 "segment addresses unsupported", gdt->sc_hanum); 887 888 /* Just use the segments provided */ 889 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 890 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 891 } 892 } else { 893 gdtexecuteccb(gccb, NULL, 0, 0); 894 } 895 896 *lock = splcam(); 897 return (gccb); 898 } 899 900 static struct gdt_ccb * 901 gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb, int *lock) 902 { 903 struct gdt_ccb *gccb; 904 struct cam_sim *sim; 905 u_int8_t *cmdp; 906 u_int16_t opcode; 907 u_int32_t blockno, blockcnt; 908 909 GDT_DPRINTF(GDT_D_CMD, ("gdt_cache_cmd(%p, %p)\n", gdt, ccb)); 910 911 if (roundup(GDT_CMD_UNION + GDT_CACHE_SZ, sizeof(u_int32_t)) + 912 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 913 gdt->sc_ic_all_size) { 914 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_cache_cmd(): DPMEM overflow\n", 915 gdt->sc_hanum)); 916 return (NULL); 917 } 918 919 bzero(gdt->sc_cmd, GDT_CMD_SZ); 920 921 gccb = gdt_get_ccb(gdt); 922 if (gccb == NULL) { 923 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 924 gdt->sc_hanum)); 925 return (gccb); 926 } 927 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 928 gccb->gc_ccb = ccb; 929 gccb->gc_service = GDT_CACHESERVICE; 930 gccb->gc_flags = GDT_GCF_SCSI; 931 932 if (gdt->sc_cmd_cnt == 0) 933 gdt->sc_set_sema0(gdt); 934 splx(*lock); 935 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 936 gccb->gc_cmd_index); 937 cmdp = ccb->csio.cdb_io.cdb_bytes; 938 opcode = (*cmdp == WRITE_6 || *cmdp == WRITE_10) ? GDT_WRITE : GDT_READ; 939 if ((gdt->sc_state & GDT_SHUTDOWN) && opcode == GDT_WRITE) 940 opcode = GDT_WRITE_THR; 941 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, opcode); 942 943 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 944 ccb->ccb_h.target_id); 945 if (ccb->csio.cdb_len == 6) { 946 struct scsi_rw_6 *rw = (struct scsi_rw_6 *)cmdp; 947 blockno = scsi_3btoul(rw->addr) & ((SRW_TOPADDR<<16) | 0xffff); 948 blockcnt = rw->length ? rw->length : 0x100; 949 } else { 950 struct scsi_rw_10 *rw = (struct scsi_rw_10 *)cmdp; 951 blockno = scsi_4btoul(rw->addr); 952 blockcnt = scsi_2btoul(rw->length); 953 } 954 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 955 blockno); 956 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 957 blockcnt); 958 959 /* 960 * If we have any data to send with this command, 961 * map it into bus space. 962 */ 963 /* Only use S/G if there is a transfer */ 964 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 965 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 966 int s; 967 int error; 968 969 /* vorher unlock von splcam() ??? */ 970 s = splsoftvm(); 971 error = 972 bus_dmamap_load(gdt->sc_buffer_dmat, 973 gccb->gc_dmamap, 974 ccb->csio.data_ptr, 975 ccb->csio.dxfer_len, 976 gdtexecuteccb, 977 gccb, /*flags*/0); 978 if (error == EINPROGRESS) { 979 xpt_freeze_simq(sim, 1); 980 gccb->gc_state |= CAM_RELEASE_SIMQ; 981 } 982 splx(s); 983 } else { 984 panic("iir: CAM_DATA_PHYS not supported"); 985 } 986 } else { 987 struct bus_dma_segment *segs; 988 989 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 990 panic("iir%d: iir_action - Physical " 991 "segment pointers unsupported", gdt->sc_hanum); 992 993 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 994 panic("iir%d: iir_action - Virtual " 995 "segment addresses unsupported", gdt->sc_hanum); 996 997 /* Just use the segments provided */ 998 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 999 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 1000 } 1001 1002 *lock = splcam(); 1003 return (gccb); 1004 } 1005 1006 static struct gdt_ccb * 1007 gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd, int *lock) 1008 { 1009 struct gdt_ccb *gccb; 1010 u_int32_t cnt; 1011 1012 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_ioctl_cmd(%p, %p)\n", gdt, ucmd)); 1013 1014 bzero(gdt->sc_cmd, GDT_CMD_SZ); 1015 1016 gccb = gdt_get_ccb(gdt); 1017 if (gccb == NULL) { 1018 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 1019 gdt->sc_hanum)); 1020 return (gccb); 1021 } 1022 gccb->gc_ucmd = ucmd; 1023 gccb->gc_service = ucmd->service; 1024 gccb->gc_flags = GDT_GCF_IOCTL; 1025 1026 /* check DPMEM space, copy data buffer from user space */ 1027 if (ucmd->service == GDT_CACHESERVICE) { 1028 if (ucmd->OpCode == GDT_IOCTL) { 1029 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_IOCTL_SZ, 1030 sizeof(u_int32_t)); 1031 cnt = ucmd->u.ioctl.param_size; 1032 if (cnt > GDT_SCRATCH_SZ) { 1033 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1034 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1035 gdt_free_ccb(gdt, gccb); 1036 return (NULL); 1037 } 1038 } else { 1039 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1040 GDT_SG_SZ, sizeof(u_int32_t)); 1041 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1042 if (cnt > GDT_SCRATCH_SZ) { 1043 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1044 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1045 gdt_free_ccb(gdt, gccb); 1046 return (NULL); 1047 } 1048 } 1049 } else { 1050 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1051 GDT_SG_SZ, sizeof(u_int32_t)); 1052 cnt = ucmd->u.raw.sdlen; 1053 if (cnt + ucmd->u.raw.sense_len > GDT_SCRATCH_SZ) { 1054 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1055 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt + ucmd->u.raw.sense_len); 1056 gdt_free_ccb(gdt, gccb); 1057 return (NULL); 1058 } 1059 } 1060 if (cnt != 0) 1061 bcopy(ucmd->data, gccb->gc_scratch, cnt); 1062 1063 if (gdt->sc_cmd_off + gdt->sc_cmd_len + GDT_DPMEM_COMMAND_OFFSET > 1064 gdt->sc_ic_all_size) { 1065 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_ioctl_cmd(): DPMEM overflow\n", 1066 gdt->sc_hanum)); 1067 gdt_free_ccb(gdt, gccb); 1068 return (NULL); 1069 } 1070 1071 if (gdt->sc_cmd_cnt == 0) 1072 gdt->sc_set_sema0(gdt); 1073 splx(*lock); 1074 1075 /* fill cmd structure */ 1076 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 1077 gccb->gc_cmd_index); 1078 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, 1079 ucmd->OpCode); 1080 1081 if (ucmd->service == GDT_CACHESERVICE) { 1082 if (ucmd->OpCode == GDT_IOCTL) { 1083 /* IOCTL */ 1084 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_PARAM_SIZE, 1085 ucmd->u.ioctl.param_size); 1086 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_SUBFUNC, 1087 ucmd->u.ioctl.subfunc); 1088 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_CHANNEL, 1089 ucmd->u.ioctl.channel); 1090 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 1091 gdt_ccb_vtop(gdt, gccb) + 1092 offsetof(struct gdt_ccb, gc_scratch[0])); 1093 } else { 1094 /* cache service command */ 1095 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 1096 ucmd->u.cache.DeviceNo); 1097 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 1098 ucmd->u.cache.BlockNo); 1099 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 1100 ucmd->u.cache.BlockCnt); 1101 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1102 0xffffffffUL); 1103 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1104 1); 1105 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1106 GDT_SG_PTR, gdt_ccb_vtop(gdt, gccb) + 1107 offsetof(struct gdt_ccb, gc_scratch[0])); 1108 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1109 GDT_SG_LEN, ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE); 1110 } 1111 } else { 1112 /* raw service command */ 1113 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 1114 ucmd->u.raw.direction); 1115 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1116 0xffffffffUL); 1117 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 1118 ucmd->u.raw.sdlen); 1119 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 1120 ucmd->u.raw.clen); 1121 bcopy(ucmd->u.raw.cmd, gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 1122 12); 1123 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 1124 ucmd->u.raw.target; 1125 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 1126 ucmd->u.raw.lun; 1127 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 1128 ucmd->u.raw.bus; 1129 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 1130 ucmd->u.raw.sense_len); 1131 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 1132 gdt_ccb_vtop(gdt, gccb) + 1133 offsetof(struct gdt_ccb, gc_scratch[ucmd->u.raw.sdlen])); 1134 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1135 1); 1136 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1137 GDT_SG_PTR, gdt_ccb_vtop(gdt, gccb) + 1138 offsetof(struct gdt_ccb, gc_scratch[0])); 1139 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1140 GDT_SG_LEN, ucmd->u.raw.sdlen); 1141 } 1142 1143 *lock = splcam(); 1144 gdt_stat.sg_count_act = 1; 1145 gdt->sc_copy_cmd(gdt, gccb); 1146 return (gccb); 1147 } 1148 1149 static void 1150 gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb) 1151 { 1152 int t; 1153 1154 t = ccb->ccb_h.target_id; 1155 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cache_cmd(%p, %p, 0x%x, %d)\n", 1156 gdt, ccb, ccb->csio.cdb_io.cdb_bytes[0], t)); 1157 1158 switch (ccb->csio.cdb_io.cdb_bytes[0]) { 1159 case TEST_UNIT_READY: 1160 case START_STOP: 1161 break; 1162 case REQUEST_SENSE: 1163 GDT_DPRINTF(GDT_D_MISC, ("REQUEST_SENSE\n")); 1164 break; 1165 case INQUIRY: 1166 { 1167 struct scsi_inquiry_data *inq; 1168 1169 inq = (struct scsi_inquiry_data *)ccb->csio.data_ptr; 1170 bzero(inq, sizeof(struct scsi_inquiry_data)); 1171 inq->device = (gdt->sc_hdr[t].hd_devtype & 4) ? 1172 T_CDROM : T_DIRECT; 1173 inq->dev_qual2 = (gdt->sc_hdr[t].hd_devtype & 1) ? 0x80 : 0; 1174 inq->version = SCSI_REV_2; 1175 inq->response_format = 2; 1176 inq->additional_length = 32; 1177 inq->flags = SID_CmdQue | SID_Sync; 1178 strcpy(inq->vendor, gdt->oem_name); 1179 sprintf(inq->product, "Host Drive #%02d", t); 1180 strcpy(inq->revision, " "); 1181 break; 1182 } 1183 case MODE_SENSE_6: 1184 { 1185 struct mpd_data { 1186 struct scsi_mode_hdr_6 hd; 1187 struct scsi_mode_block_descr bd; 1188 struct scsi_control_page cp; 1189 } *mpd; 1190 u_int8_t page; 1191 1192 mpd = (struct mpd_data *)ccb->csio.data_ptr; 1193 bzero(mpd, sizeof(struct mpd_data)); 1194 mpd->hd.datalen = sizeof(struct scsi_mode_hdr_6) + 1195 sizeof(struct scsi_mode_block_descr); 1196 mpd->hd.dev_specific = (gdt->sc_hdr[t].hd_devtype & 2) ? 0x80 : 0; 1197 mpd->hd.block_descr_len = sizeof(struct scsi_mode_block_descr); 1198 mpd->bd.block_len[0] = (GDT_SECTOR_SIZE & 0x00ff0000) >> 16; 1199 mpd->bd.block_len[1] = (GDT_SECTOR_SIZE & 0x0000ff00) >> 8; 1200 mpd->bd.block_len[2] = (GDT_SECTOR_SIZE & 0x000000ff); 1201 page=((struct scsi_mode_sense_6 *)ccb->csio.cdb_io.cdb_bytes)->page; 1202 switch (page) { 1203 default: 1204 GDT_DPRINTF(GDT_D_MISC, ("MODE_SENSE_6: page 0x%x\n", page)); 1205 break; 1206 } 1207 break; 1208 } 1209 case READ_CAPACITY: 1210 { 1211 struct scsi_read_capacity_data *rcd; 1212 1213 rcd = (struct scsi_read_capacity_data *)ccb->csio.data_ptr; 1214 bzero(rcd, sizeof(struct scsi_read_capacity_data)); 1215 scsi_ulto4b(gdt->sc_hdr[t].hd_size - 1, rcd->addr); 1216 scsi_ulto4b(GDT_SECTOR_SIZE, rcd->length); 1217 break; 1218 } 1219 default: 1220 GDT_DPRINTF(GDT_D_MISC, ("gdt_internal_cache_cmd(%d) unknown\n", 1221 ccb->csio.cdb_io.cdb_bytes[0])); 1222 break; 1223 } 1224 ccb->ccb_h.status = CAM_REQ_CMP; 1225 --gdt_stat.io_count_act; 1226 xpt_done(ccb); 1227 } 1228 1229 static void 1230 gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1231 { 1232 bus_addr_t *busaddrp; 1233 1234 busaddrp = (bus_addr_t *)arg; 1235 *busaddrp = dm_segs->ds_addr; 1236 } 1237 1238 static void 1239 gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1240 { 1241 struct gdt_ccb *gccb; 1242 union ccb *ccb; 1243 struct gdt_softc *gdt; 1244 int i, lock; 1245 1246 lock = splcam(); 1247 1248 gccb = (struct gdt_ccb *)arg; 1249 ccb = gccb->gc_ccb; 1250 gdt = cam_sim_softc((struct cam_sim *)ccb->ccb_h.ccb_sim_ptr); 1251 1252 GDT_DPRINTF(GDT_D_CMD, ("gdtexecuteccb(%p, %p, %p, %d, %d)\n", 1253 gdt, gccb, dm_segs, nseg, error)); 1254 gdt_stat.sg_count_act = nseg; 1255 if (nseg > gdt_stat.sg_count_max) 1256 gdt_stat.sg_count_max = nseg; 1257 1258 /* Copy the segments into our SG list */ 1259 if (gccb->gc_service == GDT_CACHESERVICE) { 1260 for (i = 0; i < nseg; ++i) { 1261 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1262 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1263 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1264 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1265 dm_segs++; 1266 } 1267 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1268 nseg); 1269 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1270 0xffffffffUL); 1271 1272 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1273 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1274 } else { 1275 for (i = 0; i < nseg; ++i) { 1276 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1277 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1278 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1279 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1280 dm_segs++; 1281 } 1282 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1283 nseg); 1284 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1285 0xffffffffUL); 1286 1287 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1288 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1289 } 1290 1291 if (nseg != 0) { 1292 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, 1293 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 1294 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1295 } 1296 1297 /* We must NOT abort the command here if CAM_REQ_INPROG is not set, 1298 * because command semaphore is already set! 1299 */ 1300 1301 ccb->ccb_h.status |= CAM_SIM_QUEUED; 1302 /* timeout handling */ 1303 ccb->ccb_h.timeout_ch = 1304 timeout(iir_timeout, (caddr_t)gccb, 1305 (ccb->ccb_h.timeout * hz) / 1000); 1306 1307 gdt->sc_copy_cmd(gdt, gccb); 1308 splx(lock); 1309 } 1310 1311 1312 static void 1313 iir_action( struct cam_sim *sim, union ccb *ccb ) 1314 { 1315 struct gdt_softc *gdt; 1316 int lock, bus, target, lun; 1317 1318 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1319 ccb->ccb_h.ccb_sim_ptr = sim; 1320 bus = cam_sim_bus(sim); 1321 target = ccb->ccb_h.target_id; 1322 lun = ccb->ccb_h.target_lun; 1323 GDT_DPRINTF(GDT_D_CMD, 1324 ("iir_action(%p) func 0x%x cmd 0x%x bus %d target %d lun %d\n", 1325 gdt, ccb->ccb_h.func_code, ccb->csio.cdb_io.cdb_bytes[0], 1326 bus, target, lun)); 1327 ++gdt_stat.io_count_act; 1328 if (gdt_stat.io_count_act > gdt_stat.io_count_max) 1329 gdt_stat.io_count_max = gdt_stat.io_count_act; 1330 1331 switch (ccb->ccb_h.func_code) { 1332 case XPT_SCSI_IO: 1333 lock = splcam(); 1334 TAILQ_INSERT_TAIL(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1335 ++gdt_stat.req_queue_act; 1336 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1337 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1338 splx(lock); 1339 gdt_next(gdt); 1340 break; 1341 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1342 case XPT_ABORT: /* Abort the specified CCB */ 1343 /* XXX Implement */ 1344 ccb->ccb_h.status = CAM_REQ_INVALID; 1345 --gdt_stat.io_count_act; 1346 xpt_done(ccb); 1347 break; 1348 case XPT_SET_TRAN_SETTINGS: 1349 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1350 --gdt_stat.io_count_act; 1351 xpt_done(ccb); 1352 break; 1353 case XPT_GET_TRAN_SETTINGS: 1354 /* Get default/user set transfer settings for the target */ 1355 { 1356 struct ccb_trans_settings *cts; 1357 u_int target_mask; 1358 1359 cts = &ccb->cts; 1360 target_mask = 0x01 << target; 1361 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) { 1362 cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB; 1363 cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT; 1364 cts->sync_period = 25; /* 10MHz */ 1365 if (cts->sync_period != 0) 1366 cts->sync_offset = 15; 1367 1368 cts->valid = CCB_TRANS_SYNC_RATE_VALID 1369 | CCB_TRANS_SYNC_OFFSET_VALID 1370 | CCB_TRANS_BUS_WIDTH_VALID 1371 | CCB_TRANS_DISC_VALID 1372 | CCB_TRANS_TQ_VALID; 1373 ccb->ccb_h.status = CAM_REQ_CMP; 1374 } else { 1375 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1376 } 1377 --gdt_stat.io_count_act; 1378 xpt_done(ccb); 1379 break; 1380 } 1381 case XPT_CALC_GEOMETRY: 1382 { 1383 struct ccb_calc_geometry *ccg; 1384 u_int32_t secs_per_cylinder; 1385 1386 ccg = &ccb->ccg; 1387 ccg->heads = gdt->sc_hdr[target].hd_heads; 1388 ccg->secs_per_track = gdt->sc_hdr[target].hd_secs; 1389 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1390 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1391 ccb->ccb_h.status = CAM_REQ_CMP; 1392 --gdt_stat.io_count_act; 1393 xpt_done(ccb); 1394 break; 1395 } 1396 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1397 { 1398 /* XXX Implement */ 1399 ccb->ccb_h.status = CAM_REQ_CMP; 1400 --gdt_stat.io_count_act; 1401 xpt_done(ccb); 1402 break; 1403 } 1404 case XPT_TERM_IO: /* Terminate the I/O process */ 1405 /* XXX Implement */ 1406 ccb->ccb_h.status = CAM_REQ_INVALID; 1407 --gdt_stat.io_count_act; 1408 xpt_done(ccb); 1409 break; 1410 case XPT_PATH_INQ: /* Path routing inquiry */ 1411 { 1412 struct ccb_pathinq *cpi = &ccb->cpi; 1413 1414 cpi->version_num = 1; 1415 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE; 1416 cpi->hba_inquiry |= PI_WIDE_16; 1417 cpi->target_sprt = 1; 1418 cpi->hba_misc = 0; 1419 cpi->hba_eng_cnt = 0; 1420 if (bus == gdt->sc_virt_bus) 1421 cpi->max_target = GDT_MAX_HDRIVES - 1; 1422 else if (gdt->sc_class & GDT_FC) 1423 cpi->max_target = GDT_MAXID_FC - 1; 1424 else 1425 cpi->max_target = GDT_MAXID - 1; 1426 cpi->max_lun = 7; 1427 cpi->unit_number = cam_sim_unit(sim); 1428 cpi->bus_id = bus; 1429 cpi->initiator_id = 1430 (bus == gdt->sc_virt_bus ? 127 : gdt->sc_bus_id[bus]); 1431 cpi->base_transfer_speed = 3300; 1432 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1433 if (gdt->sc_vendor == INTEL_VENDOR_ID) 1434 strncpy(cpi->hba_vid, "Intel Corp.", HBA_IDLEN); 1435 else 1436 strncpy(cpi->hba_vid, "ICP vortex ", HBA_IDLEN); 1437 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1438 cpi->ccb_h.status = CAM_REQ_CMP; 1439 --gdt_stat.io_count_act; 1440 xpt_done(ccb); 1441 break; 1442 } 1443 default: 1444 GDT_DPRINTF(GDT_D_INVALID, ("gdt_next(%p) cmd 0x%x invalid\n", 1445 gdt, ccb->ccb_h.func_code)); 1446 ccb->ccb_h.status = CAM_REQ_INVALID; 1447 --gdt_stat.io_count_act; 1448 xpt_done(ccb); 1449 break; 1450 } 1451 } 1452 1453 static void 1454 iir_poll( struct cam_sim *sim ) 1455 { 1456 struct gdt_softc *gdt; 1457 1458 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1459 GDT_DPRINTF(GDT_D_CMD, ("iir_poll sim %p gdt %p\n", sim, gdt)); 1460 iir_intr(gdt); 1461 } 1462 1463 static void 1464 iir_timeout(void *arg) 1465 { 1466 GDT_DPRINTF(GDT_D_TIMEOUT, ("iir_timeout(%p)\n", arg)); 1467 } 1468 1469 static void 1470 iir_watchdog(void *arg) 1471 { 1472 struct gdt_softc *gdt; 1473 1474 gdt = (struct gdt_softc *)arg; 1475 GDT_DPRINTF(GDT_D_DEBUG, ("iir_watchdog(%p)\n", gdt)); 1476 1477 { 1478 int ccbs = 0, ucmds = 0, frees = 0, pends = 0; 1479 struct gdt_ccb *p; 1480 struct ccb_hdr *h; 1481 struct gdt_ucmd *u; 1482 1483 for (h = TAILQ_FIRST(&gdt->sc_ccb_queue); h != NULL; 1484 h = TAILQ_NEXT(h, sim_links.tqe)) 1485 ccbs++; 1486 for (u = TAILQ_FIRST(&gdt->sc_ucmd_queue); u != NULL; 1487 u = TAILQ_NEXT(u, links)) 1488 ucmds++; 1489 for (p = SLIST_FIRST(&gdt->sc_free_gccb); p != NULL; 1490 p = SLIST_NEXT(p, sle)) 1491 frees++; 1492 for (p = SLIST_FIRST(&gdt->sc_pending_gccb); p != NULL; 1493 p = SLIST_NEXT(p, sle)) 1494 pends++; 1495 1496 GDT_DPRINTF(GDT_D_TIMEOUT, ("ccbs %d ucmds %d frees %d pends %d\n", 1497 ccbs, ucmds, frees, pends)); 1498 } 1499 1500 timeout(iir_watchdog, (caddr_t)gdt, hz * 15); 1501 } 1502 1503 static void 1504 iir_shutdown( void *arg, int howto ) 1505 { 1506 struct gdt_softc *gdt; 1507 struct gdt_ccb *gccb; 1508 gdt_ucmd_t *ucmd; 1509 int lock, i; 1510 1511 gdt = (struct gdt_softc *)arg; 1512 GDT_DPRINTF(GDT_D_CMD, ("iir_shutdown(%p, %d)\n", gdt, howto)); 1513 1514 printf("iir%d: Flushing all Host Drives. Please wait ... ", 1515 gdt->sc_hanum); 1516 1517 /* allocate ucmd buffer */ 1518 ucmd = malloc(sizeof(gdt_ucmd_t), M_DEVBUF, M_NOWAIT); 1519 if (ucmd == NULL) { 1520 printf("iir%d: iir_shutdown(): Cannot allocate resource\n", 1521 gdt->sc_hanum); 1522 return; 1523 } 1524 bzero(ucmd, sizeof(gdt_ucmd_t)); 1525 1526 /* wait for pending IOs */ 1527 lock = splcam(); 1528 gdt->sc_state = GDT_SHUTDOWN; 1529 splx(lock); 1530 if ((gccb = SLIST_FIRST(&gdt->sc_pending_gccb)) != NULL) 1531 (void) tsleep((void *)gccb, PCATCH | PRIBIO, "iirshw", 100 * hz); 1532 1533 /* flush */ 1534 for (i = 0; i < GDT_MAX_HDRIVES; ++i) { 1535 if (gdt->sc_hdr[i].hd_present) { 1536 ucmd->service = GDT_CACHESERVICE; 1537 ucmd->OpCode = GDT_FLUSH; 1538 ucmd->u.cache.DeviceNo = i; 1539 lock = splcam(); 1540 TAILQ_INSERT_TAIL(&gdt->sc_ucmd_queue, ucmd, links); 1541 ucmd->complete_flag = FALSE; 1542 splx(lock); 1543 gdt_next(gdt); 1544 if (!ucmd->complete_flag) 1545 (void) tsleep((void *)ucmd, PCATCH|PRIBIO, "iirshw", 10*hz); 1546 } 1547 } 1548 1549 free(ucmd, M_DEVBUF); 1550 printf("Done.\n"); 1551 } 1552 1553 void 1554 iir_intr(void *arg) 1555 { 1556 struct gdt_softc *gdt = arg; 1557 struct gdt_intr_ctx ctx; 1558 int lock = 0; 1559 struct gdt_ccb *gccb; 1560 gdt_ucmd_t *ucmd; 1561 u_int32_t cnt; 1562 1563 GDT_DPRINTF(GDT_D_INTR, ("gdt_intr(%p)\n", gdt)); 1564 1565 /* If polling and we were not called from gdt_wait, just return */ 1566 if ((gdt->sc_state & GDT_POLLING) && 1567 !(gdt->sc_state & GDT_POLL_WAIT)) 1568 return; 1569 1570 if (!(gdt->sc_state & GDT_POLLING)) 1571 lock = splcam(); 1572 gdt_wait_index = 0; 1573 1574 ctx.istatus = gdt->sc_get_status(gdt); 1575 if (!ctx.istatus) { 1576 if (!(gdt->sc_state & GDT_POLLING)) 1577 splx(lock); 1578 gdt->sc_status = GDT_S_NO_STATUS; 1579 return; 1580 } 1581 1582 gdt->sc_intr(gdt, &ctx); 1583 1584 gdt->sc_status = ctx.cmd_status; 1585 gdt->sc_service = ctx.service; 1586 gdt->sc_info = ctx.info; 1587 gdt->sc_info2 = ctx.info2; 1588 1589 if (gdt->sc_state & GDT_POLL_WAIT) { 1590 gdt_wait_gdt = gdt; 1591 gdt_wait_index = ctx.istatus; 1592 } 1593 1594 if (ctx.istatus == GDT_ASYNCINDEX) { 1595 gdt_async_event(gdt, ctx.service); 1596 if (!(gdt->sc_state & GDT_POLLING)) 1597 splx(lock); 1598 return; 1599 } 1600 if (ctx.istatus == GDT_SPEZINDEX) { 1601 GDT_DPRINTF(GDT_D_INVALID, 1602 ("iir%d: Service unknown or not initialized!\n", 1603 gdt->sc_hanum)); 1604 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1605 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1606 gdt_store_event(GDT_ES_DRIVER, 4, &gdt->sc_dvr); 1607 if (!(gdt->sc_state & GDT_POLLING)) 1608 splx(lock); 1609 return; 1610 } 1611 1612 gccb = &gdt->sc_gccbs[ctx.istatus - 2]; 1613 ctx.service = gccb->gc_service; 1614 1615 switch (gccb->gc_flags) { 1616 case GDT_GCF_UNUSED: 1617 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: Index (%d) to unused command!\n", 1618 gdt->sc_hanum, ctx.istatus)); 1619 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1620 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1621 gdt->sc_dvr.eu.driver.index = ctx.istatus; 1622 gdt_store_event(GDT_ES_DRIVER, 1, &gdt->sc_dvr); 1623 gdt_free_ccb(gdt, gccb); 1624 /* fallthrough */ 1625 1626 case GDT_GCF_INTERNAL: 1627 if (!(gdt->sc_state & GDT_POLLING)) 1628 splx(lock); 1629 break; 1630 1631 case GDT_GCF_IOCTL: 1632 ucmd = gccb->gc_ucmd; 1633 if (gdt->sc_status == GDT_S_BSY) { 1634 GDT_DPRINTF(GDT_D_DEBUG, ("iir_intr(%p) ioctl: gccb %p busy\n", 1635 gdt, gccb)); 1636 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 1637 if (!(gdt->sc_state & GDT_POLLING)) 1638 splx(lock); 1639 } else { 1640 ucmd->status = gdt->sc_status; 1641 ucmd->info = gdt->sc_info; 1642 ucmd->complete_flag = TRUE; 1643 if (ucmd->service == GDT_CACHESERVICE) { 1644 if (ucmd->OpCode == GDT_IOCTL) { 1645 cnt = ucmd->u.ioctl.param_size; 1646 if (cnt != 0) 1647 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1648 } else { 1649 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1650 if (cnt != 0) 1651 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1652 } 1653 } else { 1654 cnt = ucmd->u.raw.sdlen; 1655 if (cnt != 0) 1656 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1657 if (ucmd->u.raw.sense_len != 0) 1658 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1659 } 1660 gdt_free_ccb(gdt, gccb); 1661 if (!(gdt->sc_state & GDT_POLLING)) 1662 splx(lock); 1663 /* wakeup */ 1664 wakeup(ucmd); 1665 } 1666 gdt_next(gdt); 1667 break; 1668 1669 default: 1670 gdt_free_ccb(gdt, gccb); 1671 gdt_sync_event(gdt, ctx.service, ctx.istatus, gccb); 1672 if (!(gdt->sc_state & GDT_POLLING)) 1673 splx(lock); 1674 gdt_next(gdt); 1675 break; 1676 } 1677 } 1678 1679 int 1680 gdt_async_event(struct gdt_softc *gdt, int service) 1681 { 1682 struct gdt_ccb *gccb; 1683 1684 GDT_DPRINTF(GDT_D_INTR, ("gdt_async_event(%p, %d)\n", gdt, service)); 1685 1686 if (service == GDT_SCREENSERVICE) { 1687 if (gdt->sc_status == GDT_MSG_REQUEST) { 1688 while (gdt->sc_test_busy(gdt)) 1689 DELAY(1); 1690 bzero(gdt->sc_cmd, GDT_CMD_SZ); 1691 gccb = gdt_get_ccb(gdt); 1692 if (gccb == NULL) { 1693 printf("iir%d: No free command index found\n", 1694 gdt->sc_hanum); 1695 return (1); 1696 } 1697 gccb->gc_service = service; 1698 gccb->gc_flags = GDT_GCF_SCREEN; 1699 gdt->sc_set_sema0(gdt); 1700 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 1701 gccb->gc_cmd_index); 1702 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, GDT_READ); 1703 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1704 GDT_MSG_INV_HANDLE); 1705 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1706 gdt_ccb_vtop(gdt, gccb) + 1707 offsetof(struct gdt_ccb, gc_scratch[0])); 1708 gdt->sc_cmd_off = 0; 1709 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1710 sizeof(u_int32_t)); 1711 gdt->sc_cmd_cnt = 0; 1712 gdt->sc_copy_cmd(gdt, gccb); 1713 printf("iir%d: [PCI %d/%d] ", 1714 gdt->sc_hanum,gdt->sc_bus,gdt->sc_slot); 1715 gdt->sc_release_event(gdt); 1716 } 1717 1718 } else { 1719 if ((gdt->sc_fw_vers & 0xff) >= 0x1a) { 1720 gdt->sc_dvr.size = 0; 1721 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1722 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1723 /* severity and event_string already set! */ 1724 } else { 1725 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.async); 1726 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1727 gdt->sc_dvr.eu.async.service = service; 1728 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1729 gdt->sc_dvr.eu.async.info = gdt->sc_info; 1730 *(u_int32_t *)gdt->sc_dvr.eu.async.scsi_coord = gdt->sc_info2; 1731 } 1732 gdt_store_event(GDT_ES_ASYNC, service, &gdt->sc_dvr); 1733 printf("iir%d: %s\n", gdt->sc_hanum, gdt->sc_dvr.event_string); 1734 } 1735 1736 return (0); 1737 } 1738 1739 int 1740 gdt_sync_event(struct gdt_softc *gdt, int service, 1741 u_int8_t index, struct gdt_ccb *gccb) 1742 { 1743 union ccb *ccb; 1744 1745 GDT_DPRINTF(GDT_D_INTR, 1746 ("gdt_sync_event(%p, %d, %d, %p)\n", gdt,service,index,gccb)); 1747 1748 ccb = gccb->gc_ccb; 1749 1750 if (service == GDT_SCREENSERVICE) { 1751 u_int32_t msg_len; 1752 1753 msg_len = gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_LEN); 1754 if (msg_len) 1755 if (!(gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1756 gccb->gc_scratch[GDT_SCR_MSG_EXT])) { 1757 gccb->gc_scratch[GDT_SCR_MSG_TEXT + msg_len] = '\0'; 1758 printf("%s",&gccb->gc_scratch[GDT_SCR_MSG_TEXT]); 1759 } 1760 1761 if (gccb->gc_scratch[GDT_SCR_MSG_EXT] && 1762 !gccb->gc_scratch[GDT_SCR_MSG_ANSWER]) { 1763 while (gdt->sc_test_busy(gdt)) 1764 DELAY(1); 1765 bzero(gdt->sc_cmd, GDT_CMD_SZ); 1766 gccb = gdt_get_ccb(gdt); 1767 if (gccb == NULL) { 1768 printf("iir%d: No free command index found\n", 1769 gdt->sc_hanum); 1770 return (1); 1771 } 1772 gccb->gc_service = service; 1773 gccb->gc_flags = GDT_GCF_SCREEN; 1774 gdt->sc_set_sema0(gdt); 1775 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 1776 gccb->gc_cmd_index); 1777 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, GDT_READ); 1778 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1779 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1780 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1781 gdt_ccb_vtop(gdt, gccb) + 1782 offsetof(struct gdt_ccb, gc_scratch[0])); 1783 gdt->sc_cmd_off = 0; 1784 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1785 sizeof(u_int32_t)); 1786 gdt->sc_cmd_cnt = 0; 1787 gdt->sc_copy_cmd(gdt, gccb); 1788 gdt->sc_release_event(gdt); 1789 return (0); 1790 } 1791 1792 if (gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1793 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN)) { 1794 /* default answers (getchar() not possible) */ 1795 if (gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) == 1) { 1796 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 0); 1797 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 1); 1798 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 0; 1799 } else { 1800 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 1801 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) - 2); 1802 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 2); 1803 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 1; 1804 gccb->gc_scratch[GDT_SCR_MSG_TEXT + 1] = 0; 1805 } 1806 gccb->gc_scratch[GDT_SCR_MSG_EXT] = 0; 1807 gccb->gc_scratch[GDT_SCR_MSG_ANSWER] = 0; 1808 while (gdt->sc_test_busy(gdt)) 1809 DELAY(1); 1810 bzero(gdt->sc_cmd, GDT_CMD_SZ); 1811 gccb = gdt_get_ccb(gdt); 1812 if (gccb == NULL) { 1813 printf("iir%d: No free command index found\n", 1814 gdt->sc_hanum); 1815 return (1); 1816 } 1817 gccb->gc_service = service; 1818 gccb->gc_flags = GDT_GCF_SCREEN; 1819 gdt->sc_set_sema0(gdt); 1820 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 1821 gccb->gc_cmd_index); 1822 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 1823 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1824 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1825 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1826 gdt_ccb_vtop(gdt, gccb) + 1827 offsetof(struct gdt_ccb, gc_scratch[0])); 1828 gdt->sc_cmd_off = 0; 1829 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1830 sizeof(u_int32_t)); 1831 gdt->sc_cmd_cnt = 0; 1832 gdt->sc_copy_cmd(gdt, gccb); 1833 gdt->sc_release_event(gdt); 1834 return (0); 1835 } 1836 printf("\n"); 1837 return (0); 1838 } else { 1839 untimeout(iir_timeout, gccb, ccb->ccb_h.timeout_ch); 1840 if (gdt->sc_status == GDT_S_BSY) { 1841 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_sync_event(%p) gccb %p busy\n", 1842 gdt, gccb)); 1843 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1844 ++gdt_stat.req_queue_act; 1845 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1846 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1847 return (2); 1848 } 1849 1850 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, 1851 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 1852 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1853 1854 ccb->csio.resid = 0; 1855 if (gdt->sc_status == GDT_S_OK) { 1856 ccb->ccb_h.status = CAM_REQ_CMP; 1857 } else { 1858 /* error */ 1859 if (gccb->gc_service == GDT_CACHESERVICE) { 1860 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID; 1861 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1862 bzero(&ccb->csio.sense_data, ccb->csio.sense_len); 1863 ccb->csio.sense_data.error_code = 1864 SSD_CURRENT_ERROR | SSD_ERRCODE_VALID; 1865 ccb->csio.sense_data.flags = SSD_KEY_NOT_READY; 1866 1867 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.sync); 1868 gdt->sc_dvr.eu.sync.ionode = gdt->sc_hanum; 1869 gdt->sc_dvr.eu.sync.service = service; 1870 gdt->sc_dvr.eu.sync.status = gdt->sc_status; 1871 gdt->sc_dvr.eu.sync.info = gdt->sc_info; 1872 gdt->sc_dvr.eu.sync.hostdrive = ccb->ccb_h.target_id; 1873 if (gdt->sc_status >= 0x8000) 1874 gdt_store_event(GDT_ES_SYNC, 0, &gdt->sc_dvr); 1875 else 1876 gdt_store_event(GDT_ES_SYNC, service, &gdt->sc_dvr); 1877 } else { 1878 /* raw service */ 1879 if (gdt->sc_status != GDT_S_RAW_SCSI || gdt->sc_info >= 0x100) { 1880 ccb->ccb_h.status = CAM_DEV_NOT_THERE; 1881 } else { 1882 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR|CAM_AUTOSNS_VALID; 1883 ccb->csio.scsi_status = gdt->sc_info; 1884 bcopy(gccb->gc_scratch, &ccb->csio.sense_data, 1885 ccb->csio.sense_len); 1886 } 1887 } 1888 } 1889 --gdt_stat.io_count_act; 1890 xpt_done(ccb); 1891 } 1892 return (0); 1893 } 1894 1895 /* Controller event handling functions */ 1896 gdt_evt_str *gdt_store_event(u_int16_t source, u_int16_t idx, 1897 gdt_evt_data *evt) 1898 { 1899 gdt_evt_str *e; 1900 struct timeval tv; 1901 1902 GDT_DPRINTF(GDT_D_MISC, ("gdt_store_event(%d, %d)\n", source, idx)); 1903 if (source == 0) /* no source -> no event */ 1904 return 0; 1905 1906 if (ebuffer[elastidx].event_source == source && 1907 ebuffer[elastidx].event_idx == idx && 1908 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 && 1909 !memcmp((char *)&ebuffer[elastidx].event_data.eu, 1910 (char *)&evt->eu, evt->size)) || 1911 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 && 1912 !strcmp((char *)&ebuffer[elastidx].event_data.event_string, 1913 (char *)&evt->event_string)))) { 1914 e = &ebuffer[elastidx]; 1915 getmicrotime(&tv); 1916 e->last_stamp = tv.tv_sec; 1917 ++e->same_count; 1918 } else { 1919 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */ 1920 ++elastidx; 1921 if (elastidx == GDT_MAX_EVENTS) 1922 elastidx = 0; 1923 if (elastidx == eoldidx) { /* reached mark ? */ 1924 ++eoldidx; 1925 if (eoldidx == GDT_MAX_EVENTS) 1926 eoldidx = 0; 1927 } 1928 } 1929 e = &ebuffer[elastidx]; 1930 e->event_source = source; 1931 e->event_idx = idx; 1932 getmicrotime(&tv); 1933 e->first_stamp = e->last_stamp = tv.tv_sec; 1934 e->same_count = 1; 1935 e->event_data = *evt; 1936 e->application = 0; 1937 } 1938 return e; 1939 } 1940 1941 int gdt_read_event(int handle, gdt_evt_str *estr) 1942 { 1943 gdt_evt_str *e; 1944 int eindex, lock; 1945 1946 GDT_DPRINTF(GDT_D_MISC, ("gdt_read_event(%d)\n", handle)); 1947 lock = splcam(); 1948 if (handle == -1) 1949 eindex = eoldidx; 1950 else 1951 eindex = handle; 1952 estr->event_source = 0; 1953 1954 if (eindex >= GDT_MAX_EVENTS) { 1955 splx(lock); 1956 return eindex; 1957 } 1958 e = &ebuffer[eindex]; 1959 if (e->event_source != 0) { 1960 if (eindex != elastidx) { 1961 if (++eindex == GDT_MAX_EVENTS) 1962 eindex = 0; 1963 } else { 1964 eindex = -1; 1965 } 1966 memcpy(estr, e, sizeof(gdt_evt_str)); 1967 } 1968 splx(lock); 1969 return eindex; 1970 } 1971 1972 void gdt_readapp_event(u_int8_t application, gdt_evt_str *estr) 1973 { 1974 gdt_evt_str *e; 1975 int found = FALSE; 1976 int eindex, lock; 1977 1978 GDT_DPRINTF(GDT_D_MISC, ("gdt_readapp_event(%d)\n", application)); 1979 lock = splcam(); 1980 eindex = eoldidx; 1981 for (;;) { 1982 e = &ebuffer[eindex]; 1983 if (e->event_source == 0) 1984 break; 1985 if ((e->application & application) == 0) { 1986 e->application |= application; 1987 found = TRUE; 1988 break; 1989 } 1990 if (eindex == elastidx) 1991 break; 1992 if (++eindex == GDT_MAX_EVENTS) 1993 eindex = 0; 1994 } 1995 if (found) 1996 memcpy(estr, e, sizeof(gdt_evt_str)); 1997 else 1998 estr->event_source = 0; 1999 splx(lock); 2000 } 2001 2002 void gdt_clear_events() 2003 { 2004 GDT_DPRINTF(GDT_D_MISC, ("gdt_clear_events\n")); 2005 2006 eoldidx = elastidx = 0; 2007 ebuffer[0].event_source = 0; 2008 }
Cache object: 4450826df397da622984957e2fea1014
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