Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/iir/iir.c
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1 /*- 2 * Copyright (c) 2000-04 ICP vortex GmbH 3 * Copyright (c) 2002-04 Intel Corporation 4 * Copyright (c) 2003-04 Adaptec Inc. 5 * All Rights Reserved 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 /* 33 * iir.c: SCSI dependant code for the Intel Integrated RAID Controller driver 34 * 35 * Written by: Achim Leubner <achim_leubner@adaptec.com> 36 * Fixes/Additions: Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com> 37 * 38 * credits: Niklas Hallqvist; OpenBSD driver for the ICP Controllers. 39 * Mike Smith; Some driver source code. 40 * FreeBSD.ORG; Great O/S to work on and for. 41 * 42 * $Id: iir.c 1.5 2004/03/30 10:17:53 achim Exp $" 43 */ 44 45 #include <sys/cdefs.h> 46 __FBSDID("$FreeBSD: releng/6.4/sys/dev/iir/iir.c 177914 2008-04-04 16:42:17Z scottl $"); 47 48 #define _IIR_C_ 49 50 /* #include "opt_iir.h" */ 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/endian.h> 54 #include <sys/eventhandler.h> 55 #include <sys/malloc.h> 56 #include <sys/kernel.h> 57 #include <sys/bus.h> 58 59 #include <machine/bus.h> 60 #include <machine/clock.h> 61 #include <machine/stdarg.h> 62 63 #include <cam/cam.h> 64 #include <cam/cam_ccb.h> 65 #include <cam/cam_sim.h> 66 #include <cam/cam_xpt_sim.h> 67 #include <cam/cam_debug.h> 68 #include <cam/scsi/scsi_all.h> 69 #include <cam/scsi/scsi_message.h> 70 71 #include <vm/vm.h> 72 #include <vm/pmap.h> 73 74 #include <dev/iir/iir.h> 75 76 MALLOC_DEFINE(M_GDTBUF, "iirbuf", "iir driver buffer"); 77 78 struct gdt_softc *gdt_wait_gdt; 79 int gdt_wait_index; 80 81 #ifdef GDT_DEBUG 82 int gdt_debug = GDT_DEBUG; 83 #ifdef __SERIAL__ 84 #define MAX_SERBUF 160 85 static void ser_init(void); 86 static void ser_puts(char *str); 87 static void ser_putc(int c); 88 static char strbuf[MAX_SERBUF+1]; 89 #ifdef __COM2__ 90 #define COM_BASE 0x2f8 91 #else 92 #define COM_BASE 0x3f8 93 #endif 94 static void ser_init() 95 { 96 unsigned port=COM_BASE; 97 98 outb(port+3, 0x80); 99 outb(port+1, 0); 100 /* 19200 Baud, if 9600: outb(12,port) */ 101 outb(port, 6); 102 outb(port+3, 3); 103 outb(port+1, 0); 104 } 105 106 static void ser_puts(char *str) 107 { 108 char *ptr; 109 110 ser_init(); 111 for (ptr=str;*ptr;++ptr) 112 ser_putc((int)(*ptr)); 113 } 114 115 static void ser_putc(int c) 116 { 117 unsigned port=COM_BASE; 118 119 while ((inb(port+5) & 0x20)==0); 120 outb(port, c); 121 if (c==0x0a) 122 { 123 while ((inb(port+5) & 0x20)==0); 124 outb(port, 0x0d); 125 } 126 } 127 128 int ser_printf(const char *fmt, ...) 129 { 130 va_list args; 131 int i; 132 133 va_start(args,fmt); 134 i = vsprintf(strbuf,fmt,args); 135 ser_puts(strbuf); 136 va_end(args); 137 return i; 138 } 139 #endif 140 #endif 141 142 /* The linked list of softc structures */ 143 struct gdt_softc_list gdt_softcs = TAILQ_HEAD_INITIALIZER(gdt_softcs); 144 /* controller cnt. */ 145 int gdt_cnt = 0; 146 /* event buffer */ 147 static gdt_evt_str ebuffer[GDT_MAX_EVENTS]; 148 static int elastidx, eoldidx; 149 /* statistics */ 150 gdt_statist_t gdt_stat; 151 152 /* Definitions for our use of the SIM private CCB area */ 153 #define ccb_sim_ptr spriv_ptr0 154 #define ccb_priority spriv_field1 155 156 static void iir_action(struct cam_sim *sim, union ccb *ccb); 157 static void iir_poll(struct cam_sim *sim); 158 static void iir_shutdown(void *arg, int howto); 159 static void iir_timeout(void *arg); 160 static void iir_watchdog(void *arg); 161 162 static void gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, 163 int *secs); 164 static int gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 165 u_int8_t service, u_int16_t opcode, 166 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3); 167 static int gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *ccb, 168 int timeout); 169 170 static struct gdt_ccb *gdt_get_ccb(struct gdt_softc *gdt); 171 172 static int gdt_sync_event(struct gdt_softc *gdt, int service, 173 u_int8_t index, struct gdt_ccb *gccb); 174 static int gdt_async_event(struct gdt_softc *gdt, int service); 175 static struct gdt_ccb *gdt_raw_cmd(struct gdt_softc *gdt, 176 union ccb *ccb, int *lock); 177 static struct gdt_ccb *gdt_cache_cmd(struct gdt_softc *gdt, 178 union ccb *ccb, int *lock); 179 static struct gdt_ccb *gdt_ioctl_cmd(struct gdt_softc *gdt, 180 gdt_ucmd_t *ucmd, int *lock); 181 static void gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb); 182 183 static void gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, 184 int nseg, int error); 185 static void gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, 186 int nseg, int error); 187 188 int 189 iir_init(struct gdt_softc *gdt) 190 { 191 u_int16_t cdev_cnt; 192 int i, id, drv_cyls, drv_hds, drv_secs; 193 struct gdt_ccb *gccb; 194 195 GDT_DPRINTF(GDT_D_DEBUG, ("iir_init()\n")); 196 197 gdt->sc_state = GDT_POLLING; 198 gdt_clear_events(); 199 bzero(&gdt_stat, sizeof(gdt_statist_t)); 200 201 SLIST_INIT(&gdt->sc_free_gccb); 202 SLIST_INIT(&gdt->sc_pending_gccb); 203 TAILQ_INIT(&gdt->sc_ccb_queue); 204 TAILQ_INIT(&gdt->sc_ucmd_queue); 205 TAILQ_INSERT_TAIL(&gdt_softcs, gdt, links); 206 207 /* DMA tag for mapping buffers into device visible space. */ 208 if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0, 209 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 210 /*highaddr*/BUS_SPACE_MAXADDR, 211 /*filter*/NULL, /*filterarg*/NULL, 212 /*maxsize*/MAXBSIZE, /*nsegments*/GDT_MAXSG, 213 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 214 /*flags*/BUS_DMA_ALLOCNOW, 215 /*lockfunc*/busdma_lock_mutex, /*lockarg*/&Giant, 216 &gdt->sc_buffer_dmat) != 0) { 217 printf("iir%d: bus_dma_tag_create(...,gdt->sc_buffer_dmat) failed\n", 218 gdt->sc_hanum); 219 return (1); 220 } 221 gdt->sc_init_level++; 222 223 /* DMA tag for our ccb structures */ 224 if (bus_dma_tag_create(gdt->sc_parent_dmat, 225 /*alignment*/1, 226 /*boundary*/0, 227 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 228 /*highaddr*/BUS_SPACE_MAXADDR, 229 /*filter*/NULL, 230 /*filterarg*/NULL, 231 GDT_MAXCMDS * GDT_SCRATCH_SZ, /* maxsize */ 232 /*nsegments*/1, 233 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 234 /*flags*/0, /*lockfunc*/busdma_lock_mutex, 235 /*lockarg*/&Giant, &gdt->sc_gcscratch_dmat) != 0) { 236 printf("iir%d: bus_dma_tag_create(...,gdt->sc_gcscratch_dmat) failed\n", 237 gdt->sc_hanum); 238 return (1); 239 } 240 gdt->sc_init_level++; 241 242 /* Allocation for our ccb scratch area */ 243 if (bus_dmamem_alloc(gdt->sc_gcscratch_dmat, (void **)&gdt->sc_gcscratch, 244 BUS_DMA_NOWAIT, &gdt->sc_gcscratch_dmamap) != 0) { 245 printf("iir%d: bus_dmamem_alloc(...,&gdt->sc_gccbs,...) failed\n", 246 gdt->sc_hanum); 247 return (1); 248 } 249 gdt->sc_init_level++; 250 251 /* And permanently map them */ 252 bus_dmamap_load(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap, 253 gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ, 254 gdtmapmem, &gdt->sc_gcscratch_busbase, /*flags*/0); 255 gdt->sc_init_level++; 256 257 /* Clear them out. */ 258 bzero(gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ); 259 260 /* Initialize the ccbs */ 261 gdt->sc_gccbs = malloc(sizeof(struct gdt_ccb) * GDT_MAXCMDS, M_GDTBUF, 262 M_NOWAIT | M_ZERO); 263 if (gdt->sc_gccbs == NULL) { 264 printf("iir%d: no memory for gccbs.\n", gdt->sc_hanum); 265 return (1); 266 } 267 for (i = GDT_MAXCMDS-1; i >= 0; i--) { 268 gccb = &gdt->sc_gccbs[i]; 269 gccb->gc_cmd_index = i + 2; 270 gccb->gc_flags = GDT_GCF_UNUSED; 271 gccb->gc_map_flag = FALSE; 272 if (bus_dmamap_create(gdt->sc_buffer_dmat, /*flags*/0, 273 &gccb->gc_dmamap) != 0) 274 return(1); 275 gccb->gc_map_flag = TRUE; 276 gccb->gc_scratch = &gdt->sc_gcscratch[GDT_SCRATCH_SZ * i]; 277 gccb->gc_scratch_busbase = gdt->sc_gcscratch_busbase + GDT_SCRATCH_SZ * i; 278 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle); 279 } 280 gdt->sc_init_level++; 281 282 /* create the control device */ 283 gdt->sc_dev = gdt_make_dev(gdt->sc_hanum); 284 285 /* allocate ccb for gdt_internal_cmd() */ 286 gccb = gdt_get_ccb(gdt); 287 if (gccb == NULL) { 288 printf("iir%d: No free command index found\n", 289 gdt->sc_hanum); 290 return (1); 291 } 292 bzero(gccb->gc_cmd, GDT_CMD_SZ); 293 294 if (!gdt_internal_cmd(gdt, gccb, GDT_SCREENSERVICE, GDT_INIT, 295 0, 0, 0)) { 296 printf("iir%d: Screen service initialization error %d\n", 297 gdt->sc_hanum, gdt->sc_status); 298 gdt_free_ccb(gdt, gccb); 299 return (1); 300 } 301 302 gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_UNFREEZE_IO, 303 0, 0, 0); 304 305 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INIT, 306 GDT_LINUX_OS, 0, 0)) { 307 printf("iir%d: Cache service initialization error %d\n", 308 gdt->sc_hanum, gdt->sc_status); 309 gdt_free_ccb(gdt, gccb); 310 return (1); 311 } 312 cdev_cnt = (u_int16_t)gdt->sc_info; 313 gdt->sc_fw_vers = gdt->sc_service; 314 315 /* Detect number of buses */ 316 gdt_enc32(gccb->gc_scratch + GDT_IOC_VERSION, GDT_IOC_NEWEST); 317 gccb->gc_scratch[GDT_IOC_LIST_ENTRIES] = GDT_MAXBUS; 318 gccb->gc_scratch[GDT_IOC_FIRST_CHAN] = 0; 319 gccb->gc_scratch[GDT_IOC_LAST_CHAN] = GDT_MAXBUS - 1; 320 gdt_enc32(gccb->gc_scratch + GDT_IOC_LIST_OFFSET, GDT_IOC_HDR_SZ); 321 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 322 GDT_IOCHAN_RAW_DESC, GDT_INVALID_CHANNEL, 323 GDT_IOC_HDR_SZ + GDT_MAXBUS * GDT_RAWIOC_SZ)) { 324 gdt->sc_bus_cnt = gccb->gc_scratch[GDT_IOC_CHAN_COUNT]; 325 for (i = 0; i < gdt->sc_bus_cnt; i++) { 326 id = gccb->gc_scratch[GDT_IOC_HDR_SZ + 327 i * GDT_RAWIOC_SZ + GDT_RAWIOC_PROC_ID]; 328 gdt->sc_bus_id[i] = id < GDT_MAXID_FC ? id : 0xff; 329 } 330 } else { 331 /* New method failed, use fallback. */ 332 for (i = 0; i < GDT_MAXBUS; i++) { 333 gdt_enc32(gccb->gc_scratch + GDT_GETCH_CHANNEL_NO, i); 334 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 335 GDT_SCSI_CHAN_CNT | GDT_L_CTRL_PATTERN, 336 GDT_IO_CHANNEL | GDT_INVALID_CHANNEL, 337 GDT_GETCH_SZ)) { 338 if (i == 0) { 339 printf("iir%d: Cannot get channel count, " 340 "error %d\n", gdt->sc_hanum, gdt->sc_status); 341 gdt_free_ccb(gdt, gccb); 342 return (1); 343 } 344 break; 345 } 346 gdt->sc_bus_id[i] = 347 (gccb->gc_scratch[GDT_GETCH_SIOP_ID] < GDT_MAXID_FC) ? 348 gccb->gc_scratch[GDT_GETCH_SIOP_ID] : 0xff; 349 } 350 gdt->sc_bus_cnt = i; 351 } 352 /* add one "virtual" channel for the host drives */ 353 gdt->sc_virt_bus = gdt->sc_bus_cnt; 354 gdt->sc_bus_cnt++; 355 356 if (!gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_INIT, 357 0, 0, 0)) { 358 printf("iir%d: Raw service initialization error %d\n", 359 gdt->sc_hanum, gdt->sc_status); 360 gdt_free_ccb(gdt, gccb); 361 return (1); 362 } 363 364 /* Set/get features raw service (scatter/gather) */ 365 gdt->sc_raw_feat = 0; 366 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_SET_FEAT, 367 GDT_SCATTER_GATHER, 0, 0)) { 368 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_GET_FEAT, 369 0, 0, 0)) { 370 gdt->sc_raw_feat = gdt->sc_info; 371 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 372 panic("iir%d: Scatter/Gather Raw Service " 373 "required but not supported!\n", gdt->sc_hanum); 374 gdt_free_ccb(gdt, gccb); 375 return (1); 376 } 377 } 378 } 379 380 /* Set/get features cache service (scatter/gather) */ 381 gdt->sc_cache_feat = 0; 382 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_SET_FEAT, 383 0, GDT_SCATTER_GATHER, 0)) { 384 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_GET_FEAT, 385 0, 0, 0)) { 386 gdt->sc_cache_feat = gdt->sc_info; 387 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 388 panic("iir%d: Scatter/Gather Cache Service " 389 "required but not supported!\n", gdt->sc_hanum); 390 gdt_free_ccb(gdt, gccb); 391 return (1); 392 } 393 } 394 } 395 396 /* OEM */ 397 gdt_enc32(gccb->gc_scratch + GDT_OEM_VERSION, 0x01); 398 gdt_enc32(gccb->gc_scratch + GDT_OEM_BUFSIZE, sizeof(gdt_oem_record_t)); 399 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 400 GDT_OEM_STR_RECORD, GDT_INVALID_CHANNEL, 401 sizeof(gdt_oem_str_record_t))) { 402 strncpy(gdt->oem_name, ((gdt_oem_str_record_t *) 403 gccb->gc_scratch)->text.scsi_host_drive_inquiry_vendor_id, 7); 404 gdt->oem_name[7]='\0'; 405 } else { 406 /* Old method, based on PCI ID */ 407 if (gdt->sc_vendor == INTEL_VENDOR_ID) 408 strcpy(gdt->oem_name,"Intel "); 409 else 410 strcpy(gdt->oem_name,"ICP "); 411 } 412 413 /* Scan for cache devices */ 414 for (i = 0; i < cdev_cnt && i < GDT_MAX_HDRIVES; i++) { 415 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INFO, 416 i, 0, 0)) { 417 gdt->sc_hdr[i].hd_present = 1; 418 gdt->sc_hdr[i].hd_size = gdt->sc_info; 419 420 /* 421 * Evaluate mapping (sectors per head, heads per cyl) 422 */ 423 gdt->sc_hdr[i].hd_size &= ~GDT_SECS32; 424 if (gdt->sc_info2 == 0) 425 gdt_eval_mapping(gdt->sc_hdr[i].hd_size, 426 &drv_cyls, &drv_hds, &drv_secs); 427 else { 428 drv_hds = gdt->sc_info2 & 0xff; 429 drv_secs = (gdt->sc_info2 >> 8) & 0xff; 430 drv_cyls = gdt->sc_hdr[i].hd_size / drv_hds / 431 drv_secs; 432 } 433 gdt->sc_hdr[i].hd_heads = drv_hds; 434 gdt->sc_hdr[i].hd_secs = drv_secs; 435 /* Round the size */ 436 gdt->sc_hdr[i].hd_size = drv_cyls * drv_hds * drv_secs; 437 438 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, 439 GDT_DEVTYPE, i, 0, 0)) 440 gdt->sc_hdr[i].hd_devtype = gdt->sc_info; 441 } 442 } 443 444 GDT_DPRINTF(GDT_D_INIT, ("dpmem %x %d-bus %d cache device%s\n", 445 gdt->sc_dpmembase, 446 gdt->sc_bus_cnt, cdev_cnt, 447 cdev_cnt == 1 ? "" : "s")); 448 gdt_free_ccb(gdt, gccb); 449 450 gdt_cnt++; 451 return (0); 452 } 453 454 void 455 iir_free(struct gdt_softc *gdt) 456 { 457 int i; 458 459 GDT_DPRINTF(GDT_D_INIT, ("iir_free()\n")); 460 461 switch (gdt->sc_init_level) { 462 default: 463 gdt_destroy_dev(gdt->sc_dev); 464 case 5: 465 for (i = GDT_MAXCMDS-1; i >= 0; i--) 466 if (gdt->sc_gccbs[i].gc_map_flag) 467 bus_dmamap_destroy(gdt->sc_buffer_dmat, 468 gdt->sc_gccbs[i].gc_dmamap); 469 bus_dmamap_unload(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap); 470 free(gdt->sc_gccbs, M_GDTBUF); 471 case 4: 472 bus_dmamem_free(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch, gdt->sc_gcscratch_dmamap); 473 case 3: 474 bus_dma_tag_destroy(gdt->sc_gcscratch_dmat); 475 case 2: 476 bus_dma_tag_destroy(gdt->sc_buffer_dmat); 477 case 1: 478 bus_dma_tag_destroy(gdt->sc_parent_dmat); 479 case 0: 480 break; 481 } 482 TAILQ_REMOVE(&gdt_softcs, gdt, links); 483 } 484 485 void 486 iir_attach(struct gdt_softc *gdt) 487 { 488 struct cam_devq *devq; 489 int i; 490 491 GDT_DPRINTF(GDT_D_INIT, ("iir_attach()\n")); 492 493 /* 494 * Create the device queue for our SIM. 495 * XXX Throttle this down since the card has problems under load. 496 */ 497 devq = cam_simq_alloc(32); 498 if (devq == NULL) 499 return; 500 501 for (i = 0; i < gdt->sc_bus_cnt; i++) { 502 /* 503 * Construct our SIM entry 504 */ 505 gdt->sims[i] = cam_sim_alloc(iir_action, iir_poll, "iir", 506 gdt, gdt->sc_hanum, /*untagged*/1, 507 /*tagged*/GDT_MAXCMDS, devq); 508 if (xpt_bus_register(gdt->sims[i], i) != CAM_SUCCESS) { 509 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0); 510 break; 511 } 512 513 if (xpt_create_path(&gdt->paths[i], /*periph*/NULL, 514 cam_sim_path(gdt->sims[i]), 515 CAM_TARGET_WILDCARD, 516 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 517 xpt_bus_deregister(cam_sim_path(gdt->sims[i])); 518 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0); 519 break; 520 } 521 } 522 if (i > 0) 523 EVENTHANDLER_REGISTER(shutdown_final, iir_shutdown, 524 gdt, SHUTDOWN_PRI_DEFAULT); 525 /* iir_watchdog(gdt); */ 526 gdt->sc_state = GDT_NORMAL; 527 } 528 529 static void 530 gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, int *secs) 531 { 532 *cyls = size / GDT_HEADS / GDT_SECS; 533 if (*cyls < GDT_MAXCYLS) { 534 *heads = GDT_HEADS; 535 *secs = GDT_SECS; 536 } else { 537 /* Too high for 64 * 32 */ 538 *cyls = size / GDT_MEDHEADS / GDT_MEDSECS; 539 if (*cyls < GDT_MAXCYLS) { 540 *heads = GDT_MEDHEADS; 541 *secs = GDT_MEDSECS; 542 } else { 543 /* Too high for 127 * 63 */ 544 *cyls = size / GDT_BIGHEADS / GDT_BIGSECS; 545 *heads = GDT_BIGHEADS; 546 *secs = GDT_BIGSECS; 547 } 548 } 549 } 550 551 static int 552 gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *gccb, 553 int timeout) 554 { 555 int rv = 0; 556 557 GDT_DPRINTF(GDT_D_INIT, 558 ("gdt_wait(%p, %p, %d)\n", gdt, gccb, timeout)); 559 560 gdt->sc_state |= GDT_POLL_WAIT; 561 do { 562 iir_intr(gdt); 563 if (gdt == gdt_wait_gdt && 564 gccb->gc_cmd_index == gdt_wait_index) { 565 rv = 1; 566 break; 567 } 568 DELAY(1); 569 } while (--timeout); 570 gdt->sc_state &= ~GDT_POLL_WAIT; 571 572 while (gdt->sc_test_busy(gdt)) 573 DELAY(1); /* XXX correct? */ 574 575 return (rv); 576 } 577 578 static int 579 gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 580 u_int8_t service, u_int16_t opcode, 581 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3) 582 { 583 int retries; 584 585 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cmd(%p, %d, %d, %d, %d, %d)\n", 586 gdt, service, opcode, arg1, arg2, arg3)); 587 588 bzero(gccb->gc_cmd, GDT_CMD_SZ); 589 590 for (retries = GDT_RETRIES; ; ) { 591 gccb->gc_service = service; 592 gccb->gc_flags = GDT_GCF_INTERNAL; 593 594 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 595 gccb->gc_cmd_index); 596 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode); 597 598 switch (service) { 599 case GDT_CACHESERVICE: 600 if (opcode == GDT_IOCTL) { 601 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 602 GDT_IOCTL_SUBFUNC, arg1); 603 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 604 GDT_IOCTL_CHANNEL, arg2); 605 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + 606 GDT_IOCTL_PARAM_SIZE, (u_int16_t)arg3); 607 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 608 gccb->gc_scratch_busbase); 609 } else { 610 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + 611 GDT_CACHE_DEVICENO, (u_int16_t)arg1); 612 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 613 GDT_CACHE_BLOCKNO, arg2); 614 } 615 break; 616 617 case GDT_SCSIRAWSERVICE: 618 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 619 GDT_RAW_DIRECTION, arg1); 620 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 621 (u_int8_t)arg2; 622 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 623 (u_int8_t)arg3; 624 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 625 (u_int8_t)(arg3 >> 8); 626 } 627 628 gdt->sc_set_sema0(gdt); 629 gccb->gc_cmd_len = GDT_CMD_SZ; 630 gdt->sc_cmd_off = 0; 631 gdt->sc_cmd_cnt = 0; 632 gdt->sc_copy_cmd(gdt, gccb); 633 gdt->sc_release_event(gdt); 634 DELAY(20); 635 if (!gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT)) 636 return (0); 637 if (gdt->sc_status != GDT_S_BSY || --retries == 0) 638 break; 639 DELAY(1); 640 } 641 return (gdt->sc_status == GDT_S_OK); 642 } 643 644 static struct gdt_ccb * 645 gdt_get_ccb(struct gdt_softc *gdt) 646 { 647 struct gdt_ccb *gccb; 648 int lock; 649 650 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_get_ccb(%p)\n", gdt)); 651 652 lock = splcam(); 653 gccb = SLIST_FIRST(&gdt->sc_free_gccb); 654 if (gccb != NULL) { 655 SLIST_REMOVE_HEAD(&gdt->sc_free_gccb, sle); 656 SLIST_INSERT_HEAD(&gdt->sc_pending_gccb, gccb, sle); 657 ++gdt_stat.cmd_index_act; 658 if (gdt_stat.cmd_index_act > gdt_stat.cmd_index_max) 659 gdt_stat.cmd_index_max = gdt_stat.cmd_index_act; 660 } 661 splx(lock); 662 return (gccb); 663 } 664 665 void 666 gdt_free_ccb(struct gdt_softc *gdt, struct gdt_ccb *gccb) 667 { 668 int lock; 669 670 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_free_ccb(%p, %p)\n", gdt, gccb)); 671 672 lock = splcam(); 673 gccb->gc_flags = GDT_GCF_UNUSED; 674 SLIST_REMOVE(&gdt->sc_pending_gccb, gccb, gdt_ccb, sle); 675 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle); 676 --gdt_stat.cmd_index_act; 677 splx(lock); 678 if (gdt->sc_state & GDT_SHUTDOWN) 679 wakeup(gccb); 680 } 681 682 void 683 gdt_next(struct gdt_softc *gdt) 684 { 685 int lock; 686 union ccb *ccb; 687 gdt_ucmd_t *ucmd; 688 struct cam_sim *sim; 689 int bus, target, lun; 690 int next_cmd; 691 692 struct ccb_scsiio *csio; 693 struct ccb_hdr *ccbh; 694 struct gdt_ccb *gccb = NULL; 695 u_int8_t cmd; 696 697 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_next(%p)\n", gdt)); 698 699 lock = splcam(); 700 if (gdt->sc_test_busy(gdt)) { 701 if (!(gdt->sc_state & GDT_POLLING)) { 702 splx(lock); 703 return; 704 } 705 while (gdt->sc_test_busy(gdt)) 706 DELAY(1); 707 } 708 709 gdt->sc_cmd_cnt = gdt->sc_cmd_off = 0; 710 next_cmd = TRUE; 711 for (;;) { 712 /* I/Os in queue? controller ready? */ 713 if (!TAILQ_FIRST(&gdt->sc_ucmd_queue) && 714 !TAILQ_FIRST(&gdt->sc_ccb_queue)) 715 break; 716 717 /* 1.: I/Os without ccb (IOCTLs) */ 718 ucmd = TAILQ_FIRST(&gdt->sc_ucmd_queue); 719 if (ucmd != NULL) { 720 TAILQ_REMOVE(&gdt->sc_ucmd_queue, ucmd, links); 721 if ((gccb = gdt_ioctl_cmd(gdt, ucmd, &lock)) == NULL) { 722 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 723 break; 724 } 725 break; 726 /* wenn mehrere Kdos. zulassen: if (!gdt_polling) continue; */ 727 } 728 729 /* 2.: I/Os with ccb */ 730 ccb = (union ccb *)TAILQ_FIRST(&gdt->sc_ccb_queue); 731 /* ist dann immer != NULL, da oben getestet */ 732 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 733 bus = cam_sim_bus(sim); 734 target = ccb->ccb_h.target_id; 735 lun = ccb->ccb_h.target_lun; 736 737 TAILQ_REMOVE(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 738 --gdt_stat.req_queue_act; 739 /* ccb->ccb_h.func_code is XPT_SCSI_IO */ 740 GDT_DPRINTF(GDT_D_QUEUE, ("XPT_SCSI_IO flags 0x%x)\n", 741 ccb->ccb_h.flags)); 742 csio = &ccb->csio; 743 ccbh = &ccb->ccb_h; 744 cmd = csio->cdb_io.cdb_bytes[0]; 745 /* Max CDB length is 12 bytes */ 746 if (csio->cdb_len > 12) { 747 ccbh->status = CAM_REQ_INVALID; 748 --gdt_stat.io_count_act; 749 xpt_done(ccb); 750 } else if (bus != gdt->sc_virt_bus) { 751 /* raw service command */ 752 if ((gccb = gdt_raw_cmd(gdt, ccb, &lock)) == NULL) { 753 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 754 sim_links.tqe); 755 ++gdt_stat.req_queue_act; 756 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 757 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 758 next_cmd = FALSE; 759 } 760 } else if (target >= GDT_MAX_HDRIVES || 761 !gdt->sc_hdr[target].hd_present || lun != 0) { 762 ccbh->status = CAM_DEV_NOT_THERE; 763 --gdt_stat.io_count_act; 764 xpt_done(ccb); 765 } else { 766 /* cache service command */ 767 if (cmd == READ_6 || cmd == WRITE_6 || 768 cmd == READ_10 || cmd == WRITE_10) { 769 if ((gccb = gdt_cache_cmd(gdt, ccb, &lock)) == NULL) { 770 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 771 sim_links.tqe); 772 ++gdt_stat.req_queue_act; 773 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 774 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 775 next_cmd = FALSE; 776 } 777 } else { 778 splx(lock); 779 gdt_internal_cache_cmd(gdt, ccb); 780 lock = splcam(); 781 } 782 } 783 if ((gdt->sc_state & GDT_POLLING) || !next_cmd) 784 break; 785 } 786 if (gdt->sc_cmd_cnt > 0) 787 gdt->sc_release_event(gdt); 788 789 splx(lock); 790 791 if ((gdt->sc_state & GDT_POLLING) && gdt->sc_cmd_cnt > 0) { 792 gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT); 793 } 794 } 795 796 static struct gdt_ccb * 797 gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb, int *lock) 798 { 799 struct gdt_ccb *gccb; 800 struct cam_sim *sim; 801 802 GDT_DPRINTF(GDT_D_CMD, ("gdt_raw_cmd(%p, %p)\n", gdt, ccb)); 803 804 if (roundup(GDT_CMD_UNION + GDT_RAW_SZ, sizeof(u_int32_t)) + 805 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 806 gdt->sc_ic_all_size) { 807 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_raw_cmd(): DPMEM overflow\n", 808 gdt->sc_hanum)); 809 return (NULL); 810 } 811 812 gccb = gdt_get_ccb(gdt); 813 if (gccb == NULL) { 814 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: No free command index found\n", 815 gdt->sc_hanum)); 816 return (gccb); 817 } 818 bzero(gccb->gc_cmd, GDT_CMD_SZ); 819 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 820 gccb->gc_ccb = ccb; 821 gccb->gc_service = GDT_SCSIRAWSERVICE; 822 gccb->gc_flags = GDT_GCF_SCSI; 823 824 if (gdt->sc_cmd_cnt == 0) 825 gdt->sc_set_sema0(gdt); 826 splx(*lock); 827 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 828 gccb->gc_cmd_index); 829 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 830 831 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 832 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 833 GDT_DATA_IN : GDT_DATA_OUT); 834 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 835 ccb->csio.dxfer_len); 836 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 837 ccb->csio.cdb_len); 838 bcopy(ccb->csio.cdb_io.cdb_bytes, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 839 ccb->csio.cdb_len); 840 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 841 ccb->ccb_h.target_id; 842 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 843 ccb->ccb_h.target_lun; 844 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 845 cam_sim_bus(sim); 846 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 847 sizeof(struct scsi_sense_data)); 848 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 849 gccb->gc_scratch_busbase); 850 851 /* 852 * If we have any data to send with this command, 853 * map it into bus space. 854 */ 855 /* Only use S/G if there is a transfer */ 856 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 857 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 858 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 859 int s; 860 int error; 861 862 /* vorher unlock von splcam() ??? */ 863 s = splsoftvm(); 864 error = 865 bus_dmamap_load(gdt->sc_buffer_dmat, 866 gccb->gc_dmamap, 867 ccb->csio.data_ptr, 868 ccb->csio.dxfer_len, 869 gdtexecuteccb, 870 gccb, /*flags*/0); 871 if (error == EINPROGRESS) { 872 xpt_freeze_simq(sim, 1); 873 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 874 } 875 splx(s); 876 } else { 877 panic("iir: CAM_DATA_PHYS not supported"); 878 } 879 } else { 880 struct bus_dma_segment *segs; 881 882 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 883 panic("iir%d: iir_action - Physical " 884 "segment pointers unsupported", gdt->sc_hanum); 885 886 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 887 panic("iir%d: iir_action - Virtual " 888 "segment addresses unsupported", gdt->sc_hanum); 889 890 /* Just use the segments provided */ 891 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 892 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 893 } 894 } else { 895 gdtexecuteccb(gccb, NULL, 0, 0); 896 } 897 898 *lock = splcam(); 899 return (gccb); 900 } 901 902 static struct gdt_ccb * 903 gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb, int *lock) 904 { 905 struct gdt_ccb *gccb; 906 struct cam_sim *sim; 907 u_int8_t *cmdp; 908 u_int16_t opcode; 909 u_int32_t blockno, blockcnt; 910 911 GDT_DPRINTF(GDT_D_CMD, ("gdt_cache_cmd(%p, %p)\n", gdt, ccb)); 912 913 if (roundup(GDT_CMD_UNION + GDT_CACHE_SZ, sizeof(u_int32_t)) + 914 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 915 gdt->sc_ic_all_size) { 916 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_cache_cmd(): DPMEM overflow\n", 917 gdt->sc_hanum)); 918 return (NULL); 919 } 920 921 gccb = gdt_get_ccb(gdt); 922 if (gccb == NULL) { 923 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 924 gdt->sc_hanum)); 925 return (gccb); 926 } 927 bzero(gccb->gc_cmd, GDT_CMD_SZ); 928 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 929 gccb->gc_ccb = ccb; 930 gccb->gc_service = GDT_CACHESERVICE; 931 gccb->gc_flags = GDT_GCF_SCSI; 932 933 if (gdt->sc_cmd_cnt == 0) 934 gdt->sc_set_sema0(gdt); 935 splx(*lock); 936 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 937 gccb->gc_cmd_index); 938 cmdp = ccb->csio.cdb_io.cdb_bytes; 939 opcode = (*cmdp == WRITE_6 || *cmdp == WRITE_10) ? GDT_WRITE : GDT_READ; 940 if ((gdt->sc_state & GDT_SHUTDOWN) && opcode == GDT_WRITE) 941 opcode = GDT_WRITE_THR; 942 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode); 943 944 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 945 ccb->ccb_h.target_id); 946 if (ccb->csio.cdb_len == 6) { 947 struct scsi_rw_6 *rw = (struct scsi_rw_6 *)cmdp; 948 blockno = scsi_3btoul(rw->addr) & ((SRW_TOPADDR<<16) | 0xffff); 949 blockcnt = rw->length ? rw->length : 0x100; 950 } else { 951 struct scsi_rw_10 *rw = (struct scsi_rw_10 *)cmdp; 952 blockno = scsi_4btoul(rw->addr); 953 blockcnt = scsi_2btoul(rw->length); 954 } 955 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 956 blockno); 957 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 958 blockcnt); 959 960 /* 961 * If we have any data to send with this command, 962 * map it into bus space. 963 */ 964 /* Only use S/G if there is a transfer */ 965 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 966 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 967 int s; 968 int error; 969 970 /* vorher unlock von splcam() ??? */ 971 s = splsoftvm(); 972 error = 973 bus_dmamap_load(gdt->sc_buffer_dmat, 974 gccb->gc_dmamap, 975 ccb->csio.data_ptr, 976 ccb->csio.dxfer_len, 977 gdtexecuteccb, 978 gccb, /*flags*/0); 979 if (error == EINPROGRESS) { 980 xpt_freeze_simq(sim, 1); 981 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 982 } 983 splx(s); 984 } else { 985 panic("iir: CAM_DATA_PHYS not supported"); 986 } 987 } else { 988 struct bus_dma_segment *segs; 989 990 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 991 panic("iir%d: iir_action - Physical " 992 "segment pointers unsupported", gdt->sc_hanum); 993 994 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 995 panic("iir%d: iir_action - Virtual " 996 "segment addresses unsupported", gdt->sc_hanum); 997 998 /* Just use the segments provided */ 999 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 1000 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 1001 } 1002 1003 *lock = splcam(); 1004 return (gccb); 1005 } 1006 1007 static struct gdt_ccb * 1008 gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd, int *lock) 1009 { 1010 struct gdt_ccb *gccb; 1011 u_int32_t cnt; 1012 1013 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_ioctl_cmd(%p, %p)\n", gdt, ucmd)); 1014 1015 gccb = gdt_get_ccb(gdt); 1016 if (gccb == NULL) { 1017 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 1018 gdt->sc_hanum)); 1019 return (gccb); 1020 } 1021 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1022 gccb->gc_ucmd = ucmd; 1023 gccb->gc_service = ucmd->service; 1024 gccb->gc_flags = GDT_GCF_IOCTL; 1025 1026 /* check DPMEM space, copy data buffer from user space */ 1027 if (ucmd->service == GDT_CACHESERVICE) { 1028 if (ucmd->OpCode == GDT_IOCTL) { 1029 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_IOCTL_SZ, 1030 sizeof(u_int32_t)); 1031 cnt = ucmd->u.ioctl.param_size; 1032 if (cnt > GDT_SCRATCH_SZ) { 1033 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1034 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1035 gdt_free_ccb(gdt, gccb); 1036 return (NULL); 1037 } 1038 } else { 1039 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1040 GDT_SG_SZ, sizeof(u_int32_t)); 1041 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1042 if (cnt > GDT_SCRATCH_SZ) { 1043 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1044 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1045 gdt_free_ccb(gdt, gccb); 1046 return (NULL); 1047 } 1048 } 1049 } else { 1050 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1051 GDT_SG_SZ, sizeof(u_int32_t)); 1052 cnt = ucmd->u.raw.sdlen; 1053 if (cnt + ucmd->u.raw.sense_len > GDT_SCRATCH_SZ) { 1054 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1055 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt + ucmd->u.raw.sense_len); 1056 gdt_free_ccb(gdt, gccb); 1057 return (NULL); 1058 } 1059 } 1060 if (cnt != 0) 1061 bcopy(ucmd->data, gccb->gc_scratch, cnt); 1062 1063 if (gdt->sc_cmd_off + gccb->gc_cmd_len + GDT_DPMEM_COMMAND_OFFSET > 1064 gdt->sc_ic_all_size) { 1065 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_ioctl_cmd(): DPMEM overflow\n", 1066 gdt->sc_hanum)); 1067 gdt_free_ccb(gdt, gccb); 1068 return (NULL); 1069 } 1070 1071 if (gdt->sc_cmd_cnt == 0) 1072 gdt->sc_set_sema0(gdt); 1073 splx(*lock); 1074 1075 /* fill cmd structure */ 1076 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1077 gccb->gc_cmd_index); 1078 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, 1079 ucmd->OpCode); 1080 1081 if (ucmd->service == GDT_CACHESERVICE) { 1082 if (ucmd->OpCode == GDT_IOCTL) { 1083 /* IOCTL */ 1084 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_PARAM_SIZE, 1085 ucmd->u.ioctl.param_size); 1086 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_SUBFUNC, 1087 ucmd->u.ioctl.subfunc); 1088 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_CHANNEL, 1089 ucmd->u.ioctl.channel); 1090 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 1091 gccb->gc_scratch_busbase); 1092 } else { 1093 /* cache service command */ 1094 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 1095 ucmd->u.cache.DeviceNo); 1096 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 1097 ucmd->u.cache.BlockNo); 1098 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 1099 ucmd->u.cache.BlockCnt); 1100 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1101 0xffffffffUL); 1102 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1103 1); 1104 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1105 GDT_SG_PTR, gccb->gc_scratch_busbase); 1106 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1107 GDT_SG_LEN, ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE); 1108 } 1109 } else { 1110 /* raw service command */ 1111 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 1112 ucmd->u.raw.direction); 1113 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1114 0xffffffffUL); 1115 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 1116 ucmd->u.raw.sdlen); 1117 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 1118 ucmd->u.raw.clen); 1119 bcopy(ucmd->u.raw.cmd, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 1120 12); 1121 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 1122 ucmd->u.raw.target; 1123 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 1124 ucmd->u.raw.lun; 1125 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 1126 ucmd->u.raw.bus; 1127 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 1128 ucmd->u.raw.sense_len); 1129 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 1130 gccb->gc_scratch_busbase + ucmd->u.raw.sdlen); 1131 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1132 1); 1133 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1134 GDT_SG_PTR, gccb->gc_scratch_busbase); 1135 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1136 GDT_SG_LEN, ucmd->u.raw.sdlen); 1137 } 1138 1139 *lock = splcam(); 1140 gdt_stat.sg_count_act = 1; 1141 gdt->sc_copy_cmd(gdt, gccb); 1142 return (gccb); 1143 } 1144 1145 static void 1146 gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb) 1147 { 1148 int t; 1149 1150 t = ccb->ccb_h.target_id; 1151 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cache_cmd(%p, %p, 0x%x, %d)\n", 1152 gdt, ccb, ccb->csio.cdb_io.cdb_bytes[0], t)); 1153 1154 switch (ccb->csio.cdb_io.cdb_bytes[0]) { 1155 case TEST_UNIT_READY: 1156 case START_STOP: 1157 break; 1158 case REQUEST_SENSE: 1159 GDT_DPRINTF(GDT_D_MISC, ("REQUEST_SENSE\n")); 1160 break; 1161 case INQUIRY: 1162 { 1163 struct scsi_inquiry_data inq; 1164 size_t copylen = MIN(sizeof(inq), ccb->csio.dxfer_len); 1165 1166 bzero(&inq, sizeof(inq)); 1167 inq.device = (gdt->sc_hdr[t].hd_devtype & 4) ? 1168 T_CDROM : T_DIRECT; 1169 inq.dev_qual2 = (gdt->sc_hdr[t].hd_devtype & 1) ? 0x80 : 0; 1170 inq.version = SCSI_REV_2; 1171 inq.response_format = 2; 1172 inq.additional_length = 32; 1173 inq.flags = SID_CmdQue | SID_Sync; 1174 strncpy(inq.vendor, gdt->oem_name, sizeof(inq.vendor)); 1175 snprintf(inq.product, sizeof(inq.product), 1176 "Host Drive #%02d", t); 1177 strncpy(inq.revision, " ", sizeof(inq.revision)); 1178 bcopy(&inq, ccb->csio.data_ptr, copylen ); 1179 if( ccb->csio.dxfer_len > copylen ) 1180 bzero( ccb->csio.data_ptr+copylen, 1181 ccb->csio.dxfer_len - copylen ); 1182 break; 1183 } 1184 case MODE_SENSE_6: 1185 { 1186 struct mpd_data { 1187 struct scsi_mode_hdr_6 hd; 1188 struct scsi_mode_block_descr bd; 1189 struct scsi_control_page cp; 1190 } mpd; 1191 size_t copylen = MIN(sizeof(mpd), ccb->csio.dxfer_len); 1192 u_int8_t page; 1193 1194 /*mpd = (struct mpd_data *)ccb->csio.data_ptr;*/ 1195 bzero(&mpd, sizeof(mpd)); 1196 mpd.hd.datalen = sizeof(struct scsi_mode_hdr_6) + 1197 sizeof(struct scsi_mode_block_descr); 1198 mpd.hd.dev_specific = (gdt->sc_hdr[t].hd_devtype & 2) ? 0x80 : 0; 1199 mpd.hd.block_descr_len = sizeof(struct scsi_mode_block_descr); 1200 mpd.bd.block_len[0] = (GDT_SECTOR_SIZE & 0x00ff0000) >> 16; 1201 mpd.bd.block_len[1] = (GDT_SECTOR_SIZE & 0x0000ff00) >> 8; 1202 mpd.bd.block_len[2] = (GDT_SECTOR_SIZE & 0x000000ff); 1203 1204 bcopy(&mpd, ccb->csio.data_ptr, copylen ); 1205 if( ccb->csio.dxfer_len > copylen ) 1206 bzero( ccb->csio.data_ptr+copylen, 1207 ccb->csio.dxfer_len - copylen ); 1208 page=((struct scsi_mode_sense_6 *)ccb->csio.cdb_io.cdb_bytes)->page; 1209 switch (page) { 1210 default: 1211 GDT_DPRINTF(GDT_D_MISC, ("MODE_SENSE_6: page 0x%x\n", page)); 1212 break; 1213 } 1214 break; 1215 } 1216 case READ_CAPACITY: 1217 { 1218 struct scsi_read_capacity_data rcd; 1219 size_t copylen = MIN(sizeof(rcd), ccb->csio.dxfer_len); 1220 1221 /*rcd = (struct scsi_read_capacity_data *)ccb->csio.data_ptr;*/ 1222 bzero(&rcd, sizeof(rcd)); 1223 scsi_ulto4b(gdt->sc_hdr[t].hd_size - 1, rcd.addr); 1224 scsi_ulto4b(GDT_SECTOR_SIZE, rcd.length); 1225 bcopy(&rcd, ccb->csio.data_ptr, copylen ); 1226 if( ccb->csio.dxfer_len > copylen ) 1227 bzero( ccb->csio.data_ptr+copylen, 1228 ccb->csio.dxfer_len - copylen ); 1229 break; 1230 } 1231 default: 1232 GDT_DPRINTF(GDT_D_MISC, ("gdt_internal_cache_cmd(%d) unknown\n", 1233 ccb->csio.cdb_io.cdb_bytes[0])); 1234 break; 1235 } 1236 ccb->ccb_h.status |= CAM_REQ_CMP; 1237 --gdt_stat.io_count_act; 1238 xpt_done(ccb); 1239 } 1240 1241 static void 1242 gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1243 { 1244 bus_addr_t *busaddrp; 1245 1246 busaddrp = (bus_addr_t *)arg; 1247 *busaddrp = dm_segs->ds_addr; 1248 } 1249 1250 static void 1251 gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1252 { 1253 struct gdt_ccb *gccb; 1254 union ccb *ccb; 1255 struct gdt_softc *gdt; 1256 int i, lock; 1257 1258 lock = splcam(); 1259 1260 gccb = (struct gdt_ccb *)arg; 1261 ccb = gccb->gc_ccb; 1262 gdt = cam_sim_softc((struct cam_sim *)ccb->ccb_h.ccb_sim_ptr); 1263 1264 GDT_DPRINTF(GDT_D_CMD, ("gdtexecuteccb(%p, %p, %p, %d, %d)\n", 1265 gdt, gccb, dm_segs, nseg, error)); 1266 gdt_stat.sg_count_act = nseg; 1267 if (nseg > gdt_stat.sg_count_max) 1268 gdt_stat.sg_count_max = nseg; 1269 1270 /* Copy the segments into our SG list */ 1271 if (gccb->gc_service == GDT_CACHESERVICE) { 1272 for (i = 0; i < nseg; ++i) { 1273 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1274 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1275 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1276 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1277 dm_segs++; 1278 } 1279 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1280 nseg); 1281 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1282 0xffffffffUL); 1283 1284 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1285 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1286 } else { 1287 for (i = 0; i < nseg; ++i) { 1288 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1289 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1290 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1291 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1292 dm_segs++; 1293 } 1294 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1295 nseg); 1296 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1297 0xffffffffUL); 1298 1299 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1300 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1301 } 1302 1303 if (nseg != 0) { 1304 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, 1305 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 1306 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1307 } 1308 1309 /* We must NOT abort the command here if CAM_REQ_INPROG is not set, 1310 * because command semaphore is already set! 1311 */ 1312 1313 ccb->ccb_h.status |= CAM_SIM_QUEUED; 1314 /* timeout handling */ 1315 ccb->ccb_h.timeout_ch = 1316 timeout(iir_timeout, (caddr_t)gccb, 1317 (ccb->ccb_h.timeout * hz) / 1000); 1318 1319 gdt->sc_copy_cmd(gdt, gccb); 1320 splx(lock); 1321 } 1322 1323 1324 static void 1325 iir_action( struct cam_sim *sim, union ccb *ccb ) 1326 { 1327 struct gdt_softc *gdt; 1328 int lock, bus, target, lun; 1329 1330 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1331 ccb->ccb_h.ccb_sim_ptr = sim; 1332 bus = cam_sim_bus(sim); 1333 target = ccb->ccb_h.target_id; 1334 lun = ccb->ccb_h.target_lun; 1335 GDT_DPRINTF(GDT_D_CMD, 1336 ("iir_action(%p) func 0x%x cmd 0x%x bus %d target %d lun %d\n", 1337 gdt, ccb->ccb_h.func_code, ccb->csio.cdb_io.cdb_bytes[0], 1338 bus, target, lun)); 1339 ++gdt_stat.io_count_act; 1340 if (gdt_stat.io_count_act > gdt_stat.io_count_max) 1341 gdt_stat.io_count_max = gdt_stat.io_count_act; 1342 1343 switch (ccb->ccb_h.func_code) { 1344 case XPT_SCSI_IO: 1345 lock = splcam(); 1346 TAILQ_INSERT_TAIL(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1347 ++gdt_stat.req_queue_act; 1348 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1349 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1350 splx(lock); 1351 gdt_next(gdt); 1352 break; 1353 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1354 case XPT_ABORT: /* Abort the specified CCB */ 1355 /* XXX Implement */ 1356 ccb->ccb_h.status = CAM_REQ_INVALID; 1357 --gdt_stat.io_count_act; 1358 xpt_done(ccb); 1359 break; 1360 case XPT_SET_TRAN_SETTINGS: 1361 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1362 --gdt_stat.io_count_act; 1363 xpt_done(ccb); 1364 break; 1365 case XPT_GET_TRAN_SETTINGS: 1366 /* Get default/user set transfer settings for the target */ 1367 { 1368 struct ccb_trans_settings *cts; 1369 u_int target_mask; 1370 1371 cts = &ccb->cts; 1372 target_mask = 0x01 << target; 1373 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) { 1374 cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB; 1375 cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT; 1376 cts->sync_period = 25; /* 10MHz */ 1377 if (cts->sync_period != 0) 1378 cts->sync_offset = 15; 1379 1380 cts->valid = CCB_TRANS_SYNC_RATE_VALID 1381 | CCB_TRANS_SYNC_OFFSET_VALID 1382 | CCB_TRANS_BUS_WIDTH_VALID 1383 | CCB_TRANS_DISC_VALID 1384 | CCB_TRANS_TQ_VALID; 1385 ccb->ccb_h.status = CAM_REQ_CMP; 1386 } else { 1387 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1388 } 1389 --gdt_stat.io_count_act; 1390 xpt_done(ccb); 1391 break; 1392 } 1393 case XPT_CALC_GEOMETRY: 1394 { 1395 struct ccb_calc_geometry *ccg; 1396 u_int32_t secs_per_cylinder; 1397 1398 ccg = &ccb->ccg; 1399 ccg->heads = gdt->sc_hdr[target].hd_heads; 1400 ccg->secs_per_track = gdt->sc_hdr[target].hd_secs; 1401 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1402 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1403 ccb->ccb_h.status = CAM_REQ_CMP; 1404 --gdt_stat.io_count_act; 1405 xpt_done(ccb); 1406 break; 1407 } 1408 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1409 { 1410 /* XXX Implement */ 1411 ccb->ccb_h.status = CAM_REQ_CMP; 1412 --gdt_stat.io_count_act; 1413 xpt_done(ccb); 1414 break; 1415 } 1416 case XPT_TERM_IO: /* Terminate the I/O process */ 1417 /* XXX Implement */ 1418 ccb->ccb_h.status = CAM_REQ_INVALID; 1419 --gdt_stat.io_count_act; 1420 xpt_done(ccb); 1421 break; 1422 case XPT_PATH_INQ: /* Path routing inquiry */ 1423 { 1424 struct ccb_pathinq *cpi = &ccb->cpi; 1425 1426 cpi->version_num = 1; 1427 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE; 1428 cpi->hba_inquiry |= PI_WIDE_16; 1429 cpi->target_sprt = 1; 1430 cpi->hba_misc = 0; 1431 cpi->hba_eng_cnt = 0; 1432 if (bus == gdt->sc_virt_bus) 1433 cpi->max_target = GDT_MAX_HDRIVES - 1; 1434 else if (gdt->sc_class & GDT_FC) 1435 cpi->max_target = GDT_MAXID_FC - 1; 1436 else 1437 cpi->max_target = GDT_MAXID - 1; 1438 cpi->max_lun = 7; 1439 cpi->unit_number = cam_sim_unit(sim); 1440 cpi->bus_id = bus; 1441 cpi->initiator_id = 1442 (bus == gdt->sc_virt_bus ? 127 : gdt->sc_bus_id[bus]); 1443 cpi->base_transfer_speed = 3300; 1444 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1445 if (gdt->sc_vendor == INTEL_VENDOR_ID) 1446 strncpy(cpi->hba_vid, "Intel Corp.", HBA_IDLEN); 1447 else 1448 strncpy(cpi->hba_vid, "ICP vortex ", HBA_IDLEN); 1449 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1450 cpi->ccb_h.status = CAM_REQ_CMP; 1451 --gdt_stat.io_count_act; 1452 xpt_done(ccb); 1453 break; 1454 } 1455 default: 1456 GDT_DPRINTF(GDT_D_INVALID, ("gdt_next(%p) cmd 0x%x invalid\n", 1457 gdt, ccb->ccb_h.func_code)); 1458 ccb->ccb_h.status = CAM_REQ_INVALID; 1459 --gdt_stat.io_count_act; 1460 xpt_done(ccb); 1461 break; 1462 } 1463 } 1464 1465 static void 1466 iir_poll( struct cam_sim *sim ) 1467 { 1468 struct gdt_softc *gdt; 1469 1470 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1471 GDT_DPRINTF(GDT_D_CMD, ("iir_poll sim %p gdt %p\n", sim, gdt)); 1472 iir_intr(gdt); 1473 } 1474 1475 static void 1476 iir_timeout(void *arg) 1477 { 1478 GDT_DPRINTF(GDT_D_TIMEOUT, ("iir_timeout(%p)\n", gccb)); 1479 } 1480 1481 static void 1482 iir_watchdog(void *arg) 1483 { 1484 struct gdt_softc *gdt; 1485 1486 gdt = (struct gdt_softc *)arg; 1487 GDT_DPRINTF(GDT_D_DEBUG, ("iir_watchdog(%p)\n", gdt)); 1488 1489 { 1490 int ccbs = 0, ucmds = 0, frees = 0, pends = 0; 1491 struct gdt_ccb *p; 1492 struct ccb_hdr *h; 1493 struct gdt_ucmd *u; 1494 1495 for (h = TAILQ_FIRST(&gdt->sc_ccb_queue); h != NULL; 1496 h = TAILQ_NEXT(h, sim_links.tqe)) 1497 ccbs++; 1498 for (u = TAILQ_FIRST(&gdt->sc_ucmd_queue); u != NULL; 1499 u = TAILQ_NEXT(u, links)) 1500 ucmds++; 1501 for (p = SLIST_FIRST(&gdt->sc_free_gccb); p != NULL; 1502 p = SLIST_NEXT(p, sle)) 1503 frees++; 1504 for (p = SLIST_FIRST(&gdt->sc_pending_gccb); p != NULL; 1505 p = SLIST_NEXT(p, sle)) 1506 pends++; 1507 1508 GDT_DPRINTF(GDT_D_TIMEOUT, ("ccbs %d ucmds %d frees %d pends %d\n", 1509 ccbs, ucmds, frees, pends)); 1510 } 1511 1512 timeout(iir_watchdog, (caddr_t)gdt, hz * 15); 1513 } 1514 1515 static void 1516 iir_shutdown( void *arg, int howto ) 1517 { 1518 struct gdt_softc *gdt; 1519 struct gdt_ccb *gccb; 1520 gdt_ucmd_t *ucmd; 1521 int lock, i; 1522 1523 gdt = (struct gdt_softc *)arg; 1524 GDT_DPRINTF(GDT_D_CMD, ("iir_shutdown(%p, %d)\n", gdt, howto)); 1525 1526 printf("iir%d: Flushing all Host Drives. Please wait ... ", 1527 gdt->sc_hanum); 1528 1529 /* allocate ucmd buffer */ 1530 ucmd = malloc(sizeof(gdt_ucmd_t), M_GDTBUF, M_NOWAIT); 1531 if (ucmd == NULL) { 1532 printf("iir%d: iir_shutdown(): Cannot allocate resource\n", 1533 gdt->sc_hanum); 1534 return; 1535 } 1536 bzero(ucmd, sizeof(gdt_ucmd_t)); 1537 1538 /* wait for pending IOs */ 1539 lock = splcam(); 1540 gdt->sc_state = GDT_SHUTDOWN; 1541 splx(lock); 1542 if ((gccb = SLIST_FIRST(&gdt->sc_pending_gccb)) != NULL) 1543 (void) tsleep((void *)gccb, PCATCH | PRIBIO, "iirshw", 100 * hz); 1544 1545 /* flush */ 1546 for (i = 0; i < GDT_MAX_HDRIVES; ++i) { 1547 if (gdt->sc_hdr[i].hd_present) { 1548 ucmd->service = GDT_CACHESERVICE; 1549 ucmd->OpCode = GDT_FLUSH; 1550 ucmd->u.cache.DeviceNo = i; 1551 lock = splcam(); 1552 TAILQ_INSERT_TAIL(&gdt->sc_ucmd_queue, ucmd, links); 1553 ucmd->complete_flag = FALSE; 1554 splx(lock); 1555 gdt_next(gdt); 1556 if (!ucmd->complete_flag) 1557 (void) tsleep((void *)ucmd, PCATCH|PRIBIO, "iirshw", 10*hz); 1558 } 1559 } 1560 1561 free(ucmd, M_DEVBUF); 1562 printf("Done.\n"); 1563 } 1564 1565 void 1566 iir_intr(void *arg) 1567 { 1568 struct gdt_softc *gdt = arg; 1569 struct gdt_intr_ctx ctx; 1570 int lock = 0; 1571 struct gdt_ccb *gccb; 1572 gdt_ucmd_t *ucmd; 1573 u_int32_t cnt; 1574 1575 GDT_DPRINTF(GDT_D_INTR, ("gdt_intr(%p)\n", gdt)); 1576 1577 /* If polling and we were not called from gdt_wait, just return */ 1578 if ((gdt->sc_state & GDT_POLLING) && 1579 !(gdt->sc_state & GDT_POLL_WAIT)) 1580 return; 1581 1582 if (!(gdt->sc_state & GDT_POLLING)) 1583 lock = splcam(); 1584 gdt_wait_index = 0; 1585 1586 ctx.istatus = gdt->sc_get_status(gdt); 1587 if (ctx.istatus == 0x00) { 1588 if (!(gdt->sc_state & GDT_POLLING)) 1589 splx(lock); 1590 gdt->sc_status = GDT_S_NO_STATUS; 1591 return; 1592 } 1593 1594 gdt->sc_intr(gdt, &ctx); 1595 1596 gdt->sc_status = ctx.cmd_status; 1597 gdt->sc_service = ctx.service; 1598 gdt->sc_info = ctx.info; 1599 gdt->sc_info2 = ctx.info2; 1600 1601 if (gdt->sc_state & GDT_POLL_WAIT) { 1602 gdt_wait_gdt = gdt; 1603 gdt_wait_index = ctx.istatus; 1604 } 1605 1606 if (ctx.istatus == GDT_ASYNCINDEX) { 1607 gdt_async_event(gdt, ctx.service); 1608 if (!(gdt->sc_state & GDT_POLLING)) 1609 splx(lock); 1610 return; 1611 } 1612 if (ctx.istatus == GDT_SPEZINDEX) { 1613 GDT_DPRINTF(GDT_D_INVALID, 1614 ("iir%d: Service unknown or not initialized!\n", 1615 gdt->sc_hanum)); 1616 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1617 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1618 gdt_store_event(GDT_ES_DRIVER, 4, &gdt->sc_dvr); 1619 if (!(gdt->sc_state & GDT_POLLING)) 1620 splx(lock); 1621 return; 1622 } 1623 1624 gccb = &gdt->sc_gccbs[ctx.istatus - 2]; 1625 ctx.service = gccb->gc_service; 1626 1627 switch (gccb->gc_flags) { 1628 case GDT_GCF_UNUSED: 1629 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: Index (%d) to unused command!\n", 1630 gdt->sc_hanum, ctx.istatus)); 1631 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1632 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1633 gdt->sc_dvr.eu.driver.index = ctx.istatus; 1634 gdt_store_event(GDT_ES_DRIVER, 1, &gdt->sc_dvr); 1635 gdt_free_ccb(gdt, gccb); 1636 /* fallthrough */ 1637 1638 case GDT_GCF_INTERNAL: 1639 if (!(gdt->sc_state & GDT_POLLING)) 1640 splx(lock); 1641 break; 1642 1643 case GDT_GCF_IOCTL: 1644 ucmd = gccb->gc_ucmd; 1645 if (gdt->sc_status == GDT_S_BSY) { 1646 GDT_DPRINTF(GDT_D_DEBUG, ("iir_intr(%p) ioctl: gccb %p busy\n", 1647 gdt, gccb)); 1648 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 1649 if (!(gdt->sc_state & GDT_POLLING)) 1650 splx(lock); 1651 } else { 1652 ucmd->status = gdt->sc_status; 1653 ucmd->info = gdt->sc_info; 1654 ucmd->complete_flag = TRUE; 1655 if (ucmd->service == GDT_CACHESERVICE) { 1656 if (ucmd->OpCode == GDT_IOCTL) { 1657 cnt = ucmd->u.ioctl.param_size; 1658 if (cnt != 0) 1659 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1660 } else { 1661 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1662 if (cnt != 0) 1663 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1664 } 1665 } else { 1666 cnt = ucmd->u.raw.sdlen; 1667 if (cnt != 0) 1668 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1669 if (ucmd->u.raw.sense_len != 0) 1670 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1671 } 1672 gdt_free_ccb(gdt, gccb); 1673 if (!(gdt->sc_state & GDT_POLLING)) 1674 splx(lock); 1675 /* wakeup */ 1676 wakeup(ucmd); 1677 } 1678 gdt_next(gdt); 1679 break; 1680 1681 default: 1682 gdt_free_ccb(gdt, gccb); 1683 gdt_sync_event(gdt, ctx.service, ctx.istatus, gccb); 1684 if (!(gdt->sc_state & GDT_POLLING)) 1685 splx(lock); 1686 gdt_next(gdt); 1687 break; 1688 } 1689 } 1690 1691 int 1692 gdt_async_event(struct gdt_softc *gdt, int service) 1693 { 1694 struct gdt_ccb *gccb; 1695 1696 GDT_DPRINTF(GDT_D_INTR, ("gdt_async_event(%p, %d)\n", gdt, service)); 1697 1698 if (service == GDT_SCREENSERVICE) { 1699 if (gdt->sc_status == GDT_MSG_REQUEST) { 1700 while (gdt->sc_test_busy(gdt)) 1701 DELAY(1); 1702 gccb = gdt_get_ccb(gdt); 1703 if (gccb == NULL) { 1704 printf("iir%d: No free command index found\n", 1705 gdt->sc_hanum); 1706 return (1); 1707 } 1708 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1709 gccb->gc_service = service; 1710 gccb->gc_flags = GDT_GCF_SCREEN; 1711 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1712 gccb->gc_cmd_index); 1713 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ); 1714 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1715 GDT_MSG_INV_HANDLE); 1716 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1717 gccb->gc_scratch_busbase); 1718 gdt->sc_set_sema0(gdt); 1719 gdt->sc_cmd_off = 0; 1720 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1721 sizeof(u_int32_t)); 1722 gdt->sc_cmd_cnt = 0; 1723 gdt->sc_copy_cmd(gdt, gccb); 1724 printf("iir%d: [PCI %d/%d] ", 1725 gdt->sc_hanum,gdt->sc_bus,gdt->sc_slot); 1726 gdt->sc_release_event(gdt); 1727 } 1728 1729 } else { 1730 if ((gdt->sc_fw_vers & 0xff) >= 0x1a) { 1731 gdt->sc_dvr.size = 0; 1732 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1733 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1734 /* severity and event_string already set! */ 1735 } else { 1736 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.async); 1737 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1738 gdt->sc_dvr.eu.async.service = service; 1739 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1740 gdt->sc_dvr.eu.async.info = gdt->sc_info; 1741 *(u_int32_t *)gdt->sc_dvr.eu.async.scsi_coord = gdt->sc_info2; 1742 } 1743 gdt_store_event(GDT_ES_ASYNC, service, &gdt->sc_dvr); 1744 printf("iir%d: %s\n", gdt->sc_hanum, gdt->sc_dvr.event_string); 1745 } 1746 1747 return (0); 1748 } 1749 1750 int 1751 gdt_sync_event(struct gdt_softc *gdt, int service, 1752 u_int8_t index, struct gdt_ccb *gccb) 1753 { 1754 union ccb *ccb; 1755 1756 GDT_DPRINTF(GDT_D_INTR, 1757 ("gdt_sync_event(%p, %d, %d, %p)\n", gdt,service,index,gccb)); 1758 1759 ccb = gccb->gc_ccb; 1760 1761 if (service == GDT_SCREENSERVICE) { 1762 u_int32_t msg_len; 1763 1764 msg_len = gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_LEN); 1765 if (msg_len) 1766 if (!(gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1767 gccb->gc_scratch[GDT_SCR_MSG_EXT])) { 1768 gccb->gc_scratch[GDT_SCR_MSG_TEXT + msg_len] = '\0'; 1769 printf("%s",&gccb->gc_scratch[GDT_SCR_MSG_TEXT]); 1770 } 1771 1772 if (gccb->gc_scratch[GDT_SCR_MSG_EXT] && 1773 !gccb->gc_scratch[GDT_SCR_MSG_ANSWER]) { 1774 while (gdt->sc_test_busy(gdt)) 1775 DELAY(1); 1776 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1777 gccb = gdt_get_ccb(gdt); 1778 if (gccb == NULL) { 1779 printf("iir%d: No free command index found\n", 1780 gdt->sc_hanum); 1781 return (1); 1782 } 1783 gccb->gc_service = service; 1784 gccb->gc_flags = GDT_GCF_SCREEN; 1785 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1786 gccb->gc_cmd_index); 1787 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ); 1788 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1789 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1790 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1791 gccb->gc_scratch_busbase); 1792 gdt->sc_set_sema0(gdt); 1793 gdt->sc_cmd_off = 0; 1794 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1795 sizeof(u_int32_t)); 1796 gdt->sc_cmd_cnt = 0; 1797 gdt->sc_copy_cmd(gdt, gccb); 1798 gdt->sc_release_event(gdt); 1799 return (0); 1800 } 1801 1802 if (gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1803 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN)) { 1804 /* default answers (getchar() not possible) */ 1805 if (gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) == 1) { 1806 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 0); 1807 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 1); 1808 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 0; 1809 } else { 1810 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 1811 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) - 2); 1812 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 2); 1813 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 1; 1814 gccb->gc_scratch[GDT_SCR_MSG_TEXT + 1] = 0; 1815 } 1816 gccb->gc_scratch[GDT_SCR_MSG_EXT] = 0; 1817 gccb->gc_scratch[GDT_SCR_MSG_ANSWER] = 0; 1818 while (gdt->sc_test_busy(gdt)) 1819 DELAY(1); 1820 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1821 gccb = gdt_get_ccb(gdt); 1822 if (gccb == NULL) { 1823 printf("iir%d: No free command index found\n", 1824 gdt->sc_hanum); 1825 return (1); 1826 } 1827 gccb->gc_service = service; 1828 gccb->gc_flags = GDT_GCF_SCREEN; 1829 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1830 gccb->gc_cmd_index); 1831 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 1832 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1833 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1834 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1835 gccb->gc_scratch_busbase); 1836 gdt->sc_set_sema0(gdt); 1837 gdt->sc_cmd_off = 0; 1838 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1839 sizeof(u_int32_t)); 1840 gdt->sc_cmd_cnt = 0; 1841 gdt->sc_copy_cmd(gdt, gccb); 1842 gdt->sc_release_event(gdt); 1843 return (0); 1844 } 1845 printf("\n"); 1846 return (0); 1847 } else { 1848 untimeout(iir_timeout, gccb, ccb->ccb_h.timeout_ch); 1849 if (gdt->sc_status == GDT_S_BSY) { 1850 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_sync_event(%p) gccb %p busy\n", 1851 gdt, gccb)); 1852 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1853 ++gdt_stat.req_queue_act; 1854 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1855 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1856 return (2); 1857 } 1858 1859 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, 1860 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 1861 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1862 bus_dmamap_unload(gdt->sc_buffer_dmat, gccb->gc_dmamap); 1863 1864 ccb->csio.resid = 0; 1865 if (gdt->sc_status == GDT_S_OK) { 1866 ccb->ccb_h.status |= CAM_REQ_CMP; 1867 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 1868 } else { 1869 /* error */ 1870 if (gccb->gc_service == GDT_CACHESERVICE) { 1871 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID; 1872 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 1873 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1874 bzero(&ccb->csio.sense_data, ccb->csio.sense_len); 1875 ccb->csio.sense_data.error_code = 1876 SSD_CURRENT_ERROR | SSD_ERRCODE_VALID; 1877 ccb->csio.sense_data.flags = SSD_KEY_NOT_READY; 1878 1879 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.sync); 1880 gdt->sc_dvr.eu.sync.ionode = gdt->sc_hanum; 1881 gdt->sc_dvr.eu.sync.service = service; 1882 gdt->sc_dvr.eu.sync.status = gdt->sc_status; 1883 gdt->sc_dvr.eu.sync.info = gdt->sc_info; 1884 gdt->sc_dvr.eu.sync.hostdrive = ccb->ccb_h.target_id; 1885 if (gdt->sc_status >= 0x8000) 1886 gdt_store_event(GDT_ES_SYNC, 0, &gdt->sc_dvr); 1887 else 1888 gdt_store_event(GDT_ES_SYNC, service, &gdt->sc_dvr); 1889 } else { 1890 /* raw service */ 1891 if (gdt->sc_status != GDT_S_RAW_SCSI || gdt->sc_info >= 0x100) { 1892 ccb->ccb_h.status = CAM_DEV_NOT_THERE; 1893 } else { 1894 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR|CAM_AUTOSNS_VALID; 1895 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 1896 ccb->csio.scsi_status = gdt->sc_info; 1897 bcopy(gccb->gc_scratch, &ccb->csio.sense_data, 1898 ccb->csio.sense_len); 1899 } 1900 } 1901 } 1902 --gdt_stat.io_count_act; 1903 xpt_done(ccb); 1904 } 1905 return (0); 1906 } 1907 1908 /* Controller event handling functions */ 1909 gdt_evt_str *gdt_store_event(u_int16_t source, u_int16_t idx, 1910 gdt_evt_data *evt) 1911 { 1912 gdt_evt_str *e; 1913 struct timeval tv; 1914 1915 GDT_DPRINTF(GDT_D_MISC, ("gdt_store_event(%d, %d)\n", source, idx)); 1916 if (source == 0) /* no source -> no event */ 1917 return 0; 1918 1919 if (ebuffer[elastidx].event_source == source && 1920 ebuffer[elastidx].event_idx == idx && 1921 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 && 1922 !memcmp((char *)&ebuffer[elastidx].event_data.eu, 1923 (char *)&evt->eu, evt->size)) || 1924 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 && 1925 !strcmp((char *)&ebuffer[elastidx].event_data.event_string, 1926 (char *)&evt->event_string)))) { 1927 e = &ebuffer[elastidx]; 1928 getmicrotime(&tv); 1929 e->last_stamp = tv.tv_sec; 1930 ++e->same_count; 1931 } else { 1932 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */ 1933 ++elastidx; 1934 if (elastidx == GDT_MAX_EVENTS) 1935 elastidx = 0; 1936 if (elastidx == eoldidx) { /* reached mark ? */ 1937 ++eoldidx; 1938 if (eoldidx == GDT_MAX_EVENTS) 1939 eoldidx = 0; 1940 } 1941 } 1942 e = &ebuffer[elastidx]; 1943 e->event_source = source; 1944 e->event_idx = idx; 1945 getmicrotime(&tv); 1946 e->first_stamp = e->last_stamp = tv.tv_sec; 1947 e->same_count = 1; 1948 e->event_data = *evt; 1949 e->application = 0; 1950 } 1951 return e; 1952 } 1953 1954 int gdt_read_event(int handle, gdt_evt_str *estr) 1955 { 1956 gdt_evt_str *e; 1957 int eindex, lock; 1958 1959 GDT_DPRINTF(GDT_D_MISC, ("gdt_read_event(%d)\n", handle)); 1960 lock = splcam(); 1961 if (handle == -1) 1962 eindex = eoldidx; 1963 else 1964 eindex = handle; 1965 estr->event_source = 0; 1966 1967 if (eindex >= GDT_MAX_EVENTS) { 1968 splx(lock); 1969 return eindex; 1970 } 1971 e = &ebuffer[eindex]; 1972 if (e->event_source != 0) { 1973 if (eindex != elastidx) { 1974 if (++eindex == GDT_MAX_EVENTS) 1975 eindex = 0; 1976 } else { 1977 eindex = -1; 1978 } 1979 memcpy(estr, e, sizeof(gdt_evt_str)); 1980 } 1981 splx(lock); 1982 return eindex; 1983 } 1984 1985 void gdt_readapp_event(u_int8_t application, gdt_evt_str *estr) 1986 { 1987 gdt_evt_str *e; 1988 int found = FALSE; 1989 int eindex, lock; 1990 1991 GDT_DPRINTF(GDT_D_MISC, ("gdt_readapp_event(%d)\n", application)); 1992 lock = splcam(); 1993 eindex = eoldidx; 1994 for (;;) { 1995 e = &ebuffer[eindex]; 1996 if (e->event_source == 0) 1997 break; 1998 if ((e->application & application) == 0) { 1999 e->application |= application; 2000 found = TRUE; 2001 break; 2002 } 2003 if (eindex == elastidx) 2004 break; 2005 if (++eindex == GDT_MAX_EVENTS) 2006 eindex = 0; 2007 } 2008 if (found) 2009 memcpy(estr, e, sizeof(gdt_evt_str)); 2010 else 2011 estr->event_source = 0; 2012 splx(lock); 2013 } 2014 2015 void gdt_clear_events() 2016 { 2017 GDT_DPRINTF(GDT_D_MISC, ("gdt_clear_events\n")); 2018 2019 eoldidx = elastidx = 0; 2020 ebuffer[0].event_source = 0; 2021 }
Cache object: 887de97f3e051143f0c95846fb6d391f
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