Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/iir/iir.c
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1 /*- 2 * Copyright (c) 2000-04 ICP vortex GmbH 3 * Copyright (c) 2002-04 Intel Corporation 4 * Copyright (c) 2003-04 Adaptec Inc. 5 * All Rights Reserved 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 /* 33 * iir.c: SCSI dependant code for the Intel Integrated RAID Controller driver 34 * 35 * Written by: Achim Leubner <achim_leubner@adaptec.com> 36 * Fixes/Additions: Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com> 37 * 38 * credits: Niklas Hallqvist; OpenBSD driver for the ICP Controllers. 39 * Mike Smith; Some driver source code. 40 * FreeBSD.ORG; Great O/S to work on and for. 41 * 42 * $Id: iir.c 1.5 2004/03/30 10:17:53 achim Exp $" 43 */ 44 45 #include <sys/cdefs.h> 46 __FBSDID("$FreeBSD$"); 47 48 #define _IIR_C_ 49 50 /* #include "opt_iir.h" */ 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/endian.h> 54 #include <sys/eventhandler.h> 55 #include <sys/malloc.h> 56 #include <sys/kernel.h> 57 #include <sys/bus.h> 58 59 #include <machine/bus.h> 60 #include <machine/stdarg.h> 61 62 #include <cam/cam.h> 63 #include <cam/cam_ccb.h> 64 #include <cam/cam_sim.h> 65 #include <cam/cam_xpt_sim.h> 66 #include <cam/cam_debug.h> 67 #include <cam/scsi/scsi_all.h> 68 #include <cam/scsi/scsi_message.h> 69 70 #include <vm/vm.h> 71 #include <vm/pmap.h> 72 73 #include <dev/iir/iir.h> 74 75 MALLOC_DEFINE(M_GDTBUF, "iirbuf", "iir driver buffer"); 76 77 struct gdt_softc *gdt_wait_gdt; 78 int gdt_wait_index; 79 80 #ifdef GDT_DEBUG 81 int gdt_debug = GDT_DEBUG; 82 #ifdef __SERIAL__ 83 #define MAX_SERBUF 160 84 static void ser_init(void); 85 static void ser_puts(char *str); 86 static void ser_putc(int c); 87 static char strbuf[MAX_SERBUF+1]; 88 #ifdef __COM2__ 89 #define COM_BASE 0x2f8 90 #else 91 #define COM_BASE 0x3f8 92 #endif 93 static void ser_init() 94 { 95 unsigned port=COM_BASE; 96 97 outb(port+3, 0x80); 98 outb(port+1, 0); 99 /* 19200 Baud, if 9600: outb(12,port) */ 100 outb(port, 6); 101 outb(port+3, 3); 102 outb(port+1, 0); 103 } 104 105 static void ser_puts(char *str) 106 { 107 char *ptr; 108 109 ser_init(); 110 for (ptr=str;*ptr;++ptr) 111 ser_putc((int)(*ptr)); 112 } 113 114 static void ser_putc(int c) 115 { 116 unsigned port=COM_BASE; 117 118 while ((inb(port+5) & 0x20)==0); 119 outb(port, c); 120 if (c==0x0a) 121 { 122 while ((inb(port+5) & 0x20)==0); 123 outb(port, 0x0d); 124 } 125 } 126 127 int ser_printf(const char *fmt, ...) 128 { 129 va_list args; 130 int i; 131 132 va_start(args,fmt); 133 i = vsprintf(strbuf,fmt,args); 134 ser_puts(strbuf); 135 va_end(args); 136 return i; 137 } 138 #endif 139 #endif 140 141 /* The linked list of softc structures */ 142 struct gdt_softc_list gdt_softcs = TAILQ_HEAD_INITIALIZER(gdt_softcs); 143 /* controller cnt. */ 144 int gdt_cnt = 0; 145 /* event buffer */ 146 static gdt_evt_str ebuffer[GDT_MAX_EVENTS]; 147 static int elastidx, eoldidx; 148 /* statistics */ 149 gdt_statist_t gdt_stat; 150 151 /* Definitions for our use of the SIM private CCB area */ 152 #define ccb_sim_ptr spriv_ptr0 153 #define ccb_priority spriv_field1 154 155 static void iir_action(struct cam_sim *sim, union ccb *ccb); 156 static void iir_poll(struct cam_sim *sim); 157 static void iir_shutdown(void *arg, int howto); 158 static void iir_timeout(void *arg); 159 static void iir_watchdog(void *arg); 160 161 static void gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, 162 int *secs); 163 static int gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 164 u_int8_t service, u_int16_t opcode, 165 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3); 166 static int gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *ccb, 167 int timeout); 168 169 static struct gdt_ccb *gdt_get_ccb(struct gdt_softc *gdt); 170 171 static int gdt_sync_event(struct gdt_softc *gdt, int service, 172 u_int8_t index, struct gdt_ccb *gccb); 173 static int gdt_async_event(struct gdt_softc *gdt, int service); 174 static struct gdt_ccb *gdt_raw_cmd(struct gdt_softc *gdt, 175 union ccb *ccb, int *lock); 176 static struct gdt_ccb *gdt_cache_cmd(struct gdt_softc *gdt, 177 union ccb *ccb, int *lock); 178 static struct gdt_ccb *gdt_ioctl_cmd(struct gdt_softc *gdt, 179 gdt_ucmd_t *ucmd, int *lock); 180 static void gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb); 181 182 static void gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, 183 int nseg, int error); 184 static void gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, 185 int nseg, int error); 186 187 int 188 iir_init(struct gdt_softc *gdt) 189 { 190 u_int16_t cdev_cnt; 191 int i, id, drv_cyls, drv_hds, drv_secs; 192 struct gdt_ccb *gccb; 193 194 GDT_DPRINTF(GDT_D_DEBUG, ("iir_init()\n")); 195 196 gdt->sc_state = GDT_POLLING; 197 gdt_clear_events(); 198 bzero(&gdt_stat, sizeof(gdt_statist_t)); 199 200 SLIST_INIT(&gdt->sc_free_gccb); 201 SLIST_INIT(&gdt->sc_pending_gccb); 202 TAILQ_INIT(&gdt->sc_ccb_queue); 203 TAILQ_INIT(&gdt->sc_ucmd_queue); 204 TAILQ_INSERT_TAIL(&gdt_softcs, gdt, links); 205 206 /* DMA tag for mapping buffers into device visible space. */ 207 if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0, 208 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 209 /*highaddr*/BUS_SPACE_MAXADDR, 210 /*filter*/NULL, /*filterarg*/NULL, 211 /*maxsize*/MAXBSIZE, /*nsegments*/GDT_MAXSG, 212 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 213 /*flags*/BUS_DMA_ALLOCNOW, 214 /*lockfunc*/busdma_lock_mutex, /*lockarg*/&Giant, 215 &gdt->sc_buffer_dmat) != 0) { 216 printf("iir%d: bus_dma_tag_create(...,gdt->sc_buffer_dmat) failed\n", 217 gdt->sc_hanum); 218 return (1); 219 } 220 gdt->sc_init_level++; 221 222 /* DMA tag for our ccb structures */ 223 if (bus_dma_tag_create(gdt->sc_parent_dmat, 224 /*alignment*/1, 225 /*boundary*/0, 226 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 227 /*highaddr*/BUS_SPACE_MAXADDR, 228 /*filter*/NULL, 229 /*filterarg*/NULL, 230 GDT_MAXCMDS * GDT_SCRATCH_SZ, /* maxsize */ 231 /*nsegments*/1, 232 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 233 /*flags*/0, /*lockfunc*/busdma_lock_mutex, 234 /*lockarg*/&Giant, &gdt->sc_gcscratch_dmat) != 0) { 235 printf("iir%d: bus_dma_tag_create(...,gdt->sc_gcscratch_dmat) failed\n", 236 gdt->sc_hanum); 237 return (1); 238 } 239 gdt->sc_init_level++; 240 241 /* Allocation for our ccb scratch area */ 242 if (bus_dmamem_alloc(gdt->sc_gcscratch_dmat, (void **)&gdt->sc_gcscratch, 243 BUS_DMA_NOWAIT, &gdt->sc_gcscratch_dmamap) != 0) { 244 printf("iir%d: bus_dmamem_alloc(...,&gdt->sc_gccbs,...) failed\n", 245 gdt->sc_hanum); 246 return (1); 247 } 248 gdt->sc_init_level++; 249 250 /* And permanently map them */ 251 bus_dmamap_load(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap, 252 gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ, 253 gdtmapmem, &gdt->sc_gcscratch_busbase, /*flags*/0); 254 gdt->sc_init_level++; 255 256 /* Clear them out. */ 257 bzero(gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ); 258 259 /* Initialize the ccbs */ 260 gdt->sc_gccbs = malloc(sizeof(struct gdt_ccb) * GDT_MAXCMDS, M_GDTBUF, 261 M_NOWAIT | M_ZERO); 262 if (gdt->sc_gccbs == NULL) { 263 printf("iir%d: no memory for gccbs.\n", gdt->sc_hanum); 264 return (1); 265 } 266 for (i = GDT_MAXCMDS-1; i >= 0; i--) { 267 gccb = &gdt->sc_gccbs[i]; 268 gccb->gc_cmd_index = i + 2; 269 gccb->gc_flags = GDT_GCF_UNUSED; 270 gccb->gc_map_flag = FALSE; 271 if (bus_dmamap_create(gdt->sc_buffer_dmat, /*flags*/0, 272 &gccb->gc_dmamap) != 0) 273 return(1); 274 gccb->gc_map_flag = TRUE; 275 gccb->gc_scratch = &gdt->sc_gcscratch[GDT_SCRATCH_SZ * i]; 276 gccb->gc_scratch_busbase = gdt->sc_gcscratch_busbase + GDT_SCRATCH_SZ * i; 277 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle); 278 } 279 gdt->sc_init_level++; 280 281 /* create the control device */ 282 gdt->sc_dev = gdt_make_dev(gdt->sc_hanum); 283 284 /* allocate ccb for gdt_internal_cmd() */ 285 gccb = gdt_get_ccb(gdt); 286 if (gccb == NULL) { 287 printf("iir%d: No free command index found\n", 288 gdt->sc_hanum); 289 return (1); 290 } 291 bzero(gccb->gc_cmd, GDT_CMD_SZ); 292 293 if (!gdt_internal_cmd(gdt, gccb, GDT_SCREENSERVICE, GDT_INIT, 294 0, 0, 0)) { 295 printf("iir%d: Screen service initialization error %d\n", 296 gdt->sc_hanum, gdt->sc_status); 297 gdt_free_ccb(gdt, gccb); 298 return (1); 299 } 300 301 gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_UNFREEZE_IO, 302 0, 0, 0); 303 304 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INIT, 305 GDT_LINUX_OS, 0, 0)) { 306 printf("iir%d: Cache service initialization error %d\n", 307 gdt->sc_hanum, gdt->sc_status); 308 gdt_free_ccb(gdt, gccb); 309 return (1); 310 } 311 cdev_cnt = (u_int16_t)gdt->sc_info; 312 gdt->sc_fw_vers = gdt->sc_service; 313 314 /* Detect number of buses */ 315 gdt_enc32(gccb->gc_scratch + GDT_IOC_VERSION, GDT_IOC_NEWEST); 316 gccb->gc_scratch[GDT_IOC_LIST_ENTRIES] = GDT_MAXBUS; 317 gccb->gc_scratch[GDT_IOC_FIRST_CHAN] = 0; 318 gccb->gc_scratch[GDT_IOC_LAST_CHAN] = GDT_MAXBUS - 1; 319 gdt_enc32(gccb->gc_scratch + GDT_IOC_LIST_OFFSET, GDT_IOC_HDR_SZ); 320 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 321 GDT_IOCHAN_RAW_DESC, GDT_INVALID_CHANNEL, 322 GDT_IOC_HDR_SZ + GDT_MAXBUS * GDT_RAWIOC_SZ)) { 323 gdt->sc_bus_cnt = gccb->gc_scratch[GDT_IOC_CHAN_COUNT]; 324 for (i = 0; i < gdt->sc_bus_cnt; i++) { 325 id = gccb->gc_scratch[GDT_IOC_HDR_SZ + 326 i * GDT_RAWIOC_SZ + GDT_RAWIOC_PROC_ID]; 327 gdt->sc_bus_id[i] = id < GDT_MAXID_FC ? id : 0xff; 328 } 329 } else { 330 /* New method failed, use fallback. */ 331 for (i = 0; i < GDT_MAXBUS; i++) { 332 gdt_enc32(gccb->gc_scratch + GDT_GETCH_CHANNEL_NO, i); 333 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 334 GDT_SCSI_CHAN_CNT | GDT_L_CTRL_PATTERN, 335 GDT_IO_CHANNEL | GDT_INVALID_CHANNEL, 336 GDT_GETCH_SZ)) { 337 if (i == 0) { 338 printf("iir%d: Cannot get channel count, " 339 "error %d\n", gdt->sc_hanum, gdt->sc_status); 340 gdt_free_ccb(gdt, gccb); 341 return (1); 342 } 343 break; 344 } 345 gdt->sc_bus_id[i] = 346 (gccb->gc_scratch[GDT_GETCH_SIOP_ID] < GDT_MAXID_FC) ? 347 gccb->gc_scratch[GDT_GETCH_SIOP_ID] : 0xff; 348 } 349 gdt->sc_bus_cnt = i; 350 } 351 /* add one "virtual" channel for the host drives */ 352 gdt->sc_virt_bus = gdt->sc_bus_cnt; 353 gdt->sc_bus_cnt++; 354 355 if (!gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_INIT, 356 0, 0, 0)) { 357 printf("iir%d: Raw service initialization error %d\n", 358 gdt->sc_hanum, gdt->sc_status); 359 gdt_free_ccb(gdt, gccb); 360 return (1); 361 } 362 363 /* Set/get features raw service (scatter/gather) */ 364 gdt->sc_raw_feat = 0; 365 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_SET_FEAT, 366 GDT_SCATTER_GATHER, 0, 0)) { 367 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_GET_FEAT, 368 0, 0, 0)) { 369 gdt->sc_raw_feat = gdt->sc_info; 370 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 371 panic("iir%d: Scatter/Gather Raw Service " 372 "required but not supported!\n", gdt->sc_hanum); 373 gdt_free_ccb(gdt, gccb); 374 return (1); 375 } 376 } 377 } 378 379 /* Set/get features cache service (scatter/gather) */ 380 gdt->sc_cache_feat = 0; 381 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_SET_FEAT, 382 0, GDT_SCATTER_GATHER, 0)) { 383 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_GET_FEAT, 384 0, 0, 0)) { 385 gdt->sc_cache_feat = gdt->sc_info; 386 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 387 panic("iir%d: Scatter/Gather Cache Service " 388 "required but not supported!\n", gdt->sc_hanum); 389 gdt_free_ccb(gdt, gccb); 390 return (1); 391 } 392 } 393 } 394 395 /* OEM */ 396 gdt_enc32(gccb->gc_scratch + GDT_OEM_VERSION, 0x01); 397 gdt_enc32(gccb->gc_scratch + GDT_OEM_BUFSIZE, sizeof(gdt_oem_record_t)); 398 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 399 GDT_OEM_STR_RECORD, GDT_INVALID_CHANNEL, 400 sizeof(gdt_oem_str_record_t))) { 401 strncpy(gdt->oem_name, ((gdt_oem_str_record_t *) 402 gccb->gc_scratch)->text.scsi_host_drive_inquiry_vendor_id, 7); 403 gdt->oem_name[7]='\0'; 404 } else { 405 /* Old method, based on PCI ID */ 406 if (gdt->sc_vendor == INTEL_VENDOR_ID) 407 strcpy(gdt->oem_name,"Intel "); 408 else 409 strcpy(gdt->oem_name,"ICP "); 410 } 411 412 /* Scan for cache devices */ 413 for (i = 0; i < cdev_cnt && i < GDT_MAX_HDRIVES; i++) { 414 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INFO, 415 i, 0, 0)) { 416 gdt->sc_hdr[i].hd_present = 1; 417 gdt->sc_hdr[i].hd_size = gdt->sc_info; 418 419 /* 420 * Evaluate mapping (sectors per head, heads per cyl) 421 */ 422 gdt->sc_hdr[i].hd_size &= ~GDT_SECS32; 423 if (gdt->sc_info2 == 0) 424 gdt_eval_mapping(gdt->sc_hdr[i].hd_size, 425 &drv_cyls, &drv_hds, &drv_secs); 426 else { 427 drv_hds = gdt->sc_info2 & 0xff; 428 drv_secs = (gdt->sc_info2 >> 8) & 0xff; 429 drv_cyls = gdt->sc_hdr[i].hd_size / drv_hds / 430 drv_secs; 431 } 432 gdt->sc_hdr[i].hd_heads = drv_hds; 433 gdt->sc_hdr[i].hd_secs = drv_secs; 434 /* Round the size */ 435 gdt->sc_hdr[i].hd_size = drv_cyls * drv_hds * drv_secs; 436 437 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, 438 GDT_DEVTYPE, i, 0, 0)) 439 gdt->sc_hdr[i].hd_devtype = gdt->sc_info; 440 } 441 } 442 443 GDT_DPRINTF(GDT_D_INIT, ("dpmem %x %d-bus %d cache device%s\n", 444 gdt->sc_dpmembase, 445 gdt->sc_bus_cnt, cdev_cnt, 446 cdev_cnt == 1 ? "" : "s")); 447 gdt_free_ccb(gdt, gccb); 448 449 gdt_cnt++; 450 return (0); 451 } 452 453 void 454 iir_free(struct gdt_softc *gdt) 455 { 456 int i; 457 458 GDT_DPRINTF(GDT_D_INIT, ("iir_free()\n")); 459 460 switch (gdt->sc_init_level) { 461 default: 462 gdt_destroy_dev(gdt->sc_dev); 463 case 5: 464 for (i = GDT_MAXCMDS-1; i >= 0; i--) 465 if (gdt->sc_gccbs[i].gc_map_flag) 466 bus_dmamap_destroy(gdt->sc_buffer_dmat, 467 gdt->sc_gccbs[i].gc_dmamap); 468 bus_dmamap_unload(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap); 469 free(gdt->sc_gccbs, M_GDTBUF); 470 case 4: 471 bus_dmamem_free(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch, gdt->sc_gcscratch_dmamap); 472 case 3: 473 bus_dma_tag_destroy(gdt->sc_gcscratch_dmat); 474 case 2: 475 bus_dma_tag_destroy(gdt->sc_buffer_dmat); 476 case 1: 477 bus_dma_tag_destroy(gdt->sc_parent_dmat); 478 case 0: 479 break; 480 } 481 TAILQ_REMOVE(&gdt_softcs, gdt, links); 482 } 483 484 void 485 iir_attach(struct gdt_softc *gdt) 486 { 487 struct cam_devq *devq; 488 int i; 489 490 GDT_DPRINTF(GDT_D_INIT, ("iir_attach()\n")); 491 492 /* 493 * Create the device queue for our SIM. 494 * XXX Throttle this down since the card has problems under load. 495 */ 496 devq = cam_simq_alloc(32); 497 if (devq == NULL) 498 return; 499 500 for (i = 0; i < gdt->sc_bus_cnt; i++) { 501 /* 502 * Construct our SIM entry 503 */ 504 gdt->sims[i] = cam_sim_alloc(iir_action, iir_poll, "iir", 505 gdt, gdt->sc_hanum, &Giant, 506 /*untagged*/1, 507 /*tagged*/GDT_MAXCMDS, devq); 508 if (xpt_bus_register(gdt->sims[i], gdt->sc_devnode, i) != CAM_SUCCESS) { 509 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0); 510 break; 511 } 512 513 if (xpt_create_path(&gdt->paths[i], /*periph*/NULL, 514 cam_sim_path(gdt->sims[i]), 515 CAM_TARGET_WILDCARD, 516 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 517 xpt_bus_deregister(cam_sim_path(gdt->sims[i])); 518 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0); 519 break; 520 } 521 } 522 if (i > 0) 523 EVENTHANDLER_REGISTER(shutdown_final, iir_shutdown, 524 gdt, SHUTDOWN_PRI_DEFAULT); 525 /* iir_watchdog(gdt); */ 526 gdt->sc_state = GDT_NORMAL; 527 } 528 529 static void 530 gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, int *secs) 531 { 532 *cyls = size / GDT_HEADS / GDT_SECS; 533 if (*cyls < GDT_MAXCYLS) { 534 *heads = GDT_HEADS; 535 *secs = GDT_SECS; 536 } else { 537 /* Too high for 64 * 32 */ 538 *cyls = size / GDT_MEDHEADS / GDT_MEDSECS; 539 if (*cyls < GDT_MAXCYLS) { 540 *heads = GDT_MEDHEADS; 541 *secs = GDT_MEDSECS; 542 } else { 543 /* Too high for 127 * 63 */ 544 *cyls = size / GDT_BIGHEADS / GDT_BIGSECS; 545 *heads = GDT_BIGHEADS; 546 *secs = GDT_BIGSECS; 547 } 548 } 549 } 550 551 static int 552 gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *gccb, 553 int timeout) 554 { 555 int rv = 0; 556 557 GDT_DPRINTF(GDT_D_INIT, 558 ("gdt_wait(%p, %p, %d)\n", gdt, gccb, timeout)); 559 560 gdt->sc_state |= GDT_POLL_WAIT; 561 do { 562 iir_intr(gdt); 563 if (gdt == gdt_wait_gdt && 564 gccb->gc_cmd_index == gdt_wait_index) { 565 rv = 1; 566 break; 567 } 568 DELAY(1); 569 } while (--timeout); 570 gdt->sc_state &= ~GDT_POLL_WAIT; 571 572 while (gdt->sc_test_busy(gdt)) 573 DELAY(1); /* XXX correct? */ 574 575 return (rv); 576 } 577 578 static int 579 gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 580 u_int8_t service, u_int16_t opcode, 581 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3) 582 { 583 int retries; 584 585 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cmd(%p, %d, %d, %d, %d, %d)\n", 586 gdt, service, opcode, arg1, arg2, arg3)); 587 588 bzero(gccb->gc_cmd, GDT_CMD_SZ); 589 590 for (retries = GDT_RETRIES; ; ) { 591 gccb->gc_service = service; 592 gccb->gc_flags = GDT_GCF_INTERNAL; 593 594 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 595 gccb->gc_cmd_index); 596 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode); 597 598 switch (service) { 599 case GDT_CACHESERVICE: 600 if (opcode == GDT_IOCTL) { 601 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 602 GDT_IOCTL_SUBFUNC, arg1); 603 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 604 GDT_IOCTL_CHANNEL, arg2); 605 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + 606 GDT_IOCTL_PARAM_SIZE, (u_int16_t)arg3); 607 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 608 gccb->gc_scratch_busbase); 609 } else { 610 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + 611 GDT_CACHE_DEVICENO, (u_int16_t)arg1); 612 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 613 GDT_CACHE_BLOCKNO, arg2); 614 } 615 break; 616 617 case GDT_SCSIRAWSERVICE: 618 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 619 GDT_RAW_DIRECTION, arg1); 620 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 621 (u_int8_t)arg2; 622 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 623 (u_int8_t)arg3; 624 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 625 (u_int8_t)(arg3 >> 8); 626 } 627 628 gdt->sc_set_sema0(gdt); 629 gccb->gc_cmd_len = GDT_CMD_SZ; 630 gdt->sc_cmd_off = 0; 631 gdt->sc_cmd_cnt = 0; 632 gdt->sc_copy_cmd(gdt, gccb); 633 gdt->sc_release_event(gdt); 634 DELAY(20); 635 if (!gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT)) 636 return (0); 637 if (gdt->sc_status != GDT_S_BSY || --retries == 0) 638 break; 639 DELAY(1); 640 } 641 return (gdt->sc_status == GDT_S_OK); 642 } 643 644 static struct gdt_ccb * 645 gdt_get_ccb(struct gdt_softc *gdt) 646 { 647 struct gdt_ccb *gccb; 648 int lock; 649 650 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_get_ccb(%p)\n", gdt)); 651 652 lock = splcam(); 653 gccb = SLIST_FIRST(&gdt->sc_free_gccb); 654 if (gccb != NULL) { 655 SLIST_REMOVE_HEAD(&gdt->sc_free_gccb, sle); 656 SLIST_INSERT_HEAD(&gdt->sc_pending_gccb, gccb, sle); 657 ++gdt_stat.cmd_index_act; 658 if (gdt_stat.cmd_index_act > gdt_stat.cmd_index_max) 659 gdt_stat.cmd_index_max = gdt_stat.cmd_index_act; 660 } 661 splx(lock); 662 return (gccb); 663 } 664 665 void 666 gdt_free_ccb(struct gdt_softc *gdt, struct gdt_ccb *gccb) 667 { 668 int lock; 669 670 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_free_ccb(%p, %p)\n", gdt, gccb)); 671 672 lock = splcam(); 673 gccb->gc_flags = GDT_GCF_UNUSED; 674 SLIST_REMOVE(&gdt->sc_pending_gccb, gccb, gdt_ccb, sle); 675 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle); 676 --gdt_stat.cmd_index_act; 677 splx(lock); 678 if (gdt->sc_state & GDT_SHUTDOWN) 679 wakeup(gccb); 680 } 681 682 void 683 gdt_next(struct gdt_softc *gdt) 684 { 685 int lock; 686 union ccb *ccb; 687 gdt_ucmd_t *ucmd; 688 struct cam_sim *sim; 689 int bus, target, lun; 690 int next_cmd; 691 692 struct ccb_scsiio *csio; 693 struct ccb_hdr *ccbh; 694 struct gdt_ccb *gccb = NULL; 695 u_int8_t cmd; 696 697 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_next(%p)\n", gdt)); 698 699 lock = splcam(); 700 if (gdt->sc_test_busy(gdt)) { 701 if (!(gdt->sc_state & GDT_POLLING)) { 702 splx(lock); 703 return; 704 } 705 while (gdt->sc_test_busy(gdt)) 706 DELAY(1); 707 } 708 709 gdt->sc_cmd_cnt = gdt->sc_cmd_off = 0; 710 next_cmd = TRUE; 711 for (;;) { 712 /* I/Os in queue? controller ready? */ 713 if (!TAILQ_FIRST(&gdt->sc_ucmd_queue) && 714 !TAILQ_FIRST(&gdt->sc_ccb_queue)) 715 break; 716 717 /* 1.: I/Os without ccb (IOCTLs) */ 718 ucmd = TAILQ_FIRST(&gdt->sc_ucmd_queue); 719 if (ucmd != NULL) { 720 TAILQ_REMOVE(&gdt->sc_ucmd_queue, ucmd, links); 721 if ((gccb = gdt_ioctl_cmd(gdt, ucmd, &lock)) == NULL) { 722 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 723 break; 724 } 725 break; 726 /* wenn mehrere Kdos. zulassen: if (!gdt_polling) continue; */ 727 } 728 729 /* 2.: I/Os with ccb */ 730 ccb = (union ccb *)TAILQ_FIRST(&gdt->sc_ccb_queue); 731 /* ist dann immer != NULL, da oben getestet */ 732 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 733 bus = cam_sim_bus(sim); 734 target = ccb->ccb_h.target_id; 735 lun = ccb->ccb_h.target_lun; 736 737 TAILQ_REMOVE(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 738 --gdt_stat.req_queue_act; 739 /* ccb->ccb_h.func_code is XPT_SCSI_IO */ 740 GDT_DPRINTF(GDT_D_QUEUE, ("XPT_SCSI_IO flags 0x%x)\n", 741 ccb->ccb_h.flags)); 742 csio = &ccb->csio; 743 ccbh = &ccb->ccb_h; 744 cmd = csio->cdb_io.cdb_bytes[0]; 745 /* Max CDB length is 12 bytes */ 746 if (csio->cdb_len > 12) { 747 ccbh->status = CAM_REQ_INVALID; 748 --gdt_stat.io_count_act; 749 xpt_done(ccb); 750 } else if (bus != gdt->sc_virt_bus) { 751 /* raw service command */ 752 if ((gccb = gdt_raw_cmd(gdt, ccb, &lock)) == NULL) { 753 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 754 sim_links.tqe); 755 ++gdt_stat.req_queue_act; 756 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 757 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 758 next_cmd = FALSE; 759 } 760 } else if (target >= GDT_MAX_HDRIVES || 761 !gdt->sc_hdr[target].hd_present || lun != 0) { 762 ccbh->status = CAM_DEV_NOT_THERE; 763 --gdt_stat.io_count_act; 764 xpt_done(ccb); 765 } else { 766 /* cache service command */ 767 if (cmd == READ_6 || cmd == WRITE_6 || 768 cmd == READ_10 || cmd == WRITE_10) { 769 if ((gccb = gdt_cache_cmd(gdt, ccb, &lock)) == NULL) { 770 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 771 sim_links.tqe); 772 ++gdt_stat.req_queue_act; 773 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 774 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 775 next_cmd = FALSE; 776 } 777 } else { 778 splx(lock); 779 gdt_internal_cache_cmd(gdt, ccb); 780 lock = splcam(); 781 } 782 } 783 if ((gdt->sc_state & GDT_POLLING) || !next_cmd) 784 break; 785 } 786 if (gdt->sc_cmd_cnt > 0) 787 gdt->sc_release_event(gdt); 788 789 splx(lock); 790 791 if ((gdt->sc_state & GDT_POLLING) && gdt->sc_cmd_cnt > 0) { 792 gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT); 793 } 794 } 795 796 static struct gdt_ccb * 797 gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb, int *lock) 798 { 799 struct gdt_ccb *gccb; 800 struct cam_sim *sim; 801 802 GDT_DPRINTF(GDT_D_CMD, ("gdt_raw_cmd(%p, %p)\n", gdt, ccb)); 803 804 if (roundup(GDT_CMD_UNION + GDT_RAW_SZ, sizeof(u_int32_t)) + 805 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 806 gdt->sc_ic_all_size) { 807 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_raw_cmd(): DPMEM overflow\n", 808 gdt->sc_hanum)); 809 return (NULL); 810 } 811 812 gccb = gdt_get_ccb(gdt); 813 if (gccb == NULL) { 814 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: No free command index found\n", 815 gdt->sc_hanum)); 816 return (gccb); 817 } 818 bzero(gccb->gc_cmd, GDT_CMD_SZ); 819 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 820 gccb->gc_ccb = ccb; 821 gccb->gc_service = GDT_SCSIRAWSERVICE; 822 gccb->gc_flags = GDT_GCF_SCSI; 823 824 if (gdt->sc_cmd_cnt == 0) 825 gdt->sc_set_sema0(gdt); 826 splx(*lock); 827 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 828 gccb->gc_cmd_index); 829 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 830 831 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 832 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 833 GDT_DATA_IN : GDT_DATA_OUT); 834 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 835 ccb->csio.dxfer_len); 836 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 837 ccb->csio.cdb_len); 838 bcopy(ccb->csio.cdb_io.cdb_bytes, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 839 ccb->csio.cdb_len); 840 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 841 ccb->ccb_h.target_id; 842 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 843 ccb->ccb_h.target_lun; 844 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 845 cam_sim_bus(sim); 846 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 847 sizeof(struct scsi_sense_data)); 848 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 849 gccb->gc_scratch_busbase); 850 851 /* 852 * If we have any data to send with this command, 853 * map it into bus space. 854 */ 855 /* Only use S/G if there is a transfer */ 856 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 857 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 858 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 859 int s; 860 int error; 861 862 /* vorher unlock von splcam() ??? */ 863 s = splsoftvm(); 864 error = 865 bus_dmamap_load(gdt->sc_buffer_dmat, 866 gccb->gc_dmamap, 867 ccb->csio.data_ptr, 868 ccb->csio.dxfer_len, 869 gdtexecuteccb, 870 gccb, /*flags*/0); 871 if (error == EINPROGRESS) { 872 xpt_freeze_simq(sim, 1); 873 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 874 } 875 splx(s); 876 } else { 877 panic("iir: CAM_DATA_PHYS not supported"); 878 } 879 } else { 880 struct bus_dma_segment *segs; 881 882 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 883 panic("iir%d: iir_action - Physical " 884 "segment pointers unsupported", gdt->sc_hanum); 885 886 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 887 panic("iir%d: iir_action - Virtual " 888 "segment addresses unsupported", gdt->sc_hanum); 889 890 /* Just use the segments provided */ 891 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 892 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 893 } 894 } else { 895 gdtexecuteccb(gccb, NULL, 0, 0); 896 } 897 898 *lock = splcam(); 899 return (gccb); 900 } 901 902 static struct gdt_ccb * 903 gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb, int *lock) 904 { 905 struct gdt_ccb *gccb; 906 struct cam_sim *sim; 907 u_int8_t *cmdp; 908 u_int16_t opcode; 909 u_int32_t blockno, blockcnt; 910 911 GDT_DPRINTF(GDT_D_CMD, ("gdt_cache_cmd(%p, %p)\n", gdt, ccb)); 912 913 if (roundup(GDT_CMD_UNION + GDT_CACHE_SZ, sizeof(u_int32_t)) + 914 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 915 gdt->sc_ic_all_size) { 916 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_cache_cmd(): DPMEM overflow\n", 917 gdt->sc_hanum)); 918 return (NULL); 919 } 920 921 gccb = gdt_get_ccb(gdt); 922 if (gccb == NULL) { 923 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 924 gdt->sc_hanum)); 925 return (gccb); 926 } 927 bzero(gccb->gc_cmd, GDT_CMD_SZ); 928 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 929 gccb->gc_ccb = ccb; 930 gccb->gc_service = GDT_CACHESERVICE; 931 gccb->gc_flags = GDT_GCF_SCSI; 932 933 if (gdt->sc_cmd_cnt == 0) 934 gdt->sc_set_sema0(gdt); 935 splx(*lock); 936 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 937 gccb->gc_cmd_index); 938 cmdp = ccb->csio.cdb_io.cdb_bytes; 939 opcode = (*cmdp == WRITE_6 || *cmdp == WRITE_10) ? GDT_WRITE : GDT_READ; 940 if ((gdt->sc_state & GDT_SHUTDOWN) && opcode == GDT_WRITE) 941 opcode = GDT_WRITE_THR; 942 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode); 943 944 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 945 ccb->ccb_h.target_id); 946 if (ccb->csio.cdb_len == 6) { 947 struct scsi_rw_6 *rw = (struct scsi_rw_6 *)cmdp; 948 blockno = scsi_3btoul(rw->addr) & ((SRW_TOPADDR<<16) | 0xffff); 949 blockcnt = rw->length ? rw->length : 0x100; 950 } else { 951 struct scsi_rw_10 *rw = (struct scsi_rw_10 *)cmdp; 952 blockno = scsi_4btoul(rw->addr); 953 blockcnt = scsi_2btoul(rw->length); 954 } 955 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 956 blockno); 957 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 958 blockcnt); 959 960 /* 961 * If we have any data to send with this command, 962 * map it into bus space. 963 */ 964 /* Only use S/G if there is a transfer */ 965 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 966 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 967 int s; 968 int error; 969 970 /* vorher unlock von splcam() ??? */ 971 s = splsoftvm(); 972 error = 973 bus_dmamap_load(gdt->sc_buffer_dmat, 974 gccb->gc_dmamap, 975 ccb->csio.data_ptr, 976 ccb->csio.dxfer_len, 977 gdtexecuteccb, 978 gccb, /*flags*/0); 979 if (error == EINPROGRESS) { 980 xpt_freeze_simq(sim, 1); 981 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 982 } 983 splx(s); 984 } else { 985 panic("iir: CAM_DATA_PHYS not supported"); 986 } 987 } else { 988 struct bus_dma_segment *segs; 989 990 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 991 panic("iir%d: iir_action - Physical " 992 "segment pointers unsupported", gdt->sc_hanum); 993 994 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 995 panic("iir%d: iir_action - Virtual " 996 "segment addresses unsupported", gdt->sc_hanum); 997 998 /* Just use the segments provided */ 999 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 1000 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 1001 } 1002 1003 *lock = splcam(); 1004 return (gccb); 1005 } 1006 1007 static struct gdt_ccb * 1008 gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd, int *lock) 1009 { 1010 struct gdt_ccb *gccb; 1011 u_int32_t cnt; 1012 1013 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_ioctl_cmd(%p, %p)\n", gdt, ucmd)); 1014 1015 gccb = gdt_get_ccb(gdt); 1016 if (gccb == NULL) { 1017 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 1018 gdt->sc_hanum)); 1019 return (gccb); 1020 } 1021 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1022 gccb->gc_ucmd = ucmd; 1023 gccb->gc_service = ucmd->service; 1024 gccb->gc_flags = GDT_GCF_IOCTL; 1025 1026 /* check DPMEM space, copy data buffer from user space */ 1027 if (ucmd->service == GDT_CACHESERVICE) { 1028 if (ucmd->OpCode == GDT_IOCTL) { 1029 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_IOCTL_SZ, 1030 sizeof(u_int32_t)); 1031 cnt = ucmd->u.ioctl.param_size; 1032 if (cnt > GDT_SCRATCH_SZ) { 1033 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1034 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1035 gdt_free_ccb(gdt, gccb); 1036 return (NULL); 1037 } 1038 } else { 1039 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1040 GDT_SG_SZ, sizeof(u_int32_t)); 1041 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1042 if (cnt > GDT_SCRATCH_SZ) { 1043 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1044 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1045 gdt_free_ccb(gdt, gccb); 1046 return (NULL); 1047 } 1048 } 1049 } else { 1050 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1051 GDT_SG_SZ, sizeof(u_int32_t)); 1052 cnt = ucmd->u.raw.sdlen; 1053 if (cnt + ucmd->u.raw.sense_len > GDT_SCRATCH_SZ) { 1054 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1055 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt + ucmd->u.raw.sense_len); 1056 gdt_free_ccb(gdt, gccb); 1057 return (NULL); 1058 } 1059 } 1060 if (cnt != 0) 1061 bcopy(ucmd->data, gccb->gc_scratch, cnt); 1062 1063 if (gdt->sc_cmd_off + gccb->gc_cmd_len + GDT_DPMEM_COMMAND_OFFSET > 1064 gdt->sc_ic_all_size) { 1065 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_ioctl_cmd(): DPMEM overflow\n", 1066 gdt->sc_hanum)); 1067 gdt_free_ccb(gdt, gccb); 1068 return (NULL); 1069 } 1070 1071 if (gdt->sc_cmd_cnt == 0) 1072 gdt->sc_set_sema0(gdt); 1073 splx(*lock); 1074 1075 /* fill cmd structure */ 1076 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1077 gccb->gc_cmd_index); 1078 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, 1079 ucmd->OpCode); 1080 1081 if (ucmd->service == GDT_CACHESERVICE) { 1082 if (ucmd->OpCode == GDT_IOCTL) { 1083 /* IOCTL */ 1084 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_PARAM_SIZE, 1085 ucmd->u.ioctl.param_size); 1086 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_SUBFUNC, 1087 ucmd->u.ioctl.subfunc); 1088 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_CHANNEL, 1089 ucmd->u.ioctl.channel); 1090 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 1091 gccb->gc_scratch_busbase); 1092 } else { 1093 /* cache service command */ 1094 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 1095 ucmd->u.cache.DeviceNo); 1096 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 1097 ucmd->u.cache.BlockNo); 1098 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 1099 ucmd->u.cache.BlockCnt); 1100 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1101 0xffffffffUL); 1102 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1103 1); 1104 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1105 GDT_SG_PTR, gccb->gc_scratch_busbase); 1106 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1107 GDT_SG_LEN, ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE); 1108 } 1109 } else { 1110 /* raw service command */ 1111 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 1112 ucmd->u.raw.direction); 1113 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1114 0xffffffffUL); 1115 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 1116 ucmd->u.raw.sdlen); 1117 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 1118 ucmd->u.raw.clen); 1119 bcopy(ucmd->u.raw.cmd, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 1120 12); 1121 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 1122 ucmd->u.raw.target; 1123 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 1124 ucmd->u.raw.lun; 1125 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 1126 ucmd->u.raw.bus; 1127 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 1128 ucmd->u.raw.sense_len); 1129 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 1130 gccb->gc_scratch_busbase + ucmd->u.raw.sdlen); 1131 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1132 1); 1133 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1134 GDT_SG_PTR, gccb->gc_scratch_busbase); 1135 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1136 GDT_SG_LEN, ucmd->u.raw.sdlen); 1137 } 1138 1139 *lock = splcam(); 1140 gdt_stat.sg_count_act = 1; 1141 gdt->sc_copy_cmd(gdt, gccb); 1142 return (gccb); 1143 } 1144 1145 static void 1146 gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb) 1147 { 1148 int t; 1149 1150 t = ccb->ccb_h.target_id; 1151 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cache_cmd(%p, %p, 0x%x, %d)\n", 1152 gdt, ccb, ccb->csio.cdb_io.cdb_bytes[0], t)); 1153 1154 switch (ccb->csio.cdb_io.cdb_bytes[0]) { 1155 case TEST_UNIT_READY: 1156 case START_STOP: 1157 break; 1158 case REQUEST_SENSE: 1159 GDT_DPRINTF(GDT_D_MISC, ("REQUEST_SENSE\n")); 1160 break; 1161 case INQUIRY: 1162 { 1163 struct scsi_inquiry_data inq; 1164 size_t copylen = MIN(sizeof(inq), ccb->csio.dxfer_len); 1165 1166 bzero(&inq, sizeof(inq)); 1167 inq.device = (gdt->sc_hdr[t].hd_devtype & 4) ? 1168 T_CDROM : T_DIRECT; 1169 inq.dev_qual2 = (gdt->sc_hdr[t].hd_devtype & 1) ? 0x80 : 0; 1170 inq.version = SCSI_REV_2; 1171 inq.response_format = 2; 1172 inq.additional_length = 32; 1173 inq.flags = SID_CmdQue | SID_Sync; 1174 strncpy(inq.vendor, gdt->oem_name, sizeof(inq.vendor)); 1175 snprintf(inq.product, sizeof(inq.product), 1176 "Host Drive #%02d", t); 1177 strncpy(inq.revision, " ", sizeof(inq.revision)); 1178 bcopy(&inq, ccb->csio.data_ptr, copylen ); 1179 if( ccb->csio.dxfer_len > copylen ) 1180 bzero( ccb->csio.data_ptr+copylen, 1181 ccb->csio.dxfer_len - copylen ); 1182 break; 1183 } 1184 case MODE_SENSE_6: 1185 { 1186 struct mpd_data { 1187 struct scsi_mode_hdr_6 hd; 1188 struct scsi_mode_block_descr bd; 1189 struct scsi_control_page cp; 1190 } mpd; 1191 size_t copylen = MIN(sizeof(mpd), ccb->csio.dxfer_len); 1192 u_int8_t page; 1193 1194 /*mpd = (struct mpd_data *)ccb->csio.data_ptr;*/ 1195 bzero(&mpd, sizeof(mpd)); 1196 mpd.hd.datalen = sizeof(struct scsi_mode_hdr_6) + 1197 sizeof(struct scsi_mode_block_descr); 1198 mpd.hd.dev_specific = (gdt->sc_hdr[t].hd_devtype & 2) ? 0x80 : 0; 1199 mpd.hd.block_descr_len = sizeof(struct scsi_mode_block_descr); 1200 mpd.bd.block_len[0] = (GDT_SECTOR_SIZE & 0x00ff0000) >> 16; 1201 mpd.bd.block_len[1] = (GDT_SECTOR_SIZE & 0x0000ff00) >> 8; 1202 mpd.bd.block_len[2] = (GDT_SECTOR_SIZE & 0x000000ff); 1203 1204 bcopy(&mpd, ccb->csio.data_ptr, copylen ); 1205 if( ccb->csio.dxfer_len > copylen ) 1206 bzero( ccb->csio.data_ptr+copylen, 1207 ccb->csio.dxfer_len - copylen ); 1208 page=((struct scsi_mode_sense_6 *)ccb->csio.cdb_io.cdb_bytes)->page; 1209 switch (page) { 1210 default: 1211 GDT_DPRINTF(GDT_D_MISC, ("MODE_SENSE_6: page 0x%x\n", page)); 1212 break; 1213 } 1214 break; 1215 } 1216 case READ_CAPACITY: 1217 { 1218 struct scsi_read_capacity_data rcd; 1219 size_t copylen = MIN(sizeof(rcd), ccb->csio.dxfer_len); 1220 1221 /*rcd = (struct scsi_read_capacity_data *)ccb->csio.data_ptr;*/ 1222 bzero(&rcd, sizeof(rcd)); 1223 scsi_ulto4b(gdt->sc_hdr[t].hd_size - 1, rcd.addr); 1224 scsi_ulto4b(GDT_SECTOR_SIZE, rcd.length); 1225 bcopy(&rcd, ccb->csio.data_ptr, copylen ); 1226 if( ccb->csio.dxfer_len > copylen ) 1227 bzero( ccb->csio.data_ptr+copylen, 1228 ccb->csio.dxfer_len - copylen ); 1229 break; 1230 } 1231 default: 1232 GDT_DPRINTF(GDT_D_MISC, ("gdt_internal_cache_cmd(%d) unknown\n", 1233 ccb->csio.cdb_io.cdb_bytes[0])); 1234 break; 1235 } 1236 ccb->ccb_h.status |= CAM_REQ_CMP; 1237 --gdt_stat.io_count_act; 1238 xpt_done(ccb); 1239 } 1240 1241 static void 1242 gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1243 { 1244 bus_addr_t *busaddrp; 1245 1246 busaddrp = (bus_addr_t *)arg; 1247 *busaddrp = dm_segs->ds_addr; 1248 } 1249 1250 static void 1251 gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1252 { 1253 struct gdt_ccb *gccb; 1254 union ccb *ccb; 1255 struct gdt_softc *gdt; 1256 int i, lock; 1257 1258 lock = splcam(); 1259 1260 gccb = (struct gdt_ccb *)arg; 1261 ccb = gccb->gc_ccb; 1262 gdt = cam_sim_softc((struct cam_sim *)ccb->ccb_h.ccb_sim_ptr); 1263 1264 GDT_DPRINTF(GDT_D_CMD, ("gdtexecuteccb(%p, %p, %p, %d, %d)\n", 1265 gdt, gccb, dm_segs, nseg, error)); 1266 gdt_stat.sg_count_act = nseg; 1267 if (nseg > gdt_stat.sg_count_max) 1268 gdt_stat.sg_count_max = nseg; 1269 1270 /* Copy the segments into our SG list */ 1271 if (gccb->gc_service == GDT_CACHESERVICE) { 1272 for (i = 0; i < nseg; ++i) { 1273 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1274 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1275 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1276 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1277 dm_segs++; 1278 } 1279 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1280 nseg); 1281 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1282 0xffffffffUL); 1283 1284 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1285 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1286 } else { 1287 for (i = 0; i < nseg; ++i) { 1288 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1289 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1290 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1291 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1292 dm_segs++; 1293 } 1294 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1295 nseg); 1296 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1297 0xffffffffUL); 1298 1299 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1300 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1301 } 1302 1303 if (nseg != 0) { 1304 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, 1305 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 1306 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1307 } 1308 1309 /* We must NOT abort the command here if CAM_REQ_INPROG is not set, 1310 * because command semaphore is already set! 1311 */ 1312 1313 ccb->ccb_h.status |= CAM_SIM_QUEUED; 1314 /* timeout handling */ 1315 ccb->ccb_h.timeout_ch = 1316 timeout(iir_timeout, (caddr_t)gccb, 1317 (ccb->ccb_h.timeout * hz) / 1000); 1318 1319 gdt->sc_copy_cmd(gdt, gccb); 1320 splx(lock); 1321 } 1322 1323 1324 static void 1325 iir_action( struct cam_sim *sim, union ccb *ccb ) 1326 { 1327 struct gdt_softc *gdt; 1328 int lock, bus, target, lun; 1329 1330 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1331 ccb->ccb_h.ccb_sim_ptr = sim; 1332 bus = cam_sim_bus(sim); 1333 target = ccb->ccb_h.target_id; 1334 lun = ccb->ccb_h.target_lun; 1335 GDT_DPRINTF(GDT_D_CMD, 1336 ("iir_action(%p) func 0x%x cmd 0x%x bus %d target %d lun %d\n", 1337 gdt, ccb->ccb_h.func_code, ccb->csio.cdb_io.cdb_bytes[0], 1338 bus, target, lun)); 1339 ++gdt_stat.io_count_act; 1340 if (gdt_stat.io_count_act > gdt_stat.io_count_max) 1341 gdt_stat.io_count_max = gdt_stat.io_count_act; 1342 1343 switch (ccb->ccb_h.func_code) { 1344 case XPT_SCSI_IO: 1345 lock = splcam(); 1346 TAILQ_INSERT_TAIL(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1347 ++gdt_stat.req_queue_act; 1348 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1349 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1350 splx(lock); 1351 gdt_next(gdt); 1352 break; 1353 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1354 case XPT_ABORT: /* Abort the specified CCB */ 1355 /* XXX Implement */ 1356 ccb->ccb_h.status = CAM_REQ_INVALID; 1357 --gdt_stat.io_count_act; 1358 xpt_done(ccb); 1359 break; 1360 case XPT_SET_TRAN_SETTINGS: 1361 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1362 --gdt_stat.io_count_act; 1363 xpt_done(ccb); 1364 break; 1365 case XPT_GET_TRAN_SETTINGS: 1366 /* Get default/user set transfer settings for the target */ 1367 { 1368 struct ccb_trans_settings *cts = &ccb->cts; 1369 struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi; 1370 struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi; 1371 1372 cts->protocol = PROTO_SCSI; 1373 cts->protocol_version = SCSI_REV_2; 1374 cts->transport = XPORT_SPI; 1375 cts->transport_version = 2; 1376 1377 if (cts->type == CTS_TYPE_USER_SETTINGS) { 1378 spi->flags = CTS_SPI_FLAGS_DISC_ENB; 1379 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; 1380 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT; 1381 spi->sync_period = 25; /* 10MHz */ 1382 if (spi->sync_period != 0) 1383 spi->sync_offset = 15; 1384 1385 spi->valid = CTS_SPI_VALID_SYNC_RATE 1386 | CTS_SPI_VALID_SYNC_OFFSET 1387 | CTS_SPI_VALID_BUS_WIDTH 1388 | CTS_SPI_VALID_DISC; 1389 scsi->valid = CTS_SCSI_VALID_TQ; 1390 ccb->ccb_h.status = CAM_REQ_CMP; 1391 } else { 1392 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1393 } 1394 --gdt_stat.io_count_act; 1395 xpt_done(ccb); 1396 break; 1397 } 1398 case XPT_CALC_GEOMETRY: 1399 { 1400 struct ccb_calc_geometry *ccg; 1401 u_int32_t secs_per_cylinder; 1402 1403 ccg = &ccb->ccg; 1404 ccg->heads = gdt->sc_hdr[target].hd_heads; 1405 ccg->secs_per_track = gdt->sc_hdr[target].hd_secs; 1406 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1407 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1408 ccb->ccb_h.status = CAM_REQ_CMP; 1409 --gdt_stat.io_count_act; 1410 xpt_done(ccb); 1411 break; 1412 } 1413 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1414 { 1415 /* XXX Implement */ 1416 ccb->ccb_h.status = CAM_REQ_CMP; 1417 --gdt_stat.io_count_act; 1418 xpt_done(ccb); 1419 break; 1420 } 1421 case XPT_TERM_IO: /* Terminate the I/O process */ 1422 /* XXX Implement */ 1423 ccb->ccb_h.status = CAM_REQ_INVALID; 1424 --gdt_stat.io_count_act; 1425 xpt_done(ccb); 1426 break; 1427 case XPT_PATH_INQ: /* Path routing inquiry */ 1428 { 1429 struct ccb_pathinq *cpi = &ccb->cpi; 1430 1431 cpi->version_num = 1; 1432 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE; 1433 cpi->hba_inquiry |= PI_WIDE_16; 1434 cpi->target_sprt = 1; 1435 cpi->hba_misc = 0; 1436 cpi->hba_eng_cnt = 0; 1437 if (bus == gdt->sc_virt_bus) 1438 cpi->max_target = GDT_MAX_HDRIVES - 1; 1439 else if (gdt->sc_class & GDT_FC) 1440 cpi->max_target = GDT_MAXID_FC - 1; 1441 else 1442 cpi->max_target = GDT_MAXID - 1; 1443 cpi->max_lun = 7; 1444 cpi->unit_number = cam_sim_unit(sim); 1445 cpi->bus_id = bus; 1446 cpi->initiator_id = 1447 (bus == gdt->sc_virt_bus ? 127 : gdt->sc_bus_id[bus]); 1448 cpi->base_transfer_speed = 3300; 1449 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1450 if (gdt->sc_vendor == INTEL_VENDOR_ID) 1451 strncpy(cpi->hba_vid, "Intel Corp.", HBA_IDLEN); 1452 else 1453 strncpy(cpi->hba_vid, "ICP vortex ", HBA_IDLEN); 1454 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1455 cpi->transport = XPORT_SPI; 1456 cpi->transport_version = 2; 1457 cpi->protocol = PROTO_SCSI; 1458 cpi->protocol_version = SCSI_REV_2; 1459 cpi->ccb_h.status = CAM_REQ_CMP; 1460 --gdt_stat.io_count_act; 1461 xpt_done(ccb); 1462 break; 1463 } 1464 default: 1465 GDT_DPRINTF(GDT_D_INVALID, ("gdt_next(%p) cmd 0x%x invalid\n", 1466 gdt, ccb->ccb_h.func_code)); 1467 ccb->ccb_h.status = CAM_REQ_INVALID; 1468 --gdt_stat.io_count_act; 1469 xpt_done(ccb); 1470 break; 1471 } 1472 } 1473 1474 static void 1475 iir_poll( struct cam_sim *sim ) 1476 { 1477 struct gdt_softc *gdt; 1478 1479 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1480 GDT_DPRINTF(GDT_D_CMD, ("iir_poll sim %p gdt %p\n", sim, gdt)); 1481 iir_intr(gdt); 1482 } 1483 1484 static void 1485 iir_timeout(void *arg) 1486 { 1487 GDT_DPRINTF(GDT_D_TIMEOUT, ("iir_timeout(%p)\n", gccb)); 1488 } 1489 1490 static void 1491 iir_watchdog(void *arg) 1492 { 1493 struct gdt_softc *gdt; 1494 1495 gdt = (struct gdt_softc *)arg; 1496 GDT_DPRINTF(GDT_D_DEBUG, ("iir_watchdog(%p)\n", gdt)); 1497 1498 { 1499 int ccbs = 0, ucmds = 0, frees = 0, pends = 0; 1500 struct gdt_ccb *p; 1501 struct ccb_hdr *h; 1502 struct gdt_ucmd *u; 1503 1504 for (h = TAILQ_FIRST(&gdt->sc_ccb_queue); h != NULL; 1505 h = TAILQ_NEXT(h, sim_links.tqe)) 1506 ccbs++; 1507 for (u = TAILQ_FIRST(&gdt->sc_ucmd_queue); u != NULL; 1508 u = TAILQ_NEXT(u, links)) 1509 ucmds++; 1510 for (p = SLIST_FIRST(&gdt->sc_free_gccb); p != NULL; 1511 p = SLIST_NEXT(p, sle)) 1512 frees++; 1513 for (p = SLIST_FIRST(&gdt->sc_pending_gccb); p != NULL; 1514 p = SLIST_NEXT(p, sle)) 1515 pends++; 1516 1517 GDT_DPRINTF(GDT_D_TIMEOUT, ("ccbs %d ucmds %d frees %d pends %d\n", 1518 ccbs, ucmds, frees, pends)); 1519 } 1520 1521 timeout(iir_watchdog, (caddr_t)gdt, hz * 15); 1522 } 1523 1524 static void 1525 iir_shutdown( void *arg, int howto ) 1526 { 1527 struct gdt_softc *gdt; 1528 struct gdt_ccb *gccb; 1529 gdt_ucmd_t *ucmd; 1530 int lock, i; 1531 1532 gdt = (struct gdt_softc *)arg; 1533 GDT_DPRINTF(GDT_D_CMD, ("iir_shutdown(%p, %d)\n", gdt, howto)); 1534 1535 printf("iir%d: Flushing all Host Drives. Please wait ... ", 1536 gdt->sc_hanum); 1537 1538 /* allocate ucmd buffer */ 1539 ucmd = malloc(sizeof(gdt_ucmd_t), M_GDTBUF, M_NOWAIT); 1540 if (ucmd == NULL) { 1541 printf("iir%d: iir_shutdown(): Cannot allocate resource\n", 1542 gdt->sc_hanum); 1543 return; 1544 } 1545 bzero(ucmd, sizeof(gdt_ucmd_t)); 1546 1547 /* wait for pending IOs */ 1548 lock = splcam(); 1549 gdt->sc_state = GDT_SHUTDOWN; 1550 splx(lock); 1551 if ((gccb = SLIST_FIRST(&gdt->sc_pending_gccb)) != NULL) 1552 (void) tsleep((void *)gccb, PCATCH | PRIBIO, "iirshw", 100 * hz); 1553 1554 /* flush */ 1555 for (i = 0; i < GDT_MAX_HDRIVES; ++i) { 1556 if (gdt->sc_hdr[i].hd_present) { 1557 ucmd->service = GDT_CACHESERVICE; 1558 ucmd->OpCode = GDT_FLUSH; 1559 ucmd->u.cache.DeviceNo = i; 1560 lock = splcam(); 1561 TAILQ_INSERT_TAIL(&gdt->sc_ucmd_queue, ucmd, links); 1562 ucmd->complete_flag = FALSE; 1563 splx(lock); 1564 gdt_next(gdt); 1565 if (!ucmd->complete_flag) 1566 (void) tsleep((void *)ucmd, PCATCH|PRIBIO, "iirshw", 10*hz); 1567 } 1568 } 1569 1570 free(ucmd, M_DEVBUF); 1571 printf("Done.\n"); 1572 } 1573 1574 void 1575 iir_intr(void *arg) 1576 { 1577 struct gdt_softc *gdt = arg; 1578 struct gdt_intr_ctx ctx; 1579 int lock = 0; 1580 struct gdt_ccb *gccb; 1581 gdt_ucmd_t *ucmd; 1582 u_int32_t cnt; 1583 1584 GDT_DPRINTF(GDT_D_INTR, ("gdt_intr(%p)\n", gdt)); 1585 1586 /* If polling and we were not called from gdt_wait, just return */ 1587 if ((gdt->sc_state & GDT_POLLING) && 1588 !(gdt->sc_state & GDT_POLL_WAIT)) 1589 return; 1590 1591 if (!(gdt->sc_state & GDT_POLLING)) 1592 lock = splcam(); 1593 gdt_wait_index = 0; 1594 1595 ctx.istatus = gdt->sc_get_status(gdt); 1596 if (ctx.istatus == 0x00) { 1597 if (!(gdt->sc_state & GDT_POLLING)) 1598 splx(lock); 1599 gdt->sc_status = GDT_S_NO_STATUS; 1600 return; 1601 } 1602 1603 gdt->sc_intr(gdt, &ctx); 1604 1605 gdt->sc_status = ctx.cmd_status; 1606 gdt->sc_service = ctx.service; 1607 gdt->sc_info = ctx.info; 1608 gdt->sc_info2 = ctx.info2; 1609 1610 if (gdt->sc_state & GDT_POLL_WAIT) { 1611 gdt_wait_gdt = gdt; 1612 gdt_wait_index = ctx.istatus; 1613 } 1614 1615 if (ctx.istatus == GDT_ASYNCINDEX) { 1616 gdt_async_event(gdt, ctx.service); 1617 if (!(gdt->sc_state & GDT_POLLING)) 1618 splx(lock); 1619 return; 1620 } 1621 if (ctx.istatus == GDT_SPEZINDEX) { 1622 GDT_DPRINTF(GDT_D_INVALID, 1623 ("iir%d: Service unknown or not initialized!\n", 1624 gdt->sc_hanum)); 1625 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1626 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1627 gdt_store_event(GDT_ES_DRIVER, 4, &gdt->sc_dvr); 1628 if (!(gdt->sc_state & GDT_POLLING)) 1629 splx(lock); 1630 return; 1631 } 1632 1633 gccb = &gdt->sc_gccbs[ctx.istatus - 2]; 1634 ctx.service = gccb->gc_service; 1635 1636 switch (gccb->gc_flags) { 1637 case GDT_GCF_UNUSED: 1638 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: Index (%d) to unused command!\n", 1639 gdt->sc_hanum, ctx.istatus)); 1640 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1641 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1642 gdt->sc_dvr.eu.driver.index = ctx.istatus; 1643 gdt_store_event(GDT_ES_DRIVER, 1, &gdt->sc_dvr); 1644 gdt_free_ccb(gdt, gccb); 1645 /* fallthrough */ 1646 1647 case GDT_GCF_INTERNAL: 1648 if (!(gdt->sc_state & GDT_POLLING)) 1649 splx(lock); 1650 break; 1651 1652 case GDT_GCF_IOCTL: 1653 ucmd = gccb->gc_ucmd; 1654 if (gdt->sc_status == GDT_S_BSY) { 1655 GDT_DPRINTF(GDT_D_DEBUG, ("iir_intr(%p) ioctl: gccb %p busy\n", 1656 gdt, gccb)); 1657 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 1658 if (!(gdt->sc_state & GDT_POLLING)) 1659 splx(lock); 1660 } else { 1661 ucmd->status = gdt->sc_status; 1662 ucmd->info = gdt->sc_info; 1663 ucmd->complete_flag = TRUE; 1664 if (ucmd->service == GDT_CACHESERVICE) { 1665 if (ucmd->OpCode == GDT_IOCTL) { 1666 cnt = ucmd->u.ioctl.param_size; 1667 if (cnt != 0) 1668 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1669 } else { 1670 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1671 if (cnt != 0) 1672 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1673 } 1674 } else { 1675 cnt = ucmd->u.raw.sdlen; 1676 if (cnt != 0) 1677 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1678 if (ucmd->u.raw.sense_len != 0) 1679 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1680 } 1681 gdt_free_ccb(gdt, gccb); 1682 if (!(gdt->sc_state & GDT_POLLING)) 1683 splx(lock); 1684 /* wakeup */ 1685 wakeup(ucmd); 1686 } 1687 gdt_next(gdt); 1688 break; 1689 1690 default: 1691 gdt_free_ccb(gdt, gccb); 1692 gdt_sync_event(gdt, ctx.service, ctx.istatus, gccb); 1693 if (!(gdt->sc_state & GDT_POLLING)) 1694 splx(lock); 1695 gdt_next(gdt); 1696 break; 1697 } 1698 } 1699 1700 int 1701 gdt_async_event(struct gdt_softc *gdt, int service) 1702 { 1703 struct gdt_ccb *gccb; 1704 1705 GDT_DPRINTF(GDT_D_INTR, ("gdt_async_event(%p, %d)\n", gdt, service)); 1706 1707 if (service == GDT_SCREENSERVICE) { 1708 if (gdt->sc_status == GDT_MSG_REQUEST) { 1709 while (gdt->sc_test_busy(gdt)) 1710 DELAY(1); 1711 gccb = gdt_get_ccb(gdt); 1712 if (gccb == NULL) { 1713 printf("iir%d: No free command index found\n", 1714 gdt->sc_hanum); 1715 return (1); 1716 } 1717 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1718 gccb->gc_service = service; 1719 gccb->gc_flags = GDT_GCF_SCREEN; 1720 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1721 gccb->gc_cmd_index); 1722 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ); 1723 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1724 GDT_MSG_INV_HANDLE); 1725 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1726 gccb->gc_scratch_busbase); 1727 gdt->sc_set_sema0(gdt); 1728 gdt->sc_cmd_off = 0; 1729 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1730 sizeof(u_int32_t)); 1731 gdt->sc_cmd_cnt = 0; 1732 gdt->sc_copy_cmd(gdt, gccb); 1733 printf("iir%d: [PCI %d/%d] ", 1734 gdt->sc_hanum,gdt->sc_bus,gdt->sc_slot); 1735 gdt->sc_release_event(gdt); 1736 } 1737 1738 } else { 1739 if ((gdt->sc_fw_vers & 0xff) >= 0x1a) { 1740 gdt->sc_dvr.size = 0; 1741 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1742 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1743 /* severity and event_string already set! */ 1744 } else { 1745 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.async); 1746 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1747 gdt->sc_dvr.eu.async.service = service; 1748 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1749 gdt->sc_dvr.eu.async.info = gdt->sc_info; 1750 *(u_int32_t *)gdt->sc_dvr.eu.async.scsi_coord = gdt->sc_info2; 1751 } 1752 gdt_store_event(GDT_ES_ASYNC, service, &gdt->sc_dvr); 1753 printf("iir%d: %s\n", gdt->sc_hanum, gdt->sc_dvr.event_string); 1754 } 1755 1756 return (0); 1757 } 1758 1759 int 1760 gdt_sync_event(struct gdt_softc *gdt, int service, 1761 u_int8_t index, struct gdt_ccb *gccb) 1762 { 1763 union ccb *ccb; 1764 1765 GDT_DPRINTF(GDT_D_INTR, 1766 ("gdt_sync_event(%p, %d, %d, %p)\n", gdt,service,index,gccb)); 1767 1768 ccb = gccb->gc_ccb; 1769 1770 if (service == GDT_SCREENSERVICE) { 1771 u_int32_t msg_len; 1772 1773 msg_len = gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_LEN); 1774 if (msg_len) 1775 if (!(gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1776 gccb->gc_scratch[GDT_SCR_MSG_EXT])) { 1777 gccb->gc_scratch[GDT_SCR_MSG_TEXT + msg_len] = '\0'; 1778 printf("%s",&gccb->gc_scratch[GDT_SCR_MSG_TEXT]); 1779 } 1780 1781 if (gccb->gc_scratch[GDT_SCR_MSG_EXT] && 1782 !gccb->gc_scratch[GDT_SCR_MSG_ANSWER]) { 1783 while (gdt->sc_test_busy(gdt)) 1784 DELAY(1); 1785 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1786 gccb = gdt_get_ccb(gdt); 1787 if (gccb == NULL) { 1788 printf("iir%d: No free command index found\n", 1789 gdt->sc_hanum); 1790 return (1); 1791 } 1792 gccb->gc_service = service; 1793 gccb->gc_flags = GDT_GCF_SCREEN; 1794 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1795 gccb->gc_cmd_index); 1796 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ); 1797 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1798 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1799 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1800 gccb->gc_scratch_busbase); 1801 gdt->sc_set_sema0(gdt); 1802 gdt->sc_cmd_off = 0; 1803 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1804 sizeof(u_int32_t)); 1805 gdt->sc_cmd_cnt = 0; 1806 gdt->sc_copy_cmd(gdt, gccb); 1807 gdt->sc_release_event(gdt); 1808 return (0); 1809 } 1810 1811 if (gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1812 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN)) { 1813 /* default answers (getchar() not possible) */ 1814 if (gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) == 1) { 1815 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 0); 1816 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 1); 1817 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 0; 1818 } else { 1819 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 1820 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) - 2); 1821 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 2); 1822 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 1; 1823 gccb->gc_scratch[GDT_SCR_MSG_TEXT + 1] = 0; 1824 } 1825 gccb->gc_scratch[GDT_SCR_MSG_EXT] = 0; 1826 gccb->gc_scratch[GDT_SCR_MSG_ANSWER] = 0; 1827 while (gdt->sc_test_busy(gdt)) 1828 DELAY(1); 1829 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1830 gccb = gdt_get_ccb(gdt); 1831 if (gccb == NULL) { 1832 printf("iir%d: No free command index found\n", 1833 gdt->sc_hanum); 1834 return (1); 1835 } 1836 gccb->gc_service = service; 1837 gccb->gc_flags = GDT_GCF_SCREEN; 1838 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1839 gccb->gc_cmd_index); 1840 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 1841 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1842 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1843 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1844 gccb->gc_scratch_busbase); 1845 gdt->sc_set_sema0(gdt); 1846 gdt->sc_cmd_off = 0; 1847 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1848 sizeof(u_int32_t)); 1849 gdt->sc_cmd_cnt = 0; 1850 gdt->sc_copy_cmd(gdt, gccb); 1851 gdt->sc_release_event(gdt); 1852 return (0); 1853 } 1854 printf("\n"); 1855 return (0); 1856 } else { 1857 untimeout(iir_timeout, gccb, ccb->ccb_h.timeout_ch); 1858 if (gdt->sc_status == GDT_S_BSY) { 1859 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_sync_event(%p) gccb %p busy\n", 1860 gdt, gccb)); 1861 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1862 ++gdt_stat.req_queue_act; 1863 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1864 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1865 return (2); 1866 } 1867 1868 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, 1869 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 1870 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1871 bus_dmamap_unload(gdt->sc_buffer_dmat, gccb->gc_dmamap); 1872 1873 ccb->csio.resid = 0; 1874 if (gdt->sc_status == GDT_S_OK) { 1875 ccb->ccb_h.status |= CAM_REQ_CMP; 1876 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 1877 } else { 1878 /* error */ 1879 if (gccb->gc_service == GDT_CACHESERVICE) { 1880 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID; 1881 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 1882 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1883 bzero(&ccb->csio.sense_data, ccb->csio.sense_len); 1884 ccb->csio.sense_data.error_code = 1885 SSD_CURRENT_ERROR | SSD_ERRCODE_VALID; 1886 ccb->csio.sense_data.flags = SSD_KEY_NOT_READY; 1887 1888 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.sync); 1889 gdt->sc_dvr.eu.sync.ionode = gdt->sc_hanum; 1890 gdt->sc_dvr.eu.sync.service = service; 1891 gdt->sc_dvr.eu.sync.status = gdt->sc_status; 1892 gdt->sc_dvr.eu.sync.info = gdt->sc_info; 1893 gdt->sc_dvr.eu.sync.hostdrive = ccb->ccb_h.target_id; 1894 if (gdt->sc_status >= 0x8000) 1895 gdt_store_event(GDT_ES_SYNC, 0, &gdt->sc_dvr); 1896 else 1897 gdt_store_event(GDT_ES_SYNC, service, &gdt->sc_dvr); 1898 } else { 1899 /* raw service */ 1900 if (gdt->sc_status != GDT_S_RAW_SCSI || gdt->sc_info >= 0x100) { 1901 ccb->ccb_h.status = CAM_DEV_NOT_THERE; 1902 } else { 1903 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR|CAM_AUTOSNS_VALID; 1904 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 1905 ccb->csio.scsi_status = gdt->sc_info; 1906 bcopy(gccb->gc_scratch, &ccb->csio.sense_data, 1907 ccb->csio.sense_len); 1908 } 1909 } 1910 } 1911 --gdt_stat.io_count_act; 1912 xpt_done(ccb); 1913 } 1914 return (0); 1915 } 1916 1917 /* Controller event handling functions */ 1918 gdt_evt_str *gdt_store_event(u_int16_t source, u_int16_t idx, 1919 gdt_evt_data *evt) 1920 { 1921 gdt_evt_str *e; 1922 struct timeval tv; 1923 1924 GDT_DPRINTF(GDT_D_MISC, ("gdt_store_event(%d, %d)\n", source, idx)); 1925 if (source == 0) /* no source -> no event */ 1926 return 0; 1927 1928 if (ebuffer[elastidx].event_source == source && 1929 ebuffer[elastidx].event_idx == idx && 1930 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 && 1931 !memcmp((char *)&ebuffer[elastidx].event_data.eu, 1932 (char *)&evt->eu, evt->size)) || 1933 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 && 1934 !strcmp((char *)&ebuffer[elastidx].event_data.event_string, 1935 (char *)&evt->event_string)))) { 1936 e = &ebuffer[elastidx]; 1937 getmicrotime(&tv); 1938 e->last_stamp = tv.tv_sec; 1939 ++e->same_count; 1940 } else { 1941 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */ 1942 ++elastidx; 1943 if (elastidx == GDT_MAX_EVENTS) 1944 elastidx = 0; 1945 if (elastidx == eoldidx) { /* reached mark ? */ 1946 ++eoldidx; 1947 if (eoldidx == GDT_MAX_EVENTS) 1948 eoldidx = 0; 1949 } 1950 } 1951 e = &ebuffer[elastidx]; 1952 e->event_source = source; 1953 e->event_idx = idx; 1954 getmicrotime(&tv); 1955 e->first_stamp = e->last_stamp = tv.tv_sec; 1956 e->same_count = 1; 1957 e->event_data = *evt; 1958 e->application = 0; 1959 } 1960 return e; 1961 } 1962 1963 int gdt_read_event(int handle, gdt_evt_str *estr) 1964 { 1965 gdt_evt_str *e; 1966 int eindex, lock; 1967 1968 GDT_DPRINTF(GDT_D_MISC, ("gdt_read_event(%d)\n", handle)); 1969 lock = splcam(); 1970 if (handle == -1) 1971 eindex = eoldidx; 1972 else 1973 eindex = handle; 1974 estr->event_source = 0; 1975 1976 if (eindex >= GDT_MAX_EVENTS) { 1977 splx(lock); 1978 return eindex; 1979 } 1980 e = &ebuffer[eindex]; 1981 if (e->event_source != 0) { 1982 if (eindex != elastidx) { 1983 if (++eindex == GDT_MAX_EVENTS) 1984 eindex = 0; 1985 } else { 1986 eindex = -1; 1987 } 1988 memcpy(estr, e, sizeof(gdt_evt_str)); 1989 } 1990 splx(lock); 1991 return eindex; 1992 } 1993 1994 void gdt_readapp_event(u_int8_t application, gdt_evt_str *estr) 1995 { 1996 gdt_evt_str *e; 1997 int found = FALSE; 1998 int eindex, lock; 1999 2000 GDT_DPRINTF(GDT_D_MISC, ("gdt_readapp_event(%d)\n", application)); 2001 lock = splcam(); 2002 eindex = eoldidx; 2003 for (;;) { 2004 e = &ebuffer[eindex]; 2005 if (e->event_source == 0) 2006 break; 2007 if ((e->application & application) == 0) { 2008 e->application |= application; 2009 found = TRUE; 2010 break; 2011 } 2012 if (eindex == elastidx) 2013 break; 2014 if (++eindex == GDT_MAX_EVENTS) 2015 eindex = 0; 2016 } 2017 if (found) 2018 memcpy(estr, e, sizeof(gdt_evt_str)); 2019 else 2020 estr->event_source = 0; 2021 splx(lock); 2022 } 2023 2024 void gdt_clear_events() 2025 { 2026 GDT_DPRINTF(GDT_D_MISC, ("gdt_clear_events\n")); 2027 2028 eoldidx = elastidx = 0; 2029 ebuffer[0].event_source = 0; 2030 }
Cache object: 8ac844cf2510d8c8fb809a142cdea88f
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