The Design and Implementation of the FreeBSD Operating System, Second Edition
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sys/dev/iir/iir.h

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    1 /* $FreeBSD: stable/12/sys/dev/iir/iir.h 326255 2017-11-27 14:52:40Z pfg $ */
    2 /*-
    3  * SPDX-License-Identifier: BSD-3-Clause
    4  *
    5  *       Copyright (c) 2000-04 ICP vortex GmbH
    6  *       Copyright (c) 2002-04 Intel Corporation
    7  *       Copyright (c) 2003-04 Adaptec Inc.
    8  *       All Rights Reserved
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions, and the following disclaimer,
   15  *    without modification, immediately at the beginning of the file.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. The name of the author may not be used to endorse or promote products
   20  *    derived from this software without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   25  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
   26  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   32  * SUCH DAMAGE.
   33  *
   34  */
   35 
   36 /*
   37  *
   38  * iir.h:       Definitions/Constants used by the Intel Integrated RAID driver
   39  *
   40  * Written by:  Achim Leubner <achim_leubner@adaptec.com>
   41  * Fixes/Additions:     Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>
   42  *
   43  * credits:     Niklas Hallqvist;       OpenBSD driver for the ICP Controllers.
   44  *              FreeBSD.ORG;            Great O/S to work on and for.
   45  *
   46  * $Id: iir.h 1.6 2004/03/30 10:19:44 achim Exp $"
   47  */
   48 
   49 #ifndef _IIR_H
   50 #define _IIR_H
   51 
   52 #ifndef _SYS_CDEFS_H_
   53 #error this file needs sys/cdefs.h as a prerequisite
   54 #endif
   55 
   56 #define IIR_DRIVER_VERSION      1
   57 #define IIR_DRIVER_SUBVERSION   5
   58 
   59 /* OEM IDs */
   60 #define OEM_ID_ICP              0x941c
   61 #define OEM_ID_INTEL            0x8000
   62 
   63 #define GDT_VENDOR_ID           0x1119
   64 #define GDT_DEVICE_ID_MIN       0x100
   65 #define GDT_DEVICE_ID_MAX       0x2ff
   66 #define GDT_DEVICE_ID_NEWRX     0x300
   67 
   68 #define INTEL_VENDOR_ID_IIR     0x8086
   69 #define INTEL_DEVICE_ID_IIR     0x600
   70 
   71 #define GDT_MAXBUS              6       /* XXX Why not 5? */
   72 #define GDT_MAX_HDRIVES         100     /* max 100 host drives */
   73 #define GDT_MAXID_FC            127     /* Fibre-channel IDs */
   74 #define GDT_MAXID               16      /* SCSI IDs */
   75 #define GDT_MAXOFFSETS          128
   76 #define GDT_MAXSG               32      /* Max. s/g elements */
   77 #define GDT_PROTOCOL_VERSION    1
   78 #define GDT_LINUX_OS            8       /* Used for cache optimization */
   79 #define GDT_SCATTER_GATHER      1       /* s/g feature */
   80 #define GDT_SECS32              0x1f    /* round capacity */
   81 #define GDT_LOCALBOARD          0       /* Board node always 0 */
   82 #define GDT_MAXCMDS             124
   83 #define GDT_SECTOR_SIZE         0x200   /* Always 512 bytes for cache devs */
   84 #define GDT_MAX_EVENTS          0x100   /* event buffer */
   85 
   86 /* DPMEM constants */
   87 #define GDT_MPR_MAGIC           0xc0ffee11
   88 #define GDT_IC_HEADER_BYTES     48
   89 #define GDT_IC_QUEUE_BYTES      4
   90 #define GDT_DPMEM_COMMAND_OFFSET \
   91     (GDT_IC_HEADER_BYTES + GDT_IC_QUEUE_BYTES * GDT_MAXOFFSETS)
   92 
   93 /* geometry constants */
   94 #define GDT_MAXCYLS             1024
   95 #define GDT_HEADS               64
   96 #define GDT_SECS                32      /* mapping 64*32 */
   97 #define GDT_MEDHEADS            127
   98 #define GDT_MEDSECS             63      /* mapping 127*63 */
   99 #define GDT_BIGHEADS            255
  100 #define GDT_BIGSECS             63      /* mapping 255*63 */
  101 
  102 /* data direction raw service */
  103 #define GDT_DATA_IN             0x01000000L
  104 #define GDT_DATA_OUT            0x00000000L
  105 
  106 /* Cache/raw service commands */
  107 #define GDT_INIT        0               /* service initialization */
  108 #define GDT_READ        1               /* read command */
  109 #define GDT_WRITE       2               /* write command */
  110 #define GDT_INFO        3               /* information about devices */
  111 #define GDT_FLUSH       4               /* flush dirty cache buffers */
  112 #define GDT_IOCTL       5               /* ioctl command */
  113 #define GDT_DEVTYPE     9               /* additional information */
  114 #define GDT_MOUNT       10              /* mount cache device */
  115 #define GDT_UNMOUNT     11              /* unmount cache device */
  116 #define GDT_SET_FEAT    12              /* set features (scatter/gather) */
  117 #define GDT_GET_FEAT    13              /* get features */
  118 #define GDT_WRITE_THR   16              /* write through */
  119 #define GDT_READ_THR    17              /* read through */
  120 #define GDT_EXT_INFO    18              /* extended info */
  121 #define GDT_RESET       19              /* controller reset */
  122 #define GDT_FREEZE_IO   25              /* freeze all IOs */
  123 #define GDT_UNFREEZE_IO 26              /* unfreeze all IOs */
  124 
  125 /* Additional raw service commands */
  126 #define GDT_RESERVE     14              /* reserve device to raw service */
  127 #define GDT_RELEASE     15              /* release device */
  128 #define GDT_RESERVE_ALL 16              /* reserve all devices */
  129 #define GDT_RELEASE_ALL 17              /* release all devices */
  130 #define GDT_RESET_BUS   18              /* reset bus */
  131 #define GDT_SCAN_START  19              /* start device scan */
  132 #define GDT_SCAN_END    20              /* stop device scan */  
  133 
  134 /* IOCTL command defines */
  135 #define GDT_SCSI_DR_INFO        0x00    /* SCSI drive info */
  136 #define GDT_SCSI_CHAN_CNT       0x05    /* SCSI channel count */
  137 #define GDT_SCSI_DR_LIST        0x06    /* SCSI drive list */
  138 #define GDT_SCSI_DEF_CNT        0x15    /* grown/primary defects */
  139 #define GDT_DSK_STATISTICS      0x4b    /* SCSI disk statistics */
  140 #define GDT_IOCHAN_DESC         0x5d    /* description of IO channel */
  141 #define GDT_IOCHAN_RAW_DESC     0x5e    /* description of raw IO channel */
  142 
  143 #define GDT_L_CTRL_PATTERN      0x20000000      /* SCSI IOCTL mask */
  144 #define GDT_ARRAY_INFO          0x12            /* array drive info */
  145 #define GDT_ARRAY_DRV_LIST      0x0f            /* array drive list */
  146 #define GDT_LA_CTRL_PATTERN     0x10000000      /* array IOCTL mask */
  147 #define GDT_CACHE_DRV_CNT       0x01            /* cache drive count */
  148 #define GDT_CACHE_DRV_LIST      0x02            /* cache drive list */
  149 #define GDT_CACHE_INFO          0x04            /* cache info */
  150 #define GDT_CACHE_CONFIG        0x05            /* cache configuration */
  151 #define GDT_CACHE_DRV_INFO      0x07            /* cache drive info */
  152 #define GDT_BOARD_FEATURES      0x15            /* controller features */
  153 #define GDT_BOARD_INFO          0x28            /* controller info */
  154 #define GDT_OEM_STR_RECORD      0x84            /* OEM info */
  155 #define GDT_HOST_GET            0x10001         /* get host drive list */
  156 #define GDT_IO_CHANNEL          0x20000         /* default IO channel */
  157 #define GDT_INVALID_CHANNEL     0xffff          /* invalid channel */
  158 
  159 /* IOCTLs */
  160 #define GDT_IOCTL_GENERAL       _IOWR('J', 0, gdt_ucmd_t) /* general IOCTL */
  161 #define GDT_IOCTL_DRVERS        _IOR('J', 1, int)      /* get driver version */
  162 #define GDT_IOCTL_CTRTYPE       _IOWR('J', 2, gdt_ctrt_t) /* get ctr. type */
  163 #define GDT_IOCTL_DRVERS_OLD    _IOWR('J', 1, int)      /* get driver version */
  164 #define GDT_IOCTL_CTRTYPE_OLD   _IOR('J', 2, gdt_ctrt_t) /* get ctr. type */
  165 #define GDT_IOCTL_OSVERS        _IOR('J', 3, gdt_osv_t) /* get OS version */
  166 #define GDT_IOCTL_CTRCNT        _IOR('J', 5, int)       /* get ctr. count */
  167 #define GDT_IOCTL_EVENT         _IOWR('J', 8, gdt_event_t) /* get event */
  168 #define GDT_IOCTL_STATIST       _IOR('J', 9, gdt_statist_t) /* get statistics */
  169 
  170 /* Service errors */
  171 #define GDT_S_OK                1       /* no error */
  172 #define GDT_S_BSY               7       /* controller busy */
  173 #define GDT_S_RAW_SCSI          12      /* raw service: target error */
  174 #define GDT_S_RAW_ILL           0xff    /* raw service: illegal */
  175 #define GDT_S_NO_STATUS         0x1000  /* got no status (driver-generated) */
  176 
  177 /* Controller services */
  178 #define GDT_SCSIRAWSERVICE      3
  179 #define GDT_CACHESERVICE        9
  180 #define GDT_SCREENSERVICE       11
  181 
  182 /* Scatter/gather element */
  183 #define GDT_SG_PTR              0x00    /* u_int32_t, address */
  184 #define GDT_SG_LEN              0x04    /* u_int32_t, length */
  185 #define GDT_SG_SZ               0x08
  186 
  187 /* Cache service command */
  188 #define GDT_CACHE_DEVICENO      0x00    /* u_int16_t, number of cache drive */
  189 #define GDT_CACHE_BLOCKNO       0x02    /* u_int32_t, block number */
  190 #define GDT_CACHE_BLOCKCNT      0x06    /* u_int32_t, block count */
  191 #define GDT_CACHE_DESTADDR      0x0a    /* u_int32_t, dest. addr. (-1: s/g) */
  192 #define GDT_CACHE_SG_CANZ       0x0e    /* u_int32_t, s/g element count */
  193 #define GDT_CACHE_SG_LST        0x12    /* [GDT_MAXSG], s/g list */
  194 #define GDT_CACHE_SZ            (0x12 + GDT_MAXSG * GDT_SG_SZ)
  195 
  196 /* Ioctl command */
  197 #define GDT_IOCTL_PARAM_SIZE    0x00    /* u_int16_t, size of buffer */
  198 #define GDT_IOCTL_SUBFUNC       0x02    /* u_int32_t, ioctl function */
  199 #define GDT_IOCTL_CHANNEL       0x06    /* u_int32_t, device */
  200 #define GDT_IOCTL_P_PARAM       0x0a    /* u_int32_t, buffer */
  201 #define GDT_IOCTL_SZ            0x0e
  202 
  203 /* Screen service defines */
  204 #define GDT_MSG_INV_HANDLE      -1      /* special message handle */
  205 #define GDT_MSGLEN              16      /* size of message text */
  206 #define GDT_MSG_SIZE            34      /* size of message structure */
  207 #define GDT_MSG_REQUEST         0       /* async. event. message */
  208 
  209 /* Screen service command */
  210 #define GDT_SCREEN_MSG_HANDLE   0x02    /* u_int32_t, message handle */
  211 #define GDT_SCREEN_MSG_ADDR     0x06    /* u_int32_t, message buffer address */
  212 #define GDT_SCREEN_SZ           0x0a
  213 
  214 /* Screen service message */
  215 #define GDT_SCR_MSG_HANDLE      0x00    /* u_int32_t, message handle */
  216 #define GDT_SCR_MSG_LEN         0x04    /* u_int32_t, size of message */
  217 #define GDT_SCR_MSG_ALEN        0x08    /* u_int32_t, answer length */
  218 #define GDT_SCR_MSG_ANSWER      0x0c    /* u_int8_t, answer flag */
  219 #define GDT_SCR_MSG_EXT         0x0d    /* u_int8_t, more messages? */
  220 #define GDT_SCR_MSG_RES         0x0e    /* u_int16_t, reserved */
  221 #define GDT_SCR_MSG_TEXT        0x10    /* GDT_MSGLEN+2, message text */
  222 #define GDT_SCR_MSG_SZ          (0x12 + GDT_MSGLEN)
  223 
  224 /* Raw service command */
  225 #define GDT_RAW_DIRECTION       0x02    /* u_int32_t, data direction */
  226 #define GDT_RAW_MDISC_TIME      0x06    /* u_int32_t, disc. time (0: none) */
  227 #define GDT_RAW_MCON_TIME       0x0a    /* u_int32_t, conn. time (0: none) */
  228 #define GDT_RAW_SDATA           0x0e    /* u_int32_t, dest. addr. (-1: s/g) */
  229 #define GDT_RAW_SDLEN           0x12    /* u_int32_t, data length */
  230 #define GDT_RAW_CLEN            0x16    /* u_int32_t, SCSI cmd len (6/10/12) */
  231 #define GDT_RAW_CMD             0x1a    /* u_int8_t [12], SCSI command */
  232 #define GDT_RAW_TARGET          0x26    /* u_int8_t, target ID */
  233 #define GDT_RAW_LUN             0x27    /* u_int8_t, LUN */
  234 #define GDT_RAW_BUS             0x28    /* u_int8_t, SCSI bus number */
  235 #define GDT_RAW_PRIORITY        0x29    /* u_int8_t, only 0 used */
  236 #define GDT_RAW_SENSE_LEN       0x2a    /* u_int32_t, sense data length */
  237 #define GDT_RAW_SENSE_DATA      0x2e    /* u_int32_t, sense data address */
  238 #define GDT_RAW_SG_RANZ         0x36    /* u_int32_t, s/g element count */
  239 #define GDT_RAW_SG_LST          0x3a    /* [GDT_MAXSG], s/g list */
  240 #define GDT_RAW_SZ              (0x3a + GDT_MAXSG * GDT_SG_SZ)
  241 
  242 /* Command structure */
  243 #define GDT_CMD_BOARDNODE       0x00    /* u_int32_t, board node (always 0) */
  244 #define GDT_CMD_COMMANDINDEX    0x04    /* u_int32_t, command number */ 
  245 #define GDT_CMD_OPCODE          0x08    /* u_int16_t, opcode (READ, ...) */
  246 #define GDT_CMD_UNION           0x0a    /* cache/screen/raw service command */
  247 #define GDT_CMD_UNION_SZ        GDT_RAW_SZ
  248 #define GDT_CMD_SZ              (0x0a + GDT_CMD_UNION_SZ)
  249 
  250 /* Command queue entries */
  251 #define GDT_OFFSET      0x00    /* u_int16_t, command offset in the DP RAM */
  252 #define GDT_SERV_ID     0x02    /* u_int16_t, service */
  253 #define GDT_COMM_Q_SZ   0x04
  254 
  255 /* Interface area */
  256 #define GDT_S_CMD_INDX  0x00    /* u_int8_t, special command */
  257 #define GDT_S_STATUS    0x01    /* volatile u_int8_t, status special command */
  258 #define GDT_S_INFO      0x04    /* u_int32_t [4], add. info special command */
  259 #define GDT_SEMA0       0x14    /* volatile u_int8_t, command semaphore */
  260 #define GDT_CMD_INDEX   0x18    /* u_int8_t, command number */
  261 #define GDT_STATUS      0x1c    /* volatile u_int16_t, command status */
  262 #define GDT_SERVICE     0x1e    /* u_int16_t, service (for asynch. events) */
  263 #define GDT_DPR_INFO    0x20    /* u_int32_t [2], additional info */
  264 #define GDT_COMM_QUEUE  0x28    /* command queue */
  265 #define GDT_DPR_CMD     (0x30 + GDT_MAXOFFSETS * GDT_COMM_Q_SZ)
  266                                 /* u_int8_t [], commands */
  267 
  268 /* I/O channel header */
  269 #define GDT_IOC_VERSION         0x00    /* u_int32_t, version (~0: newest) */
  270 #define GDT_IOC_LIST_ENTRIES    0x04    /* u_int8_t, list entry count */
  271 #define GDT_IOC_FIRST_CHAN      0x05    /* u_int8_t, first channel number */
  272 #define GDT_IOC_LAST_CHAN       0x06    /* u_int8_t, last channel number */
  273 #define GDT_IOC_CHAN_COUNT      0x07    /* u_int8_t, (R) channel count */
  274 #define GDT_IOC_LIST_OFFSET     0x08    /* u_int32_t, offset of list[0] */
  275 #define GDT_IOC_HDR_SZ          0x0c
  276 
  277 #define GDT_IOC_NEWEST          0xffffffff      /* goes into GDT_IOC_VERSION */
  278 
  279 /* Get I/O channel description */
  280 #define GDT_IOC_ADDRESS         0x00    /* u_int32_t, channel address */
  281 #define GDT_IOC_TYPE            0x04    /* u_int8_t, type (SCSI/FCSL) */
  282 #define GDT_IOC_LOCAL_NO        0x05    /* u_int8_t, local number */
  283 #define GDT_IOC_FEATURES        0x06    /* u_int16_t, channel features */
  284 #define GDT_IOC_SZ              0x08
  285 
  286 /* Get raw I/O channel description */
  287 #define GDT_RAWIOC_PROC_ID      0x00    /* u_int8_t, processor id */
  288 #define GDT_RAWIOC_PROC_DEFECT  0x01    /* u_int8_t, defect? */
  289 #define GDT_RAWIOC_SZ           0x04
  290 
  291 /* Get SCSI channel count */
  292 #define GDT_GETCH_CHANNEL_NO    0x00    /* u_int32_t, channel number */
  293 #define GDT_GETCH_DRIVE_CNT     0x04    /* u_int32_t, drive count */
  294 #define GDT_GETCH_SIOP_ID       0x08    /* u_int8_t, SCSI processor ID */
  295 #define GDT_GETCH_SIOP_STATE    0x09    /* u_int8_t, SCSI processor state */
  296 #define GDT_GETCH_SZ            0x0a
  297 
  298 /* Cache info/config IOCTL structures */
  299 #define GDT_CPAR_VERSION        0x00    /* u_int32_t, firmware version */
  300 #define GDT_CPAR_STATE          0x04    /* u_int16_t, cache state (on/off) */
  301 #define GDT_CPAR_STRATEGY       0x06    /* u_int16_t, cache strategy */
  302 #define GDT_CPAR_WRITE_BACK     0x08    /* u_int16_t, write back (on/off) */
  303 #define GDT_CPAR_BLOCK_SIZE     0x0a    /* u_int16_t, cache block size */
  304 #define GDT_CPAR_SZ             0x0c
  305 
  306 #define GDT_CSTAT_CSIZE         0x00    /* u_int32_t, cache size */
  307 #define GDT_CSTAT_READ_CNT      0x04    /* u_int32_t, read counter */
  308 #define GDT_CSTAT_WRITE_CNT     0x08    /* u_int32_t, write counter */
  309 #define GDT_CSTAT_TR_HITS       0x0c    /* u_int32_t, track hits */
  310 #define GDT_CSTAT_SEC_HITS      0x10    /* u_int32_t, sector hits */
  311 #define GDT_CSTAT_SEC_MISS      0x14    /* u_int32_t, sector misses */
  312 #define GDT_CSTAT_SZ            0x18
  313 
  314 /* Get cache info */
  315 #define GDT_CINFO_CPAR          0x00
  316 #define GDT_CINFO_CSTAT         GDT_CPAR_SZ
  317 #define GDT_CINFO_SZ            (GDT_CPAR_SZ + GDT_CSTAT_SZ)
  318 
  319 /* Get board info */
  320 #define GDT_BINFO_SER_NO        0x00    /* u_int32_t, serial number */
  321 #define GDT_BINFO_OEM_ID        0x04    /* u_int8_t [2], OEM ID */
  322 #define GDT_BINFO_EP_FLAGS      0x06    /* u_int16_t, eprom flags */
  323 #define GDT_BINFO_PROC_ID       0x08    /* u_int32_t, processor ID */
  324 #define GDT_BINFO_MEMSIZE       0x0c    /* u_int32_t, memory size (bytes) */
  325 #define GDT_BINFO_MEM_BANKS     0x10    /* u_int8_t, memory banks */
  326 #define GDT_BINFO_CHAN_TYPE     0x11    /* u_int8_t, channel type */
  327 #define GDT_BINFO_CHAN_COUNT    0x12    /* u_int8_t, channel count */
  328 #define GDT_BINFO_RDONGLE_PRES  0x13    /* u_int8_t, dongle present */
  329 #define GDT_BINFO_EPR_FW_VER    0x14    /* u_int32_t, (eprom) firmware ver */
  330 #define GDT_BINFO_UPD_FW_VER    0x18    /* u_int32_t, (update) firmware ver */
  331 #define GDT_BINFO_UPD_REVISION  0x1c    /* u_int32_t, update revision */
  332 #define GDT_BINFO_TYPE_STRING   0x20    /* char [16], controller name */
  333 #define GDT_BINFO_RAID_STRING   0x30    /* char [16], RAID firmware name */
  334 #define GDT_BINFO_UPDATE_PRES   0x40    /* u_int8_t, update present? */
  335 #define GDT_BINFO_XOR_PRES      0x41    /* u_int8_t, XOR engine present */
  336 #define GDT_BINFO_PROM_TYPE     0x42    /* u_int8_t, ROM type (eprom/flash) */
  337 #define GDT_BINFO_PROM_COUNT    0x43    /* u_int8_t, number of ROM devices */
  338 #define GDT_BINFO_DUP_PRES      0x44    /* u_int32_t, duplexing module pres? */
  339 #define GDT_BINFO_CHAN_PRES     0x48    /* u_int32_t, # of exp. channels */
  340 #define GDT_BINFO_MEM_PRES      0x4c    /* u_int32_t, memory expansion inst? */
  341 #define GDT_BINFO_FT_BUS_SYSTEM 0x50    /* u_int8_t, fault bus supported? */
  342 #define GDT_BINFO_SUBTYPE_VALID 0x51    /* u_int8_t, board_subtype valid */
  343 #define GDT_BINFO_BOARD_SUBTYPE 0x52    /* u_int8_t, subtype/hardware level */
  344 #define GDT_BINFO_RAMPAR_PRES   0x53    /* u_int8_t, RAM parity check hw? */
  345 #define GDT_BINFO_SZ            0x54
  346 
  347 /* Get board features */
  348 #define GDT_BFEAT_CHAINING      0x00    /* u_int8_t, chaining supported */
  349 #define GDT_BFEAT_STRIPING      0x01    /* u_int8_t, striping (RAID-0) supp. */
  350 #define GDT_BFEAT_MIRRORING     0x02    /* u_int8_t, mirroring (RAID-1) supp */
  351 #define GDT_BFEAT_RAID          0x03    /* u_int8_t, RAID-4/5/10 supported */
  352 #define GDT_BFEAT_SZ            0x04
  353 
  354 /* Other defines */
  355 #define GDT_ASYNCINDEX  0       /* command index asynchronous event */
  356 #define GDT_SPEZINDEX   1       /* command index unknown service */
  357 
  358 /* Debugging */
  359 #ifdef GDT_DEBUG
  360 #define GDT_D_INTR      0x01
  361 #define GDT_D_MISC      0x02
  362 #define GDT_D_CMD       0x04
  363 #define GDT_D_QUEUE     0x08
  364 #define GDT_D_TIMEOUT   0x10
  365 #define GDT_D_INIT      0x20
  366 #define GDT_D_INVALID   0x40
  367 #define GDT_D_DEBUG     0x80
  368 extern int gdt_debug;
  369 #ifdef __SERIAL__
  370 extern int ser_printf(const char *fmt, ...);
  371 #define GDT_DPRINTF(mask, args) if (gdt_debug & (mask)) ser_printf args
  372 #else
  373 #define GDT_DPRINTF(mask, args) if (gdt_debug & (mask)) printf args
  374 #endif
  375 #else
  376 #define GDT_DPRINTF(mask, args)
  377 #endif
  378 
  379 /* Miscellaneous constants */
  380 #define GDT_RETRIES             100000000       /* 100000 * 1us = 100s */
  381 #define GDT_TIMEOUT             100000000       /* 100000 * 1us = 100s */
  382 #define GDT_POLL_TIMEOUT        10000000        /* 10000 * 1us = 10s */
  383 #define GDT_WATCH_TIMEOUT       10000000        /* 10000 * 1us = 10s */
  384 #define GDT_SCRATCH_SZ          3072            /* 3KB scratch buffer */
  385 
  386 /* Map minor numbers to device identity */
  387 #define LUN_MASK                0x0007
  388 #define TARGET_MASK             0x03f8
  389 #define BUS_MASK                0x1c00
  390 #define HBA_MASK                0xe000
  391 
  392 #define minor2lun(minor)        ( minor & LUN_MASK )
  393 #define minor2target(minor)     ( (minor & TARGET_MASK) >> 3 )
  394 #define minor2bus(minor)        ( (minor & BUS_MASK) >> 10 )
  395 #define minor2hba(minor)        ( (minor & HBA_MASK) >> 13 )
  396 #define hba2minor(hba)          ( (hba << 13) & HBA_MASK )
  397 
  398 
  399 /* struct for GDT_IOCTL_GENERAL */
  400 #pragma pack(1)
  401 typedef struct gdt_ucmd {
  402     u_int16_t   io_node;
  403     u_int16_t   service;
  404     u_int32_t   timeout;
  405     u_int16_t   status;
  406     u_int32_t   info;
  407 
  408     u_int32_t   BoardNode;                      /* board node (always 0) */
  409     u_int32_t   CommandIndex;                   /* command number */
  410     u_int16_t   OpCode;                         /* the command (READ,..) */
  411     union {
  412         struct {
  413             u_int16_t   DeviceNo;               /* number of cache drive */
  414             u_int32_t   BlockNo;                /* block number */
  415             u_int32_t   BlockCnt;               /* block count */
  416             void        *DestAddr;              /* data */
  417         } cache;                                /* cache service cmd. str. */
  418         struct {
  419             u_int16_t   param_size;             /* size of p_param buffer */
  420             u_int32_t   subfunc;                /* IOCTL function */
  421             u_int32_t   channel;                /* device */
  422             void        *p_param;               /* data */
  423         } ioctl;                                /* IOCTL command structure */
  424         struct {
  425             u_int16_t   reserved;
  426             u_int32_t   direction;              /* data direction */
  427             u_int32_t   mdisc_time;             /* disc. time (0: no timeout)*/
  428             u_int32_t   mcon_time;              /* connect time(0: no to.) */
  429             void        *sdata;                 /* dest. addr. (if s/g: -1) */
  430             u_int32_t   sdlen;                  /* data length (bytes) */
  431             u_int32_t   clen;                   /* SCSI cmd. length(6,10,12) */
  432             u_int8_t    cmd[12];                /* SCSI command */
  433             u_int8_t    target;                 /* target ID */
  434             u_int8_t    lun;                    /* LUN */
  435             u_int8_t    bus;                    /* SCSI bus number */
  436             u_int8_t    priority;               /* only 0 used */
  437             u_int32_t   sense_len;              /* sense data length */
  438             void        *sense_data;            /* sense data addr. */
  439             u_int32_t   link_p;                 /* linked cmds (not supp.) */
  440         } raw;                                  /* raw service cmd. struct. */
  441     } u;
  442     u_int8_t            data[GDT_SCRATCH_SZ];
  443     int                 complete_flag;
  444     TAILQ_ENTRY(gdt_ucmd) links;
  445 } gdt_ucmd_t;
  446 
  447 /* struct for GDT_IOCTL_CTRTYPE */
  448 typedef struct gdt_ctrt {
  449     u_int16_t io_node;
  450     u_int16_t oem_id;
  451     u_int16_t type;
  452     u_int32_t info;
  453     u_int8_t  access;
  454     u_int8_t  remote;
  455     u_int16_t ext_type;
  456     u_int16_t device_id;
  457     u_int16_t sub_device_id;
  458 } gdt_ctrt_t;
  459 
  460 /* struct for GDT_IOCTL_OSVERS */
  461 typedef struct gdt_osv {
  462     u_int8_t  oscode;
  463     u_int8_t  version;
  464     u_int8_t  subversion;
  465     u_int16_t revision;
  466     char      name[64];
  467 } gdt_osv_t;
  468 
  469 /* OEM */
  470 #define GDT_OEM_VERSION     0x00
  471 #define GDT_OEM_BUFSIZE     0x0c
  472 typedef struct {
  473     u_int32_t ctl_version;
  474     u_int32_t file_major_version;
  475     u_int32_t file_minor_version;
  476     u_int32_t buffer_size;
  477     u_int32_t cpy_count;
  478     u_int32_t ext_error;
  479     u_int32_t oem_id;
  480     u_int32_t board_id;
  481 } gdt_oem_param_t;
  482 
  483 typedef struct {
  484     char      product_0_1_name[16];
  485     char      product_4_5_name[16];
  486     char      product_cluster_name[16];
  487     char      product_reserved[16];
  488     char      scsi_cluster_target_vendor_id[16];
  489     char      cluster_raid_fw_name[16];
  490     char      oem_brand_name[16];
  491     char      oem_raid_type[16];
  492     char      bios_type[13];
  493     char      bios_title[50];
  494     char      oem_company_name[37];
  495     u_int32_t pci_id_1;
  496     u_int32_t pci_id_2;
  497     char      validation_status[80];
  498     char      reserved_1[4];
  499     char      scsi_host_drive_inquiry_vendor_id[16];
  500     char      library_file_template[32];
  501     char      tool_name_1[32];
  502     char      tool_name_2[32];
  503     char      tool_name_3[32];
  504     char      oem_contact_1[84];
  505     char      oem_contact_2[84];
  506     char      oem_contact_3[84];
  507 } gdt_oem_record_t;
  508 
  509 typedef struct {
  510     gdt_oem_param_t  parameters;
  511     gdt_oem_record_t text;
  512 } gdt_oem_str_record_t;
  513 
  514 
  515 /* controller event structure */
  516 #define GDT_ES_ASYNC    1
  517 #define GDT_ES_DRIVER   2
  518 #define GDT_ES_TEST     3
  519 #define GDT_ES_SYNC     4
  520 typedef struct {
  521     u_int16_t           size;               /* size of structure */
  522     union {
  523         char            stream[16];
  524         struct {
  525             u_int16_t   ionode;
  526             u_int16_t   service;
  527             u_int32_t   index;
  528         } driver;
  529         struct {
  530             u_int16_t   ionode;
  531             u_int16_t   service;
  532             u_int16_t   status;
  533             u_int32_t   info;
  534             u_int8_t    scsi_coord[3];
  535         } async;
  536         struct {
  537             u_int16_t   ionode;
  538             u_int16_t   service;
  539             u_int16_t   status;
  540             u_int32_t   info;
  541             u_int16_t   hostdrive;
  542             u_int8_t    scsi_coord[3];
  543             u_int8_t    sense_key;
  544         } sync;
  545         struct {
  546             u_int32_t   l1, l2, l3, l4;
  547         } test;
  548     } eu;
  549     u_int32_t           severity;
  550     u_int8_t            event_string[256];          
  551 } gdt_evt_data;
  552 
  553 /* dvrevt structure */
  554 typedef struct {
  555     u_int32_t           first_stamp;
  556     u_int32_t           last_stamp;
  557     u_int16_t           same_count;
  558     u_int16_t           event_source;
  559     u_int16_t           event_idx;
  560     u_int8_t            application;
  561     u_int8_t            reserved;
  562     gdt_evt_data        event_data;
  563 } gdt_evt_str;
  564 
  565 /* struct for GDT_IOCTL_EVENT */
  566 typedef struct gdt_event {
  567     int erase;
  568     int handle;
  569     gdt_evt_str dvr;
  570 } gdt_event_t;
  571 
  572 /* struct for GDT_IOCTL_STATIST */
  573 typedef struct gdt_statist {
  574     u_int16_t io_count_act;
  575     u_int16_t io_count_max;
  576     u_int16_t req_queue_act;
  577     u_int16_t req_queue_max;
  578     u_int16_t cmd_index_act;
  579     u_int16_t cmd_index_max;
  580     u_int16_t sg_count_act;
  581     u_int16_t sg_count_max;
  582 } gdt_statist_t;
  583 
  584 #pragma pack()
  585 
  586 /* Context structure for interrupt services */
  587 struct gdt_intr_ctx {
  588     u_int32_t info, info2;
  589     u_int16_t cmd_status, service;
  590     u_int8_t istatus;
  591 };
  592 
  593 /* softc structure */
  594 struct gdt_softc {
  595     device_t sc_devnode;
  596     struct mtx sc_lock;
  597     int sc_hanum;
  598     int sc_class;               /* Controller class */
  599 #define GDT_MPR         0x05
  600 #define GDT_CLASS_MASK  0x07
  601 #define GDT_FC          0x10
  602 #define GDT_CLASS(gdt)  ((gdt)->sc_class & GDT_CLASS_MASK)
  603     int sc_bus, sc_slot;
  604     u_int16_t sc_vendor;
  605     u_int16_t sc_device, sc_subdevice;
  606     u_int16_t sc_fw_vers;
  607     int sc_init_level;
  608     int sc_state;
  609 #define GDT_NORMAL      0x00
  610 #define GDT_POLLING     0x01
  611 #define GDT_SHUTDOWN    0x02
  612 #define GDT_POLL_WAIT   0x80
  613     struct cdev *sc_dev;
  614     struct resource *sc_dpmem;
  615     bus_dma_tag_t sc_parent_dmat;
  616     bus_dma_tag_t sc_buffer_dmat;
  617     bus_dma_tag_t sc_gcscratch_dmat;
  618     bus_dmamap_t sc_gcscratch_dmamap;
  619     bus_addr_t sc_gcscratch_busbase;
  620 
  621     struct gdt_ccb *sc_gccbs;
  622     u_int8_t  *sc_gcscratch;
  623     SLIST_HEAD(, gdt_ccb) sc_free_gccb, sc_pending_gccb;
  624     TAILQ_HEAD(, ccb_hdr) sc_ccb_queue;
  625     TAILQ_HEAD(, gdt_ucmd) sc_ucmd_queue;
  626 
  627     u_int16_t sc_ic_all_size;
  628     u_int16_t sc_cmd_off;
  629     u_int16_t sc_cmd_cnt;
  630 
  631     u_int32_t sc_info;
  632     u_int32_t sc_info2;
  633     u_int16_t sc_status;
  634     u_int16_t sc_service;
  635 
  636     u_int8_t sc_bus_cnt;
  637     u_int8_t sc_virt_bus;
  638     u_int8_t sc_bus_id[GDT_MAXBUS];
  639     u_int8_t sc_more_proc;
  640 
  641     struct {
  642         u_int8_t hd_present;
  643         u_int8_t hd_is_logdrv;
  644         u_int8_t hd_is_arraydrv;
  645         u_int8_t hd_is_master;
  646         u_int8_t hd_is_parity;
  647         u_int8_t hd_is_hotfix;
  648         u_int8_t hd_master_no;
  649         u_int8_t hd_lock;
  650         u_int8_t hd_heads;
  651         u_int8_t hd_secs;
  652         u_int16_t hd_devtype;
  653         u_int32_t hd_size;
  654         u_int8_t hd_ldr_no;
  655         u_int8_t hd_rw_attribs;
  656         u_int32_t hd_start_sec;
  657     } sc_hdr[GDT_MAX_HDRIVES];
  658 
  659     u_int16_t sc_raw_feat;
  660     u_int16_t sc_cache_feat;
  661 
  662     gdt_evt_data sc_dvr;
  663     char oem_name[8];
  664 
  665     struct cam_sim *sims[GDT_MAXBUS];
  666     struct cam_path *paths[GDT_MAXBUS];
  667 
  668     void (*sc_copy_cmd)(struct gdt_softc *, struct gdt_ccb *);
  669     u_int8_t (*sc_get_status)(struct gdt_softc *);
  670     void (*sc_intr)(struct gdt_softc *, struct gdt_intr_ctx *);
  671     void (*sc_release_event)(struct gdt_softc *);
  672     void (*sc_set_sema0)(struct gdt_softc *);
  673     int (*sc_test_busy)(struct gdt_softc *);
  674 
  675     TAILQ_ENTRY(gdt_softc) links;
  676 };
  677 
  678 /*
  679  * A command control block, one for each corresponding command index of the
  680  * controller.
  681  */
  682 struct gdt_ccb {
  683     u_int8_t    *gc_scratch;
  684     bus_addr_t  gc_scratch_busbase;
  685     union ccb   *gc_ccb;
  686     gdt_ucmd_t  *gc_ucmd;
  687     bus_dmamap_t gc_dmamap;
  688     struct callout gc_timeout;
  689     int         gc_map_flag;
  690     u_int8_t    gc_service;
  691     u_int8_t    gc_cmd_index;
  692     u_int8_t    gc_flags;
  693 #define GDT_GCF_UNUSED          0       
  694 #define GDT_GCF_INTERNAL        1
  695 #define GDT_GCF_SCREEN          2
  696 #define GDT_GCF_SCSI            3
  697 #define GDT_GCF_IOCTL           4
  698     u_int16_t   gc_cmd_len;
  699     u_int8_t    gc_cmd[GDT_CMD_SZ];
  700     SLIST_ENTRY(gdt_ccb) sle;
  701 };
  702 
  703 
  704 int     iir_init(struct gdt_softc *);
  705 void    iir_free(struct gdt_softc *);
  706 void    iir_attach(struct gdt_softc *);
  707 void    iir_intr(void *arg);
  708 
  709 #ifdef __CC_SUPPORTS___INLINE__
  710 /* These all require correctly aligned buffers */
  711 static __inline__ void gdt_enc16(u_int8_t *, u_int16_t);
  712 static __inline__ void gdt_enc32(u_int8_t *, u_int32_t);
  713 static __inline__ u_int16_t gdt_dec16(u_int8_t *);
  714 static __inline__ u_int32_t gdt_dec32(u_int8_t *);
  715 
  716 static __inline__ void
  717 gdt_enc16(u_int8_t *addr, u_int16_t value)
  718 {
  719         *(u_int16_t *)addr = htole16(value);
  720 }
  721 
  722 static __inline__ void
  723 gdt_enc32(u_int8_t *addr, u_int32_t value)
  724 {
  725         *(u_int32_t *)addr = htole32(value);
  726 }
  727 
  728 static __inline__ u_int16_t
  729 gdt_dec16(u_int8_t *addr)
  730 {
  731         return le16toh(*(u_int16_t *)addr);
  732 }
  733 
  734 static __inline__ u_int32_t
  735 gdt_dec32(u_int8_t *addr)
  736 {
  737         return le32toh(*(u_int32_t *)addr);
  738 }
  739 #endif
  740 
  741 extern u_int8_t gdt_polling;
  742 
  743 struct cdev *gdt_make_dev(struct gdt_softc *gdt);
  744 void    gdt_destroy_dev(struct cdev *dev);
  745 void    gdt_next(struct gdt_softc *gdt);
  746 void gdt_free_ccb(struct gdt_softc *gdt, struct gdt_ccb *gccb);
  747 
  748 void gdt_store_event(u_int16_t source, u_int16_t idx,
  749                              gdt_evt_data *evt);
  750 int gdt_read_event(int handle, gdt_evt_str *estr);
  751 void gdt_readapp_event(u_int8_t app, gdt_evt_str *estr);
  752 void gdt_clear_events(void);
  753 
  754 #endif

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