The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/imcsmb/imcsmb_var.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Authors: Joe Kloss; Ravi Pokala (rpokala@freebsd.org)
    5  *
    6  * Copyright (c) 2017-2018 Panasas
    7  * All rights reserved.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  * $FreeBSD: releng/11.2/sys/dev/imcsmb/imcsmb_var.h 330304 2018-03-03 01:53:51Z rpokala $
   31  */
   32 
   33 #ifndef _DEV__IMCSMB__IMCSMB_VAR_H_
   34 #define _DEV__IMCSMB__IMCSMB_VAR_H_
   35 
   36 #include <sys/param.h>
   37 #include <sys/systm.h>
   38 #include <sys/kernel.h>
   39 #include <sys/module.h>
   40 #include <sys/endian.h>
   41 #include <sys/errno.h>
   42 #include <sys/lock.h>
   43 #include <sys/mutex.h>
   44 #include <sys/syslog.h>
   45 #include <sys/bus.h>
   46 
   47 #include <machine/bus.h>
   48 #include <machine/atomic.h>
   49 
   50 #include <dev/pci/pcivar.h>
   51 #include <dev/pci/pcireg.h>
   52 
   53 #include <dev/smbus/smbconf.h>
   54 
   55 #include "smbus_if.h"
   56 
   57 /* A detailed description of this device is present in imcsmb_pci.c */
   58 
   59 /**
   60  * The softc for a particular instance of the PCI device associated with a pair
   61  * of iMC-SMB controllers.
   62  *
   63  * Ordinarily, locking would be done with a mutex. However, we might have an
   64  * NVDIMM connected to this SMBus, and we might need to issue the SAVE command
   65  * to the NVDIMM from a panic context. Mutex operations are not allowed while
   66  * the scheduler is stopped, so just use a simple semaphore.
   67  *
   68  * If, as described in the manpage, additional steps are needed to stop/restart
   69  * firmware operations before/after using the controller, then additional fields
   70  * can be added to this softc.
   71  */
   72 struct imcsmb_pci_softc {
   73         device_t dev;
   74         volatile int semaphore;
   75 };
   76 
   77 void imcsmb_pci_release_bus(device_t dev);
   78 int imcsmb_pci_request_bus(device_t dev);
   79 
   80 /**
   81  * PCI config registers for each individual SMBus controller within the iMC.
   82  * Each iMC-SMB has a separate set of registers. There is an array of these
   83  * structures for the PCI device, and one of them is passed to driver for the
   84  * actual iMC-SMB as the IVAR.
   85  */
   86 struct imcsmb_reg_set {
   87         uint16_t smb_stat;
   88         uint16_t smb_cmd;
   89         uint16_t smb_cntl;
   90 };
   91 
   92 /**
   93  * The softc for the device associated with a particular iMC-SMB controller.
   94  * There are two such controllers for each of the PCI devices. The PCI driver
   95  * tells the iMC-SMB driver which set of registers to use via the IVAR. This
   96  * technique was suggested by John Baldwin (jhb@).
   97  */
   98 struct imcsmb_softc {
   99         device_t dev;
  100         device_t imcsmb_pci;    /* The SMBus controller's parent iMC */
  101         device_t smbus;         /* The child smbusX interface */
  102         struct imcsmb_reg_set *regs;    /* The registers this controller uses */
  103 };
  104 
  105 #endif /* _DEV__IMCSMB__IMCSMB_VAR_H_ */
  106 
  107 /* vi: set ts=8 sw=4 sts=8 noet: */

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