ioat_test.c

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    1 /*-
    2  * Copyright (C) 2012 Intel Corporation
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD$");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/bus.h>
   33 #include <sys/conf.h>
   34 #include <sys/ioccom.h>
   35 #include <sys/kernel.h>
   36 #include <sys/lock.h>
   37 #include <sys/malloc.h>
   38 #include <sys/module.h>
   39 #include <sys/mutex.h>
   40 #include <sys/rman.h>
   41 #include <sys/sysctl.h>
   42 #include <dev/pci/pcireg.h>
   43 #include <dev/pci/pcivar.h>
   44 #include <machine/bus.h>
   45 #include <machine/resource.h>
   46 #include <machine/stdarg.h>
   47 #include <vm/vm.h>
   48 #include <vm/vm_param.h>
   49 #include <vm/pmap.h>
   50 
   51 #include "ioat.h"
   52 #include "ioat_hw.h"
   53 #include "ioat_internal.h"
   54 #include "ioat_test.h"
   55 
   56 #ifndef time_after
   57 #define time_after(a,b)         ((long)(b) - (long)(a) < 0)
   58 #endif
   59 
   60 MALLOC_DEFINE(M_IOAT_TEST, "ioat_test", "ioat test allocations");
   61 
   62 #define IOAT_MAX_BUFS   256
   63 
   64 struct test_transaction {
   65         void                    *buf[IOAT_MAX_BUFS];
   66         uint32_t                length;
   67         uint32_t                depth;
   68         uint32_t                crc[IOAT_MAX_BUFS];
   69         struct ioat_test        *test;
   70         TAILQ_ENTRY(test_transaction)   entry;
   71 };
   72 
   73 #define IT_LOCK()       mtx_lock(&ioat_test_lk)
   74 #define IT_UNLOCK()     mtx_unlock(&ioat_test_lk)
   75 #define IT_ASSERT()     mtx_assert(&ioat_test_lk, MA_OWNED)
   76 static struct mtx ioat_test_lk;
   77 MTX_SYSINIT(ioat_test_lk, &ioat_test_lk, "test coordination mtx", MTX_DEF);
   78 
   79 static int g_thread_index = 1;
   80 static struct cdev *g_ioat_cdev = NULL;
   81 
   82 #define ioat_test_log(v, ...)   _ioat_test_log((v), "ioat_test: " __VA_ARGS__)
   83 static void _ioat_test_log(int verbosity, const char *fmt, ...);
   84 
   85 static void
   86 ioat_test_transaction_destroy(struct test_transaction *tx)
   87 {
   88         struct ioat_test *test;
   89         int i;
   90 
   91         test = tx->test;
   92 
   93         for (i = 0; i < IOAT_MAX_BUFS; i++) {
   94                 if (tx->buf[i] != NULL) {
   95                         if (test->testkind == IOAT_TEST_DMA_8K)
   96                                 free(tx->buf[i], M_IOAT_TEST);
   97                         else
   98                                 contigfree(tx->buf[i], tx->length, M_IOAT_TEST);
   99                         tx->buf[i] = NULL;
  100                 }
  101         }
  102 
  103         free(tx, M_IOAT_TEST);
  104 }
  105 
  106 static struct
  107 test_transaction *ioat_test_transaction_create(struct ioat_test *test,
  108     unsigned num_buffers)
  109 {
  110         struct test_transaction *tx;
  111         unsigned i;
  112 
  113         tx = malloc(sizeof(*tx), M_IOAT_TEST, M_NOWAIT | M_ZERO);
  114         if (tx == NULL)
  115                 return (NULL);
  116 
  117         tx->length = test->buffer_size;
  118 
  119         for (i = 0; i < num_buffers; i++) {
  120                 if (test->testkind == IOAT_TEST_DMA_8K)
  121                         tx->buf[i] = malloc(test->buffer_size, M_IOAT_TEST,
  122                             M_NOWAIT);
  123                 else
  124                         tx->buf[i] = contigmalloc(test->buffer_size,
  125                             M_IOAT_TEST, M_NOWAIT, 0, BUS_SPACE_MAXADDR,
  126                             PAGE_SIZE, 0);
  127 
  128                 if (tx->buf[i] == NULL) {
  129                         ioat_test_transaction_destroy(tx);
  130                         return (NULL);
  131                 }
  132         }
  133         return (tx);
  134 }
  135 
  136 static void
  137 dump_hex(void *p, size_t chunks)
  138 {
  139         size_t i, j;
  140 
  141         for (i = 0; i < chunks; i++) {
  142                 for (j = 0; j < 8; j++)
  143                         printf("%08x ", ((uint32_t *)p)[i * 8 + j]);
  144                 printf("\n");
  145         }
  146 }
  147 
  148 static bool
  149 ioat_compare_ok(struct test_transaction *tx)
  150 {
  151         struct ioat_test *test;
  152         char *dst, *src;
  153         uint32_t i, j;
  154 
  155         test = tx->test;
  156 
  157         for (i = 0; i < tx->depth; i++) {
  158                 dst = tx->buf[2 * i + 1];
  159                 src = tx->buf[2 * i];
  160 
  161                 if (test->testkind == IOAT_TEST_FILL) {
  162                         for (j = 0; j < tx->length; j += sizeof(uint64_t)) {
  163                                 if (memcmp(src, &dst[j],
  164                                         MIN(sizeof(uint64_t), tx->length - j))
  165                                     != 0)
  166                                         return (false);
  167                         }
  168                 } else if (test->testkind == IOAT_TEST_DMA) {
  169                         if (memcmp(src, dst, tx->length) != 0)
  170                                 return (false);
  171                 } else if (test->testkind == IOAT_TEST_RAW_DMA) {
  172                         if (test->raw_write)
  173                                 dst = test->raw_vtarget;
  174                         dump_hex(dst, tx->length / 32);
  175                 }
  176         }
  177         return (true);
  178 }
  179 
  180 static void
  181 ioat_dma_test_callback(void *arg, int error)
  182 {
  183         struct test_transaction *tx;
  184         struct ioat_test *test;
  185 
  186         if (error != 0)
  187                 ioat_test_log(0, "%s: Got error: %d\n", __func__, error);
  188 
  189         tx = arg;
  190         test = tx->test;
  191 
  192         if (test->verify && !ioat_compare_ok(tx)) {
  193                 ioat_test_log(0, "miscompare found\n");
  194                 atomic_add_32(&test->status[IOAT_TEST_MISCOMPARE], tx->depth);
  195         } else if (!test->too_late)
  196                 atomic_add_32(&test->status[IOAT_TEST_OK], tx->depth);
  197 
  198         IT_LOCK();
  199         TAILQ_REMOVE(&test->pend_q, tx, entry);
  200         TAILQ_INSERT_TAIL(&test->free_q, tx, entry);
  201         wakeup(&test->free_q);
  202         IT_UNLOCK();
  203 }
  204 
  205 static int
  206 ioat_test_prealloc_memory(struct ioat_test *test, int index)
  207 {
  208         uint32_t i, j, k;
  209         struct test_transaction *tx;
  210 
  211         for (i = 0; i < test->transactions; i++) {
  212                 tx = ioat_test_transaction_create(test, test->chain_depth * 2);
  213                 if (tx == NULL) {
  214                         ioat_test_log(0, "tx == NULL - memory exhausted\n");
  215                         test->status[IOAT_TEST_NO_MEMORY]++;
  216                         return (ENOMEM);
  217                 }
  218 
  219                 TAILQ_INSERT_HEAD(&test->free_q, tx, entry);
  220 
  221                 tx->test = test;
  222                 tx->depth = test->chain_depth;
  223 
  224                 /* fill in source buffers */
  225                 for (j = 0; j < (tx->length / sizeof(uint32_t)); j++) {
  226                         uint32_t val = j + (index << 28);
  227 
  228                         for (k = 0; k < test->chain_depth; k++) {
  229                                 ((uint32_t *)tx->buf[2*k])[j] = ~val;
  230                                 ((uint32_t *)tx->buf[2*k+1])[j] = val;
  231                         }
  232                 }
  233         }
  234         return (0);
  235 }
  236 
  237 static void
  238 ioat_test_release_memory(struct ioat_test *test)
  239 {
  240         struct test_transaction *tx, *s;
  241 
  242         TAILQ_FOREACH_SAFE(tx, &test->free_q, entry, s)
  243                 ioat_test_transaction_destroy(tx);
  244         TAILQ_INIT(&test->free_q);
  245 
  246         TAILQ_FOREACH_SAFE(tx, &test->pend_q, entry, s)
  247                 ioat_test_transaction_destroy(tx);
  248         TAILQ_INIT(&test->pend_q);
  249 }
  250 
  251 static void
  252 ioat_test_submit_1_tx(struct ioat_test *test, bus_dmaengine_t dma)
  253 {
  254         struct test_transaction *tx;
  255         struct bus_dmadesc *desc;
  256         bus_dmaengine_callback_t cb;
  257         bus_addr_t src, dest;
  258         uint64_t fillpattern;
  259         uint32_t i, flags;
  260 
  261         desc = NULL;
  262 
  263         IT_LOCK();
  264         while (TAILQ_EMPTY(&test->free_q))
  265                 msleep(&test->free_q, &ioat_test_lk, 0, "test_submit", 0);
  266 
  267         tx = TAILQ_FIRST(&test->free_q);
  268         TAILQ_REMOVE(&test->free_q, tx, entry);
  269         TAILQ_INSERT_HEAD(&test->pend_q, tx, entry);
  270         IT_UNLOCK();
  271 
  272         if (test->testkind != IOAT_TEST_MEMCPY)
  273                 ioat_acquire(dma);
  274         for (i = 0; i < tx->depth; i++) {
  275                 if (test->testkind == IOAT_TEST_MEMCPY) {
  276                         memcpy(tx->buf[2 * i + 1], tx->buf[2 * i], tx->length);
  277                         if (i == tx->depth - 1)
  278                                 ioat_dma_test_callback(tx, 0);
  279                         continue;
  280                 }
  281 
  282                 src = vtophys((vm_offset_t)tx->buf[2*i]);
  283                 dest = vtophys((vm_offset_t)tx->buf[2*i+1]);
  284 
  285                 if (test->testkind == IOAT_TEST_RAW_DMA) {
  286                         if (test->raw_write)
  287                                 dest = test->raw_target;
  288                         else
  289                                 src = test->raw_target;
  290                 }
  291 
  292                 if (i == tx->depth - 1) {
  293                         cb = ioat_dma_test_callback;
  294                         flags = DMA_INT_EN;
  295                 } else {
  296                         cb = NULL;
  297                         flags = 0;
  298                 }
  299 
  300                 if (test->testkind == IOAT_TEST_DMA ||
  301                     test->testkind == IOAT_TEST_RAW_DMA)
  302                         desc = ioat_copy(dma, dest, src, tx->length, cb, tx,
  303                             flags);
  304                 else if (test->testkind == IOAT_TEST_FILL) {
  305                         fillpattern = *(uint64_t *)tx->buf[2*i];
  306                         desc = ioat_blockfill(dma, dest, fillpattern,
  307                             tx->length, cb, tx, flags);
  308                 } else if (test->testkind == IOAT_TEST_DMA_8K) {
  309                         bus_addr_t src2, dst2;
  310 
  311                         src2 = vtophys((vm_offset_t)tx->buf[2*i] + PAGE_SIZE);
  312                         dst2 = vtophys((vm_offset_t)tx->buf[2*i+1] + PAGE_SIZE);
  313 
  314                         desc = ioat_copy_8k_aligned(dma, dest, dst2, src, src2,
  315                             cb, tx, flags);
  316                 } else if (test->testkind == IOAT_TEST_DMA_8K_PB) {
  317                         bus_addr_t src2, dst2;
  318 
  319                         src2 = vtophys((vm_offset_t)tx->buf[2*i+1] + PAGE_SIZE);
  320                         dst2 = vtophys((vm_offset_t)tx->buf[2*i] + PAGE_SIZE);
  321 
  322                         desc = ioat_copy_8k_aligned(dma, dest, dst2, src, src2,
  323                             cb, tx, flags);
  324                 } else if (test->testkind == IOAT_TEST_DMA_CRC) {
  325                         bus_addr_t crc;
  326 
  327                         tx->crc[i] = 0;
  328                         crc = vtophys((vm_offset_t)&tx->crc[i]);
  329                         desc = ioat_crc(dma, src, tx->length,
  330                             NULL, crc, cb, tx, flags | DMA_CRC_STORE);
  331                 } else if (test->testkind == IOAT_TEST_DMA_CRC_COPY) {
  332                         bus_addr_t crc;
  333 
  334                         tx->crc[i] = 0;
  335                         crc = vtophys((vm_offset_t)&tx->crc[i]);
  336                         desc = ioat_copy_crc(dma, dest, src, tx->length,
  337                             NULL, crc, cb, tx, flags | DMA_CRC_STORE);
  338                 }
  339                 if (desc == NULL)
  340                         break;
  341         }
  342         if (test->testkind == IOAT_TEST_MEMCPY)
  343                 return;
  344         ioat_release(dma);
  345 
  346         /*
  347          * We couldn't issue an IO -- either the device is being detached or
  348          * the HW reset.  Essentially spin until the device comes back up or
  349          * our timer expires.
  350          */
  351         if (desc == NULL && tx->depth > 0) {
  352                 atomic_add_32(&test->status[IOAT_TEST_NO_DMA_ENGINE], tx->depth);
  353                 IT_LOCK();
  354                 TAILQ_REMOVE(&test->pend_q, tx, entry);
  355                 TAILQ_INSERT_HEAD(&test->free_q, tx, entry);
  356                 IT_UNLOCK();
  357         }
  358 }
  359 
  360 static void
  361 ioat_dma_test(void *arg)
  362 {
  363         struct ioat_softc *ioat;
  364         struct ioat_test *test;
  365         bus_dmaengine_t dmaengine;
  366         uint32_t loops;
  367         int index, rc, start, end, error;
  368 
  369         test = arg;
  370         memset(__DEVOLATILE(void *, test->status), 0, sizeof(test->status));
  371 
  372         if ((test->testkind == IOAT_TEST_DMA_8K ||
  373             test->testkind == IOAT_TEST_DMA_8K_PB) &&
  374             test->buffer_size != 2 * PAGE_SIZE) {
  375                 ioat_test_log(0, "Asked for 8k test and buffer size isn't 8k\n");
  376                 test->status[IOAT_TEST_INVALID_INPUT]++;
  377                 return;
  378         }
  379 
  380         if (test->buffer_size > 1024 * 1024) {
  381                 ioat_test_log(0, "Buffer size too large >1MB\n");
  382                 test->status[IOAT_TEST_NO_MEMORY]++;
  383                 return;
  384         }
  385 
  386         if (test->chain_depth * 2 > IOAT_MAX_BUFS) {
  387                 ioat_test_log(0, "Depth too large (> %u)\n",
  388                     (unsigned)IOAT_MAX_BUFS / 2);
  389                 test->status[IOAT_TEST_NO_MEMORY]++;
  390                 return;
  391         }
  392 
  393         if (btoc((uint64_t)test->buffer_size * test->chain_depth *
  394             test->transactions) > (physmem / 4)) {
  395                 ioat_test_log(0, "Sanity check failed -- test would "
  396                     "use more than 1/4 of phys mem.\n");
  397                 test->status[IOAT_TEST_NO_MEMORY]++;
  398                 return;
  399         }
  400 
  401         if ((uint64_t)test->transactions * test->chain_depth > (1<<16)) {
  402                 ioat_test_log(0, "Sanity check failed -- test would "
  403                     "use more than available IOAT ring space.\n");
  404                 test->status[IOAT_TEST_NO_MEMORY]++;
  405                 return;
  406         }
  407 
  408         if (test->testkind >= IOAT_NUM_TESTKINDS) {
  409                 ioat_test_log(0, "Invalid kind %u\n",
  410                     (unsigned)test->testkind);
  411                 test->status[IOAT_TEST_INVALID_INPUT]++;
  412                 return;
  413         }
  414 
  415         dmaengine = ioat_get_dmaengine(test->channel_index, M_NOWAIT);
  416         if (dmaengine == NULL) {
  417                 ioat_test_log(0, "Couldn't acquire dmaengine\n");
  418                 test->status[IOAT_TEST_NO_DMA_ENGINE]++;
  419                 return;
  420         }
  421         ioat = to_ioat_softc(dmaengine);
  422 
  423         if (test->testkind == IOAT_TEST_FILL &&
  424             (ioat->capabilities & IOAT_DMACAP_BFILL) == 0)
  425         {
  426                 ioat_test_log(0,
  427                     "Hardware doesn't support block fill, aborting test\n");
  428                 test->status[IOAT_TEST_INVALID_INPUT]++;
  429                 goto out;
  430         }
  431 
  432         if (test->coalesce_period > ioat->intrdelay_max) {
  433                 ioat_test_log(0,
  434                     "Hardware doesn't support intrdelay of %u us.\n",
  435                     (unsigned)test->coalesce_period);
  436                 test->status[IOAT_TEST_INVALID_INPUT]++;
  437                 goto out;
  438         }
  439         error = ioat_set_interrupt_coalesce(dmaengine, test->coalesce_period);
  440         if (error == ENODEV && test->coalesce_period == 0)
  441                 error = 0;
  442         if (error != 0) {
  443                 ioat_test_log(0, "ioat_set_interrupt_coalesce: %d\n", error);
  444                 test->status[IOAT_TEST_INVALID_INPUT]++;
  445                 goto out;
  446         }
  447 
  448         if (test->zero_stats)
  449                 memset(&ioat->stats, 0, sizeof(ioat->stats));
  450 
  451         if (test->testkind == IOAT_TEST_RAW_DMA) {
  452                 if (test->raw_is_virtual) {
  453                         test->raw_vtarget = (void *)test->raw_target;
  454                         test->raw_target = vtophys(test->raw_vtarget);
  455                 } else {
  456                         test->raw_vtarget = pmap_mapdev(test->raw_target,
  457                             test->buffer_size);
  458                 }
  459         }
  460 
  461         index = g_thread_index++;
  462         TAILQ_INIT(&test->free_q);
  463         TAILQ_INIT(&test->pend_q);
  464 
  465         if (test->duration == 0)
  466                 ioat_test_log(1, "Thread %d: num_loops remaining: 0x%08x\n",
  467                     index, test->transactions);
  468         else
  469                 ioat_test_log(1, "Thread %d: starting\n", index);
  470 
  471         rc = ioat_test_prealloc_memory(test, index);
  472         if (rc != 0) {
  473                 ioat_test_log(0, "prealloc_memory: %d\n", rc);
  474                 goto out;
  475         }
  476         wmb();
  477 
  478         test->too_late = false;
  479         start = ticks;
  480         end = start + (((sbintime_t)test->duration * hz) / 1000);
  481 
  482         for (loops = 0;; loops++) {
  483                 if (test->duration == 0 && loops >= test->transactions)
  484                         break;
  485                 else if (test->duration != 0 && time_after(ticks, end)) {
  486                         test->too_late = true;
  487                         break;
  488                 }
  489 
  490                 ioat_test_submit_1_tx(test, dmaengine);
  491         }
  492 
  493         ioat_test_log(1, "Test Elapsed: %d ticks (overrun %d), %d sec.\n",
  494             ticks - start, ticks - end, (ticks - start) / hz);
  495 
  496         IT_LOCK();
  497         while (!TAILQ_EMPTY(&test->pend_q))
  498                 msleep(&test->free_q, &ioat_test_lk, 0, "ioattestcompl", hz);
  499         IT_UNLOCK();
  500 
  501         ioat_test_log(1, "Test Elapsed2: %d ticks (overrun %d), %d sec.\n",
  502             ticks - start, ticks - end, (ticks - start) / hz);
  503 
  504         ioat_test_release_memory(test);
  505 out:
  506         if (test->testkind == IOAT_TEST_RAW_DMA && !test->raw_is_virtual)
  507                 pmap_unmapdev(test->raw_vtarget, test->buffer_size);
  508         ioat_put_dmaengine(dmaengine);
  509 }
  510 
  511 static int
  512 ioat_test_open(struct cdev *dev, int flags, int fmt, struct thread *td)
  513 {
  514 
  515         return (0);
  516 }
  517 
  518 static int
  519 ioat_test_close(struct cdev *dev, int flags, int fmt, struct thread *td)
  520 {
  521 
  522         return (0);
  523 }
  524 
  525 static int
  526 ioat_test_ioctl(struct cdev *dev, unsigned long cmd, caddr_t arg, int flag,
  527     struct thread *td)
  528 {
  529 
  530         switch (cmd) {
  531         case IOAT_DMATEST:
  532                 ioat_dma_test(arg);
  533                 break;
  534         default:
  535                 return (EINVAL);
  536         }
  537         return (0);
  538 }
  539 
  540 static struct cdevsw ioat_cdevsw = {
  541         .d_version =    D_VERSION,
  542         .d_flags =      0,
  543         .d_open =       ioat_test_open,
  544         .d_close =      ioat_test_close,
  545         .d_ioctl =      ioat_test_ioctl,
  546         .d_name =       "ioat_test",
  547 };
  548 
  549 static int
  550 enable_ioat_test(bool enable)
  551 {
  552         struct make_dev_args devargs;
  553         int error = 0;
  554 
  555         if (enable && g_ioat_cdev == NULL) {
  556                 make_dev_args_init(&devargs);
  557                 devargs.mda_devsw = &ioat_cdevsw;
  558                 devargs.mda_uid = UID_ROOT;
  559                 devargs.mda_gid = GID_WHEEL;
  560                 devargs.mda_mode = 0600;
  561                 error = make_dev_s(&devargs, &g_ioat_cdev, "ioat_test");
  562         } else if (!enable && g_ioat_cdev != NULL) {
  563                 destroy_dev(g_ioat_cdev);
  564                 g_ioat_cdev = NULL;
  565         }
  566         return (error);
  567 }
  568 
  569 static int
  570 sysctl_enable_ioat_test(SYSCTL_HANDLER_ARGS)
  571 {
  572         int error, enabled;
  573 
  574         enabled = (g_ioat_cdev != NULL);
  575         error = sysctl_handle_int(oidp, &enabled, 0, req);
  576         if (error != 0 || req->newptr == NULL)
  577                 return (error);
  578 
  579         return (enable_ioat_test(enabled));
  580 }
  581 SYSCTL_PROC(_hw_ioat, OID_AUTO, enable_ioat_test,
  582     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 0,
  583     sysctl_enable_ioat_test, "I",
  584     "Non-zero: Enable the /dev/ioat_test device");
  585 
  586 void
  587 ioat_test_attach(void)
  588 {
  589         char *val;
  590 
  591         val = kern_getenv("hw.ioat.enable_ioat_test");
  592         if (val != NULL && strcmp(val, "") != 0)
  593                 enable_ioat_test(true);
  594         freeenv(val);
  595 }
  596 
  597 void
  598 ioat_test_detach(void)
  599 {
  600 
  601         enable_ioat_test(false);
  602 }
  603 
  604 static void
  605 _ioat_test_log(int verbosity, const char *fmt, ...)
  606 {
  607         va_list argp;
  608 
  609         if (verbosity > g_ioat_debug_level)
  610                 return;
  611 
  612         va_start(argp, fmt);
  613         vprintf(fmt, argp);
  614         va_end(argp);
  615 }
Cache object: ded5fcfb30fe57bc9209b1ad82274fc8
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FreeBSD/Linux Kernel Cross Reference sys/dev/ioat/ioat_test.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/ioat/ioat_test.c
