FreeBSD/Linux Kernel Cross Reference
sys/dev/ips/ips.h
1 /*-
2 * Copyright (c) 2002 Adaptec Inc.
3 * All rights reserved.
4 *
5 * Written by: David Jeffery
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: releng/5.2/sys/dev/ips/ips.h 122999 2003-11-27 08:37:36Z mbr $
29 */
30
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/bus.h>
36 #include <sys/conf.h>
37 #include <sys/types.h>
38 #include <sys/queue.h>
39 #include <sys/bio.h>
40 #include <sys/malloc.h>
41 #include <sys/mutex.h>
42 #include <sys/time.h>
43
44 #include <machine/bus_memio.h>
45 #include <machine/bus.h>
46 #include <sys/rman.h>
47 #include <machine/resource.h>
48
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51
52 /*
53 * IPS CONSTANTS
54 */
55 #define IPS_VENDOR_ID 0x1014
56 #define IPS_MORPHEUS_DEVICE_ID 0x01BD
57 #define IPS_COPPERHEAD_DEVICE_ID 0x002E
58 #define IPS_CSL 0xff
59 #define IPS_POCL 0x30
60
61 /* amounts of memory to allocate for certain commands */
62 #define IPS_ADAPTER_INFO_LEN (sizeof(ips_adapter_info_t))
63 #define IPS_DRIVE_INFO_LEN (sizeof(ips_drive_info_t))
64 #define IPS_COMMAND_LEN 24
65 #define IPS_MAX_SG_LEN (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS)
66 #define IPS_NVRAM_PAGE_SIZE 128
67 /* various flags */
68 #define IPS_NOWAIT_FLAG 1
69
70 /* states for the card to be in */
71 #define IPS_DEV_OPEN 0x01
72 #define IPS_TIMEOUT 0x02 /* command time out, need reset */
73 #define IPS_OFFLINE 0x04 /* can't reset card/card failure */
74
75 /* max number of commands set to something low for now */
76 #define IPS_MAX_CMD_NUM 128
77 #define IPS_MAX_NUM_DRIVES 8
78 #define IPS_MAX_SG_ELEMENTS 32
79 #define IPS_MAX_IOBUF_SIZE (64 * 1024)
80 #define IPS_BLKSIZE 512
81
82 /* logical drive states */
83
84 #define IPS_LD_OFFLINE 0x02
85 #define IPS_LD_OKAY 0x03
86 #define IPS_LD_DEGRADED 0x04
87 #define IPS_LD_FREE 0x00
88 #define IPS_LD_SYS 0x06
89 #define IPS_LD_CRS 0x24
90
91 /* register offsets */
92 #define MORPHEUS_REG_OMR0 0x0018 /* Outbound Msg. Reg. 0 */
93 #define MORPHEUS_REG_OMR1 0x001C /* Outbound Msg. Reg. 1 */
94 #define MORPHEUS_REG_IDR 0x0020 /* Inbound Doorbell Reg. */
95 #define MORPHEUS_REG_IISR 0x0024 /* Inbound IRQ Status Reg. */
96 #define MORPHEUS_REG_IIMR 0x0028 /* Inbound IRQ Mask Reg. */
97 #define MORPHEUS_REG_OISR 0x0030 /* Outbound IRQ Status Reg. */
98 #define MORPHEUS_REG_OIMR 0x0034 /* Outbound IRQ Status Reg. */
99 #define MORPHEUS_REG_IQPR 0x0040 /* Inbound Queue Port Reg. */
100 #define MORPHEUS_REG_OQPR 0x0044 /* Outbound Queue Port Reg. */
101
102 #define COPPER_REG_SCPR 0x05 /* Subsystem Ctrl. Port Reg. */
103 #define COPPER_REG_ISPR 0x06 /* IRQ Status Port Reg. */
104 #define COPPER_REG_CBSP 0x07 /* ? Reg. */
105 #define COPPER_REG_HISR 0x08 /* Host IRQ Status Reg. */
106 #define COPPER_REG_CCSAR 0x10 /* Cmd. Channel Sys Addr Reg.*/
107 #define COPPER_REG_CCCR 0x14 /* Cmd. Channel Ctrl. Reg. */
108 #define COPPER_REG_SQHR 0x20 /* Status Queue Head Reg. */
109 #define COPPER_REG_SQTR 0x24 /* Status Queue Tail Reg. */
110 #define COPPER_REG_SQER 0x28 /* Status Queue End Reg. */
111 #define COPPER_REG_SQSR 0x2C /* Status Queue Start Reg. */
112
113 /* bit definitions */
114 #define MORPHEUS_BIT_POST1 0x01
115 #define MORPHEUS_BIT_POST2 0x02
116 #define MORPHEUS_BIT_CMD_IRQ 0x08
117
118 #define COPPER_CMD_START 0x101A
119 #define COPPER_SEM_BIT 0x08
120 #define COPPER_EI_BIT 0x80
121 #define COPPER_EBM_BIT 0x02
122 #define COPPER_RESET_BIT 0x80
123 #define COPPER_GHI_BIT 0x04
124 #define COPPER_SCE_BIT 0x01
125 #define COPPER_OP_BIT 0x01
126 #define COPPER_ILE_BIT 0x10
127
128 /* status defines */
129 #define IPS_POST1_OK 0x8000
130 #define IPS_POST2_OK 0x000f
131
132 /* command op codes */
133 #define IPS_READ_CMD 0x02
134 #define IPS_WRITE_CMD 0x03
135 #define IPS_ADAPTER_INFO_CMD 0x05
136 #define IPS_CACHE_FLUSH_CMD 0x0A
137 #define IPS_REBUILD_STATUS_CMD 0x0C
138 #define IPS_ERROR_TABLE_CMD 0x17
139 #define IPS_DRIVE_INFO_CMD 0x19
140 #define IPS_SUBSYS_PARAM_CMD 0x40
141 #define IPS_CONFIG_SYNC_CMD 0x58
142 #define IPS_SG_READ_CMD 0x82
143 #define IPS_SG_WRITE_CMD 0x83
144 #define IPS_RW_NVRAM_CMD 0xBC
145 #define IPS_FFDC_CMD 0xD7
146
147 /* error information returned by the adapter */
148 #define IPS_MIN_ERROR 0x02
149 #define IPS_ERROR_STATUS 0x13000200 /* ahh, magic numbers */
150
151 #define IPS_OS_FREEBSD 8
152 #define IPS_VERSION_MAJOR "0.90"
153 #define IPS_VERSION_MINOR ".10"
154
155 /* Adapter Types */
156 #define IPS_ADAPTER_COPPERHEAD 0x01
157 #define IPS_ADAPTER_COPPERHEAD2 0x02
158 #define IPS_ADAPTER_COPPERHEADOB1 0x03
159 #define IPS_ADAPTER_COPPERHEADOB2 0x04
160 #define IPS_ADAPTER_CLARINET 0x05
161 #define IPS_ADAPTER_CLARINETLITE 0x06
162 #define IPS_ADAPTER_TROMBONE 0x07
163 #define IPS_ADAPTER_MORPHEUS 0x08
164 #define IPS_ADAPTER_MORPHEUSLITE 0x09
165 #define IPS_ADAPTER_NEO 0x0A
166 #define IPS_ADAPTER_NEOLITE 0x0B
167 #define IPS_ADAPTER_SARASOTA2 0x0C
168 #define IPS_ADAPTER_SARASOTA1 0x0D
169 #define IPS_ADAPTER_MARCO 0x0E
170 #define IPS_ADAPTER_SEBRING 0x0F
171 #define IPS_ADAPTER_MAX_T IPS_ADAPTER_SEBRING
172
173 /* values for ffdc_settime (from gmtime) */
174 #define IPS_SECSPERMIN 60
175 #define IPS_MINSPERHOUR 60
176 #define IPS_HOURSPERDAY 24
177 #define IPS_DAYSPERWEEK 7
178 #define IPS_DAYSPERNYEAR 365
179 #define IPS_DAYSPERLYEAR 366
180 #define IPS_SECSPERHOUR (IPS_SECSPERMIN * IPS_MINSPERHOUR)
181 #define IPS_SECSPERDAY ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY)
182 #define IPS_MONSPERYEAR 12
183 #define IPS_EPOCH_YEAR 1970
184 #define IPS_LEAPS_THRU_END_OF(y) ((y) / 4 - (y) / 100 + (y) / 400)
185 #define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0))
186
187 /*
188 * IPS MACROS
189 */
190
191 #define ips_read_1(sc,offset) bus_space_read_1(sc->bustag, sc->bushandle, offset)
192 #define ips_read_2(sc,offset) bus_space_read_2(sc->bustag, sc->bushandle, offset)
193 #define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset)
194
195 #define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value)
196 #define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value)
197 #define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value)
198
199 /* this is ugly. It zeros the end elements in an ips_command_t struct starting with the status element */
200 #define clear_ips_command(command) bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status))
201
202 #define ips_read_request(iobuf) ((iobuf)->bio_cmd == BIO_READ)
203
204 #define COMMAND_ERROR(status) (((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR)
205
206 #ifndef IPS_DEBUG
207 #define DEVICE_PRINTF(x...)
208 #define PRINTF(x...)
209 #else
210 #define DEVICE_PRINTF(level,x...) if(IPS_DEBUG >= level)device_printf(x)
211 #define PRINTF(level,x...) if(IPS_DEBUG >= level)printf(x)
212 #endif
213 /*
214 * IPS STRUCTS
215 */
216
217 struct ips_softc;
218
219 typedef struct{
220 u_int8_t command;
221 u_int8_t id;
222 u_int8_t drivenum;
223 u_int8_t reserve2;
224 u_int32_t lba;
225 u_int32_t buffaddr;
226 u_int32_t reserve3;
227 } __attribute__ ((packed)) ips_generic_cmd;
228
229 typedef struct{
230 u_int8_t command;
231 u_int8_t id;
232 u_int8_t drivenum;
233 u_int8_t segnum;
234 u_int32_t lba;
235 u_int32_t buffaddr;
236 u_int16_t length;
237 u_int16_t reserve1;
238 } __attribute__ ((packed)) ips_io_cmd;
239
240 typedef struct{
241 u_int8_t command;
242 u_int8_t id;
243 u_int8_t pagenum;
244 u_int8_t rw;
245 u_int32_t reserve1;
246 u_int32_t buffaddr;
247 u_int32_t reserve3;
248 } __attribute__ ((packed)) ips_rw_nvram_cmd;
249
250 typedef struct{
251 u_int8_t command;
252 u_int8_t id;
253 u_int8_t drivenum;
254 u_int8_t reserve1;
255 u_int32_t reserve2;
256 u_int32_t buffaddr;
257 u_int32_t reserve3;
258 } __attribute__ ((packed)) ips_drive_cmd;
259
260 typedef struct{
261 u_int8_t command;
262 u_int8_t id;
263 u_int8_t reserve1;
264 u_int8_t commandtype;
265 u_int32_t reserve2;
266 u_int32_t buffaddr;
267 u_int32_t reserve3;
268 } __attribute__((packed)) ips_adapter_info_cmd;
269
270 typedef struct{
271 u_int8_t command;
272 u_int8_t id;
273 u_int8_t reset_count;
274 u_int8_t reset_type;
275 u_int8_t second;
276 u_int8_t minute;
277 u_int8_t hour;
278 u_int8_t day;
279 u_int8_t reserve1[4];
280 u_int8_t month;
281 u_int8_t yearH;
282 u_int8_t yearL;
283 u_int8_t reserve2;
284 } __attribute__((packed)) ips_adapter_ffdc_cmd;
285
286 typedef union{
287 ips_generic_cmd generic_cmd;
288 ips_drive_cmd drive_cmd;
289 ips_adapter_info_cmd adapter_info_cmd;
290 } ips_cmd_buff_t;
291
292 typedef struct {
293 u_int32_t signature;
294 u_int8_t reserved;
295 u_int8_t adapter_slot;
296 u_int16_t adapter_type;
297 u_int8_t bios_high[4];
298 u_int8_t bios_low[4];
299 u_int16_t reserve2;
300 u_int8_t reserve3;
301 u_int8_t operating_system;
302 u_int8_t driver_high[4];
303 u_int8_t driver_low[4];
304 u_int8_t reserve4[100];
305 }__attribute__((packed)) ips_nvram_page5;
306
307 typedef struct{
308 u_int32_t addr;
309 u_int32_t len;
310 } ips_sg_element_t;
311
312 typedef struct{
313 u_int8_t drivenum;
314 u_int8_t merge_id;
315 u_int8_t raid_lvl;
316 u_int8_t state;
317 u_int32_t sector_count;
318 } __attribute__((packed)) ips_drive_t;
319
320 typedef struct{
321 u_int8_t drivecount;
322 u_int8_t reserve1;
323 u_int16_t reserve2;
324 ips_drive_t drives[IPS_MAX_NUM_DRIVES];
325 }__attribute__((packed)) ips_drive_info_t;
326
327 typedef struct{
328 u_int8_t drivecount;
329 u_int8_t miscflags;
330 u_int8_t SLTflags;
331 u_int8_t BSTflags;
332 u_int8_t pwr_chg_count;
333 u_int8_t wrong_addr_count;
334 u_int8_t unident_count;
335 u_int8_t nvram_dev_chg_count;
336 u_int8_t codeblock_version[8];
337 u_int8_t bootblock_version[8];
338 u_int32_t drive_sector_count[IPS_MAX_NUM_DRIVES];
339 u_int8_t max_concurrent_cmds;
340 u_int8_t max_phys_devices;
341 u_int16_t flash_prog_count;
342 u_int8_t defunct_disks;
343 u_int8_t rebuildflags;
344 u_int8_t offline_drivecount;
345 u_int8_t critical_drivecount;
346 u_int16_t config_update_count;
347 u_int8_t blockedflags;
348 u_int8_t psdn_error;
349 u_int16_t addr_dead_disk[4*16];/* ugly, max # channels * max # scsi devices per channel */
350 }__attribute__((packed)) ips_adapter_info_t;
351
352 typedef struct {
353 u_int32_t status[IPS_MAX_CMD_NUM];
354 u_int32_t base_phys_addr;
355 int nextstatus;
356 bus_dma_tag_t dmatag;
357 bus_dmamap_t dmamap;
358 } ips_copper_queue_t;
359
360 typedef union {
361 struct {
362 u_int8_t reserved;
363 u_int8_t command_id;
364 u_int8_t basic_status;
365 u_int8_t extended_status;
366 } fields;
367 volatile u_int32_t value;
368 } ips_cmd_status_t;
369
370 /* used to keep track of current commands to the card */
371 typedef struct ips_command{
372 u_int8_t command_number;
373 u_int8_t id;
374 u_int8_t timeout;
375 struct ips_softc * sc;
376 bus_dmamap_t command_dmamap;
377 void * command_buffer;
378 u_int32_t command_phys_addr;/*WARNING! must be changed if 64bit addressing ever used*/
379 ips_cmd_status_t status;
380 SLIST_ENTRY(ips_command) next;
381 bus_dma_tag_t data_dmatag;
382 bus_dmamap_t data_dmamap;
383 void * data_buffer;
384 void * arg;
385 void (* callback)(struct ips_command *command);
386 }ips_command_t;
387
388 typedef struct ips_wait_list{
389 STAILQ_ENTRY(ips_wait_list) next;
390 void *data;
391 int (* callback)(ips_command_t *command);
392 }ips_wait_list_t;
393
394 typedef struct ips_softc{
395 struct resource * iores;
396 struct resource * irqres;
397 struct intr_config_hook ips_ich;
398 int configured;
399 int state;
400 int iotype;
401 int rid;
402 int irqrid;
403 void * irqcookie;
404 bus_space_tag_t bustag;
405 bus_space_handle_t bushandle;
406 bus_dma_tag_t adapter_dmatag;
407 bus_dma_tag_t command_dmatag;
408 bus_dma_tag_t sg_dmatag;
409 device_t dev;
410 dev_t device_file;
411 struct callout_handle timer;
412 u_int16_t adapter_type;
413 ips_adapter_info_t adapter_info;
414 device_t diskdev[IPS_MAX_NUM_DRIVES];
415 ips_drive_t drives[IPS_MAX_NUM_DRIVES];
416 u_int8_t drivecount;
417 u_int16_t ffdc_resetcount;
418 struct timeval ffdc_resettime;
419 u_int8_t next_drive;
420 u_int8_t max_cmds;
421 volatile u_int8_t used_commands;
422 ips_command_t commandarray[IPS_MAX_CMD_NUM];
423 SLIST_HEAD(command_list, ips_command) free_cmd_list;
424 STAILQ_HEAD(command_wait_list,ips_wait_list) cmd_wait_list;
425 int (* ips_adapter_reinit)(struct ips_softc *sc,
426 int force);
427 void (* ips_adapter_intr)(void *sc);
428 void (* ips_issue_cmd)(ips_command_t *command);
429 ips_copper_queue_t * copper_queue;
430 struct mtx cmd_mtx;
431 }ips_softc_t;
432
433 /* function defines from ips_ioctl.c */
434 extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr,
435 int32_t flags);
436 /* function defines from ips_disk.c */
437 extern void ipsd_finish(struct bio *iobuf);
438
439 /* function defines from ips_commands.c */
440 extern int ips_flush_cache(ips_softc_t *sc);
441 extern void ips_start_io_request(ips_softc_t *sc, struct bio *iobuf);
442 extern int ips_get_drive_info(ips_softc_t *sc);
443 extern int ips_get_adapter_info(ips_softc_t *sc);
444 extern int ips_ffdc_reset(ips_softc_t *sc);
445 extern int ips_update_nvram(ips_softc_t *sc);
446 extern int ips_clear_adapter(ips_softc_t *sc);
447
448 /* function defines from ips.c */
449 extern int ips_get_free_cmd(ips_softc_t *sc, int (*callback)(ips_command_t *),
450 void *data, unsigned long flags);
451 extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command);
452 extern int ips_adapter_init(ips_softc_t *sc);
453 extern int ips_morpheus_reinit(ips_softc_t *sc, int force);
454 extern int ips_adapter_free(ips_softc_t *sc);
455 extern void ips_morpheus_intr(void *sc);
456 extern void ips_issue_morpheus_cmd(ips_command_t *command);
457 extern int ips_copperhead_reinit(ips_softc_t *sc, int force);
458 extern void ips_copperhead_intr(void *sc);
459 extern void ips_issue_copperhead_cmd(ips_command_t *command);
460
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