FreeBSD/Linux Kernel Cross Reference
sys/dev/ips/ips.h
1 /*-
2 * Copyright (c) 2002 Adaptec Inc.
3 * All rights reserved.
4 *
5 * Written by: David Jeffery
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/types.h>
39 #include <sys/queue.h>
40 #include <sys/bio.h>
41 #include <sys/malloc.h>
42 #include <sys/mutex.h>
43 #include <sys/sema.h>
44 #include <sys/time.h>
45
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48 #include <machine/resource.h>
49
50 #include <dev/pci/pcireg.h>
51 #include <dev/pci/pcivar.h>
52
53 MALLOC_DECLARE(M_IPSBUF);
54
55 /*
56 * IPS CONSTANTS
57 */
58 #define IPS_VENDOR_ID 0x1014
59 #define IPS_VENDOR_ID_ADAPTEC 0x9005
60 #define IPS_MORPHEUS_DEVICE_ID 0x01BD
61 #define IPS_COPPERHEAD_DEVICE_ID 0x002E
62 #define IPS_MARCO_DEVICE_ID 0x0250
63 #define IPS_CSL 0xff
64 #define IPS_POCL 0x30
65
66 /* amounts of memory to allocate for certain commands */
67 #define IPS_ADAPTER_INFO_LEN (sizeof(ips_adapter_info_t))
68 #define IPS_DRIVE_INFO_LEN (sizeof(ips_drive_info_t))
69 #define IPS_COMMAND_LEN 24
70 #define IPS_MAX_SG_LEN (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS)
71 #define IPS_NVRAM_PAGE_SIZE 128
72 /* various flags */
73 #define IPS_STATIC_FLAG 0x01
74
75 /* states for the card to be in */
76 #define IPS_DEV_OPEN 0x01
77 #define IPS_TIMEOUT 0x02 /* command time out, need reset */
78 #define IPS_OFFLINE 0x04 /* can't reset card/card failure */
79 #define IPS_STATIC_BUSY 0x08
80
81 /* max number of commands set to something low for now */
82 #define IPS_MAX_CMD_NUM 128
83 #define IPS_MAX_NUM_DRIVES 8
84 #define IPS_MAX_SG_ELEMENTS 32
85 #define IPS_MAX_IOBUF_SIZE (64 * 1024)
86 #define IPS_BLKSIZE 512
87
88 /* logical drive states */
89
90 #define IPS_LD_OFFLINE 0x02
91 #define IPS_LD_OKAY 0x03
92 #define IPS_LD_DEGRADED 0x04
93 #define IPS_LD_FREE 0x00
94 #define IPS_LD_SYS 0x06
95 #define IPS_LD_CRS 0x24
96
97 /* register offsets */
98 #define MORPHEUS_REG_OMR0 0x0018 /* Outbound Msg. Reg. 0 */
99 #define MORPHEUS_REG_OMR1 0x001C /* Outbound Msg. Reg. 1 */
100 #define MORPHEUS_REG_IDR 0x0020 /* Inbound Doorbell Reg. */
101 #define MORPHEUS_REG_IISR 0x0024 /* Inbound IRQ Status Reg. */
102 #define MORPHEUS_REG_IIMR 0x0028 /* Inbound IRQ Mask Reg. */
103 #define MORPHEUS_REG_OISR 0x0030 /* Outbound IRQ Status Reg. */
104 #define MORPHEUS_REG_OIMR 0x0034 /* Outbound IRQ Status Reg. */
105 #define MORPHEUS_REG_IQPR 0x0040 /* Inbound Queue Port Reg. */
106 #define MORPHEUS_REG_OQPR 0x0044 /* Outbound Queue Port Reg. */
107
108 #define COPPER_REG_SCPR 0x05 /* Subsystem Ctrl. Port Reg. */
109 #define COPPER_REG_ISPR 0x06 /* IRQ Status Port Reg. */
110 #define COPPER_REG_CBSP 0x07 /* ? Reg. */
111 #define COPPER_REG_HISR 0x08 /* Host IRQ Status Reg. */
112 #define COPPER_REG_CCSAR 0x10 /* Cmd. Channel Sys Addr Reg.*/
113 #define COPPER_REG_CCCR 0x14 /* Cmd. Channel Ctrl. Reg. */
114 #define COPPER_REG_SQHR 0x20 /* Status Queue Head Reg. */
115 #define COPPER_REG_SQTR 0x24 /* Status Queue Tail Reg. */
116 #define COPPER_REG_SQER 0x28 /* Status Queue End Reg. */
117 #define COPPER_REG_SQSR 0x2C /* Status Queue Start Reg. */
118
119 /* bit definitions */
120 #define MORPHEUS_BIT_POST1 0x01
121 #define MORPHEUS_BIT_POST2 0x02
122 #define MORPHEUS_BIT_CMD_IRQ 0x08
123
124 #define COPPER_CMD_START 0x101A
125 #define COPPER_SEM_BIT 0x08
126 #define COPPER_EI_BIT 0x80
127 #define COPPER_EBM_BIT 0x02
128 #define COPPER_RESET_BIT 0x80
129 #define COPPER_GHI_BIT 0x04
130 #define COPPER_SCE_BIT 0x01
131 #define COPPER_OP_BIT 0x01
132 #define COPPER_ILE_BIT 0x10
133
134 /* status defines */
135 #define IPS_POST1_OK 0x8000
136 #define IPS_POST2_OK 0x000f
137
138 /* command op codes */
139 #define IPS_READ_CMD 0x02
140 #define IPS_WRITE_CMD 0x03
141 #define IPS_ADAPTER_INFO_CMD 0x05
142 #define IPS_CACHE_FLUSH_CMD 0x0A
143 #define IPS_REBUILD_STATUS_CMD 0x0C
144 #define IPS_ERROR_TABLE_CMD 0x17
145 #define IPS_DRIVE_INFO_CMD 0x19
146 #define IPS_SUBSYS_PARAM_CMD 0x40
147 #define IPS_CONFIG_SYNC_CMD 0x58
148 #define IPS_SG_READ_CMD 0x82
149 #define IPS_SG_WRITE_CMD 0x83
150 #define IPS_RW_NVRAM_CMD 0xBC
151 #define IPS_FFDC_CMD 0xD7
152
153 /* error information returned by the adapter */
154 #define IPS_MIN_ERROR 0x02
155 #define IPS_ERROR_STATUS 0x13000200 /* ahh, magic numbers */
156
157 #define IPS_OS_FREEBSD 8
158 #define IPS_VERSION_MAJOR "0.90"
159 #define IPS_VERSION_MINOR ".10"
160
161 /* Adapter Types */
162 #define IPS_ADAPTER_COPPERHEAD 0x01
163 #define IPS_ADAPTER_COPPERHEAD2 0x02
164 #define IPS_ADAPTER_COPPERHEADOB1 0x03
165 #define IPS_ADAPTER_COPPERHEADOB2 0x04
166 #define IPS_ADAPTER_CLARINET 0x05
167 #define IPS_ADAPTER_CLARINETLITE 0x06
168 #define IPS_ADAPTER_TROMBONE 0x07
169 #define IPS_ADAPTER_MORPHEUS 0x08
170 #define IPS_ADAPTER_MORPHEUSLITE 0x09
171 #define IPS_ADAPTER_NEO 0x0A
172 #define IPS_ADAPTER_NEOLITE 0x0B
173 #define IPS_ADAPTER_SARASOTA2 0x0C
174 #define IPS_ADAPTER_SARASOTA1 0x0D
175 #define IPS_ADAPTER_MARCO 0x0E
176 #define IPS_ADAPTER_SEBRING 0x0F
177 #define IPS_ADAPTER_7T 0x10
178 #define IPS_ADAPTER_7K 0x11
179 #define IPS_ADAPTER_7M 0x12
180 #define IPS_ADAPTER_MAX_T IPS_ADAPTER_7M
181
182 /* values for ffdc_settime (from gmtime) */
183 #define IPS_SECSPERMIN 60
184 #define IPS_MINSPERHOUR 60
185 #define IPS_HOURSPERDAY 24
186 #define IPS_DAYSPERWEEK 7
187 #define IPS_DAYSPERNYEAR 365
188 #define IPS_DAYSPERLYEAR 366
189 #define IPS_SECSPERHOUR (IPS_SECSPERMIN * IPS_MINSPERHOUR)
190 #define IPS_SECSPERDAY ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY)
191 #define IPS_MONSPERYEAR 12
192 #define IPS_EPOCH_YEAR 1970
193 #define IPS_LEAPS_THRU_END_OF(y) ((y) / 4 - (y) / 100 + (y) / 400)
194 #define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0))
195
196 /*
197 * IPS MACROS
198 */
199
200 #define ips_read_1(sc,offset) bus_space_read_1(sc->bustag, sc->bushandle, offset)
201 #define ips_read_2(sc,offset) bus_space_read_2(sc->bustag, sc->bushandle, offset)
202 #define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset)
203
204 #define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value)
205 #define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value)
206 #define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value)
207
208 /* this is ugly. It zeros the end elements in an ips_command_t struct starting with the status element */
209 #define clear_ips_command(command) bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status))
210
211 #define ips_read_request(iobuf) ((iobuf)->bio_cmd == BIO_READ)
212
213 #define COMMAND_ERROR(status) (((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR)
214
215 #ifndef IPS_DEBUG
216 #define DEVICE_PRINTF(x...)
217 #define PRINTF(x...)
218 #else
219 #define DEVICE_PRINTF(level,x...) if(IPS_DEBUG >= level)device_printf(x)
220 #define PRINTF(level,x...) if(IPS_DEBUG >= level)printf(x)
221 #endif
222 /*
223 * IPS STRUCTS
224 */
225
226 struct ips_softc;
227
228 typedef struct{
229 u_int8_t command;
230 u_int8_t id;
231 u_int8_t drivenum;
232 u_int8_t reserve2;
233 u_int32_t lba;
234 u_int32_t buffaddr;
235 u_int32_t reserve3;
236 } __attribute__ ((packed)) ips_generic_cmd;
237
238 typedef struct{
239 u_int8_t command;
240 u_int8_t id;
241 u_int8_t drivenum;
242 u_int8_t segnum;
243 u_int32_t lba;
244 u_int32_t buffaddr;
245 u_int16_t length;
246 u_int16_t reserve1;
247 } __attribute__ ((packed)) ips_io_cmd;
248
249 typedef struct{
250 u_int8_t command;
251 u_int8_t id;
252 u_int8_t pagenum;
253 u_int8_t rw;
254 u_int32_t reserve1;
255 u_int32_t buffaddr;
256 u_int32_t reserve3;
257 } __attribute__ ((packed)) ips_rw_nvram_cmd;
258
259 typedef struct{
260 u_int8_t command;
261 u_int8_t id;
262 u_int8_t drivenum;
263 u_int8_t reserve1;
264 u_int32_t reserve2;
265 u_int32_t buffaddr;
266 u_int32_t reserve3;
267 } __attribute__ ((packed)) ips_drive_cmd;
268
269 typedef struct{
270 u_int8_t command;
271 u_int8_t id;
272 u_int8_t reserve1;
273 u_int8_t commandtype;
274 u_int32_t reserve2;
275 u_int32_t buffaddr;
276 u_int32_t reserve3;
277 } __attribute__((packed)) ips_adapter_info_cmd;
278
279 typedef struct{
280 u_int8_t command;
281 u_int8_t id;
282 u_int8_t reset_count;
283 u_int8_t reset_type;
284 u_int8_t second;
285 u_int8_t minute;
286 u_int8_t hour;
287 u_int8_t day;
288 u_int8_t reserve1[4];
289 u_int8_t month;
290 u_int8_t yearH;
291 u_int8_t yearL;
292 u_int8_t reserve2;
293 } __attribute__((packed)) ips_adapter_ffdc_cmd;
294
295 typedef union{
296 ips_generic_cmd generic_cmd;
297 ips_drive_cmd drive_cmd;
298 ips_adapter_info_cmd adapter_info_cmd;
299 } ips_cmd_buff_t;
300
301 typedef struct {
302 u_int32_t signature;
303 u_int8_t reserved;
304 u_int8_t adapter_slot;
305 u_int16_t adapter_type;
306 u_int8_t bios_high[4];
307 u_int8_t bios_low[4];
308 u_int16_t reserve2;
309 u_int8_t reserve3;
310 u_int8_t operating_system;
311 u_int8_t driver_high[4];
312 u_int8_t driver_low[4];
313 u_int8_t reserve4[100];
314 }__attribute__((packed)) ips_nvram_page5;
315
316 typedef struct{
317 u_int32_t addr;
318 u_int32_t len;
319 } ips_sg_element_t;
320
321 typedef struct{
322 u_int8_t drivenum;
323 u_int8_t merge_id;
324 u_int8_t raid_lvl;
325 u_int8_t state;
326 u_int32_t sector_count;
327 } __attribute__((packed)) ips_drive_t;
328
329 typedef struct{
330 u_int8_t drivecount;
331 u_int8_t reserve1;
332 u_int16_t reserve2;
333 ips_drive_t drives[IPS_MAX_NUM_DRIVES];
334 }__attribute__((packed)) ips_drive_info_t;
335
336 typedef struct{
337 u_int8_t drivecount;
338 u_int8_t miscflags;
339 u_int8_t SLTflags;
340 u_int8_t BSTflags;
341 u_int8_t pwr_chg_count;
342 u_int8_t wrong_addr_count;
343 u_int8_t unident_count;
344 u_int8_t nvram_dev_chg_count;
345 u_int8_t codeblock_version[8];
346 u_int8_t bootblock_version[8];
347 u_int32_t drive_sector_count[IPS_MAX_NUM_DRIVES];
348 u_int8_t max_concurrent_cmds;
349 u_int8_t max_phys_devices;
350 u_int16_t flash_prog_count;
351 u_int8_t defunct_disks;
352 u_int8_t rebuildflags;
353 u_int8_t offline_drivecount;
354 u_int8_t critical_drivecount;
355 u_int16_t config_update_count;
356 u_int8_t blockedflags;
357 u_int8_t psdn_error;
358 u_int16_t addr_dead_disk[4*16];/* ugly, max # channels * max # scsi devices per channel */
359 }__attribute__((packed)) ips_adapter_info_t;
360
361 typedef struct {
362 u_int32_t status[IPS_MAX_CMD_NUM];
363 u_int32_t base_phys_addr;
364 int nextstatus;
365 bus_dma_tag_t dmatag;
366 bus_dmamap_t dmamap;
367 } ips_copper_queue_t;
368
369 typedef union {
370 struct {
371 u_int8_t reserved;
372 u_int8_t command_id;
373 u_int8_t basic_status;
374 u_int8_t extended_status;
375 } fields;
376 volatile u_int32_t value;
377 } ips_cmd_status_t;
378
379 /* used to keep track of current commands to the card */
380 typedef struct ips_command{
381 u_int8_t command_number;
382 u_int8_t id;
383 u_int8_t timeout;
384 struct ips_softc * sc;
385 bus_dma_tag_t data_dmatag;
386 bus_dmamap_t data_dmamap;
387 bus_dmamap_t command_dmamap;
388 void * command_buffer;
389 u_int32_t command_phys_addr;/*WARNING! must be changed if 64bit addressing ever used*/
390 ips_cmd_status_t status;
391 SLIST_ENTRY(ips_command) next;
392 void * data_buffer;
393 void * arg;
394 void (* callback)(struct ips_command *command);
395 }ips_command_t;
396
397 typedef struct ips_softc{
398 struct resource * iores;
399 struct resource * irqres;
400 struct intr_config_hook ips_ich;
401 int configured;
402 int state;
403 int iotype;
404 int rid;
405 int irqrid;
406 void * irqcookie;
407 bus_space_tag_t bustag;
408 bus_space_handle_t bushandle;
409 bus_dma_tag_t adapter_dmatag;
410 bus_dma_tag_t command_dmatag;
411 bus_dma_tag_t sg_dmatag;
412 device_t dev;
413 struct cdev *device_file;
414 struct callout_handle timer;
415 u_int16_t adapter_type;
416 ips_adapter_info_t adapter_info;
417 device_t diskdev[IPS_MAX_NUM_DRIVES];
418 ips_drive_t drives[IPS_MAX_NUM_DRIVES];
419 u_int8_t drivecount;
420 u_int16_t ffdc_resetcount;
421 struct timeval ffdc_resettime;
422 u_int8_t next_drive;
423 u_int8_t max_cmds;
424 volatile u_int8_t used_commands;
425 ips_command_t *commandarray;
426 ips_command_t *staticcmd;
427 SLIST_HEAD(command_list, ips_command) free_cmd_list;
428 int (* ips_adapter_reinit)(struct ips_softc *sc,
429 int force);
430 void (* ips_adapter_intr)(void *sc);
431 void (* ips_issue_cmd)(ips_command_t *command);
432 void (* ips_poll_cmd)(ips_command_t *command);
433 ips_copper_queue_t * copper_queue;
434 struct mtx queue_mtx;
435 struct bio_queue_head queue;
436 struct sema cmd_sema;
437
438 }ips_softc_t;
439
440 /* function defines from ips_ioctl.c */
441 extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr,
442 int32_t flags);
443 /* function defines from ips_disk.c */
444 extern void ipsd_finish(struct bio *iobuf);
445
446 /* function defines from ips_commands.c */
447 extern int ips_flush_cache(ips_softc_t *sc);
448 extern void ips_start_io_request(ips_softc_t *sc);
449 extern int ips_get_drive_info(ips_softc_t *sc);
450 extern int ips_get_adapter_info(ips_softc_t *sc);
451 extern int ips_ffdc_reset(ips_softc_t *sc);
452 extern int ips_update_nvram(ips_softc_t *sc);
453 extern int ips_clear_adapter(ips_softc_t *sc);
454
455 /* function defines from ips.c */
456 extern int ips_get_free_cmd(ips_softc_t *sc, ips_command_t **command, unsigned long flags);
457 extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command);
458 extern int ips_adapter_init(ips_softc_t *sc);
459 extern int ips_morpheus_reinit(ips_softc_t *sc, int force);
460 extern int ips_adapter_free(ips_softc_t *sc);
461 extern void ips_morpheus_intr(void *sc);
462 extern void ips_issue_morpheus_cmd(ips_command_t *command);
463 extern void ips_morpheus_poll(ips_command_t *command);
464 extern int ips_copperhead_reinit(ips_softc_t *sc, int force);
465 extern void ips_copperhead_intr(void *sc);
466 extern void ips_issue_copperhead_cmd(ips_command_t *command);
467 extern void ips_copperhead_poll(ips_command_t *command);
468
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