addcom_isa.c

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    1 /*      $NetBSD: addcom_isa.c,v 1.9 2003/12/04 13:57:30 keihan Exp $    */
    2 
    3 /*
    4  * Copyright (c) 2000 Michael Graff.  All rights reserved.
    5  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
    6  * Copyright (c) 1995 Charles M. Hannum.  All rights reserved.
    7  *
    8  * This code is derived from public-domain software written by
    9  * Roland McGrath, and information provided by David Muir Sharnoff.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *      This product includes software developed by Charles M. Hannum.
   22  * 4. The name of the author may not be used to endorse or promote products
   23  *    derived from this software without specific prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   26  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   27  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   28  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   29  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   30  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   31  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   32  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   33  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   34  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   35  */
   36 
   37 /*
   38  * This code was written and tested with the Addonics FlexPort 8S.
   39  * It has 8 ports, using 16650-compatible chips, sharing a single
   40  * interrupt.
   41  *
   42  * An interrupt status register exists at 0x240, according to the
   43  * skimpy documentation supplied.  It doesn't change depending on
   44  * io base address, so only one of these cards can ever be used at
   45  * a time.
   46  *
   47  * This card is different from the boca or other cards in that ports
   48  * 0..5 are from addresses 0x108..0x137, and 6..7 are from 0x200..0x20f,
   49  * making a gap that the other cards do not have.
   50  *
   51  * The addresses which are documented are 0x108, 0x1108, 0x1d08, and
   52  * 0x8508, for the base (port 0) address.
   53  *
   54  * --Michael <explorer@NetBSD.org> -- April 21, 2000
   55  */
   56 
   57 #include <sys/cdefs.h>
   58 __KERNEL_RCSID(0, "$NetBSD: addcom_isa.c,v 1.9 2003/12/04 13:57:30 keihan Exp $");
   59 
   60 #include <sys/param.h>
   61 #include <sys/systm.h>
   62 #include <sys/device.h>
   63 #include <sys/termios.h>
   64 
   65 #include <machine/bus.h>
   66 #include <machine/intr.h>
   67 
   68 #include <dev/ic/comreg.h>
   69 #include <dev/ic/comvar.h>
   70 
   71 #include <dev/isa/isavar.h>
   72 #include <dev/isa/com_multi.h>
   73 
   74 #define NSLAVES 8
   75 
   76 /*
   77  * Grr.  This card always uses 0x420 for the status register, regardless
   78  * of io base address.
   79  */
   80 #define STATUS_IOADDR   0x420
   81 #define STATUS_SIZE     8               /* May be bogus... */
   82 
   83 struct addcom_softc {
   84         struct device sc_dev;
   85         void *sc_ih;
   86 
   87         bus_space_tag_t sc_iot;
   88         int sc_iobase;
   89 
   90         int sc_alive;                   /* mask of slave units attached */
   91         void *sc_slaves[NSLAVES];       /* com device unit numbers */
   92         bus_space_handle_t sc_slaveioh[NSLAVES];
   93         bus_space_handle_t sc_statusioh;
   94 };
   95 
   96 #define SLAVE_IOBASE_OFFSET 0x108
   97 static int slave_iobases[8] = {
   98         0x108,  /* port 0, base port */
   99         0x110,
  100         0x118,
  101         0x120,
  102         0x128,
  103         0x130,
  104         0x200,  /* port 7, note address skip... */
  105         0x208
  106 };
  107 
  108 int addcomprobe __P((struct device *, struct cfdata *, void *));
  109 void addcomattach __P((struct device *, struct device *, void *));
  110 int addcomintr __P((void *));
  111 int addcomprint __P((void *, const char *));
  112 
  113 CFATTACH_DECL(addcom_isa, sizeof(struct addcom_softc),
  114     addcomprobe, addcomattach, NULL, NULL);
  115 
  116 int
  117 addcomprobe(struct device *parent, struct cfdata *self, void *aux)
  118 {
  119         struct isa_attach_args *ia = aux;
  120         bus_space_tag_t iot = ia->ia_iot;
  121         bus_space_handle_t ioh;
  122         int i, iobase, rv = 1;
  123 
  124         /*
  125          * Do the normal com probe for the first UART and assume
  126          * its presence, and the ability to map the other UARTS,
  127          * means there is a multiport board there.
  128          * XXX Needs more robustness.
  129          */
  130 
  131         if (ia->ia_nio < 1)
  132                 return (0);
  133         if (ia->ia_nirq < 1)
  134                 return (0);
  135 
  136         if (ISA_DIRECT_CONFIG(ia))
  137                 return (0);
  138 
  139         /* Disallow wildcarded i/o address. */
  140         if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT)
  141                 return (0);
  142         if (ia->ia_irq[0].ir_irq == ISACF_IRQ_DEFAULT)
  143                 return (0);
  144 
  145         iobase = ia->ia_io[0].ir_addr;
  146 
  147         /* if the first port is in use as console, then it. */
  148         if (com_is_console(iot, iobase, 0))
  149                 goto checkmappings;
  150 
  151         if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
  152                 rv = 0;
  153                 goto out;
  154         }
  155         rv = comprobe1(iot, ioh);
  156         bus_space_unmap(iot, ioh, COM_NPORTS);
  157         if (rv == 0)
  158                 goto out;
  159 
  160 checkmappings:
  161         for (i = 1; i < NSLAVES; i++) {
  162                 iobase += slave_iobases[i] - slave_iobases[i - 1];
  163 
  164                 if (com_is_console(iot, iobase, 0))
  165                         continue;
  166 
  167                 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
  168                         rv = 0;
  169                         goto out;
  170                 }
  171                 bus_space_unmap(iot, ioh, COM_NPORTS);
  172         }
  173 
  174 out:
  175         if (rv) {
  176                 ia->ia_nio = 1;
  177                 ia->ia_io[0].ir_size = NSLAVES * COM_NPORTS;
  178 
  179                 ia->ia_nirq = 1;
  180 
  181                 ia->ia_niomem = 0;
  182                 ia->ia_ndrq = 0;
  183         }
  184         return (rv);
  185 }
  186 
  187 int
  188 addcomprint(void *aux, const char *pnp)
  189 {
  190         struct commulti_attach_args *ca = aux;
  191 
  192         if (pnp)
  193                 aprint_normal("com at %s", pnp);
  194         aprint_normal(" slave %d", ca->ca_slave);
  195         return (UNCONF);
  196 }
  197 
  198 void
  199 addcomattach(struct device *parent, struct device *self, void *aux)
  200 {
  201         struct addcom_softc *sc = (void *)self;
  202         struct isa_attach_args *ia = aux;
  203         struct commulti_attach_args ca;
  204         bus_space_tag_t iot = ia->ia_iot;
  205         int i, iobase;
  206 
  207         printf("\n");
  208 
  209         sc->sc_iot = ia->ia_iot;
  210         sc->sc_iobase = ia->ia_io[0].ir_addr;
  211 
  212         if (bus_space_map(iot, STATUS_IOADDR, STATUS_SIZE,
  213                           0, &sc->sc_statusioh)) {
  214                 printf("%s: can't map status space\n", sc->sc_dev.dv_xname);
  215                 return;
  216         }
  217 
  218         for (i = 0; i < NSLAVES; i++) {
  219                 iobase = sc->sc_iobase
  220                         + slave_iobases[i]
  221                         - SLAVE_IOBASE_OFFSET;
  222                 if (!com_is_console(iot, iobase, &sc->sc_slaveioh[i]) &&
  223                     bus_space_map(iot, iobase, COM_NPORTS, 0,
  224                                   &sc->sc_slaveioh[i])) {
  225                         printf("%s: can't map i/o space for slave %d\n",
  226                                sc->sc_dev.dv_xname, i);
  227                         return;
  228                 }
  229         }
  230 
  231         for (i = 0; i < NSLAVES; i++) {
  232                 ca.ca_slave = i;
  233                 ca.ca_iot = sc->sc_iot;
  234                 ca.ca_ioh = sc->sc_slaveioh[i];
  235                 ca.ca_iobase = sc->sc_iobase
  236                         + slave_iobases[i]
  237                         - SLAVE_IOBASE_OFFSET;
  238                 ca.ca_noien = 0;
  239 
  240                 sc->sc_slaves[i] = config_found(self, &ca, addcomprint);
  241                 if (sc->sc_slaves[i] != NULL)
  242                         sc->sc_alive |= 1 << i;
  243         }
  244 
  245         sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq,
  246             IST_EDGE, IPL_SERIAL, addcomintr, sc);
  247 }
  248 
  249 int
  250 addcomintr(void *arg)
  251 {
  252         struct addcom_softc *sc = arg;
  253         bus_space_tag_t iot = sc->sc_iot;
  254         int alive = sc->sc_alive;
  255         int bits;
  256 
  257         bits = bus_space_read_1(iot, sc->sc_statusioh, 0) & alive;
  258         if (bits == 0)
  259                 return (0);
  260 
  261         for (;;) {
  262 #define TRY(n) \
  263                 if (bits & (1 << (n))) \
  264                         comintr(sc->sc_slaves[n]);
  265                 TRY(0);
  266                 TRY(1);
  267                 TRY(2);
  268                 TRY(3);
  269                 TRY(4);
  270                 TRY(5);
  271                 TRY(6);
  272                 TRY(7);
  273 #undef TRY
  274                 bits = bus_space_read_1(iot, sc->sc_statusioh, 0) & alive;
  275                 if (bits == 0)
  276                         return (1);
  277         }
  278 }

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FreeBSD/Linux Kernel Cross Reference sys/dev/isa/addcom_isa.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/isa/addcom_isa.c