The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/isa/isadmavar.h

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    1 /*      $NetBSD: isadmavar.h,v 1.19 2003/05/09 23:51:29 fvdl Exp $      */
    2 
    3 /*-
    4  * Copyright (c) 1997, 1998, 2000 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
    9  * NASA Ames Research Center.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *      This product includes software developed by the NetBSD
   22  *      Foundation, Inc. and its contributors.
   23  * 4. Neither the name of The NetBSD Foundation nor the names of its
   24  *    contributors may be used to endorse or promote products derived
   25  *    from this software without specific prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  * POSSIBILITY OF SUCH DAMAGE.
   38  */
   39 
   40 #ifndef _DEV_ISA_ISADMAVAR_H_
   41 #define _DEV_ISA_ISADMAVAR_H_
   42 
   43 #define DMAMODE_WRITE           0x00
   44 #define DMAMODE_READ            0x01
   45 #define DMAMODE_SINGLE          0x00
   46 #define DMAMODE_DEMAND          0x02
   47 #define DMAMODE_LOOP            0x04
   48 #define DMAMODE_LOOPDEMAND      (DMAMODE_LOOP | DMAMODE_DEMAND)
   49 
   50 /*
   51  * ISA DMA state.  This structure is provided by the ISA chipset
   52  * DMA entry points to the generic back-end functions that actually
   53  * frob the controller.
   54  */
   55 struct isa_dma_state {
   56         struct device *ids_dev;         /* associated device (for dv_xname) */
   57         bus_space_tag_t ids_bst;        /* bus space tag for DMA controller */
   58         bus_space_handle_t ids_dma1h;   /* handle for DMA controller #1 */
   59         bus_space_handle_t ids_dma2h;   /* handle for DMA controller #2 */
   60         bus_space_handle_t ids_dmapgh;  /* handle for DMA page registers */
   61         bus_dma_tag_t ids_dmat;         /* DMA tag for DMA controller */
   62         bus_dmamap_t ids_dmamaps[8];    /* DMA maps for each channel */
   63         bus_size_t ids_dmalength[8];    /* size of DMA transfer per channel */
   64         bus_size_t ids_maxsize[8];      /* max size per channel */
   65         int     ids_drqmap;             /* available DRQs (bitmap) */
   66         int     ids_dmareads;           /* state for isa_dmadone() (bitmap) */
   67         int     ids_dmafinished;        /* DMA completion state (bitmap) */
   68         int     ids_masked;             /* masked channels (bitmap) */
   69         int     ids_frozen;             /* `frozen' count */
   70         int     ids_initialized;        /* only initialize once... */
   71 };
   72 
   73 #define ISA_DMA_DRQ_ISFREE(state, drq)                                  \
   74         (((state)->ids_drqmap & (1 << (drq))) == 0)
   75 
   76 #define ISA_DMA_DRQ_ALLOC(state, drq)                                   \
   77         (state)->ids_drqmap |= (1 << (drq))
   78 
   79 #define ISA_DMA_DRQ_FREE(state, drq)                                    \
   80         (state)->ids_drqmap &= ~(1 << (drq))
   81 
   82 #define ISA_DMA_MASK_SET(state, drq)                                    \
   83         (state)->ids_masked |= (1 << (drq))
   84 
   85 #define ISA_DMA_MASK_CLR(state, drq)                                    \
   86         (state)->ids_masked &= ~(1 << (drq))
   87 
   88 /*
   89  * Memory list used by _isa_malloc().
   90  */
   91 struct isa_mem {
   92         struct isa_dma_state *ids;
   93         int chan;
   94         bus_size_t size;
   95         bus_addr_t addr;
   96         caddr_t kva;
   97         struct isa_mem *next;
   98 };
   99 
  100 #ifdef _KERNEL
  101 struct proc;
  102 struct malloc_type;
  103 
  104 void       _isa_dmainit __P((struct isa_dma_state *, bus_space_tag_t,
  105                bus_dma_tag_t, struct device *));
  106 
  107 int        _isa_dmacascade __P((struct isa_dma_state *, int));
  108 
  109 bus_size_t _isa_dmamaxsize __P((struct isa_dma_state *, int));
  110 
  111 int        _isa_dmamap_create __P((struct isa_dma_state *, int,
  112                bus_size_t, int));
  113 void       _isa_dmamap_destroy __P((struct isa_dma_state *, int));
  114 
  115 int        _isa_dmastart __P((struct isa_dma_state *, int, void *, bus_size_t,
  116                struct proc *, int, int));
  117 void       _isa_dmaabort __P((struct isa_dma_state *, int));
  118 bus_size_t _isa_dmacount __P((struct isa_dma_state *, int));
  119 int        _isa_dmafinished __P((struct isa_dma_state *, int));
  120 void       _isa_dmadone __P((struct isa_dma_state *, int));
  121 
  122 void       _isa_dmafreeze __P((struct isa_dma_state *));
  123 void       _isa_dmathaw __P((struct isa_dma_state *));
  124 
  125 int        _isa_dmamem_alloc __P((struct isa_dma_state *, int, bus_size_t,
  126                bus_addr_t *, int));
  127 void       _isa_dmamem_free __P((struct isa_dma_state *, int, bus_addr_t,
  128                bus_size_t));
  129 int        _isa_dmamem_map __P((struct isa_dma_state *, int, bus_addr_t,
  130                bus_size_t, caddr_t *, int));
  131 void       _isa_dmamem_unmap __P((struct isa_dma_state *, int, caddr_t,
  132                size_t));
  133 paddr_t    _isa_dmamem_mmap __P((struct isa_dma_state *, int, bus_addr_t,
  134                bus_size_t, off_t, int, int));
  135 
  136 int        _isa_drq_alloc __P((struct isa_dma_state *, int));
  137 int        _isa_drq_free __P((struct isa_dma_state *, int));
  138 int        _isa_drq_isfree __P((struct isa_dma_state *, int));
  139 
  140 void      *_isa_malloc __P((struct isa_dma_state *, int, size_t,
  141                 struct malloc_type *, int));
  142 void       _isa_free __P((void *, struct malloc_type *));
  143 paddr_t    _isa_mappage __P((void *, off_t, int));
  144 #endif /* _KERNEL */
  145 
  146 #endif /* _DEV_ISA_ISADMAVAR_H_ */

Cache object: 4754556482a9307edb791807a06e026f


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