Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/isa/isapnpreg.h
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1 /* $OpenBSD: isapnpreg.h,v 1.4 1997/12/25 09:22:41 downsj Exp $ */ 2 /* $NetBSD: isapnpreg.h,v 1.5 1997/08/12 07:34:34 mikel Exp $ */ 3 4 /* 5 * Copyright (c) 1996 Christos Zoulas. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Christos Zoulas. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _DEV_ISA_ISAPNPREG_H_ 34 #define _DEV_ISA_ISAPNPREG_H_ 35 36 /* 37 * ISA Plug and Play register definitions; 38 * From Plug and Play ISA Specification V1.0a, May 5 1994 39 */ 40 41 #define ISAPNP_MAX_CARDS 8 42 #define ISAPNP_MAX_IDENT 32 43 #define ISAPNP_MAX_DEVCLASS 16 44 #define ISAPNP_SERIAL_SIZE 9 45 #define ISAPNP_MAX_TAGSIZE 256 46 47 #define ISAPNP_ADDR 0x279 /* Write only */ 48 #define ISAPNP_WRDATA 0xa79 /* Write only */ 49 50 /* The read port is in range 0x203 to 0x3ff */ 51 #define ISAPNP_RDDATA_MIN 0x203 /* Read only */ 52 #define ISAPNP_RDDATA_MAX 0x3ff 53 54 #define ISAPNP_LFSR_INIT 0x6A /* Initial value of LFSR sequence */ 55 #define ISAPNP_LFSR_LENGTH 32 /* Number of values in LFSR sequence */ 56 /* Formula to compute the next value */ 57 #define ISAPNP_LFSR_NEXT(v) (((v) >> 1) | (((v) & 1) ^ (((v) & 2) >> 1)) << 7) 58 59 #define ISAPNP_SET_RD_PORT 0x00 60 #define ISAPNP_SERIAL_ISOLATION 0x01 61 #define ISAPNP_CONFIG_CONTROL 0x02 62 #define ISAPNP_CC_RESET 0x01 63 #define ISAPNP_CC_WAIT_FOR_KEY 0x02 64 #define ISAPNP_CC_RESET_CSN 0x04 65 #define ISAPNP_CC_RESET_DRV 0x07 66 #define ISAPNP_WAKE 0x03 67 #define ISAPNP_RESOURCE_DATA 0x04 68 #define ISAPNP_STATUS 0x05 69 #define ISAPNP_CARD_SELECT_NUM 0x06 70 #define ISAPNP_LOGICAL_DEV_NUM 0x07 71 72 #define ISAPNP_ACTIVATE 0x30 73 #define ISAPNP_IO_RANGE_CHECK 0x31 74 75 #define ISAPNP_NUM_MEM 4 76 #define ISAPNP_MEM_DESC { 0x40, 0x48, 0x50, 0x58 } 77 #define ISAPNP_MEM_BASE_23_16 0x0 78 #define ISAPNP_MEM_BASE_15_8 0x1 79 #define ISAPNP_MEM_CONTROL 0x2 80 #define ISAPNP_MEM_CONTROL_LIMIT 1 81 #define ISAPNP_MEM_CONTROL_16 2 82 #define ISAPNP_MEM_LRANGE_23_16 0x3 83 #define ISAPNP_MEM_LRANGE_15_8 0x4 84 85 #define ISAPNP_NUM_IO 8 86 #define ISAPNP_IO_DESC { 0x60, 0x62, 0x64, 0x68, 0x6a, 0x6c, 0x6e } 87 #define ISAPNP_IO_BASE_15_8 0x0 88 #define ISAPNP_IO_BASE_7_0 0x1 89 90 #define ISAPNP_NUM_IRQ 16 91 #define ISAPNP_IRQ_DESC { 0x70, 0x72 } 92 #define ISAPNP_IRQ_NUMBER 0x0 93 #define ISAPNP_IRQ_CONTROL 0x1 94 #define ISAPNP_IRQ_LEVEL 1 95 #define ISAPNP_IRQ_HIGH 2 96 97 #define ISAPNP_NUM_DRQ 8 98 #define ISAPNP_DRQ_DESC { 0x74, 0x75 } 99 100 #define ISAPNP_NUM_MEM32 4 101 #define ISAPNP_MEM32_DESC { 0x76, 0x80, 0x90, 0xa0 } 102 #define ISAPNP_MEM32_BASE_31_24 0x0 103 #define ISAPNP_MEM32_BASE_23_16 0x1 104 #define ISAPNP_MEM32_BASE_15_8 0x2 105 #define ISAPNP_MEM32_BASE_7_0 0x3 106 #define ISAPNP_MEM32_CONTROL 0x4 107 #define ISAPNP_MEM32_CONTROL_LIMIT 1 108 #define ISAPNP_MEM32_CONTROL_16 2 109 #define ISAPNP_MEM32_CONTROL_32 6 110 #define ISAPNP_MEM32_LRANGE_31_24 0x5 111 #define ISAPNP_MEM32_LRANGE_23_16 0x6 112 #define ISAPNP_MEM32_LRANGE_15_8 0x7 113 #define ISAPNP_MEM32_LRANGE_7_0 0x8 114 115 /* Small Tags */ 116 #define ISAPNP_TAG_VERSION_NUM 0x1 117 #define ISAPNP_TAG_LOGICAL_DEV_ID 0x2 118 #define ISAPNP_TAG_COMPAT_DEV_ID 0x3 119 #define ISAPNP_TAG_IRQ_FORMAT 0x4 120 #define ISAPNP_IRQTYPE_EDGE_PLUS 1 121 #define ISAPNP_IRQTYPE_EDGE_MINUS 2 122 #define ISAPNP_IRQTYPE_LEVEL_PLUS 4 123 #define ISAPNP_IRQTYPE_LEVEL_MINUS 8 124 #define ISAPNP_TAG_DMA_FORMAT 0x5 125 #define ISAPNP_DMAWIDTH_8 0x00 126 #define ISAPNP_DMAWIDTH_8_16 0x01 127 #define ISAPNP_DMAWIDTH_16 0x02 128 #define ISAPNP_DMAWIDTH_RESERVED 0x03 129 #define ISAPNP_DMAWIDTH_MASK 0x03 130 #define ISAPNP_DMAATTR_BUS_MASTER 0x04 131 #define ISAPNP_DMAATTR_INCR_8 0x08 132 #define ISAPNP_DMAATTR_INCR_16 0x10 133 #define ISAPNP_DMAATTR_MASK 0x1c 134 #define ISAPNP_DMASPEED_COMPAT 0x00 135 #define ISAPNP_DMASPEED_A 0x20 136 #define ISAPNP_DMASPEED_B 0x40 137 #define ISAPNP_DMASPEED_F 0x60 138 #define ISAPNP_DMASPEED_MASK 0x60 139 #define ISAPNP_TAG_DEP_START 0x6 140 #define ISAPNP_DEP_PREFERRED 0x0 141 #define ISAPNP_DEP_ACCEPTABLE 0x1 142 #define ISAPNP_DEP_FUNCTIONAL 0x2 143 #define ISAPNP_DEP_RESERVED 0x3 144 #define ISAPNP_DEP_MASK 0x3 145 #define ISAPNP_DEP_UNSET 0x80 /* Internal */ 146 #define ISAPNP_DEP_CONFLICTING 0x81 /* Internal */ 147 #define ISAPNP_TAG_DEP_END 0x7 148 #define ISAPNP_TAG_IO_PORT_DESC 0x8 149 #define ISAPNP_IOFLAGS_16 0x1 150 #define ISAPNP_TAG_FIXED_IO_PORT_DESC 0x9 151 #define ISAPNP_TAG_RESERVED1 0xa 152 #define ISAPNP_TAG_RESERVED2 0xb 153 #define ISAPNP_TAG_RESERVED3 0xc 154 #define ISAPNP_TAG_RESERVED4 0xd 155 #define ISAPNP_TAG_VENDOR_DEF 0xe 156 #define ISAPNP_TAG_END 0xf 157 158 /* Large Tags */ 159 #define ISAPNP_LARGE_TAG 0x80 160 #define ISAPNP_TAG_MEM_RANGE_DESC 0x81 161 #define ISAPNP_MEMATTR_WRITEABLE 0x01 162 #define ISAPNP_MEMATTR_CACHEABLE 0x02 163 #define ISAPNP_MEMATTR_HIGH_ADDR 0x04 164 #define ISAPNP_MEMATTR_SHADOWABLE 0x20 165 #define ISAPNP_MEMATTR_ROM 0x40 166 #define ISAPNP_MEMATTR_MASK 0x67 167 #define ISAPNP_MEMWIDTH_8 0x00 168 #define ISAPNP_MEMWIDTH_16 0x08 169 #define ISAPNP_MEMWIDTH_8_16 0x10 170 #define ISAPNP_MEMWIDTH_32 0x18 171 #define ISAPNP_MEMWIDTH_MASK 0x18 172 #define ISAPNP_TAG_ANSI_IDENT_STRING 0x82 173 #define ISAPNP_TAG_UNICODE_IDENT_STRING 0x83 174 #define ISAPNP_TAG_VENDOR_DEFINED 0x84 175 #define ISAPNP_TAG_MEM32_RANGE_DESC 0x85 176 #define ISAPNP_TAG_FIXED_MEM32_RANGE_DESC 0x86 177 178 #endif /* _DEV_ISA_ISAPNPREG_H_ */
Cache object: b3169439f053918e35a0d518b3ee1275
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