FreeBSD/Linux Kernel Cross Reference
sys/dev/isa/pssreg.h
1 /* $NetBSD: pssreg.h,v 1.2 1995/05/08 22:02:09 brezak Exp $ */
2
3 /*
4 * Copyright (c) 1994 John Brezak
5 * Copyright (c) 1991-1993 Regents of the University of California.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the Computer Systems
19 * Engineering Group at Lawrence Berkeley Laboratory.
20 * 4. Neither the name of the University nor of the Laboratory may be used
21 * to endorse or promote products derived from this software without
22 * specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 */
37 /*
38 * Copyright (c) 1993 Analog Devices Inc. All rights reserved
39 */
40
41 /*
42 * Macros to detect valid hardware configuration data.
43 */
44 #define PSS_BASE_VALID(base) ((base) == 0x220 || (base) == 0x240)
45
46 /*
47 * ESC614 Interface chip
48 */
49 #define ADDR_MASK 0x003f
50
51 #define INT_MASK 0xffc7
52 #define INT_3_BITS 0x0008
53 #define INT_5_BITS 0x0010
54 #define INT_7_BITS 0x0018
55 #define INT_9_BITS 0x0020
56 #define INT_10_BITS 0x0028
57 #define INT_11_BITS 0x0030
58 #define INT_12_BITS 0x0038
59
60 #define INT_TEST_BIT 0x0200
61 #define INT_TEST_PASS 0x0100
62 #define INT_TEST_BIT_MASK 0xFDFF
63
64 #define DMA_MASK 0xfff8
65 #define DMA_0_BITS 0x0001
66 #define DMA_1_BITS 0x0002
67 #define DMA_3_BITS 0x0003
68 #define DMA_5_BITS 0x0004
69 #define DMA_6_BITS 0x0005
70 #define DMA_7_BITS 0x0006
71
72 #define DMA_TEST_BIT 0x0080
73 #define DMA_TEST_PASS 0x0040
74 #define DMA_TEST_BIT_MASK 0xFF7F
75
76 /* Echo DSP Flags */
77 #define DSP_FLAG3 0x10
78 #define DSP_FLAG2 0x08
79 #define DSP_FLAG1 0x80
80 #define DSP_FLAG0 0x40
81
82 /* ESC614 register offsets */
83 #define PSS_NPORT 32
84
85 #define PSS_DATA 0x00
86 #define PSS_STATUS 0x02
87 #define PSS_CONTROL 0x02
88 #define PSS_ID_VERS 0x04
89 #define PSS_IRQ_ACK 0x04
90
91 #define PSS_CONFIG 0x10
92 #define PSS_WSS_CONFIG 0x12
93 #define SB_CONFIG 0x14
94 #define CD_CONFIG 0x16
95 #define MIDI_CONFIG 0x18
96 #define UART_CONFIG 0x1a
97
98 /* PSS control register */
99 #define PSS_WEIE 0x8000
100 #define PSS_RFIE 0x4000
101 #define PSS_RESET 0x2000
102 #define PSS_FLAG1 0x1000
103 #define PSS_FLAG0 0x0800
104
105 /* PSS status register */
106 #define PSS_WRITE_EMPTY 0x8000
107 #define PSS_READ_FULL 0x4000
108 #define PSS_IRQ 0x2000
109 #define PSS_DMQ_TC 0x1000
110 #define PSS_FLAG3 0x0800
111 #define PSS_FLAG2 0x0400
112
113 /* Game control register */
114 #define GAME_BIT 0x0400
115 #define GAME_BIT_MASK 0xfbff
116
117 /* MPU registers */
118 #define MIDI_NPORT 8
119
120 #define MIDI_DATA_REG 0x00
121 #define MIDI_STATUS_REG 0x01
122 #define MIDI_COMMAND_REG 0x01
123
124 #define MIDI_SR_RF 0x80
125 #define MIDI_SR_TE 0x40
126
127 /* CD Interface registers */
128 #define CD_NPORT 16
129
130 #define CD_POL_MASK 0xFFBF
131 #define CD_POL_BIT 0x0040
132
133 /* Phillips amplifier controls: only via DSP */
134 /* DSP commands */
135 #define SET_MASTER_COMMAND 0x0010
136 #define MASTER_VOLUME_LEFT 0x0000
137 #define MASTER_VOLUME_RIGHT 0x0100
138 #define MASTER_BASS 0x0200
139 #define MASTER_TREBLE 0x0300
140 #define MASTER_SWITCH 0x0800
141
142 #define PSS_STEREO 0x00ce
143 #define PSS_PSEUDO 0x00d6
144 #define PSS_SPATIAL 0x00de
145 #define PSS_MONO 0x00c6
146
147 #define PHILLIPS_VOL_MIN -64
148 #define PHILLIPS_VOL_MAX 6
149 #define PHILLIPS_VOL_DELTA 70
150 #define PHILLIPS_VOL_INITIAL -20
151 #define PHILLIPS_VOL_CONSTANT 252
152 #define PHILLIPS_VOL_STEP 2
153 #define PHILLIPS_BASS_MIN -12
154 #define PHILLIPS_BASS_MAX 15
155 #define PHILLIPS_BASS_DELTA 27
156 #define PHILLIPS_BASS_INITIAL 0
157 #define PHILLIPS_BASS_CONSTANT 246
158 #define PHILLIPS_BASS_STEP 2
159 #define PHILLIPS_TREBLE_MIN -12
160 #define PHILLIPS_TREBLE_MAX 12
161 #define PHILLIPS_TREBLE_DELTA 24
162 #define PHILLIPS_TREBLE_INITIAL 0
163 #define PHILLIPS_TREBLE_CONSTANT 246
164 #define PHILLIPS_TREBLE_STEP 2
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