The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/isa/tcic2_isa.c

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    1 /*      $NetBSD: tcic2_isa.c,v 1.9 2002/10/02 03:10:50 thorpej Exp $    */
    2 
    3 /*
    4  *
    5  * Copyright (c) 1998, 1999 Christoph Badura. All rights reserved.
    6  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *      This product includes software developed by Marc Horowitz.
   19  * 4. The name of the author may not be used to endorse or promote products
   20  *    derived from this software without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   32  */
   33 
   34 #include <sys/cdefs.h>
   35 __KERNEL_RCSID(0, "$NetBSD: tcic2_isa.c,v 1.9 2002/10/02 03:10:50 thorpej Exp $");
   36 
   37 #undef  TCICISADEBUG
   38 
   39 #include <sys/param.h>
   40 #include <sys/systm.h>
   41 #include <sys/device.h>
   42 #include <sys/extent.h>
   43 #include <sys/malloc.h>
   44 
   45 #include <machine/bus.h>
   46 #include <machine/intr.h>
   47 
   48 #include <dev/isa/isareg.h>
   49 #include <dev/isa/isavar.h>
   50 
   51 #include <dev/pcmcia/pcmciareg.h>
   52 #include <dev/pcmcia/pcmciavar.h>
   53 #include <dev/pcmcia/pcmciachip.h>
   54 
   55 #include <dev/ic/tcic2reg.h>
   56 #include <dev/ic/tcic2var.h>
   57 
   58 /*****************************************************************************
   59  * Configurable parameters.
   60  *****************************************************************************/
   61 
   62 #include "opt_tcic_isa_alloc_iobase.h"
   63 #include "opt_tcic_isa_alloc_iosize.h"
   64 #include "opt_tcic_isa_intr_alloc_mask.h"
   65 
   66 /*
   67  * Default I/O allocation range.  If both are set to non-zero, these
   68  * values will be used instead.  Otherwise, the code attempts to probe
   69  * the bus width.  Systems with 10 address bits should use 0x300 and 0xff.
   70  * Systems with 12 address bits (most) should use 0x400 and 0xbff.
   71  */
   72 
   73 #ifndef TCIC_ISA_ALLOC_IOBASE
   74 #define TCIC_ISA_ALLOC_IOBASE           0
   75 #endif
   76 
   77 #ifndef TCIC_ISA_ALLOC_IOSIZE
   78 #define TCIC_ISA_ALLOC_IOSIZE           0
   79 #endif
   80 
   81 int     tcic_isa_alloc_iobase = TCIC_ISA_ALLOC_IOBASE;
   82 int     tcic_isa_alloc_iosize = TCIC_ISA_ALLOC_IOSIZE;
   83 
   84 /*
   85  * Default IRQ allocation bitmask.  This defines the range of allowable
   86  * IRQs for PCMCIA slots.  Useful if order of probing would screw up other
   87  * devices, or if TCIC hardware/cards have trouble with certain interrupt
   88  * lines.
   89  *
   90  * We disable IRQ 10 by default, since some common laptops (namely, the
   91  * NEC Versa series) reserve IRQ 10 for the docking station SCSI interface.
   92  *
   93  * XXX Do we care about this?  the Versa doesn't use a tcic. -chb
   94  */
   95 
   96 #ifndef TCIC_ISA_INTR_ALLOC_MASK
   97 #define TCIC_ISA_INTR_ALLOC_MASK        0xffff
   98 #endif
   99 
  100 int     tcic_isa_intr_alloc_mask = TCIC_ISA_INTR_ALLOC_MASK;
  101 
  102 /*****************************************************************************
  103  * End of configurable parameters.
  104  *****************************************************************************/
  105 
  106 #ifdef TCICISADEBUG
  107 int     tcic_isa_debug = 1;
  108 #define DPRINTF(arg) if (tcic_isa_debug) printf arg;
  109 #else
  110 #define DPRINTF(arg)
  111 #endif
  112 
  113 int     tcic_isa_probe __P((struct device *, struct cfdata *, void *));
  114 void    tcic_isa_attach __P((struct device *, struct device *, void *));
  115 
  116 void    *tcic_isa_chip_intr_establish __P((pcmcia_chipset_handle_t,
  117             struct pcmcia_function *, int, int (*) (void *), void *));
  118 void    tcic_isa_chip_intr_disestablish __P((pcmcia_chipset_handle_t, void *));
  119 
  120 CFATTACH_DECL(tcic_isa, sizeof(struct tcic_softc),
  121     tcic_isa_probe, tcic_isa_attach, NULL, NULL);
  122 
  123 static struct pcmcia_chip_functions tcic_isa_functions = {
  124         tcic_chip_mem_alloc,
  125         tcic_chip_mem_free,
  126         tcic_chip_mem_map,
  127         tcic_chip_mem_unmap,
  128 
  129         tcic_chip_io_alloc,
  130         tcic_chip_io_free,
  131         tcic_chip_io_map,
  132         tcic_chip_io_unmap,
  133 
  134         tcic_isa_chip_intr_establish,
  135         tcic_isa_chip_intr_disestablish,
  136 
  137         tcic_chip_socket_enable,
  138         tcic_chip_socket_disable,
  139 };
  140 
  141 int
  142 tcic_isa_probe(parent, match, aux)
  143         struct device *parent;
  144         struct cfdata *match;
  145         void *aux;
  146 {
  147         struct isa_attach_args *ia = aux;
  148         bus_space_tag_t iot = ia->ia_iot;
  149         bus_space_handle_t ioh, memh;
  150         int val, found, msize;
  151 
  152         if (ia->ia_nio < 1)
  153                 return (0);
  154         if (ia->ia_niomem < 1)
  155                 return (0);
  156 
  157         if (ISA_DIRECT_CONFIG(ia))
  158                 return (0);
  159 
  160         /* Disallow wildcarded i/o address. */
  161         if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT)
  162                 return (0);
  163         if (ia->ia_iomem[0].ir_addr == ISACF_IOMEM_DEFAULT)
  164                 return (0);
  165 
  166         if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh))
  167                 return (0);
  168 
  169         if (ia->ia_iomem[0].ir_size == ISACF_IOSIZ_DEFAULT)
  170                 msize = TCIC_MEMSIZE;
  171         else
  172                 msize = ia->ia_iomem[0].ir_size;
  173 
  174         if (bus_space_map(ia->ia_memt, ia->ia_iomem[0].ir_addr,
  175             msize, 0, &memh)) {
  176                 bus_space_unmap(iot, ioh, TCIC_IOSIZE);
  177                 return (0);
  178         }
  179 
  180         DPRINTF(("tcic probing 0x%03x\n", ia->ia_iobase));
  181         found = 0;
  182 
  183         /*
  184          * First, check for the reserved bits to be zero.
  185          */
  186         if (tcic_check_reserved_bits(iot, ioh)) {
  187                 DPRINTF(("tcic: reserved bits checked OK\n"));
  188                 /* Second, check whether the we know how to handle the chip. */
  189                 if ((val = tcic_chipid(iot, ioh))) {
  190                         DPRINTF(("tcic id: 0x%02x\n", val));
  191                         if (tcic_chipid_known(val))
  192                                 found++;
  193                 }
  194         }
  195         else
  196                 DPRINTF(("tcic: reserved bits didn't check OK\n"));
  197 
  198         bus_space_unmap(iot, ioh, TCIC_IOSIZE);
  199         bus_space_unmap(ia->ia_memt, memh, msize);
  200 
  201         if (!found)
  202                 return (0);
  203 
  204         ia->ia_nio = 1;
  205         ia->ia_io[0].ir_size = TCIC_IOSIZE;
  206 
  207         ia->ia_niomem = 1;
  208         ia->ia_iomem[0].ir_size = msize;
  209 
  210         /* IRQ is special. */
  211 
  212         ia->ia_ndrq = 0;
  213 
  214         return (1);
  215 }
  216 
  217 void
  218 tcic_isa_attach(parent, self, aux)
  219         struct device *parent, *self;
  220         void *aux;
  221 {
  222         struct tcic_softc *sc = (void *) self;
  223         struct isa_attach_args *ia = aux;
  224         isa_chipset_tag_t ic = ia->ia_ic;
  225         bus_space_tag_t iot = ia->ia_iot;
  226         bus_space_tag_t memt = ia->ia_memt;
  227         bus_space_handle_t ioh;
  228         bus_space_handle_t memh;
  229 
  230         /* Map i/o space. */
  231         if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh)) {
  232                 printf(": can't map i/o space\n");
  233                 return;
  234         }
  235 
  236         /* Map mem space. */
  237         if (bus_space_map(memt, ia->ia_iomem[0].ir_addr,
  238             ia->ia_iomem[0].ir_size, 0, &memh)) {
  239                 printf(": can't map mem space\n");
  240                 return;
  241         }
  242 
  243         sc->membase = ia->ia_iomem[0].ir_addr;
  244         sc->subregionmask =
  245             (1 << (ia->ia_iomem[0].ir_size / TCIC_MEM_PAGESIZE)) - 1;
  246         sc->memsize2 = tcic_log2((u_int)ia->ia_iomem[0].ir_size);
  247 
  248         sc->intr_est = ic;
  249         sc->pct = (pcmcia_chipset_tag_t) & tcic_isa_functions;
  250 
  251         sc->iot = iot;
  252         sc->ioh = ioh;
  253         sc->memt = memt;
  254         sc->memh = memh;
  255 
  256         /*
  257          * determine chip type and initialise some chip type dependend
  258          * parameters in softc.
  259          */
  260         sc->chipid = tcic_chipid(iot, ioh);
  261         sc->validirqs = tcic_validirqs(sc->chipid);
  262 
  263         /*
  264          * allocate an irq.  interrupts are relatively
  265          * scarce but for TCIC controllers very infrequent.
  266          */
  267 
  268         if (ia->ia_nirq < 1)
  269                 sc->irq = ISACF_IRQ_DEFAULT;
  270         else
  271                 sc->irq = ia->ia_irq[0].ir_irq;
  272         if (sc->irq == ISACF_IRQ_DEFAULT) {
  273                 if (isa_intr_alloc(ic,
  274                     sc->validirqs & (tcic_isa_intr_alloc_mask & 0xff00),
  275                     IST_EDGE, &sc->irq)) {
  276                         printf("\n%s: can't allocate interrupt\n",
  277                             sc->dev.dv_xname);
  278                         return;
  279                 }
  280                 printf(": using irq %d", sc->irq);
  281         }
  282         printf("\n");
  283 
  284         tcic_attach(sc);
  285 
  286 
  287         /*
  288          * XXX mycroft recommends I/O space range 0x400-0xfff.
  289          */
  290 
  291         /*
  292          * XXX some hardware doesn't seem to grok addresses in 0x400 range--
  293          * apparently missing a bit or more of address lines. (e.g.
  294          * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
  295          * TravelMate 5000--not clear which is at fault)
  296          * 
  297          * Add a kludge to detect 10 bit wide buses and deal with them,
  298          * and also a config file option to override the probe.
  299          */
  300 
  301 #if 0
  302         /*
  303          * This is what we'd like to use, but...
  304          */
  305         sc->iobase = 0x400;
  306         sc->iosize = 0xbff;
  307 #else
  308         /*
  309          * ...the above bus width probe doesn't always work.
  310          * So, experimentation has shown the following range
  311          * to not lose on systems that 0x300-0x3ff loses on
  312          * (e.g. the NEC Versa 6030X).
  313          */
  314         sc->iobase = 0x330;
  315         sc->iosize = 0x0cf;
  316 #endif
  317 
  318         DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx)\n",
  319             sc->dev.dv_xname, (long) sc->iobase,
  320             (long) sc->iobase + sc->iosize));
  321 
  322         if (tcic_isa_alloc_iobase && tcic_isa_alloc_iosize) {
  323                 sc->iobase = tcic_isa_alloc_iobase;
  324                 sc->iosize = tcic_isa_alloc_iosize;
  325 
  326                 DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx "
  327                     "(config override)\n", sc->dev.dv_xname, (long) sc->iobase,
  328                     (long) sc->iobase + sc->iosize));
  329         }
  330         sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
  331             tcic_intr, sc);
  332         if (sc->ih == NULL) {
  333                 printf("%s: can't establish interrupt\n", sc->dev.dv_xname);
  334                 return;
  335         }
  336 
  337         tcic_attach_sockets(sc);
  338 }
  339 
  340 void *
  341 tcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
  342         pcmcia_chipset_handle_t pch;
  343         struct pcmcia_function *pf;
  344         int ipl;
  345         int (*fct) __P((void *));
  346         void *arg;
  347 {
  348         struct tcic_handle *h = (struct tcic_handle *) pch;
  349         int irq, ist;
  350         void *ih;
  351 
  352         DPRINTF(("%s: tcic_isa_chip_intr_establish\n", h->sc->dev.dv_xname));
  353 
  354         /* XXX should we convert level to pulse? -chb  */
  355         if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
  356                 ist = IST_LEVEL;
  357         else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
  358                 ist = IST_PULSE;
  359         else
  360                 ist = IST_LEVEL;
  361 
  362         if (isa_intr_alloc(h->sc->intr_est,
  363             h->sc->validirqs & tcic_isa_intr_alloc_mask, ist, &irq))
  364                 return (NULL);
  365         if ((ih = isa_intr_establish(h->sc->intr_est, irq, ist, ipl,
  366             fct, arg)) == NULL)
  367                 return (NULL);
  368 
  369         DPRINTF(("%s: intr estrablished\n", h->sc->dev.dv_xname));
  370 
  371         h->ih_irq = irq;
  372 
  373         printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq);
  374 
  375         return (ih);
  376 }
  377 
  378 void 
  379 tcic_isa_chip_intr_disestablish(pch, ih)
  380         pcmcia_chipset_handle_t pch;
  381         void *ih;
  382 {
  383         struct tcic_handle *h = (struct tcic_handle *) pch;
  384         int val, reg;
  385 
  386         DPRINTF(("%s: tcic_isa_chip_intr_disestablish\n", h->sc->dev.dv_xname));
  387 
  388         h->ih_irq = 0;
  389 
  390         reg = TCIC_IR_SCF1_N(h->sock);
  391         val = tcic_read_ind_2(h, reg);
  392         val &= ~TCIC_SCF1_IRQ_MASK;
  393         tcic_write_ind_2(h, reg, val);
  394 
  395         isa_intr_disestablish(h->sc->intr_est, ih);
  396 }

Cache object: 82b1389e1126d9a88e77fd5b6e27c0df


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