The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/isa/tcic2_isa.c

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    1 /*      $OpenBSD: tcic2_isa.c,v 1.11 2022/04/06 18:59:29 naddy Exp $    */
    2 /*      $NetBSD: tcic2_isa.c,v 1.2 1999/04/08 16:14:29 bad Exp $        */
    3 
    4 #undef  TCICISADEBUG
    5 
    6 /*
    7  *
    8  * Copyright (c) 1998, 1999 Christoph Badura. All rights reserved.
    9  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *      This product includes software developed by Marc Horowitz.
   22  * 4. The name of the author may not be used to endorse or promote products
   23  *    derived from this software without specific prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   26  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   27  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   28  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   29  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   30  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   31  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   32  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   33  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   34  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   35  */
   36 
   37 
   38 #include <sys/param.h>
   39 #include <sys/systm.h>
   40 #include <sys/device.h>
   41 #include <sys/extent.h>
   42 #include <sys/malloc.h>
   43 
   44 #include <machine/bus.h>
   45 #include <machine/intr.h>
   46 
   47 #include <dev/isa/isareg.h>
   48 #include <dev/isa/isavar.h>
   49 
   50 #include <dev/pcmcia/pcmciareg.h>
   51 #include <dev/pcmcia/pcmciavar.h>
   52 #include <dev/pcmcia/pcmciachip.h>
   53 
   54 #include <dev/ic/tcic2reg.h>
   55 #include <dev/ic/tcic2var.h>
   56 
   57 /*****************************************************************************
   58  * Configurable parameters.
   59  *****************************************************************************/
   60 
   61 /*
   62  * Default I/O allocation range.  If both are set to non-zero, these
   63  * values will be used instead.  Otherwise, the code attempts to probe
   64  * the bus width.  Systems with 10 address bits should use 0x300 and 0xff.
   65  * Systems with 12 address bits (most) should use 0x400 and 0xbff.
   66  */
   67 
   68 #ifndef TCIC_ISA_ALLOC_IOBASE
   69 #define TCIC_ISA_ALLOC_IOBASE           0
   70 #endif
   71 
   72 #ifndef TCIC_ISA_ALLOC_IOSIZE
   73 #define TCIC_ISA_ALLOC_IOSIZE           0
   74 #endif
   75 
   76 int     tcic_isa_alloc_iobase = TCIC_ISA_ALLOC_IOBASE;
   77 int     tcic_isa_alloc_iosize = TCIC_ISA_ALLOC_IOSIZE;
   78 
   79 /*
   80  * Default IRQ allocation bitmask.  This defines the range of allowable
   81  * IRQs for PCMCIA slots.  Useful if order of probing would screw up other
   82  * devices, or if TCIC hardware/cards have trouble with certain interrupt
   83  * lines.
   84  *
   85  * We disable IRQ 10 by default, since some common laptops (namely, the
   86  * NEC Versa series) reserve IRQ 10 for the docking station SCSI interface.
   87  *
   88  * XXX Do we care about this?  the Versa doesn't use a tcic. -chb
   89  */
   90 
   91 #ifndef TCIC_ISA_INTR_ALLOC_MASK
   92 #define TCIC_ISA_INTR_ALLOC_MASK        0xffff
   93 #endif
   94 
   95 int     tcic_isa_intr_alloc_mask = TCIC_ISA_INTR_ALLOC_MASK;
   96 
   97 /*****************************************************************************
   98  * End of configurable parameters.
   99  *****************************************************************************/
  100 
  101 #ifdef TCICISADEBUG
  102 int     tcic_isa_debug = 1;
  103 #define DPRINTF(arg) if (tcic_isa_debug) printf arg;
  104 #else
  105 #define DPRINTF(arg)
  106 #endif
  107 
  108 int     tcic_isa_probe(struct device *, void *, void *);
  109 void    tcic_isa_attach(struct device *, struct device *, void *);
  110 
  111 void    *tcic_isa_chip_intr_establish(pcmcia_chipset_handle_t,
  112             struct pcmcia_function *, int, int (*) (void *), void *, char *);
  113 void    tcic_isa_chip_intr_disestablish(pcmcia_chipset_handle_t, void *);
  114 const char *tcic_isa_chip_intr_string(pcmcia_chipset_handle_t, void *);
  115 
  116 const struct cfattach tcic_isa_ca = {
  117         sizeof(struct tcic_softc), tcic_isa_probe, tcic_isa_attach
  118 };
  119 
  120 static struct pcmcia_chip_functions tcic_isa_functions = {
  121         tcic_chip_mem_alloc,
  122         tcic_chip_mem_free,
  123         tcic_chip_mem_map,
  124         tcic_chip_mem_unmap,
  125 
  126         tcic_chip_io_alloc,
  127         tcic_chip_io_free,
  128         tcic_chip_io_map,
  129         tcic_chip_io_unmap,
  130 
  131         tcic_isa_chip_intr_establish,
  132         tcic_isa_chip_intr_disestablish,
  133         tcic_isa_chip_intr_string,
  134 
  135         tcic_chip_socket_enable,
  136         tcic_chip_socket_disable,
  137 };
  138 
  139 int
  140 tcic_isa_probe(struct device *parent, void *match, void *aux)
  141 {
  142         struct isa_attach_args *ia = aux;
  143         bus_space_tag_t iot = ia->ia_iot;
  144         bus_space_handle_t ioh, memh;
  145         int val, found;
  146 
  147         /* Disallow wildcarded i/o address. */
  148         if (ia->ia_iobase == -1 /* ISACF_PORT_DEFAULT */)
  149                 return (0);
  150 
  151         if (bus_space_map(iot, ia->ia_iobase, TCIC_IOSIZE, 0, &ioh))
  152                 return (0);
  153 
  154         if (ia->ia_msize == 0)
  155                 ia->ia_msize = TCIC_MEMSIZE;
  156 
  157         if (bus_space_map(ia->ia_memt, ia->ia_maddr, ia->ia_msize, 0, &memh))
  158                 return (0);
  159 
  160         DPRINTF(("tcic probing 0x%03x\n", ia->ia_iobase));
  161         found = 0;
  162 
  163         /*
  164          * First, check for the reserved bits to be zero.
  165          */
  166         if (tcic_check_reserved_bits(iot, ioh)) {
  167                 DPRINTF(("tcic: reserved bits checked OK\n"));
  168                 /* Second, check whether the we know how to handle the chip. */
  169                 if ((val = tcic_chipid(iot, ioh))) {
  170                         DPRINTF(("tcic id: 0x%02x\n", val));
  171                         if (tcic_chipid_known(val))
  172                                 found++;
  173                 }
  174         }
  175         else
  176                 DPRINTF(("tcic: reserved bits didn't check OK\n"));
  177 
  178         bus_space_unmap(iot, ioh, TCIC_IOSIZE);
  179         bus_space_unmap(ia->ia_memt, memh, ia->ia_msize);
  180 
  181         if (!found)
  182                 return (0);
  183 
  184         ia->ia_iosize = TCIC_IOSIZE;
  185 
  186         return (1);
  187 }
  188 
  189 void
  190 tcic_isa_attach(struct device *parent, struct device *self, void *aux)
  191 {
  192         struct tcic_softc *sc = (void *) self;
  193         struct isa_attach_args *ia = aux;
  194         isa_chipset_tag_t ic = ia->ia_ic;
  195         bus_space_tag_t iot = ia->ia_iot;
  196         bus_space_tag_t memt = ia->ia_memt;
  197         bus_space_handle_t ioh;
  198         bus_space_handle_t memh;
  199 
  200         /* Map i/o space. */
  201         if (bus_space_map(iot, ia->ia_iobase, ia->ia_iosize, 0, &ioh)) {
  202                 printf(": can't map i/o space\n");
  203                 return;
  204         }
  205 
  206         /* Map mem space. */
  207         if (bus_space_map(memt, ia->ia_maddr, ia->ia_msize, 0, &memh)) {
  208                 printf(": can't map mem space\n");
  209                 return;
  210         }
  211 
  212         sc->membase = ia->ia_maddr;
  213         sc->subregionmask = (1 << (ia->ia_msize / TCIC_MEM_PAGESIZE)) - 1;
  214         sc->memsize2 = tcic_log2((u_int)ia->ia_msize);
  215 
  216         sc->intr_est = ic;
  217         sc->pct = (pcmcia_chipset_tag_t) &tcic_isa_functions;
  218 
  219         sc->iot = iot;
  220         sc->ioh = ioh;
  221         sc->memt = memt;
  222         sc->memh = memh;
  223 
  224         /*
  225          * determine chip type and initialise some chip type dependent
  226          * parameters in softc.
  227          */
  228         sc->chipid = tcic_chipid(iot, ioh);
  229         sc->validirqs = tcic_validirqs(sc->chipid);
  230 
  231         /*
  232          * allocate an irq.  interrupts are relatively
  233          * scarce but for TCIC controllers very infrequent.
  234          */
  235 
  236         if ((sc->irq = ia->ia_irq) == IRQUNK) {
  237                 if (isa_intr_alloc(ic,
  238                     sc->validirqs & (tcic_isa_intr_alloc_mask & 0xff00),
  239                     IST_EDGE, &sc->irq)) {
  240                         printf("\n%s: can't allocate interrupt\n",
  241                             sc->dev.dv_xname);
  242                         return;
  243                 }
  244                 printf(": using irq %d", sc->irq);
  245         }
  246         printf("\n");
  247 
  248         tcic_attach(sc);
  249 
  250 
  251         /*
  252          * XXX mycroft recommends I/O space range 0x400-0xfff.
  253          */
  254 
  255         /*
  256          * XXX some hardware doesn't seem to grok addresses in 0x400 range--
  257          * apparently missing a bit or more of address lines. (e.g.
  258          * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
  259          * TravelMate 5000--not clear which is at fault)
  260          * 
  261          * Add a kludge to detect 10 bit wide buses and deal with them,
  262          * and also a config file option to override the probe.
  263          */
  264 
  265 #if 0
  266         /*
  267          * This is what we'd like to use, but...
  268          */
  269         sc->iobase = 0x400;
  270         sc->iosize = 0xbff;
  271 #else
  272         /*
  273          * ...the above bus width probe doesn't always work.
  274          * So, experimentation has shown the following range
  275          * to not lose on systems that 0x300-0x3ff loses on
  276          * (e.g. the NEC Versa 6030X).
  277          */
  278         sc->iobase = 0x330;
  279         sc->iosize = 0x0cf;
  280 #endif
  281 
  282         DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx)\n",
  283             sc->dev.dv_xname, (long) sc->iobase,
  284             (long) sc->iobase + sc->iosize));
  285 
  286         if (tcic_isa_alloc_iobase && tcic_isa_alloc_iosize) {
  287                 sc->iobase = tcic_isa_alloc_iobase;
  288                 sc->iosize = tcic_isa_alloc_iosize;
  289 
  290                 DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx "
  291                     "(config override)\n", sc->dev.dv_xname, (long) sc->iobase,
  292                     (long) sc->iobase + sc->iosize));
  293         }
  294         sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
  295             tcic_intr, sc, sc->dev.dv_xname);
  296         if (sc->ih == NULL) {
  297                 printf("%s: can't establish interrupt\n", sc->dev.dv_xname);
  298                 return;
  299         }
  300 
  301         tcic_attach_sockets(sc);
  302 }
  303 
  304 void *
  305 tcic_isa_chip_intr_establish(pcmcia_chipset_handle_t pch,
  306     struct pcmcia_function *pf, int ipl, int (*fct)(void *), void *arg,
  307     char *xname)
  308 {
  309         struct tcic_handle *h = (struct tcic_handle *) pch;
  310         int irq, ist, val, reg;
  311         void *ih;
  312         int irqmap[] = {
  313             0, 0, 0, TCIC_SCF1_IRQ3, TCIC_SCF1_IRQ4, TCIC_SCF1_IRQ5,
  314             TCIC_SCF1_IRQ6, TCIC_SCF1_IRQ7, 0, TCIC_SCF1_IRQ9,
  315             TCIC_SCF1_IRQ10, TCIC_SCF1_IRQ11, TCIC_SCF1_IRQ12, 0,
  316             TCIC_SCF1_IRQ14, TCIC_SCF1_IRQ15
  317         };
  318 
  319         DPRINTF(("%s: tcic_isa_chip_intr_establish\n", h->sc->dev.dv_xname));
  320 
  321         /* XXX should we convert level to pulse? -chb  */
  322         if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
  323                 ist = IST_LEVEL;
  324         else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
  325                 ist = IST_PULSE;
  326         else
  327                 ist = IST_LEVEL;
  328 
  329         if (isa_intr_alloc(h->sc->intr_est,
  330             h->sc->validirqs & tcic_isa_intr_alloc_mask, ist, &irq))
  331                 return (NULL);
  332         if ((ih = isa_intr_establish(h->sc->intr_est, irq, ist, ipl,
  333             fct, arg, h->pcmcia->dv_xname)) == NULL)
  334                 return (NULL);
  335 
  336         DPRINTF(("%s: intr established\n", h->sc->dev.dv_xname));
  337 
  338         h->ih_irq = irq;
  339 
  340         reg = TCIC_IR_SCF1_N(h->sock);
  341         val = (tcic_read_ind_2(h, reg) & (~TCIC_SCF1_IRQ_MASK)) | irqmap[irq];
  342         tcic_write_ind_2(h, reg, val);
  343 
  344         printf(" irq %d", irq);
  345         return (ih);
  346 }
  347 
  348 void 
  349 tcic_isa_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih)
  350 {
  351         struct tcic_handle *h = (struct tcic_handle *) pch;
  352         int val, reg;
  353 
  354         DPRINTF(("%s: tcic_isa_chip_intr_disestablish\n", h->sc->dev.dv_xname));
  355 
  356         h->ih_irq = 0;
  357 
  358         reg = TCIC_IR_SCF1_N(h->sock);
  359         val = tcic_read_ind_2(h, reg);
  360         val &= ~TCIC_SCF1_IRQ_MASK;
  361         tcic_write_ind_2(h, reg, val);
  362 
  363         isa_intr_disestablish(h->sc->intr_est, ih);
  364 }
  365 
  366 const char *
  367 tcic_isa_chip_intr_string(pcmcia_chipset_handle_t pch, void *ih)
  368 {
  369         struct tcic_handle *h = (struct tcic_handle *) pch;
  370         static char irqstr[64];
  371 
  372         if (ih == NULL)
  373                 snprintf(irqstr, sizeof(irqstr), "couldn't establish interrupt");
  374         else
  375                 snprintf(irqstr, sizeof(irqstr), "irq %d", h->ih_irq);
  376         return (irqstr);
  377 }

Cache object: b79883d81fe599a77c59082466e361a0


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