The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/isa/tcom.c

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    1 /*      $NetBSD: tcom.c,v 1.7 2003/01/01 00:10:21 thorpej Exp $ */
    2 
    3 /*-
    4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Eric S. Hvozda.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *        This product includes software developed by the NetBSD
   21  *        Foundation, Inc. and its contributors.
   22  * 4. Neither the name of The NetBSD Foundation nor the names of its
   23  *    contributors may be used to endorse or promote products derived
   24  *    from this software without specific prior written permission.
   25  *
   26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   36  * POSSIBILITY OF SUCH DAMAGE.
   37  */
   38 
   39 /*
   40  * Copyright (c) 1998 Jukka Marin.  All rights reserved.
   41  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
   42  * Copyright (c) 1995 Charles Hannum.  All rights reserved.
   43  *
   44  * This code is derived from public-domain software written by
   45  * Roland McGrath.
   46  *
   47  * Redistribution and use in source and binary forms, with or without
   48  * modification, are permitted provided that the following conditions
   49  * are met:
   50  * 1. Redistributions of source code must retain the above copyright
   51  *    notice, this list of conditions and the following disclaimer.
   52  * 2. Redistributions in binary form must reproduce the above copyright
   53  *    notice, this list of conditions and the following disclaimer in the
   54  *    documentation and/or other materials provided with the distribution.
   55  * 3. All advertising materials mentioning features or use of this software
   56  *    must display the following acknowledgement:
   57  *      This product includes software developed by Charles Hannum.
   58  * 4. The name of the author may not be used to endorse or promote products
   59  *    derived from this software without specific prior written permission.
   60  *
   61  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   62  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   63  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   64  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   65  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   66  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   67  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   68  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   69  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   70  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   71  */
   72 
   73 /*
   74  * NOTE: This driver has been tested in TCOM "UNIX mode" with base address
   75  * set to 0x100 or 0x200 and baud rate jumpers to "normal".  This code
   76  * does NOT know about the 2x and 4x baud rates available on TCOM cards.
   77  */
   78 
   79 #include <sys/cdefs.h>
   80 __KERNEL_RCSID(0, "$NetBSD: tcom.c,v 1.7 2003/01/01 00:10:21 thorpej Exp $");
   81 
   82 #include <sys/param.h>
   83 #include <sys/systm.h>
   84 #include <sys/device.h>
   85 #include <sys/termios.h>
   86 
   87 #include <machine/bus.h>
   88 #include <machine/intr.h>
   89 
   90 #include <dev/ic/comreg.h>
   91 #include <dev/ic/comvar.h>
   92 
   93 #include <dev/isa/isavar.h>
   94 #include <dev/isa/com_multi.h>
   95 
   96 #define NSLAVES 8                       /* TCOM cards have 4 or 8 UARTs */
   97 #define STATUS_OFFSET   0x40            /* offset from board base address */
   98 #define STATUS_SIZE     8               /* 8 bytes reserved for irq status */
   99 
  100 struct tcom_softc {
  101         struct device sc_dev;
  102         void *sc_ih;
  103 
  104         bus_space_tag_t sc_iot;
  105         int sc_iobase;
  106 
  107         int sc_alive;                   /* mask of slave units attached */
  108         void *sc_slaves[NSLAVES];       /* com device unit numbers */
  109         bus_space_handle_t sc_slaveioh[NSLAVES];
  110         bus_space_handle_t sc_statusioh;
  111 };
  112 
  113 int tcomprobe __P((struct device *, struct cfdata *, void *));
  114 void tcomattach __P((struct device *, struct device *, void *));
  115 int tcomintr __P((void *));
  116 int tcomprint __P((void *, const char *));
  117 
  118 CFATTACH_DECL(tcom, sizeof(struct tcom_softc),
  119     tcomprobe, tcomattach, NULL, NULL);
  120 
  121 int
  122 tcomprobe(parent, self, aux)
  123         struct device *parent;
  124         struct cfdata *self;
  125         void *aux;
  126 {
  127         struct isa_attach_args *ia = aux;
  128         bus_space_tag_t iot = ia->ia_iot;
  129         bus_space_handle_t ioh;
  130         int i, iobase, rv = 1;
  131 
  132         /*
  133          * Do the normal com probe for the first UART and assume
  134          * its presence, and the ability to map the other UARTS,
  135          * means there is a multiport board there.
  136          * XXX Needs more robustness.
  137          */
  138 
  139         if (ia->ia_nio < 1)
  140                 return (0);
  141         if (ia->ia_nirq < 1)
  142                 return (1);
  143 
  144         if (ISA_DIRECT_CONFIG(ia))
  145                 return (0);
  146 
  147         /* Disallow wildcarded i/o address. */
  148         if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT)
  149                 return (0);
  150         if (ia->ia_irq[0].ir_irq == ISACF_IRQ_DEFAULT)
  151                 return (0);
  152 
  153         /* if the first port is in use as console, then it. */
  154         if (com_is_console(iot, ia->ia_io[0].ir_addr, 0))
  155                 goto checkmappings;
  156 
  157         if (bus_space_map(iot, ia->ia_io[0].ir_addr, COM_NPORTS, 0, &ioh)) {
  158                 rv = 0;
  159                 goto out;
  160         }
  161         rv = comprobe1(iot, ioh);
  162         bus_space_unmap(iot, ioh, COM_NPORTS);
  163         if (rv == 0)
  164                 goto out;
  165 
  166 checkmappings:
  167         for (i = 1, iobase = ia->ia_io[0].ir_addr; i < NSLAVES; i++) {
  168                 iobase += COM_NPORTS;
  169 
  170                 if (com_is_console(iot, iobase, 0))
  171                         continue;
  172 
  173                 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
  174                         rv = 0;
  175                         goto out;
  176                 }
  177                 bus_space_unmap(iot, ioh, COM_NPORTS);
  178         }
  179 
  180 out:
  181         if (rv) {
  182                 ia->ia_nio = 1;
  183                 ia->ia_io[0].ir_size = NSLAVES * COM_NPORTS;
  184 
  185                 ia->ia_nirq = 1;
  186 
  187                 ia->ia_niomem = 0;
  188                 ia->ia_ndrq = 0;
  189         }
  190         return (rv);
  191 }
  192 
  193 int
  194 tcomprint(aux, pnp)
  195         void *aux;
  196         const char *pnp;
  197 {
  198         struct commulti_attach_args *ca = aux;
  199 
  200         if (pnp)
  201                 aprint_normal("com at %s", pnp);
  202         aprint_normal(" slave %d", ca->ca_slave);
  203         return (UNCONF);
  204 }
  205 
  206 void
  207 tcomattach(parent, self, aux)
  208         struct device *parent, *self;
  209         void *aux;
  210 {
  211         struct tcom_softc *sc = (void *)self;
  212         struct isa_attach_args *ia = aux;
  213         struct commulti_attach_args ca;
  214         bus_space_tag_t iot = ia->ia_iot;
  215         int i, iobase;
  216 
  217         printf("\n");
  218 
  219         sc->sc_iot = ia->ia_iot;
  220         sc->sc_iobase = ia->ia_io[0].ir_addr;
  221 
  222         for (i = 0; i < NSLAVES; i++) {
  223                 iobase = sc->sc_iobase + i * COM_NPORTS;
  224                 if (!com_is_console(iot, iobase, &sc->sc_slaveioh[i]) &&
  225                     bus_space_map(iot, iobase, COM_NPORTS, 0,
  226                         &sc->sc_slaveioh[i])) {
  227                         printf("%s: can't map i/o space for slave %d\n",
  228                              sc->sc_dev.dv_xname, i);
  229                         return;
  230                 }
  231         }
  232 
  233         if (bus_space_map(iot, sc->sc_iobase + STATUS_OFFSET, STATUS_SIZE, 0,
  234             &sc->sc_statusioh)) {
  235                 printf("%s: can't map status space\n", sc->sc_dev.dv_xname);
  236                 return;
  237         }
  238 
  239         for (i = 0; i < NSLAVES; i++) {
  240                 ca.ca_slave = i;
  241                 ca.ca_iot = sc->sc_iot;
  242                 ca.ca_ioh = sc->sc_slaveioh[i];
  243                 ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
  244                 ca.ca_noien = 0;
  245 
  246                 sc->sc_slaves[i] = config_found(self, &ca, tcomprint);
  247                 if (sc->sc_slaves[i] != NULL)
  248                         sc->sc_alive |= 1 << i;
  249         }
  250 
  251         sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq,
  252             IST_EDGE, IPL_SERIAL, tcomintr, sc);
  253 }
  254 
  255 int
  256 tcomintr(arg)
  257         void *arg;
  258 {
  259         struct tcom_softc *sc = arg;
  260         bus_space_tag_t iot = sc->sc_iot;
  261         int alive = sc->sc_alive;
  262         int bits;
  263 
  264         bits = ~bus_space_read_1(iot, sc->sc_statusioh, 0) & alive;
  265         if (bits == 0)
  266                 return (0);
  267 
  268         for (;;) {
  269 #define TRY(n) \
  270                 if (bits & (1 << (n))) \
  271                         comintr(sc->sc_slaves[n]);
  272                 TRY(0);
  273                 TRY(1);
  274                 TRY(2);
  275                 TRY(3);
  276                 TRY(4);
  277                 TRY(5);
  278                 TRY(6);
  279                 TRY(7);
  280 #undef TRY
  281                 bits = ~bus_space_read_1(iot, sc->sc_statusioh, 0) & alive;
  282                 if (bits == 0)
  283                         return (1);
  284         }
  285 }

Cache object: 784e0c931d618c2df157b740a564a8c8


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