1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
3 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23 * The full GNU General Public License is included in this distribution
24 * in the file called LICENSE.GPL.
25 *
26 * BSD LICENSE
27 *
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 *
35 * * Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * * Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in
39 * the documentation and/or other materials provided with the
40 * distribution.
41 *
42 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53 *
54 * $FreeBSD$
55 */
56 #ifndef _SCIC_SDS_PORT_REGISTERS_H_
57 #define _SCIC_SDS_PORT_REGISTERS_H_
58
59 /**
60 * @file
61 *
62 * @brief This file contains a set of macros that assist in reading the SCU
63 * hardware registers.
64 */
65
66 #ifdef __cplusplus
67 extern "C" {
68 #endif // __cplusplus
69
70 /**
71 * Macro to read the port task scheduler register associated with this port
72 * object
73 */
74 #define scu_port_task_scheduler_read(port, reg) \
75 scu_register_read( \
76 scic_sds_port_get_controller(port), \
77 (port)->port_task_scheduler_registers->reg \
78 )
79
80 /**
81 * Macro to write the port task scheduler register associated with this
82 * port object
83 */
84 #define scu_port_task_scheduler_write(port, reg, value) \
85 scu_register_write( \
86 scic_sds_port_get_controller(port), \
87 (port)->port_task_scheduler_registers->reg, \
88 (value) \
89 )
90
91 #define scu_port_viit_register_write(port, reg, value) \
92 scu_register_write( \
93 scic_sds_port_get_controller(port), \
94 (port)->viit_registers->reg, \
95 (value) \
96 )
97
98 //****************************************************************************
99 //* Port Task Scheduler registers controlled by the port object
100 //****************************************************************************
101
102 /**
103 * Macro to read the port task scheduler control register
104 */
105 #define SCU_PTSxCR_READ(port) \
106 scu_port_task_scheduler_read(port, control)
107
108 /**
109 * Macro to write the port task scheduler control regsister
110 */
111 #define SCU_PTSxCR_WRITE(port, value) \
112 scu_port_task_scheduler_write(port, control, value)
113
114 //****************************************************************************
115 //* Port PE Configuration registers
116 //****************************************************************************
117
118 /**
119 * Macro to write the PE Port Configuration Register
120 */
121 #define SCU_PCSPExCR_WRITE(port, phy_id, value) \
122 scu_register_write( \
123 scic_sds_port_get_controller(port), \
124 (port)->port_pe_configuration_register[phy_id], \
125 (value) \
126 )
127
128 /**
129 * Macro to read the PE Port Configuration Regsiter
130 */
131 #define SCU_PCSPExCR_READ(port, phy_id) \
132 scu_register_read( \
133 scic_sds_port_get_controller(port), \
134 (port)->port_pe_configuration_register[phy_id] \
135 )
136
137 #ifdef __cplusplus
138 }
139 #endif // __cplusplus
140
141 #endif // _SCIC_SDS_PORT_REGISTERS_H_
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