Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/isp/isp_freebsd.h
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1 /* $FreeBSD$ */ 2 /*- 3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 4 * 5 * Qlogic ISP SCSI Host Adapter FreeBSD Wrapper Definitions 6 * 7 * Copyright (c) 2009-2020 Alexander Motin <mav@FreeBSD.org> 8 * Copyright (c) 1997-2008 by Matthew Jacob 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 #ifndef _ISP_FREEBSD_H 33 #define _ISP_FREEBSD_H 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/endian.h> 38 #include <sys/jail.h> 39 #include <sys/lock.h> 40 #include <sys/kernel.h> 41 #include <sys/queue.h> 42 #include <sys/malloc.h> 43 #include <sys/mutex.h> 44 #include <sys/condvar.h> 45 #include <sys/rman.h> 46 #include <sys/sysctl.h> 47 48 #include <sys/proc.h> 49 #include <sys/bus.h> 50 #include <sys/taskqueue.h> 51 52 #include <machine/bus.h> 53 #include <machine/cpu.h> 54 #include <machine/stdarg.h> 55 56 #include <cam/cam.h> 57 #include <cam/cam_debug.h> 58 #include <cam/cam_ccb.h> 59 #include <cam/cam_sim.h> 60 #include <cam/cam_xpt.h> 61 #include <cam/cam_xpt_sim.h> 62 #include <cam/cam_debug.h> 63 #include <cam/scsi/scsi_all.h> 64 #include <cam/scsi/scsi_message.h> 65 66 #include "opt_ddb.h" 67 #include "opt_isp.h" 68 69 #define ISP_PLATFORM_VERSION_MAJOR 7 70 #define ISP_PLATFORM_VERSION_MINOR 10 71 72 #define ISP_IFLAGS INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE 73 74 #ifdef ISP_TARGET_MODE 75 #define N_XCMDS 64 76 #define XCMD_SIZE 512 77 struct ispsoftc; 78 typedef union isp_ecmd { 79 union isp_ecmd * next; 80 uint8_t data[XCMD_SIZE]; 81 } isp_ecmd_t; 82 isp_ecmd_t * isp_get_ecmd(struct ispsoftc *); 83 void isp_put_ecmd(struct ispsoftc *, isp_ecmd_t *); 84 85 #define ATPDPSIZE 4096 86 #define ATPDPHASHSIZE 32 87 #define ATPDPHASH(x) ((((x) >> 24) ^ ((x) >> 16) ^ ((x) >> 8) ^ (x)) & \ 88 ((ATPDPHASHSIZE) - 1)) 89 90 #include <dev/isp/isp_target.h> 91 typedef struct atio_private_data { 92 LIST_ENTRY(atio_private_data) next; 93 uint32_t orig_datalen; 94 uint32_t bytes_xfered; 95 uint32_t bytes_in_transit; 96 uint32_t tag; /* typically f/w RX_ID */ 97 lun_id_t lun; 98 uint32_t nphdl; 99 uint32_t sid; 100 uint32_t did; 101 uint16_t rxid; /* wire rxid */ 102 uint16_t oxid; /* wire oxid */ 103 uint16_t word3; /* PRLI word3 params */ 104 uint16_t ctcnt; /* number of CTIOs currently active */ 105 uint8_t seqno; /* CTIO sequence number */ 106 uint32_t 107 srr_notify_rcvd : 1, 108 cdb0 : 8, 109 sendst : 1, 110 dead : 1, 111 tattr : 3, 112 state : 3; 113 void * ests; 114 /* 115 * The current SRR notify copy 116 */ 117 uint8_t srr[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 118 void * srr_ccb; 119 uint32_t nsrr; 120 } atio_private_data_t; 121 #define ATPD_STATE_FREE 0 122 #define ATPD_STATE_ATIO 1 123 #define ATPD_STATE_CAM 2 124 #define ATPD_STATE_CTIO 3 125 #define ATPD_STATE_LAST_CTIO 4 126 #define ATPD_STATE_PDON 5 127 128 #define ATPD_CCB_OUTSTANDING 16 129 130 #define ATPD_SEQ_MASK 0x7f 131 #define ATPD_SEQ_NOTIFY_CAM 0x80 132 #define ATPD_SET_SEQNO(hdrp, atp) ((isphdr_t *)hdrp)->rqs_seqno &= ~ATPD_SEQ_MASK, ((isphdr_t *)hdrp)->rqs_seqno |= (atp)->seqno 133 #define ATPD_GET_SEQNO(hdrp) (((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_MASK) 134 #define ATPD_GET_NCAM(hdrp) ((((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_NOTIFY_CAM) != 0) 135 136 typedef struct inot_private_data inot_private_data_t; 137 struct inot_private_data { 138 STAILQ_ENTRY(inot_private_data) next; 139 isp_notify_t nt; 140 uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 141 uint32_t tag_id, seq_id; 142 }; 143 typedef struct isp_timed_notify_ack { 144 void *isp; 145 void *not; 146 uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 147 struct callout timer; 148 } isp_tna_t; 149 150 STAILQ_HEAD(ntpdlist, inot_private_data); 151 typedef struct tstate { 152 SLIST_ENTRY(tstate) next; 153 lun_id_t ts_lun; 154 struct ccb_hdr_slist atios; 155 struct ccb_hdr_slist inots; 156 struct ntpdlist restart_queue; 157 } tstate_t; 158 159 #define LUN_HASH_SIZE 32 160 #define LUN_HASH_FUNC(lun) ((lun) & (LUN_HASH_SIZE - 1)) 161 162 #endif 163 164 /* 165 * Per command info. 166 */ 167 struct isp_pcmd { 168 struct isp_pcmd * next; 169 bus_dmamap_t dmap; /* dma map for this command */ 170 struct callout wdog; /* watchdog timer */ 171 uint32_t datalen; /* data length for this command (target mode only) */ 172 }; 173 #define ISP_PCMD(ccb) (ccb)->ccb_h.spriv_ptr1 174 #define PISP_PCMD(ccb) ((struct isp_pcmd *)ISP_PCMD(ccb)) 175 176 /* 177 * Per nexus info. 178 */ 179 struct isp_nexus { 180 uint64_t lun; /* LUN for target */ 181 uint32_t tgt; /* TGT for target */ 182 uint8_t crnseed; /* next command reference number */ 183 struct isp_nexus *next; 184 }; 185 #define NEXUS_HASH_WIDTH 32 186 #define INITIAL_NEXUS_COUNT MAX_FC_TARG 187 #define NEXUS_HASH(tgt, lun) ((tgt + lun) % NEXUS_HASH_WIDTH) 188 189 /* 190 * Per channel information 191 */ 192 SLIST_HEAD(tslist, tstate); 193 TAILQ_HEAD(isp_ccbq, ccb_hdr); 194 LIST_HEAD(atpdlist, atio_private_data); 195 196 struct isp_fc { 197 struct cam_sim *sim; 198 struct cam_path *path; 199 struct ispsoftc *isp; 200 struct proc *kproc; 201 bus_dmamap_t scmap; 202 uint64_t def_wwpn; 203 uint64_t def_wwnn; 204 time_t loop_down_time; 205 int loop_down_limit; 206 int gone_device_time; 207 /* 208 * Per target/lun info- just to keep a per-ITL nexus crn count 209 */ 210 struct isp_nexus *nexus_hash[NEXUS_HASH_WIDTH]; 211 struct isp_nexus *nexus_free_list; 212 uint32_t 213 simqfrozen : 3, 214 default_id : 8, 215 def_role : 2, /* default role */ 216 loop_seen_once : 1, 217 fcbsy : 1, 218 ready : 1; 219 struct callout gdt; /* gone device timer */ 220 struct task gtask; 221 #ifdef ISP_TARGET_MODE 222 struct tslist lun_hash[LUN_HASH_SIZE]; 223 struct isp_ccbq waitq; /* waiting CCBs */ 224 struct ntpdlist ntfree; 225 inot_private_data_t ntpool[ATPDPSIZE]; 226 struct atpdlist atfree; 227 struct atpdlist atused[ATPDPHASHSIZE]; 228 atio_private_data_t atpool[ATPDPSIZE]; 229 #if defined(DEBUG) 230 unsigned int inject_lost_data_frame; 231 #endif 232 #endif 233 int num_threads; 234 }; 235 236 struct isposinfo { 237 /* 238 * Linkage, locking, and identity 239 */ 240 struct mtx lock; 241 device_t dev; 242 struct cdev * cdev; 243 struct cam_devq * devq; 244 245 /* 246 * Firmware pointer 247 */ 248 const struct firmware * fw; 249 250 /* 251 * DMA related stuff 252 */ 253 struct resource * regs; 254 struct resource * regs2; 255 bus_dma_tag_t dmat; 256 bus_dma_tag_t reqdmat; 257 bus_dma_tag_t respdmat; 258 bus_dma_tag_t atiodmat; 259 bus_dma_tag_t iocbdmat; 260 bus_dma_tag_t scdmat; 261 bus_dmamap_t reqmap; 262 bus_dmamap_t respmap; 263 bus_dmamap_t atiomap; 264 bus_dmamap_t iocbmap; 265 266 /* 267 * Command and transaction related related stuff 268 */ 269 struct isp_pcmd * pcmd_pool; 270 struct isp_pcmd * pcmd_free; 271 272 struct callout tmo; /* general timer */ 273 274 /* 275 * misc- needs to be sorted better XXXXXX 276 */ 277 int framesize; 278 279 #ifdef ISP_TARGET_MODE 280 bus_dma_tag_t ecmd_dmat; 281 bus_dmamap_t ecmd_map; 282 bus_addr_t ecmd_dma; 283 isp_ecmd_t * ecmd_base; 284 isp_ecmd_t * ecmd_free; 285 #endif 286 287 /* 288 * Per-channel storage. 289 */ 290 struct isp_fc *fc; 291 292 int is_exiting; 293 }; 294 #define ISP_FC_PC(isp, chan) (&(isp)->isp_osinfo.fc[(chan)]) 295 296 #define FCP_NEXT_CRN isp_fcp_next_crn 297 #define isp_lock isp_osinfo.lock 298 #define isp_regs isp_osinfo.regs 299 #define isp_regs2 isp_osinfo.regs2 300 301 /* 302 * Locking macros... 303 */ 304 #define ISP_LOCK(isp) mtx_lock(&(isp)->isp_lock) 305 #define ISP_UNLOCK(isp) mtx_unlock(&(isp)->isp_lock) 306 #define ISP_ASSERT_LOCKED(isp) mtx_assert(&(isp)->isp_lock, MA_OWNED) 307 308 /* 309 * Required Macros/Defines 310 */ 311 #define ISP_FC_SCRLEN 0x1000 312 313 #define ISP_MEMZERO(a, b) memset(a, 0, b) 314 #define ISP_MEMCPY memcpy 315 #define ISP_SNPRINTF snprintf 316 #define ISP_DELAY(x) DELAY(x) 317 #define ISP_SLEEP(isp, x) msleep_sbt(&(isp)->isp_osinfo.is_exiting, \ 318 &(isp)->isp_lock, 0, "isp_sleep", (x) * SBT_1US, 0, 0) 319 320 #define ISP_MIN imin 321 322 #ifndef DIAGNOSTIC 323 #define ISP_INLINE __inline 324 #else 325 #define ISP_INLINE 326 #endif 327 328 #define ISP_DMASETUP(isp, xs, req) isp_dmasetup(isp, xs, req) 329 #define ISP_DMAFREE(isp, xs) isp_dmafree(isp, xs) 330 331 #define NANOTIME_T struct timespec 332 #define GET_NANOTIME nanotime 333 #define GET_NANOSEC(x) ((x)->tv_sec * 1000000000 + (x)->tv_nsec) 334 #define NANOTIME_SUB isp_nanotime_sub 335 336 #define MEMORYBARRIER(isp, type, offset, size, chan) \ 337 switch (type) { \ 338 case SYNC_REQUEST: \ 339 bus_dmamap_sync(isp->isp_osinfo.reqdmat, \ 340 isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \ 341 break; \ 342 case SYNC_RESULT: \ 343 bus_dmamap_sync(isp->isp_osinfo.respdmat, \ 344 isp->isp_osinfo.respmap, BUS_DMASYNC_POSTREAD); \ 345 break; \ 346 case SYNC_SFORDEV: \ 347 { \ 348 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 349 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 350 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \ 351 break; \ 352 } \ 353 case SYNC_SFORCPU: \ 354 { \ 355 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 356 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 357 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \ 358 break; \ 359 } \ 360 case SYNC_REG: \ 361 bus_barrier(isp->isp_osinfo.regs, offset, size, \ 362 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); \ 363 break; \ 364 case SYNC_ATIOQ: \ 365 bus_dmamap_sync(isp->isp_osinfo.atiodmat, \ 366 isp->isp_osinfo.atiomap, BUS_DMASYNC_POSTREAD); \ 367 break; \ 368 case SYNC_IFORDEV: \ 369 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 370 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \ 371 break; \ 372 case SYNC_IFORCPU: \ 373 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 374 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \ 375 break; \ 376 default: \ 377 break; \ 378 } 379 380 #define MEMORYBARRIERW(isp, type, offset, size, chan) \ 381 switch (type) { \ 382 case SYNC_REQUEST: \ 383 bus_dmamap_sync(isp->isp_osinfo.reqdmat, \ 384 isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \ 385 break; \ 386 case SYNC_SFORDEV: \ 387 { \ 388 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 389 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 390 BUS_DMASYNC_PREWRITE); \ 391 break; \ 392 } \ 393 case SYNC_SFORCPU: \ 394 { \ 395 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 396 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 397 BUS_DMASYNC_POSTWRITE); \ 398 break; \ 399 } \ 400 case SYNC_REG: \ 401 bus_barrier(isp->isp_osinfo.regs, offset, size, \ 402 BUS_SPACE_BARRIER_WRITE); \ 403 break; \ 404 case SYNC_IFORDEV: \ 405 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 406 BUS_DMASYNC_PREWRITE); \ 407 break; \ 408 case SYNC_IFORCPU: \ 409 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 410 BUS_DMASYNC_POSTWRITE); \ 411 break; \ 412 default: \ 413 break; \ 414 } 415 416 #define FC_SCRATCH_ACQUIRE isp_fc_scratch_acquire 417 #define FC_SCRATCH_RELEASE(isp, chan) ISP_FC_PC(isp, chan)->fcbsy = 0 418 419 #ifndef SCSI_GOOD 420 #define SCSI_GOOD SCSI_STATUS_OK 421 #endif 422 #ifndef SCSI_CHECK 423 #define SCSI_CHECK SCSI_STATUS_CHECK_COND 424 #endif 425 #ifndef SCSI_BUSY 426 #define SCSI_BUSY SCSI_STATUS_BUSY 427 #endif 428 #ifndef SCSI_QFULL 429 #define SCSI_QFULL SCSI_STATUS_QUEUE_FULL 430 #endif 431 432 #define XS_T struct ccb_scsiio 433 #define XS_DMA_ADDR_T bus_addr_t 434 #define XS_GET_DMA64_SEG(a, b, c) \ 435 { \ 436 ispds64_t *d = a; \ 437 bus_dma_segment_t *e = b; \ 438 uint32_t f = c; \ 439 e += f; \ 440 d->ds_base = DMA_LO32(e->ds_addr); \ 441 d->ds_basehi = DMA_HI32(e->ds_addr); \ 442 d->ds_count = e->ds_len; \ 443 } 444 #define XS_ISP(ccb) cam_sim_softc(xpt_path_sim((ccb)->ccb_h.path)) 445 #define XS_CHANNEL(ccb) cam_sim_bus(xpt_path_sim((ccb)->ccb_h.path)) 446 #define XS_TGT(ccb) (ccb)->ccb_h.target_id 447 #define XS_LUN(ccb) (ccb)->ccb_h.target_lun 448 449 #define XS_CDBP(ccb) \ 450 (((ccb)->ccb_h.flags & CAM_CDB_POINTER)? \ 451 (ccb)->cdb_io.cdb_ptr : (ccb)->cdb_io.cdb_bytes) 452 453 #define XS_CDBLEN(ccb) (ccb)->cdb_len 454 #define XS_XFRLEN(ccb) (ccb)->dxfer_len 455 #define XS_XFRIN(ccb) (((ccb)->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 456 #define XS_XFROUT(ccb) (((ccb)->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 457 #define XS_TIME(ccb) \ 458 (((ccb)->ccb_h.timeout > 0xffff * 1000 - 999) ? 0 : \ 459 (((ccb)->ccb_h.timeout + 999) / 1000)) 460 #define XS_GET_RESID(ccb) (ccb)->resid 461 #define XS_SET_RESID(ccb, r) (ccb)->resid = r 462 #define XS_STSP(ccb) (&(ccb)->scsi_status) 463 #define XS_SNSP(ccb) (&(ccb)->sense_data) 464 465 #define XS_TOT_SNSLEN(ccb) ccb->sense_len 466 #define XS_CUR_SNSLEN(ccb) (ccb->sense_len - ccb->sense_resid) 467 468 #define XS_SNSKEY(ccb) (scsi_get_sense_key(&(ccb)->sense_data, \ 469 ccb->sense_len - ccb->sense_resid, 1)) 470 471 #define XS_SNSASC(ccb) (scsi_get_asc(&(ccb)->sense_data, \ 472 ccb->sense_len - ccb->sense_resid, 1)) 473 474 #define XS_SNSASCQ(ccb) (scsi_get_ascq(&(ccb)->sense_data, \ 475 ccb->sense_len - ccb->sense_resid, 1)) 476 #define XS_TAG_P(ccb) \ 477 (((ccb)->ccb_h.flags & CAM_TAG_ACTION_VALID) && \ 478 (ccb)->tag_action != CAM_TAG_ACTION_NONE) 479 480 #define XS_TAG_TYPE(ccb) \ 481 ((ccb->tag_action == MSG_HEAD_OF_QUEUE_TASK)? FCP_CMND_TASK_ATTR_HEAD:\ 482 ((ccb->tag_action == MSG_ORDERED_TASK) ? FCP_CMND_TASK_ATTR_ORDERED :\ 483 ((ccb->tag_action == MSG_ACA_TASK) ? FCP_CMND_TASK_ATTR_ACA : \ 484 FCP_CMND_TASK_ATTR_SIMPLE))) 485 486 #define XS_PRIORITY(ccb) (ccb)->priority 487 488 #define XS_SETERR(ccb, v) (ccb)->ccb_h.status &= ~CAM_STATUS_MASK, \ 489 (ccb)->ccb_h.status |= v 490 491 # define HBA_NOERROR CAM_REQ_INPROG 492 # define HBA_BOTCH CAM_UNREC_HBA_ERROR 493 # define HBA_CMDTIMEOUT CAM_CMD_TIMEOUT 494 # define HBA_SELTIMEOUT CAM_SEL_TIMEOUT 495 # define HBA_TGTBSY CAM_SCSI_STATUS_ERROR 496 # define HBA_REQINVAL CAM_REQ_INVALID 497 # define HBA_BUSRESET CAM_SCSI_BUS_RESET 498 # define HBA_ABORTED CAM_REQ_ABORTED 499 # define HBA_DATAOVR CAM_DATA_RUN_ERR 500 # define HBA_ARQFAIL CAM_AUTOSENSE_FAIL 501 502 503 #define XS_ERR(ccb) ((ccb)->ccb_h.status & CAM_STATUS_MASK) 504 505 #define XS_NOERR(ccb) (((ccb)->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) 506 507 #define XS_INITERR(ccb) XS_SETERR(ccb, CAM_REQ_INPROG), ccb->sense_resid = ccb->sense_len 508 509 #define XS_SAVE_SENSE(xs, sp, len) do { \ 510 uint32_t amt = min(len, (xs)->sense_len); \ 511 memcpy(&(xs)->sense_data, sp, amt); \ 512 (xs)->sense_resid = (xs)->sense_len - amt; \ 513 (xs)->ccb_h.status |= CAM_AUTOSNS_VALID; \ 514 } while (0) 515 516 #define XS_SENSE_APPEND(xs, sp, len) do { \ 517 uint8_t *ptr = (uint8_t *)(&(xs)->sense_data) + \ 518 ((xs)->sense_len - (xs)->sense_resid); \ 519 uint32_t amt = min((len), (xs)->sense_resid); \ 520 memcpy(ptr, sp, amt); \ 521 (xs)->sense_resid -= amt; \ 522 } while (0) 523 524 #define XS_SENSE_VALID(xs) (((xs)->ccb_h.status & CAM_AUTOSNS_VALID) != 0) 525 526 #define DEFAULT_FRAMESIZE(isp) isp->isp_osinfo.framesize 527 528 #define DEFAULT_ROLE(isp, chan) ISP_FC_PC(isp, chan)->def_role 529 530 #define DEFAULT_LOOPID(isp, chan) ISP_FC_PC(isp, chan)->default_id 531 532 #define DEFAULT_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 0, 1) 533 #define DEFAULT_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 0, 0) 534 #define ACTIVE_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 1, 1) 535 #define ACTIVE_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 1, 0) 536 537 538 #if BYTE_ORDER == BIG_ENDIAN 539 #define ISP_IOXPUT_8(isp, s, d) *(d) = s 540 #define ISP_IOXPUT_16(isp, s, d) *(d) = bswap16(s) 541 #define ISP_IOXPUT_32(isp, s, d) *(d) = bswap32(s) 542 #define ISP_IOXGET_8(isp, s, d) d = (*((uint8_t *)s)) 543 #define ISP_IOXGET_16(isp, s, d) d = bswap16(*((uint16_t *)s)) 544 #define ISP_IOXGET_32(isp, s, d) d = bswap32(*((uint32_t *)s)) 545 #define ISP_SWIZZLE_NVRAM_WORD(isp, rp) *rp = bswap16(*rp) 546 #define ISP_SWIZZLE_NVRAM_LONG(isp, rp) *rp = bswap32(*rp) 547 548 #define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)s)) 549 #define ISP_IOZGET_16(isp, s, d) d = (*((uint16_t *)s)) 550 #define ISP_IOZGET_32(isp, s, d) d = (*((uint32_t *)s)) 551 #define ISP_IOZPUT_8(isp, s, d) *(d) = s 552 #define ISP_IOZPUT_16(isp, s, d) *(d) = s 553 #define ISP_IOZPUT_32(isp, s, d) *(d) = s 554 555 #else 556 #define ISP_IOXPUT_8(isp, s, d) *(d) = s 557 #define ISP_IOXPUT_16(isp, s, d) *(d) = s 558 #define ISP_IOXPUT_32(isp, s, d) *(d) = s 559 #define ISP_IOXGET_8(isp, s, d) d = *(s) 560 #define ISP_IOXGET_16(isp, s, d) d = *(s) 561 #define ISP_IOXGET_32(isp, s, d) d = *(s) 562 #define ISP_SWIZZLE_NVRAM_WORD(isp, rp) 563 #define ISP_SWIZZLE_NVRAM_LONG(isp, rp) 564 565 #define ISP_IOZPUT_8(isp, s, d) *(d) = s 566 #define ISP_IOZPUT_16(isp, s, d) *(d) = bswap16(s) 567 #define ISP_IOZPUT_32(isp, s, d) *(d) = bswap32(s) 568 #define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)(s))) 569 #define ISP_IOZGET_16(isp, s, d) d = bswap16(*((uint16_t *)(s))) 570 #define ISP_IOZGET_32(isp, s, d) d = bswap32(*((uint32_t *)(s))) 571 #endif 572 573 #define ISP_SWAP16(isp, s) bswap16(s) 574 #define ISP_SWAP32(isp, s) bswap32(s) 575 576 /* 577 * Includes of common header files 578 */ 579 580 #include <dev/isp/ispreg.h> 581 #include <dev/isp/ispvar.h> 582 #include <dev/isp/ispmbox.h> 583 584 /* 585 * isp_osinfo definiitions && shorthand 586 */ 587 #define SIMQFRZ_RESOURCE 0x1 588 #define SIMQFRZ_LOOPDOWN 0x2 589 #define SIMQFRZ_TIMED 0x4 590 591 #define isp_dev isp_osinfo.dev 592 593 /* 594 * prototypes for isp_pci && isp_freebsd to share 595 */ 596 extern int isp_attach(ispsoftc_t *); 597 extern int isp_detach(ispsoftc_t *); 598 extern uint64_t isp_default_wwn(ispsoftc_t *, int, int, int); 599 600 /* 601 * driver global data 602 */ 603 extern int isp_announced; 604 extern int isp_loop_down_limit; 605 extern int isp_gone_device_time; 606 extern int isp_quickboot_time; 607 608 /* 609 * Platform Library Functions 610 */ 611 void isp_prt(ispsoftc_t *, int level, const char *, ...) __printflike(3, 4); 612 void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...) __printflike(4, 5); 613 uint64_t isp_nanotime_sub(struct timespec *, struct timespec *); 614 int isp_fc_scratch_acquire(ispsoftc_t *, int); 615 void isp_platform_intr(void *); 616 void isp_platform_intr_resp(void *); 617 void isp_platform_intr_atio(void *); 618 int isp_dmasetup(ispsoftc_t *, XS_T *, void *); 619 void isp_dmafree(ispsoftc_t *, struct ccb_scsiio *); 620 void isp_fcp_reset_crn(ispsoftc_t *, int, uint32_t, int); 621 int isp_fcp_next_crn(ispsoftc_t *, uint8_t *, XS_T *); 622 623 /* 624 * Platform Version specific defines 625 */ 626 #define ISP_PATH_PRT(i, l, p, ...) \ 627 if ((l) == ISP_LOGALL || ((l)& (i)->isp_dblev) != 0) { \ 628 xpt_print(p, __VA_ARGS__); \ 629 } 630 631 /* 632 * ISP General Library functions 633 */ 634 635 #include <dev/isp/isp_library.h> 636 637 #endif /* _ISP_FREEBSD_H */
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