The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/iwn/if_iwn.c

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    1 /*-
    2  * Copyright (c) 2007-2009
    3  *      Damien Bergamini <damien.bergamini@free.fr>
    4  * Copyright (c) 2008
    5  *      Benjamin Close <benjsc@FreeBSD.org>
    6  * Copyright (c) 2008 Sam Leffler, Errno Consulting
    7  *
    8  * Permission to use, copy, modify, and distribute this software for any
    9  * purpose with or without fee is hereby granted, provided that the above
   10  * copyright notice and this permission notice appear in all copies.
   11  *
   12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   16  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   17  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   18  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   19  */
   20 
   21 /*
   22  * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
   23  * adapters.
   24  */
   25 
   26 #include <sys/cdefs.h>
   27 __FBSDID("$FreeBSD: releng/8.4/sys/dev/iwn/if_iwn.c 236632 2012-06-05 19:59:02Z marius $");
   28 
   29 #include <sys/param.h>
   30 #include <sys/sockio.h>
   31 #include <sys/sysctl.h>
   32 #include <sys/mbuf.h>
   33 #include <sys/kernel.h>
   34 #include <sys/socket.h>
   35 #include <sys/systm.h>
   36 #include <sys/malloc.h>
   37 #include <sys/bus.h>
   38 #include <sys/rman.h>
   39 #include <sys/endian.h>
   40 #include <sys/firmware.h>
   41 #include <sys/limits.h>
   42 #include <sys/module.h>
   43 #include <sys/queue.h>
   44 #include <sys/taskqueue.h>
   45 
   46 #include <machine/bus.h>
   47 #include <machine/resource.h>
   48 #include <machine/clock.h>
   49 
   50 #include <dev/pci/pcireg.h>
   51 #include <dev/pci/pcivar.h>
   52 
   53 #include <net/bpf.h>
   54 #include <net/if.h>
   55 #include <net/if_arp.h>
   56 #include <net/ethernet.h>
   57 #include <net/if_dl.h>
   58 #include <net/if_media.h>
   59 #include <net/if_types.h>
   60 
   61 #include <netinet/in.h>
   62 #include <netinet/in_systm.h>
   63 #include <netinet/in_var.h>
   64 #include <netinet/if_ether.h>
   65 #include <netinet/ip.h>
   66 
   67 #include <net80211/ieee80211_var.h>
   68 #include <net80211/ieee80211_radiotap.h>
   69 #include <net80211/ieee80211_regdomain.h>
   70 #include <net80211/ieee80211_ratectl.h>
   71 
   72 #include <dev/iwn/if_iwnreg.h>
   73 #include <dev/iwn/if_iwnvar.h>
   74 
   75 struct iwn_ident {
   76         uint16_t        vendor;
   77         uint16_t        device;
   78         const char      *name;
   79 };
   80 
   81 static const struct iwn_ident iwn_ident_table[] = {
   82         { 0x8086, 0x0082, "Intel Centrino Advanced-N 6205"              },
   83         { 0x8086, 0x0083, "Intel Centrino Wireless-N 1000"              },
   84         { 0x8086, 0x0084, "Intel Centrino Wireless-N 1000"              },
   85         { 0x8086, 0x0085, "Intel Centrino Advanced-N 6205"              },
   86         { 0x8086, 0x0087, "Intel Centrino Advanced-N + WiMAX 6250"      },
   87         { 0x8086, 0x0089, "Intel Centrino Advanced-N + WiMAX 6250"      },
   88         { 0x8086, 0x008a, "Intel Centrino Wireless-N 1030"              },
   89         { 0x8086, 0x008b, "Intel Centrino Wireless-N 1030"              },
   90         { 0x8086, 0x0090, "Intel Centrino Advanced-N 6230"              },
   91         { 0x8086, 0x0091, "Intel Centrino Advanced-N 6230"              },
   92         { 0x8086, 0x0885, "Intel Centrino Wireless-N + WiMAX 6150"      },
   93         { 0x8086, 0x0886, "Intel Centrino Wireless-N + WiMAX 6150"      },
   94         { 0x8086, 0x0896, "Intel Centrino Wireless-N 130"               },
   95         { 0x8086, 0x0887, "Intel Centrino Wireless-N 130"               },
   96         { 0x8086, 0x08ae, "Intel Centrino Wireless-N 100"               },
   97         { 0x8086, 0x08af, "Intel Centrino Wireless-N 100"               },
   98         { 0x8086, 0x4229, "Intel Wireless WiFi Link 4965"               },
   99         { 0x8086, 0x422b, "Intel Centrino Ultimate-N 6300"              },
  100         { 0x8086, 0x422c, "Intel Centrino Advanced-N 6200"              },
  101         { 0x8086, 0x422d, "Intel Wireless WiFi Link 4965"               },
  102         { 0x8086, 0x4230, "Intel Wireless WiFi Link 4965"               },
  103         { 0x8086, 0x4232, "Intel WiFi Link 5100"                        },
  104         { 0x8086, 0x4233, "Intel Wireless WiFi Link 4965"               },
  105         { 0x8086, 0x4235, "Intel Ultimate N WiFi Link 5300"             },
  106         { 0x8086, 0x4236, "Intel Ultimate N WiFi Link 5300"             },
  107         { 0x8086, 0x4237, "Intel WiFi Link 5100"                        },
  108         { 0x8086, 0x4238, "Intel Centrino Ultimate-N 6300"              },
  109         { 0x8086, 0x4239, "Intel Centrino Advanced-N 6200"              },
  110         { 0x8086, 0x423a, "Intel WiMAX/WiFi Link 5350"                  },
  111         { 0x8086, 0x423b, "Intel WiMAX/WiFi Link 5350"                  },
  112         { 0x8086, 0x423c, "Intel WiMAX/WiFi Link 5150"                  },
  113         { 0x8086, 0x423d, "Intel WiMAX/WiFi Link 5150"                  },
  114         { 0, 0, NULL }
  115 };
  116 
  117 static int      iwn_probe(device_t);
  118 static int      iwn_attach(device_t);
  119 static int      iwn4965_attach(struct iwn_softc *, uint16_t);
  120 static int      iwn5000_attach(struct iwn_softc *, uint16_t);
  121 static void     iwn_radiotap_attach(struct iwn_softc *);
  122 static void     iwn_sysctlattach(struct iwn_softc *);
  123 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
  124                     const char name[IFNAMSIZ], int unit, int opmode,
  125                     int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
  126                     const uint8_t mac[IEEE80211_ADDR_LEN]);
  127 static void     iwn_vap_delete(struct ieee80211vap *);
  128 static int      iwn_detach(device_t);
  129 static int      iwn_shutdown(device_t);
  130 static int      iwn_suspend(device_t);
  131 static int      iwn_resume(device_t);
  132 static int      iwn_nic_lock(struct iwn_softc *);
  133 static int      iwn_eeprom_lock(struct iwn_softc *);
  134 static int      iwn_init_otprom(struct iwn_softc *);
  135 static int      iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
  136 static void     iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
  137 static int      iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
  138                     void **, bus_size_t, bus_size_t);
  139 static void     iwn_dma_contig_free(struct iwn_dma_info *);
  140 static int      iwn_alloc_sched(struct iwn_softc *);
  141 static void     iwn_free_sched(struct iwn_softc *);
  142 static int      iwn_alloc_kw(struct iwn_softc *);
  143 static void     iwn_free_kw(struct iwn_softc *);
  144 static int      iwn_alloc_ict(struct iwn_softc *);
  145 static void     iwn_free_ict(struct iwn_softc *);
  146 static int      iwn_alloc_fwmem(struct iwn_softc *);
  147 static void     iwn_free_fwmem(struct iwn_softc *);
  148 static int      iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
  149 static void     iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
  150 static void     iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
  151 static int      iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
  152                     int);
  153 static void     iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
  154 static void     iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
  155 static void     iwn5000_ict_reset(struct iwn_softc *);
  156 static int      iwn_read_eeprom(struct iwn_softc *,
  157                     uint8_t macaddr[IEEE80211_ADDR_LEN]);
  158 static void     iwn4965_read_eeprom(struct iwn_softc *);
  159 static void     iwn4965_print_power_group(struct iwn_softc *, int);
  160 static void     iwn5000_read_eeprom(struct iwn_softc *);
  161 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
  162 static void     iwn_read_eeprom_band(struct iwn_softc *, int);
  163 #if 0   /* HT */
  164 static void     iwn_read_eeprom_ht40(struct iwn_softc *, int);
  165 #endif
  166 static void     iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
  167 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
  168                     struct ieee80211_channel *);
  169 static int      iwn_setregdomain(struct ieee80211com *,
  170                     struct ieee80211_regdomain *, int,
  171                     struct ieee80211_channel[]);
  172 static void     iwn_read_eeprom_enhinfo(struct iwn_softc *);
  173 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
  174                     const uint8_t mac[IEEE80211_ADDR_LEN]);
  175 static void     iwn_newassoc(struct ieee80211_node *, int);
  176 static int      iwn_media_change(struct ifnet *);
  177 static int      iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
  178 static void     iwn_calib_timeout(void *);
  179 static void     iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
  180                     struct iwn_rx_data *);
  181 static void     iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
  182                     struct iwn_rx_data *);
  183 #if 0   /* HT */
  184 static void     iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
  185                     struct iwn_rx_data *);
  186 #endif
  187 static void     iwn5000_rx_calib_results(struct iwn_softc *,
  188                     struct iwn_rx_desc *, struct iwn_rx_data *);
  189 static void     iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
  190                     struct iwn_rx_data *);
  191 static void     iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
  192                     struct iwn_rx_data *);
  193 static void     iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
  194                     struct iwn_rx_data *);
  195 static void     iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
  196                     uint8_t);
  197 static void     iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
  198 static void     iwn_notif_intr(struct iwn_softc *);
  199 static void     iwn_wakeup_intr(struct iwn_softc *);
  200 static void     iwn_rftoggle_intr(struct iwn_softc *);
  201 static void     iwn_fatal_intr(struct iwn_softc *);
  202 static void     iwn_intr(void *);
  203 static void     iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
  204                     uint16_t);
  205 static void     iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
  206                     uint16_t);
  207 #ifdef notyet
  208 static void     iwn5000_reset_sched(struct iwn_softc *, int, int);
  209 #endif
  210 static uint8_t  iwn_plcp_signal(int);
  211 static int      iwn_tx_data(struct iwn_softc *, struct mbuf *,
  212                     struct ieee80211_node *);
  213 static int      iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
  214                     struct ieee80211_node *,
  215                     const struct ieee80211_bpf_params *params);
  216 static int      iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
  217                     const struct ieee80211_bpf_params *);
  218 static void     iwn_start(struct ifnet *);
  219 static void     iwn_start_locked(struct ifnet *);
  220 static void     iwn_watchdog(void *);
  221 static int      iwn_ioctl(struct ifnet *, u_long, caddr_t);
  222 static int      iwn_cmd(struct iwn_softc *, int, const void *, int, int);
  223 static int      iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
  224                     int);
  225 static int      iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
  226                     int);
  227 static int      iwn_set_link_quality(struct iwn_softc *,
  228                     struct ieee80211_node *);
  229 static int      iwn_add_broadcast_node(struct iwn_softc *, int);
  230 static int      iwn_updateedca(struct ieee80211com *);
  231 static void     iwn_update_mcast(struct ifnet *);
  232 static void     iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
  233 static int      iwn_set_critical_temp(struct iwn_softc *);
  234 static int      iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
  235 static void     iwn4965_power_calibration(struct iwn_softc *, int);
  236 static int      iwn4965_set_txpower(struct iwn_softc *,
  237                     struct ieee80211_channel *, int);
  238 static int      iwn5000_set_txpower(struct iwn_softc *,
  239                     struct ieee80211_channel *, int);
  240 static int      iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
  241 static int      iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
  242 static int      iwn_get_noise(const struct iwn_rx_general_stats *);
  243 static int      iwn4965_get_temperature(struct iwn_softc *);
  244 static int      iwn5000_get_temperature(struct iwn_softc *);
  245 static int      iwn_init_sensitivity(struct iwn_softc *);
  246 static void     iwn_collect_noise(struct iwn_softc *,
  247                     const struct iwn_rx_general_stats *);
  248 static int      iwn4965_init_gains(struct iwn_softc *);
  249 static int      iwn5000_init_gains(struct iwn_softc *);
  250 static int      iwn4965_set_gains(struct iwn_softc *);
  251 static int      iwn5000_set_gains(struct iwn_softc *);
  252 static void     iwn_tune_sensitivity(struct iwn_softc *,
  253                     const struct iwn_rx_stats *);
  254 static int      iwn_send_sensitivity(struct iwn_softc *);
  255 static int      iwn_set_pslevel(struct iwn_softc *, int, int, int);
  256 static int      iwn_send_btcoex(struct iwn_softc *);
  257 static int      iwn_send_advanced_btcoex(struct iwn_softc *);
  258 static int      iwn_config(struct iwn_softc *);
  259 static uint8_t  *ieee80211_add_ssid(uint8_t *, const uint8_t *, u_int);
  260 static int      iwn_scan(struct iwn_softc *);
  261 static int      iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
  262 static int      iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
  263 #if 0   /* HT */
  264 static int      iwn_ampdu_rx_start(struct ieee80211com *,
  265                     struct ieee80211_node *, uint8_t);
  266 static void     iwn_ampdu_rx_stop(struct ieee80211com *,
  267                     struct ieee80211_node *, uint8_t);
  268 static int      iwn_ampdu_tx_start(struct ieee80211com *,
  269                     struct ieee80211_node *, uint8_t);
  270 static void     iwn_ampdu_tx_stop(struct ieee80211com *,
  271                     struct ieee80211_node *, uint8_t);
  272 static void     iwn4965_ampdu_tx_start(struct iwn_softc *,
  273                     struct ieee80211_node *, uint8_t, uint16_t);
  274 static void     iwn4965_ampdu_tx_stop(struct iwn_softc *,
  275                     uint8_t, uint16_t);
  276 static void     iwn5000_ampdu_tx_start(struct iwn_softc *,
  277                     struct ieee80211_node *, uint8_t, uint16_t);
  278 static void     iwn5000_ampdu_tx_stop(struct iwn_softc *,
  279                     uint8_t, uint16_t);
  280 #endif
  281 static int      iwn5000_query_calibration(struct iwn_softc *);
  282 static int      iwn5000_send_calibration(struct iwn_softc *);
  283 static int      iwn5000_send_wimax_coex(struct iwn_softc *);
  284 static int      iwn5000_crystal_calib(struct iwn_softc *);
  285 static int      iwn5000_temp_offset_calib(struct iwn_softc *);
  286 static int      iwn4965_post_alive(struct iwn_softc *);
  287 static int      iwn5000_post_alive(struct iwn_softc *);
  288 static int      iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
  289                     int);
  290 static int      iwn4965_load_firmware(struct iwn_softc *);
  291 static int      iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
  292                     const uint8_t *, int);
  293 static int      iwn5000_load_firmware(struct iwn_softc *);
  294 static int      iwn_read_firmware_leg(struct iwn_softc *,
  295                     struct iwn_fw_info *);
  296 static int      iwn_read_firmware_tlv(struct iwn_softc *,
  297                     struct iwn_fw_info *, uint16_t);
  298 static int      iwn_read_firmware(struct iwn_softc *);
  299 static int      iwn_clock_wait(struct iwn_softc *);
  300 static int      iwn_apm_init(struct iwn_softc *);
  301 static void     iwn_apm_stop_master(struct iwn_softc *);
  302 static void     iwn_apm_stop(struct iwn_softc *);
  303 static int      iwn4965_nic_config(struct iwn_softc *);
  304 static int      iwn5000_nic_config(struct iwn_softc *);
  305 static int      iwn_hw_prepare(struct iwn_softc *);
  306 static int      iwn_hw_init(struct iwn_softc *);
  307 static void     iwn_hw_stop(struct iwn_softc *);
  308 static void     iwn_radio_on(void *, int);
  309 static void     iwn_radio_off(void *, int);
  310 static void     iwn_init_locked(struct iwn_softc *);
  311 static void     iwn_init(void *);
  312 static void     iwn_stop_locked(struct iwn_softc *);
  313 static void     iwn_stop(struct iwn_softc *);
  314 static void     iwn_scan_start(struct ieee80211com *);
  315 static void     iwn_scan_end(struct ieee80211com *);
  316 static void     iwn_set_channel(struct ieee80211com *);
  317 static void     iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
  318 static void     iwn_scan_mindwell(struct ieee80211_scan_state *);
  319 static void     iwn_hw_reset(void *, int);
  320 
  321 #define IWN_DEBUG
  322 #ifdef IWN_DEBUG
  323 enum {
  324         IWN_DEBUG_XMIT          = 0x00000001,   /* basic xmit operation */
  325         IWN_DEBUG_RECV          = 0x00000002,   /* basic recv operation */
  326         IWN_DEBUG_STATE         = 0x00000004,   /* 802.11 state transitions */
  327         IWN_DEBUG_TXPOW         = 0x00000008,   /* tx power processing */
  328         IWN_DEBUG_RESET         = 0x00000010,   /* reset processing */
  329         IWN_DEBUG_OPS           = 0x00000020,   /* iwn_ops processing */
  330         IWN_DEBUG_BEACON        = 0x00000040,   /* beacon handling */
  331         IWN_DEBUG_WATCHDOG      = 0x00000080,   /* watchdog timeout */
  332         IWN_DEBUG_INTR          = 0x00000100,   /* ISR */
  333         IWN_DEBUG_CALIBRATE     = 0x00000200,   /* periodic calibration */
  334         IWN_DEBUG_NODE          = 0x00000400,   /* node management */
  335         IWN_DEBUG_LED           = 0x00000800,   /* led management */
  336         IWN_DEBUG_CMD           = 0x00001000,   /* cmd submission */
  337         IWN_DEBUG_FATAL         = 0x80000000,   /* fatal errors */
  338         IWN_DEBUG_ANY           = 0xffffffff
  339 };
  340 
  341 #define DPRINTF(sc, m, fmt, ...) do {                   \
  342         if (sc->sc_debug & (m))                         \
  343                 printf(fmt, __VA_ARGS__);               \
  344 } while (0)
  345 
  346 static const char *
  347 iwn_intr_str(uint8_t cmd)
  348 {
  349         switch (cmd) {
  350         /* Notifications */
  351         case IWN_UC_READY:              return "UC_READY";
  352         case IWN_ADD_NODE_DONE:         return "ADD_NODE_DONE";
  353         case IWN_TX_DONE:               return "TX_DONE";
  354         case IWN_START_SCAN:            return "START_SCAN";
  355         case IWN_STOP_SCAN:             return "STOP_SCAN";
  356         case IWN_RX_STATISTICS:         return "RX_STATS";
  357         case IWN_BEACON_STATISTICS:     return "BEACON_STATS";
  358         case IWN_STATE_CHANGED:         return "STATE_CHANGED";
  359         case IWN_BEACON_MISSED:         return "BEACON_MISSED";
  360         case IWN_RX_PHY:                return "RX_PHY";
  361         case IWN_MPDU_RX_DONE:          return "MPDU_RX_DONE";
  362         case IWN_RX_DONE:               return "RX_DONE";
  363 
  364         /* Command Notifications */
  365         case IWN_CMD_RXON:              return "IWN_CMD_RXON";
  366         case IWN_CMD_RXON_ASSOC:        return "IWN_CMD_RXON_ASSOC";
  367         case IWN_CMD_EDCA_PARAMS:       return "IWN_CMD_EDCA_PARAMS";
  368         case IWN_CMD_TIMING:            return "IWN_CMD_TIMING";
  369         case IWN_CMD_LINK_QUALITY:      return "IWN_CMD_LINK_QUALITY";
  370         case IWN_CMD_SET_LED:           return "IWN_CMD_SET_LED";
  371         case IWN5000_CMD_WIMAX_COEX:    return "IWN5000_CMD_WIMAX_COEX";
  372         case IWN5000_CMD_CALIB_CONFIG:  return "IWN5000_CMD_CALIB_CONFIG";
  373         case IWN5000_CMD_CALIB_RESULT:  return "IWN5000_CMD_CALIB_RESULT";
  374         case IWN5000_CMD_CALIB_COMPLETE: return "IWN5000_CMD_CALIB_COMPLETE";
  375         case IWN_CMD_SET_POWER_MODE:    return "IWN_CMD_SET_POWER_MODE";
  376         case IWN_CMD_SCAN:              return "IWN_CMD_SCAN";
  377         case IWN_CMD_SCAN_RESULTS:      return "IWN_CMD_SCAN_RESULTS";
  378         case IWN_CMD_TXPOWER:           return "IWN_CMD_TXPOWER";
  379         case IWN_CMD_TXPOWER_DBM:       return "IWN_CMD_TXPOWER_DBM";
  380         case IWN5000_CMD_TX_ANT_CONFIG: return "IWN5000_CMD_TX_ANT_CONFIG";
  381         case IWN_CMD_BT_COEX:           return "IWN_CMD_BT_COEX";
  382         case IWN_CMD_SET_CRITICAL_TEMP: return "IWN_CMD_SET_CRITICAL_TEMP";
  383         case IWN_CMD_SET_SENSITIVITY:   return "IWN_CMD_SET_SENSITIVITY";
  384         case IWN_CMD_PHY_CALIB:         return "IWN_CMD_PHY_CALIB";
  385         }
  386         return "UNKNOWN INTR NOTIF/CMD";
  387 }
  388 #else
  389 #define DPRINTF(sc, m, fmt, ...) do { (void) sc; } while (0)
  390 #endif
  391 
  392 static device_method_t iwn_methods[] = {
  393         /* Device interface */
  394         DEVMETHOD(device_probe,         iwn_probe),
  395         DEVMETHOD(device_attach,        iwn_attach),
  396         DEVMETHOD(device_detach,        iwn_detach),
  397         DEVMETHOD(device_shutdown,      iwn_shutdown),
  398         DEVMETHOD(device_suspend,       iwn_suspend),
  399         DEVMETHOD(device_resume,        iwn_resume),
  400         { 0, 0 }
  401 };
  402 
  403 static driver_t iwn_driver = {
  404         "iwn",
  405         iwn_methods,
  406         sizeof(struct iwn_softc)
  407 };
  408 static devclass_t iwn_devclass;
  409 
  410 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, 0, 0);
  411 
  412 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
  413 MODULE_DEPEND(iwn, pci, 1, 1, 1);
  414 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
  415 
  416 static int
  417 iwn_probe(device_t dev)
  418 {
  419         const struct iwn_ident *ident;
  420 
  421         for (ident = iwn_ident_table; ident->name != NULL; ident++) {
  422                 if (pci_get_vendor(dev) == ident->vendor &&
  423                     pci_get_device(dev) == ident->device) {
  424                         device_set_desc(dev, ident->name);
  425                         return 0;
  426                 }
  427         }
  428         return ENXIO;
  429 }
  430 
  431 static int
  432 iwn_attach(device_t dev)
  433 {
  434         struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
  435         struct ieee80211com *ic;
  436         struct ifnet *ifp;
  437         uint32_t reg;
  438         int i, error, result;
  439         uint8_t macaddr[IEEE80211_ADDR_LEN];
  440 
  441         sc->sc_dev = dev;
  442 
  443         /*
  444          * Get the offset of the PCI Express Capability Structure in PCI
  445          * Configuration Space.
  446          */
  447         error = pci_find_extcap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
  448         if (error != 0) {
  449                 device_printf(dev, "PCIe capability structure not found!\n");
  450                 return error;
  451         }
  452 
  453         /* Clear device-specific "PCI retry timeout" register (41h). */
  454         pci_write_config(dev, 0x41, 0, 1);
  455 
  456         /* Hardware bug workaround. */
  457         reg = pci_read_config(dev, PCIR_COMMAND, 1);
  458         if (reg & PCIM_CMD_INTxDIS) {
  459                 DPRINTF(sc, IWN_DEBUG_RESET, "%s: PCIe INTx Disable set\n",
  460                     __func__);
  461                 reg &= ~PCIM_CMD_INTxDIS;
  462                 pci_write_config(dev, PCIR_COMMAND, reg, 1);
  463         }
  464 
  465         /* Enable bus-mastering. */
  466         pci_enable_busmaster(dev);
  467 
  468         sc->mem_rid = PCIR_BAR(0);
  469         sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
  470             RF_ACTIVE);
  471         if (sc->mem == NULL) {
  472                 device_printf(dev, "can't map mem space\n");
  473                 error = ENOMEM;
  474                 return error;
  475         }
  476         sc->sc_st = rman_get_bustag(sc->mem);
  477         sc->sc_sh = rman_get_bushandle(sc->mem);
  478 
  479         sc->irq_rid = 0;
  480         if ((result = pci_msi_count(dev)) == 1 &&
  481             pci_alloc_msi(dev, &result) == 0)
  482                 sc->irq_rid = 1;
  483         /* Install interrupt handler. */
  484         sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
  485             RF_ACTIVE | RF_SHAREABLE);
  486         if (sc->irq == NULL) {
  487                 device_printf(dev, "can't map interrupt\n");
  488                 error = ENOMEM;
  489                 goto fail;
  490         }
  491 
  492         IWN_LOCK_INIT(sc);
  493 
  494         /* Read hardware revision and attach. */
  495         sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> 4) & 0xf;
  496         if (sc->hw_type == IWN_HW_REV_TYPE_4965)
  497                 error = iwn4965_attach(sc, pci_get_device(dev));
  498         else
  499                 error = iwn5000_attach(sc, pci_get_device(dev));
  500         if (error != 0) {
  501                 device_printf(dev, "could not attach device, error %d\n",
  502                     error);
  503                 goto fail;
  504         }
  505 
  506         if ((error = iwn_hw_prepare(sc)) != 0) {
  507                 device_printf(dev, "hardware not ready, error %d\n", error);
  508                 goto fail;
  509         }
  510 
  511         /* Allocate DMA memory for firmware transfers. */
  512         if ((error = iwn_alloc_fwmem(sc)) != 0) {
  513                 device_printf(dev,
  514                     "could not allocate memory for firmware, error %d\n",
  515                     error);
  516                 goto fail;
  517         }
  518 
  519         /* Allocate "Keep Warm" page. */
  520         if ((error = iwn_alloc_kw(sc)) != 0) {
  521                 device_printf(dev,
  522                     "could not allocate keep warm page, error %d\n", error);
  523                 goto fail;
  524         }
  525 
  526         /* Allocate ICT table for 5000 Series. */
  527         if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
  528             (error = iwn_alloc_ict(sc)) != 0) {
  529                 device_printf(dev, "could not allocate ICT table, error %d\n",
  530                     error);
  531                 goto fail;
  532         }
  533 
  534         /* Allocate TX scheduler "rings". */
  535         if ((error = iwn_alloc_sched(sc)) != 0) {
  536                 device_printf(dev,
  537                     "could not allocate TX scheduler rings, error %d\n", error);
  538                 goto fail;
  539         }
  540 
  541         /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
  542         for (i = 0; i < sc->ntxqs; i++) {
  543                 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
  544                         device_printf(dev,
  545                             "could not allocate TX ring %d, error %d\n", i,
  546                             error);
  547                         goto fail;
  548                 }
  549         }
  550 
  551         /* Allocate RX ring. */
  552         if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
  553                 device_printf(dev, "could not allocate RX ring, error %d\n",
  554                     error);
  555                 goto fail;
  556         }
  557 
  558         /* Clear pending interrupts. */
  559         IWN_WRITE(sc, IWN_INT, 0xffffffff);
  560 
  561         /* Count the number of available chains. */
  562         sc->ntxchains =
  563             ((sc->txchainmask >> 2) & 1) +
  564             ((sc->txchainmask >> 1) & 1) +
  565             ((sc->txchainmask >> 0) & 1);
  566         sc->nrxchains =
  567             ((sc->rxchainmask >> 2) & 1) +
  568             ((sc->rxchainmask >> 1) & 1) +
  569             ((sc->rxchainmask >> 0) & 1);
  570         if (bootverbose) {
  571                 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
  572                     sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
  573                     macaddr, ":");
  574         }
  575 
  576         ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
  577         if (ifp == NULL) {
  578                 device_printf(dev, "can not allocate ifnet structure\n");
  579                 goto fail;
  580         }
  581 
  582         ic = ifp->if_l2com;
  583         ic->ic_ifp = ifp;
  584         ic->ic_phytype = IEEE80211_T_OFDM;      /* not only, but not used */
  585         ic->ic_opmode = IEEE80211_M_STA;        /* default to BSS mode */
  586 
  587         /* Set device capabilities. */
  588         ic->ic_caps =
  589                   IEEE80211_C_STA               /* station mode supported */
  590                 | IEEE80211_C_MONITOR           /* monitor mode supported */
  591                 | IEEE80211_C_TXPMGT            /* tx power management */
  592                 | IEEE80211_C_SHSLOT            /* short slot time supported */
  593                 | IEEE80211_C_WPA
  594                 | IEEE80211_C_SHPREAMBLE        /* short preamble supported */
  595                 | IEEE80211_C_BGSCAN            /* background scanning */
  596 #if 0
  597                 | IEEE80211_C_IBSS              /* ibss/adhoc mode */
  598 #endif
  599                 | IEEE80211_C_WME               /* WME */
  600                 ;
  601 #if 0   /* HT */
  602         /* XXX disable until HT channel setup works */
  603         ic->ic_htcaps =
  604                   IEEE80211_HTCAP_SMPS_ENA      /* SM PS mode enabled */
  605                 | IEEE80211_HTCAP_CHWIDTH40     /* 40MHz channel width */
  606                 | IEEE80211_HTCAP_SHORTGI20     /* short GI in 20MHz */
  607                 | IEEE80211_HTCAP_SHORTGI40     /* short GI in 40MHz */
  608                 | IEEE80211_HTCAP_RXSTBC_2STREAM/* 1-2 spatial streams */
  609                 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
  610                 /* s/w capabilities */
  611                 | IEEE80211_HTC_HT              /* HT operation */
  612                 | IEEE80211_HTC_AMPDU           /* tx A-MPDU */
  613                 | IEEE80211_HTC_AMSDU           /* tx A-MSDU */
  614                 ;
  615 
  616         /* Set HT capabilities. */
  617         ic->ic_htcaps =
  618 #if IWN_RBUF_SIZE == 8192
  619             IEEE80211_HTCAP_AMSDU7935 |
  620 #endif
  621             IEEE80211_HTCAP_CBW20_40 |
  622             IEEE80211_HTCAP_SGI20 |
  623             IEEE80211_HTCAP_SGI40;
  624         if (sc->hw_type != IWN_HW_REV_TYPE_4965)
  625                 ic->ic_htcaps |= IEEE80211_HTCAP_GF;
  626         if (sc->hw_type == IWN_HW_REV_TYPE_6050)
  627                 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DYN;
  628         else
  629                 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DIS;
  630 #endif
  631 
  632         /* Read MAC address, channels, etc from EEPROM. */
  633         if ((error = iwn_read_eeprom(sc, macaddr)) != 0) {
  634                 device_printf(dev, "could not read EEPROM, error %d\n",
  635                     error);
  636                 goto fail;
  637         }
  638 
  639 #if 0   /* HT */
  640         /* Set supported HT rates. */
  641         ic->ic_sup_mcs[0] = 0xff;
  642         if (sc->nrxchains > 1)
  643                 ic->ic_sup_mcs[1] = 0xff;
  644         if (sc->nrxchains > 2)
  645                 ic->ic_sup_mcs[2] = 0xff;
  646 #endif
  647 
  648         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
  649         ifp->if_softc = sc;
  650         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
  651         ifp->if_init = iwn_init;
  652         ifp->if_ioctl = iwn_ioctl;
  653         ifp->if_start = iwn_start;
  654         IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
  655         ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
  656         IFQ_SET_READY(&ifp->if_snd);
  657 
  658         ieee80211_ifattach(ic, macaddr);
  659         ic->ic_vap_create = iwn_vap_create;
  660         ic->ic_vap_delete = iwn_vap_delete;
  661         ic->ic_raw_xmit = iwn_raw_xmit;
  662         ic->ic_node_alloc = iwn_node_alloc;
  663 #if 0   /* HT */
  664         ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
  665         ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
  666         ic->ic_ampdu_tx_start = iwn_ampdu_tx_start;
  667         ic->ic_ampdu_tx_stop = iwn_ampdu_tx_stop;
  668 #endif
  669         ic->ic_newassoc = iwn_newassoc;
  670         ic->ic_wme.wme_update = iwn_updateedca;
  671         ic->ic_update_mcast = iwn_update_mcast;
  672         ic->ic_scan_start = iwn_scan_start;
  673         ic->ic_scan_end = iwn_scan_end;
  674         ic->ic_set_channel = iwn_set_channel;
  675         ic->ic_scan_curchan = iwn_scan_curchan;
  676         ic->ic_scan_mindwell = iwn_scan_mindwell;
  677         ic->ic_setregdomain = iwn_setregdomain;
  678 
  679         iwn_radiotap_attach(sc);
  680 
  681         callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
  682         callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
  683         TASK_INIT(&sc->sc_reinit_task, 0, iwn_hw_reset, sc);
  684         TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on, sc);
  685         TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off, sc);
  686 
  687         iwn_sysctlattach(sc);
  688 
  689         /*
  690          * Hook our interrupt after all initialization is complete.
  691          */
  692         error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
  693             NULL, iwn_intr, sc, &sc->sc_ih);
  694         if (error != 0) {
  695                 device_printf(dev, "can't establish interrupt, error %d\n",
  696                     error);
  697                 goto fail;
  698         }
  699 
  700         if (bootverbose)
  701                 ieee80211_announce(ic);
  702         return 0;
  703 fail:
  704         iwn_detach(dev);
  705         return error;
  706 }
  707 
  708 static int
  709 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
  710 {
  711         struct iwn_ops *ops = &sc->ops;
  712 
  713         ops->load_firmware = iwn4965_load_firmware;
  714         ops->read_eeprom = iwn4965_read_eeprom;
  715         ops->post_alive = iwn4965_post_alive;
  716         ops->nic_config = iwn4965_nic_config;
  717         ops->update_sched = iwn4965_update_sched;
  718         ops->get_temperature = iwn4965_get_temperature;
  719         ops->get_rssi = iwn4965_get_rssi;
  720         ops->set_txpower = iwn4965_set_txpower;
  721         ops->init_gains = iwn4965_init_gains;
  722         ops->set_gains = iwn4965_set_gains;
  723         ops->add_node = iwn4965_add_node;
  724         ops->tx_done = iwn4965_tx_done;
  725 #if 0   /* HT */
  726         ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
  727         ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
  728 #endif
  729         sc->ntxqs = IWN4965_NTXQUEUES;
  730         sc->ndmachnls = IWN4965_NDMACHNLS;
  731         sc->broadcast_id = IWN4965_ID_BROADCAST;
  732         sc->rxonsz = IWN4965_RXONSZ;
  733         sc->schedsz = IWN4965_SCHEDSZ;
  734         sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
  735         sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
  736         sc->fwsz = IWN4965_FWSZ;
  737         sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
  738         sc->limits = &iwn4965_sensitivity_limits;
  739         sc->fwname = "iwn4965fw";
  740         /* Override chains masks, ROM is known to be broken. */
  741         sc->txchainmask = IWN_ANT_AB;
  742         sc->rxchainmask = IWN_ANT_ABC;
  743 
  744         return 0;
  745 }
  746 
  747 static int
  748 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
  749 {
  750         struct iwn_ops *ops = &sc->ops;
  751 
  752         ops->load_firmware = iwn5000_load_firmware;
  753         ops->read_eeprom = iwn5000_read_eeprom;
  754         ops->post_alive = iwn5000_post_alive;
  755         ops->nic_config = iwn5000_nic_config;
  756         ops->update_sched = iwn5000_update_sched;
  757         ops->get_temperature = iwn5000_get_temperature;
  758         ops->get_rssi = iwn5000_get_rssi;
  759         ops->set_txpower = iwn5000_set_txpower;
  760         ops->init_gains = iwn5000_init_gains;
  761         ops->set_gains = iwn5000_set_gains;
  762         ops->add_node = iwn5000_add_node;
  763         ops->tx_done = iwn5000_tx_done;
  764 #if 0   /* HT */
  765         ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
  766         ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
  767 #endif
  768         sc->ntxqs = IWN5000_NTXQUEUES;
  769         sc->ndmachnls = IWN5000_NDMACHNLS;
  770         sc->broadcast_id = IWN5000_ID_BROADCAST;
  771         sc->rxonsz = IWN5000_RXONSZ;
  772         sc->schedsz = IWN5000_SCHEDSZ;
  773         sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
  774         sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
  775         sc->fwsz = IWN5000_FWSZ;
  776         sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
  777         sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
  778         sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
  779 
  780         switch (sc->hw_type) {
  781         case IWN_HW_REV_TYPE_5100:
  782                 sc->limits = &iwn5000_sensitivity_limits;
  783                 sc->fwname = "iwn5000fw";
  784                 /* Override chains masks, ROM is known to be broken. */
  785                 sc->txchainmask = IWN_ANT_B;
  786                 sc->rxchainmask = IWN_ANT_AB;
  787                 break;
  788         case IWN_HW_REV_TYPE_5150:
  789                 sc->limits = &iwn5150_sensitivity_limits;
  790                 sc->fwname = "iwn5150fw";
  791                 break;
  792         case IWN_HW_REV_TYPE_5300:
  793         case IWN_HW_REV_TYPE_5350:
  794                 sc->limits = &iwn5000_sensitivity_limits;
  795                 sc->fwname = "iwn5000fw";
  796                 break;
  797         case IWN_HW_REV_TYPE_1000:
  798                 sc->limits = &iwn1000_sensitivity_limits;
  799                 sc->fwname = "iwn1000fw";
  800                 break;
  801         case IWN_HW_REV_TYPE_6000:
  802                 sc->limits = &iwn6000_sensitivity_limits;
  803                 sc->fwname = "iwn6000fw";
  804                 if (pid == 0x422c || pid == 0x4239) {
  805                         sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
  806                         /* Override chains masks, ROM is known to be broken. */
  807                         sc->txchainmask = IWN_ANT_BC;
  808                         sc->rxchainmask = IWN_ANT_BC;
  809                 }
  810                 break;
  811         case IWN_HW_REV_TYPE_6050:
  812                 sc->limits = &iwn6000_sensitivity_limits;
  813                 sc->fwname = "iwn6050fw";
  814                 /* Override chains masks, ROM is known to be broken. */
  815                 sc->txchainmask = IWN_ANT_AB;
  816                 sc->rxchainmask = IWN_ANT_AB;
  817                 break;
  818         case IWN_HW_REV_TYPE_6005:
  819                 sc->limits = &iwn6000_sensitivity_limits;
  820                 if (pid != 0x0082 && pid != 0x0085) {
  821                         sc->fwname = "iwn6000g2bfw";
  822                         sc->sc_flags |= IWN_FLAG_ADV_BTCOEX;
  823                 } else
  824                         sc->fwname = "iwn6000g2afw";
  825                 break;
  826         default:
  827                 device_printf(sc->sc_dev, "adapter type %d not supported\n",
  828                     sc->hw_type);
  829                 return ENOTSUP;
  830         }
  831         return 0;
  832 }
  833 
  834 /*
  835  * Attach the interface to 802.11 radiotap.
  836  */
  837 static void
  838 iwn_radiotap_attach(struct iwn_softc *sc)
  839 {
  840         struct ifnet *ifp = sc->sc_ifp;
  841         struct ieee80211com *ic = ifp->if_l2com;
  842 
  843         ieee80211_radiotap_attach(ic,
  844             &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
  845                 IWN_TX_RADIOTAP_PRESENT,
  846             &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
  847                 IWN_RX_RADIOTAP_PRESENT);
  848 }
  849 
  850 static void
  851 iwn_sysctlattach(struct iwn_softc *sc)
  852 {
  853         struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
  854         struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
  855 
  856 #ifdef IWN_DEBUG
  857         sc->sc_debug = 0;
  858         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
  859             "debug", CTLFLAG_RW, &sc->sc_debug, 0, "control debugging printfs");
  860 #endif
  861 }
  862 
  863 static struct ieee80211vap *
  864 iwn_vap_create(struct ieee80211com *ic,
  865     const char name[IFNAMSIZ], int unit, int opmode, int flags,
  866     const uint8_t bssid[IEEE80211_ADDR_LEN],
  867     const uint8_t mac[IEEE80211_ADDR_LEN])
  868 {
  869         struct iwn_vap *ivp;
  870         struct ieee80211vap *vap;
  871 
  872         if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
  873                 return NULL;
  874         ivp = (struct iwn_vap *) malloc(sizeof(struct iwn_vap),
  875             M_80211_VAP, M_NOWAIT | M_ZERO);
  876         if (ivp == NULL)
  877                 return NULL;
  878         vap = &ivp->iv_vap;
  879         ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
  880         vap->iv_bmissthreshold = 10;            /* override default */
  881         /* Override with driver methods. */
  882         ivp->iv_newstate = vap->iv_newstate;
  883         vap->iv_newstate = iwn_newstate;
  884 
  885         ieee80211_ratectl_init(vap);
  886         /* Complete setup. */
  887         ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status);
  888         ic->ic_opmode = opmode;
  889         return vap;
  890 }
  891 
  892 static void
  893 iwn_vap_delete(struct ieee80211vap *vap)
  894 {
  895         struct iwn_vap *ivp = IWN_VAP(vap);
  896 
  897         ieee80211_ratectl_deinit(vap);
  898         ieee80211_vap_detach(vap);
  899         free(ivp, M_80211_VAP);
  900 }
  901 
  902 static int
  903 iwn_detach(device_t dev)
  904 {
  905         struct iwn_softc *sc = device_get_softc(dev);
  906         struct ifnet *ifp = sc->sc_ifp;
  907         struct ieee80211com *ic;
  908         int qid;
  909 
  910         if (ifp != NULL) {
  911                 ic = ifp->if_l2com;
  912 
  913                 ieee80211_draintask(ic, &sc->sc_reinit_task);
  914                 ieee80211_draintask(ic, &sc->sc_radioon_task);
  915                 ieee80211_draintask(ic, &sc->sc_radiooff_task);
  916 
  917                 iwn_stop(sc);
  918                 callout_drain(&sc->watchdog_to);
  919                 callout_drain(&sc->calib_to);
  920                 ieee80211_ifdetach(ic);
  921         }
  922 
  923         /* Uninstall interrupt handler. */
  924         if (sc->irq != NULL) {
  925                 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
  926                 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
  927                 if (sc->irq_rid == 1)
  928                         pci_release_msi(dev);
  929         }
  930 
  931         /* Free DMA resources. */
  932         iwn_free_rx_ring(sc, &sc->rxq);
  933         for (qid = 0; qid < sc->ntxqs; qid++)
  934                 iwn_free_tx_ring(sc, &sc->txq[qid]);
  935         iwn_free_sched(sc);
  936         iwn_free_kw(sc);
  937         if (sc->ict != NULL)
  938                 iwn_free_ict(sc);
  939         iwn_free_fwmem(sc);
  940 
  941         if (sc->mem != NULL)
  942                 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
  943 
  944         if (ifp != NULL)
  945                 if_free(ifp);
  946 
  947         IWN_LOCK_DESTROY(sc);
  948         return 0;
  949 }
  950 
  951 static int
  952 iwn_shutdown(device_t dev)
  953 {
  954         struct iwn_softc *sc = device_get_softc(dev);
  955 
  956         iwn_stop(sc);
  957         return 0;
  958 }
  959 
  960 static int
  961 iwn_suspend(device_t dev)
  962 {
  963         struct iwn_softc *sc = device_get_softc(dev);
  964         struct ieee80211com *ic = sc->sc_ifp->if_l2com;
  965 
  966         ieee80211_suspend_all(ic);
  967         return 0;
  968 }
  969 
  970 static int
  971 iwn_resume(device_t dev)
  972 {
  973         struct iwn_softc *sc = device_get_softc(dev);
  974         struct ieee80211com *ic = sc->sc_ifp->if_l2com;
  975 
  976         /* Clear device-specific "PCI retry timeout" register (41h). */
  977         pci_write_config(dev, 0x41, 0, 1);
  978 
  979         ieee80211_resume_all(ic);
  980         return 0;
  981 }
  982 
  983 static int
  984 iwn_nic_lock(struct iwn_softc *sc)
  985 {
  986         int ntries;
  987 
  988         /* Request exclusive access to NIC. */
  989         IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
  990 
  991         /* Spin until we actually get the lock. */
  992         for (ntries = 0; ntries < 1000; ntries++) {
  993                 if ((IWN_READ(sc, IWN_GP_CNTRL) &
  994                      (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
  995                     IWN_GP_CNTRL_MAC_ACCESS_ENA)
  996                         return 0;
  997                 DELAY(10);
  998         }
  999         return ETIMEDOUT;
 1000 }
 1001 
 1002 static __inline void
 1003 iwn_nic_unlock(struct iwn_softc *sc)
 1004 {
 1005         IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
 1006 }
 1007 
 1008 static __inline uint32_t
 1009 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
 1010 {
 1011         IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
 1012         IWN_BARRIER_READ_WRITE(sc);
 1013         return IWN_READ(sc, IWN_PRPH_RDATA);
 1014 }
 1015 
 1016 static __inline void
 1017 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
 1018 {
 1019         IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
 1020         IWN_BARRIER_WRITE(sc);
 1021         IWN_WRITE(sc, IWN_PRPH_WDATA, data);
 1022 }
 1023 
 1024 static __inline void
 1025 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
 1026 {
 1027         iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
 1028 }
 1029 
 1030 static __inline void
 1031 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
 1032 {
 1033         iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
 1034 }
 1035 
 1036 static __inline void
 1037 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
 1038     const uint32_t *data, int count)
 1039 {
 1040         for (; count > 0; count--, data++, addr += 4)
 1041                 iwn_prph_write(sc, addr, *data);
 1042 }
 1043 
 1044 static __inline uint32_t
 1045 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
 1046 {
 1047         IWN_WRITE(sc, IWN_MEM_RADDR, addr);
 1048         IWN_BARRIER_READ_WRITE(sc);
 1049         return IWN_READ(sc, IWN_MEM_RDATA);
 1050 }
 1051 
 1052 static __inline void
 1053 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
 1054 {
 1055         IWN_WRITE(sc, IWN_MEM_WADDR, addr);
 1056         IWN_BARRIER_WRITE(sc);
 1057         IWN_WRITE(sc, IWN_MEM_WDATA, data);
 1058 }
 1059 
 1060 static __inline void
 1061 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
 1062 {
 1063         uint32_t tmp;
 1064 
 1065         tmp = iwn_mem_read(sc, addr & ~3);
 1066         if (addr & 3)
 1067                 tmp = (tmp & 0x0000ffff) | data << 16;
 1068         else
 1069                 tmp = (tmp & 0xffff0000) | data;
 1070         iwn_mem_write(sc, addr & ~3, tmp);
 1071 }
 1072 
 1073 static __inline void
 1074 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
 1075     int count)
 1076 {
 1077         for (; count > 0; count--, addr += 4)
 1078                 *data++ = iwn_mem_read(sc, addr);
 1079 }
 1080 
 1081 static __inline void
 1082 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
 1083     int count)
 1084 {
 1085         for (; count > 0; count--, addr += 4)
 1086                 iwn_mem_write(sc, addr, val);
 1087 }
 1088 
 1089 static int
 1090 iwn_eeprom_lock(struct iwn_softc *sc)
 1091 {
 1092         int i, ntries;
 1093 
 1094         for (i = 0; i < 100; i++) {
 1095                 /* Request exclusive access to EEPROM. */
 1096                 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
 1097                     IWN_HW_IF_CONFIG_EEPROM_LOCKED);
 1098 
 1099                 /* Spin until we actually get the lock. */
 1100                 for (ntries = 0; ntries < 100; ntries++) {
 1101                         if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
 1102                             IWN_HW_IF_CONFIG_EEPROM_LOCKED)
 1103                                 return 0;
 1104                         DELAY(10);
 1105                 }
 1106         }
 1107         return ETIMEDOUT;
 1108 }
 1109 
 1110 static __inline void
 1111 iwn_eeprom_unlock(struct iwn_softc *sc)
 1112 {
 1113         IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
 1114 }
 1115 
 1116 /*
 1117  * Initialize access by host to One Time Programmable ROM.
 1118  * NB: This kind of ROM can be found on 1000 or 6000 Series only.
 1119  */
 1120 static int
 1121 iwn_init_otprom(struct iwn_softc *sc)
 1122 {
 1123         uint16_t prev, base, next;
 1124         int count, error;
 1125 
 1126         /* Wait for clock stabilization before accessing prph. */
 1127         if ((error = iwn_clock_wait(sc)) != 0)
 1128                 return error;
 1129 
 1130         if ((error = iwn_nic_lock(sc)) != 0)
 1131                 return error;
 1132         iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
 1133         DELAY(5);
 1134         iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
 1135         iwn_nic_unlock(sc);
 1136 
 1137         /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
 1138         if (sc->hw_type != IWN_HW_REV_TYPE_1000) {
 1139                 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
 1140                     IWN_RESET_LINK_PWR_MGMT_DIS);
 1141         }
 1142         IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
 1143         /* Clear ECC status. */
 1144         IWN_SETBITS(sc, IWN_OTP_GP,
 1145             IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
 1146 
 1147         /*
 1148          * Find the block before last block (contains the EEPROM image)
 1149          * for HW without OTP shadow RAM.
 1150          */
 1151         if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
 1152                 /* Switch to absolute addressing mode. */
 1153                 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
 1154                 base = prev = 0;
 1155                 for (count = 0; count < IWN1000_OTP_NBLOCKS; count++) {
 1156                         error = iwn_read_prom_data(sc, base, &next, 2);
 1157                         if (error != 0)
 1158                                 return error;
 1159                         if (next == 0)  /* End of linked-list. */
 1160                                 break;
 1161                         prev = base;
 1162                         base = le16toh(next);
 1163                 }
 1164                 if (count == 0 || count == IWN1000_OTP_NBLOCKS)
 1165                         return EIO;
 1166                 /* Skip "next" word. */
 1167                 sc->prom_base = prev + 1;
 1168         }
 1169         return 0;
 1170 }
 1171 
 1172 static int
 1173 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
 1174 {
 1175         uint8_t *out = data;
 1176         uint32_t val, tmp;
 1177         int ntries;
 1178 
 1179         addr += sc->prom_base;
 1180         for (; count > 0; count -= 2, addr++) {
 1181                 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
 1182                 for (ntries = 0; ntries < 10; ntries++) {
 1183                         val = IWN_READ(sc, IWN_EEPROM);
 1184                         if (val & IWN_EEPROM_READ_VALID)
 1185                                 break;
 1186                         DELAY(5);
 1187                 }
 1188                 if (ntries == 10) {
 1189                         device_printf(sc->sc_dev,
 1190                             "timeout reading ROM at 0x%x\n", addr);
 1191                         return ETIMEDOUT;
 1192                 }
 1193                 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
 1194                         /* OTPROM, check for ECC errors. */
 1195                         tmp = IWN_READ(sc, IWN_OTP_GP);
 1196                         if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
 1197                                 device_printf(sc->sc_dev,
 1198                                     "OTPROM ECC error at 0x%x\n", addr);
 1199                                 return EIO;
 1200                         }
 1201                         if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
 1202                                 /* Correctable ECC error, clear bit. */
 1203                                 IWN_SETBITS(sc, IWN_OTP_GP,
 1204                                     IWN_OTP_GP_ECC_CORR_STTS);
 1205                         }
 1206                 }
 1207                 *out++ = val >> 16;
 1208                 if (count > 1)
 1209                         *out++ = val >> 24;
 1210         }
 1211         return 0;
 1212 }
 1213 
 1214 static void
 1215 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
 1216 {
 1217         if (error != 0)
 1218                 return;
 1219         KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
 1220         *(bus_addr_t *)arg = segs[0].ds_addr;
 1221 }
 1222 
 1223 static int
 1224 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
 1225     void **kvap, bus_size_t size, bus_size_t alignment)
 1226 {
 1227         int error;
 1228 
 1229         dma->tag = NULL;
 1230         dma->size = size;
 1231 
 1232         error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
 1233             0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
 1234             1, size, BUS_DMA_NOWAIT, NULL, NULL, &dma->tag);
 1235         if (error != 0)
 1236                 goto fail;
 1237 
 1238         error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
 1239             BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
 1240         if (error != 0)
 1241                 goto fail;
 1242 
 1243         error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
 1244             iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
 1245         if (error != 0)
 1246                 goto fail;
 1247 
 1248         bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
 1249 
 1250         if (kvap != NULL)
 1251                 *kvap = dma->vaddr;
 1252 
 1253         return 0;
 1254 
 1255 fail:   iwn_dma_contig_free(dma);
 1256         return error;
 1257 }
 1258 
 1259 static void
 1260 iwn_dma_contig_free(struct iwn_dma_info *dma)
 1261 {
 1262         if (dma->map != NULL) {
 1263                 if (dma->vaddr != NULL) {
 1264                         bus_dmamap_sync(dma->tag, dma->map,
 1265                             BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
 1266                         bus_dmamap_unload(dma->tag, dma->map);
 1267                         bus_dmamem_free(dma->tag, &dma->vaddr, dma->map);
 1268                         dma->vaddr = NULL;
 1269                 }
 1270                 bus_dmamap_destroy(dma->tag, dma->map);
 1271                 dma->map = NULL;
 1272         }
 1273         if (dma->tag != NULL) {
 1274                 bus_dma_tag_destroy(dma->tag);
 1275                 dma->tag = NULL;
 1276         }
 1277 }
 1278 
 1279 static int
 1280 iwn_alloc_sched(struct iwn_softc *sc)
 1281 {
 1282         /* TX scheduler rings must be aligned on a 1KB boundary. */
 1283         return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
 1284             sc->schedsz, 1024);
 1285 }
 1286 
 1287 static void
 1288 iwn_free_sched(struct iwn_softc *sc)
 1289 {
 1290         iwn_dma_contig_free(&sc->sched_dma);
 1291 }
 1292 
 1293 static int
 1294 iwn_alloc_kw(struct iwn_softc *sc)
 1295 {
 1296         /* "Keep Warm" page must be aligned on a 4KB boundary. */
 1297         return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
 1298 }
 1299 
 1300 static void
 1301 iwn_free_kw(struct iwn_softc *sc)
 1302 {
 1303         iwn_dma_contig_free(&sc->kw_dma);
 1304 }
 1305 
 1306 static int
 1307 iwn_alloc_ict(struct iwn_softc *sc)
 1308 {
 1309         /* ICT table must be aligned on a 4KB boundary. */
 1310         return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
 1311             IWN_ICT_SIZE, 4096);
 1312 }
 1313 
 1314 static void
 1315 iwn_free_ict(struct iwn_softc *sc)
 1316 {
 1317         iwn_dma_contig_free(&sc->ict_dma);
 1318 }
 1319 
 1320 static int
 1321 iwn_alloc_fwmem(struct iwn_softc *sc)
 1322 {
 1323         /* Must be aligned on a 16-byte boundary. */
 1324         return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
 1325 }
 1326 
 1327 static void
 1328 iwn_free_fwmem(struct iwn_softc *sc)
 1329 {
 1330         iwn_dma_contig_free(&sc->fw_dma);
 1331 }
 1332 
 1333 static int
 1334 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
 1335 {
 1336         bus_size_t size;
 1337         int i, error;
 1338 
 1339         ring->cur = 0;
 1340 
 1341         /* Allocate RX descriptors (256-byte aligned). */
 1342         size = IWN_RX_RING_COUNT * sizeof (uint32_t);
 1343         error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
 1344             size, 256);
 1345         if (error != 0) {
 1346                 device_printf(sc->sc_dev,
 1347                     "%s: could not allocate RX ring DMA memory, error %d\n",
 1348                     __func__, error);
 1349                 goto fail;
 1350         }
 1351 
 1352         /* Allocate RX status area (16-byte aligned). */
 1353         error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
 1354             sizeof (struct iwn_rx_status), 16);
 1355         if (error != 0) {
 1356                 device_printf(sc->sc_dev,
 1357                     "%s: could not allocate RX status DMA memory, error %d\n",
 1358                     __func__, error);
 1359                 goto fail;
 1360         }
 1361 
 1362         /* Create RX buffer DMA tag. */
 1363         error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
 1364             BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
 1365             IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, BUS_DMA_NOWAIT, NULL, NULL,
 1366             &ring->data_dmat);
 1367         if (error != 0) {
 1368                 device_printf(sc->sc_dev,
 1369                     "%s: could not create RX buf DMA tag, error %d\n",
 1370                     __func__, error);
 1371                 goto fail;
 1372         }
 1373 
 1374         /*
 1375          * Allocate and map RX buffers.
 1376          */
 1377         for (i = 0; i < IWN_RX_RING_COUNT; i++) {
 1378                 struct iwn_rx_data *data = &ring->data[i];
 1379                 bus_addr_t paddr;
 1380 
 1381                 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
 1382                 if (error != 0) {
 1383                         device_printf(sc->sc_dev,
 1384                             "%s: could not create RX buf DMA map, error %d\n",
 1385                             __func__, error);
 1386                         goto fail;
 1387                 }
 1388 
 1389                 data->m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR,
 1390                     IWN_RBUF_SIZE);
 1391                 if (data->m == NULL) {
 1392                         device_printf(sc->sc_dev,
 1393                             "%s: could not allocate RX mbuf\n", __func__);
 1394                         error = ENOBUFS;
 1395                         goto fail;
 1396                 }
 1397 
 1398                 error = bus_dmamap_load(ring->data_dmat, data->map,
 1399                     mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
 1400                     &paddr, BUS_DMA_NOWAIT);
 1401                 if (error != 0 && error != EFBIG) {
 1402                         device_printf(sc->sc_dev,
 1403                             "%s: can't not map mbuf, error %d\n", __func__,
 1404                             error);
 1405                         goto fail;
 1406                 }
 1407 
 1408                 /* Set physical address of RX buffer (256-byte aligned). */
 1409                 ring->desc[i] = htole32(paddr >> 8);
 1410         }
 1411 
 1412         bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
 1413             BUS_DMASYNC_PREWRITE);
 1414 
 1415         return 0;
 1416 
 1417 fail:   iwn_free_rx_ring(sc, ring);
 1418         return error;
 1419 }
 1420 
 1421 static void
 1422 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
 1423 {
 1424         int ntries;
 1425 
 1426         if (iwn_nic_lock(sc) == 0) {
 1427                 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
 1428                 for (ntries = 0; ntries < 1000; ntries++) {
 1429                         if (IWN_READ(sc, IWN_FH_RX_STATUS) &
 1430                             IWN_FH_RX_STATUS_IDLE)
 1431                                 break;
 1432                         DELAY(10);
 1433                 }
 1434                 iwn_nic_unlock(sc);
 1435         }
 1436         ring->cur = 0;
 1437         sc->last_rx_valid = 0;
 1438 }
 1439 
 1440 static void
 1441 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
 1442 {
 1443         int i;
 1444 
 1445         iwn_dma_contig_free(&ring->desc_dma);
 1446         iwn_dma_contig_free(&ring->stat_dma);
 1447 
 1448         for (i = 0; i < IWN_RX_RING_COUNT; i++) {
 1449                 struct iwn_rx_data *data = &ring->data[i];
 1450 
 1451                 if (data->m != NULL) {
 1452                         bus_dmamap_sync(ring->data_dmat, data->map,
 1453                             BUS_DMASYNC_POSTREAD);
 1454                         bus_dmamap_unload(ring->data_dmat, data->map);
 1455                         m_freem(data->m);
 1456                         data->m = NULL;
 1457                 }
 1458                 if (data->map != NULL)
 1459                         bus_dmamap_destroy(ring->data_dmat, data->map);
 1460         }
 1461         if (ring->data_dmat != NULL) {
 1462                 bus_dma_tag_destroy(ring->data_dmat);
 1463                 ring->data_dmat = NULL;
 1464         }
 1465 }
 1466 
 1467 static int
 1468 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
 1469 {
 1470         bus_addr_t paddr;
 1471         bus_size_t size;
 1472         int i, error;
 1473 
 1474         ring->qid = qid;
 1475         ring->queued = 0;
 1476         ring->cur = 0;
 1477 
 1478         /* Allocate TX descriptors (256-byte aligned). */
 1479         size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
 1480         error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
 1481             size, 256);
 1482         if (error != 0) {
 1483                 device_printf(sc->sc_dev,
 1484                     "%s: could not allocate TX ring DMA memory, error %d\n",
 1485                     __func__, error);
 1486                 goto fail;
 1487         }
 1488         /*
 1489          * We only use rings 0 through 4 (4 EDCA + cmd) so there is no need
 1490          * to allocate commands space for other rings.
 1491          * XXX Do we really need to allocate descriptors for other rings?
 1492          */
 1493         if (qid > 4)
 1494                 return 0;
 1495 
 1496         size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
 1497         error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
 1498             size, 4);
 1499         if (error != 0) {
 1500                 device_printf(sc->sc_dev,
 1501                     "%s: could not allocate TX cmd DMA memory, error %d\n",
 1502                     __func__, error);
 1503                 goto fail;
 1504         }
 1505 
 1506         error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
 1507             BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
 1508             IWN_MAX_SCATTER - 1, MCLBYTES, BUS_DMA_NOWAIT, NULL, NULL,
 1509             &ring->data_dmat);
 1510         if (error != 0) {
 1511                 device_printf(sc->sc_dev,
 1512                     "%s: could not create TX buf DMA tag, error %d\n",
 1513                     __func__, error);
 1514                 goto fail;
 1515         }
 1516 
 1517         paddr = ring->cmd_dma.paddr;
 1518         for (i = 0; i < IWN_TX_RING_COUNT; i++) {
 1519                 struct iwn_tx_data *data = &ring->data[i];
 1520 
 1521                 data->cmd_paddr = paddr;
 1522                 data->scratch_paddr = paddr + 12;
 1523                 paddr += sizeof (struct iwn_tx_cmd);
 1524 
 1525                 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
 1526                 if (error != 0) {
 1527                         device_printf(sc->sc_dev,
 1528                             "%s: could not create TX buf DMA map, error %d\n",
 1529                             __func__, error);
 1530                         goto fail;
 1531                 }
 1532         }
 1533         return 0;
 1534 
 1535 fail:   iwn_free_tx_ring(sc, ring);
 1536         return error;
 1537 }
 1538 
 1539 static void
 1540 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
 1541 {
 1542         int i;
 1543 
 1544         for (i = 0; i < IWN_TX_RING_COUNT; i++) {
 1545                 struct iwn_tx_data *data = &ring->data[i];
 1546 
 1547                 if (data->m != NULL) {
 1548                         bus_dmamap_sync(ring->data_dmat, data->map,
 1549                             BUS_DMASYNC_POSTWRITE);
 1550                         bus_dmamap_unload(ring->data_dmat, data->map);
 1551                         m_freem(data->m);
 1552                         data->m = NULL;
 1553                 }
 1554         }
 1555         /* Clear TX descriptors. */
 1556         memset(ring->desc, 0, ring->desc_dma.size);
 1557         bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
 1558             BUS_DMASYNC_PREWRITE);
 1559         sc->qfullmsk &= ~(1 << ring->qid);
 1560         ring->queued = 0;
 1561         ring->cur = 0;
 1562 }
 1563 
 1564 static void
 1565 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
 1566 {
 1567         int i;
 1568 
 1569         iwn_dma_contig_free(&ring->desc_dma);
 1570         iwn_dma_contig_free(&ring->cmd_dma);
 1571 
 1572         for (i = 0; i < IWN_TX_RING_COUNT; i++) {
 1573                 struct iwn_tx_data *data = &ring->data[i];
 1574 
 1575                 if (data->m != NULL) {
 1576                         bus_dmamap_sync(ring->data_dmat, data->map,
 1577                             BUS_DMASYNC_POSTWRITE);
 1578                         bus_dmamap_unload(ring->data_dmat, data->map);
 1579                         m_freem(data->m);
 1580                 }
 1581                 if (data->map != NULL)
 1582                         bus_dmamap_destroy(ring->data_dmat, data->map);
 1583         }
 1584         if (ring->data_dmat != NULL) {
 1585                 bus_dma_tag_destroy(ring->data_dmat);
 1586                 ring->data_dmat = NULL;
 1587         }
 1588 }
 1589 
 1590 static void
 1591 iwn5000_ict_reset(struct iwn_softc *sc)
 1592 {
 1593         /* Disable interrupts. */
 1594         IWN_WRITE(sc, IWN_INT_MASK, 0);
 1595 
 1596         /* Reset ICT table. */
 1597         memset(sc->ict, 0, IWN_ICT_SIZE);
 1598         sc->ict_cur = 0;
 1599 
 1600         /* Set physical address of ICT table (4KB aligned). */
 1601         DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
 1602         IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
 1603             IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
 1604 
 1605         /* Enable periodic RX interrupt. */
 1606         sc->int_mask |= IWN_INT_RX_PERIODIC;
 1607         /* Switch to ICT interrupt mode in driver. */
 1608         sc->sc_flags |= IWN_FLAG_USE_ICT;
 1609 
 1610         /* Re-enable interrupts. */
 1611         IWN_WRITE(sc, IWN_INT, 0xffffffff);
 1612         IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
 1613 }
 1614 
 1615 static int
 1616 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
 1617 {
 1618         struct iwn_ops *ops = &sc->ops;
 1619         uint16_t val;
 1620         int error;
 1621 
 1622         /* Check whether adapter has an EEPROM or an OTPROM. */
 1623         if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
 1624             (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
 1625                 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
 1626         DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
 1627             (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
 1628 
 1629         /* Adapter has to be powered on for EEPROM access to work. */
 1630         if ((error = iwn_apm_init(sc)) != 0) {
 1631                 device_printf(sc->sc_dev,
 1632                     "%s: could not power ON adapter, error %d\n", __func__,
 1633                     error);
 1634                 return error;
 1635         }
 1636 
 1637         if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
 1638                 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
 1639                 return EIO;
 1640         }
 1641         if ((error = iwn_eeprom_lock(sc)) != 0) {
 1642                 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
 1643                     __func__, error);
 1644                 return error;
 1645         }
 1646         if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
 1647                 if ((error = iwn_init_otprom(sc)) != 0) {
 1648                         device_printf(sc->sc_dev,
 1649                             "%s: could not initialize OTPROM, error %d\n",
 1650                             __func__, error);
 1651                         return error;
 1652                 }
 1653         }
 1654 
 1655         iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
 1656         DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
 1657         /* Check if HT support is bonded out. */
 1658         if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
 1659                 sc->sc_flags |= IWN_FLAG_HAS_11N;
 1660 
 1661         iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
 1662         sc->rfcfg = le16toh(val);
 1663         DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
 1664         /* Read Tx/Rx chains from ROM unless it's known to be broken. */
 1665         if (sc->txchainmask == 0)
 1666                 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
 1667         if (sc->rxchainmask == 0)
 1668                 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
 1669 
 1670         /* Read MAC address. */
 1671         iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
 1672 
 1673         /* Read adapter-specific information from EEPROM. */
 1674         ops->read_eeprom(sc);
 1675 
 1676         iwn_apm_stop(sc);       /* Power OFF adapter. */
 1677 
 1678         iwn_eeprom_unlock(sc);
 1679         return 0;
 1680 }
 1681 
 1682 static void
 1683 iwn4965_read_eeprom(struct iwn_softc *sc)
 1684 {
 1685         uint32_t addr;
 1686         uint16_t val;
 1687         int i;
 1688 
 1689         /* Read regulatory domain (4 ASCII characters). */
 1690         iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
 1691 
 1692         /* Read the list of authorized channels (20MHz ones only). */
 1693         for (i = 0; i < 5; i++) {
 1694                 addr = iwn4965_regulatory_bands[i];
 1695                 iwn_read_eeprom_channels(sc, i, addr);
 1696         }
 1697 
 1698         /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
 1699         iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
 1700         sc->maxpwr2GHz = val & 0xff;
 1701         sc->maxpwr5GHz = val >> 8;
 1702         /* Check that EEPROM values are within valid range. */
 1703         if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
 1704                 sc->maxpwr5GHz = 38;
 1705         if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
 1706                 sc->maxpwr2GHz = 38;
 1707         DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
 1708             sc->maxpwr2GHz, sc->maxpwr5GHz);
 1709 
 1710         /* Read samples for each TX power group. */
 1711         iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
 1712             sizeof sc->bands);
 1713 
 1714         /* Read voltage at which samples were taken. */
 1715         iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
 1716         sc->eeprom_voltage = (int16_t)le16toh(val);
 1717         DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
 1718             sc->eeprom_voltage);
 1719 
 1720 #ifdef IWN_DEBUG
 1721         /* Print samples. */
 1722         if (sc->sc_debug & IWN_DEBUG_ANY) {
 1723                 for (i = 0; i < IWN_NBANDS; i++)
 1724                         iwn4965_print_power_group(sc, i);
 1725         }
 1726 #endif
 1727 }
 1728 
 1729 #ifdef IWN_DEBUG
 1730 static void
 1731 iwn4965_print_power_group(struct iwn_softc *sc, int i)
 1732 {
 1733         struct iwn4965_eeprom_band *band = &sc->bands[i];
 1734         struct iwn4965_eeprom_chan_samples *chans = band->chans;
 1735         int j, c;
 1736 
 1737         printf("===band %d===\n", i);
 1738         printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
 1739         printf("chan1 num=%d\n", chans[0].num);
 1740         for (c = 0; c < 2; c++) {
 1741                 for (j = 0; j < IWN_NSAMPLES; j++) {
 1742                         printf("chain %d, sample %d: temp=%d gain=%d "
 1743                             "power=%d pa_det=%d\n", c, j,
 1744                             chans[0].samples[c][j].temp,
 1745                             chans[0].samples[c][j].gain,
 1746                             chans[0].samples[c][j].power,
 1747                             chans[0].samples[c][j].pa_det);
 1748                 }
 1749         }
 1750         printf("chan2 num=%d\n", chans[1].num);
 1751         for (c = 0; c < 2; c++) {
 1752                 for (j = 0; j < IWN_NSAMPLES; j++) {
 1753                         printf("chain %d, sample %d: temp=%d gain=%d "
 1754                             "power=%d pa_det=%d\n", c, j,
 1755                             chans[1].samples[c][j].temp,
 1756                             chans[1].samples[c][j].gain,
 1757                             chans[1].samples[c][j].power,
 1758                             chans[1].samples[c][j].pa_det);
 1759                 }
 1760         }
 1761 }
 1762 #endif
 1763 
 1764 static void
 1765 iwn5000_read_eeprom(struct iwn_softc *sc)
 1766 {
 1767         struct iwn5000_eeprom_calib_hdr hdr;
 1768         int32_t volt;
 1769         uint32_t base, addr;
 1770         uint16_t val;
 1771         int i;
 1772 
 1773         /* Read regulatory domain (4 ASCII characters). */
 1774         iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
 1775         base = le16toh(val);
 1776         iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
 1777             sc->eeprom_domain, 4);
 1778 
 1779         /* Read the list of authorized channels (20MHz ones only). */
 1780         for (i = 0; i < 5; i++) {
 1781                 addr = base + iwn5000_regulatory_bands[i];
 1782                 iwn_read_eeprom_channels(sc, i, addr);
 1783         }
 1784 
 1785         /* Read enhanced TX power information for 6000 Series. */
 1786         if (sc->hw_type >= IWN_HW_REV_TYPE_6000)
 1787                 iwn_read_eeprom_enhinfo(sc);
 1788 
 1789         iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
 1790         base = le16toh(val);
 1791         iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
 1792         DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 1793             "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
 1794             hdr.version, hdr.pa_type, le16toh(hdr.volt));
 1795         sc->calib_ver = hdr.version;
 1796 
 1797         if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
 1798                 /* Compute temperature offset. */
 1799                 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
 1800                 sc->eeprom_temp = le16toh(val);
 1801                 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
 1802                 volt = le16toh(val);
 1803                 sc->temp_off = sc->eeprom_temp - (volt / -5);
 1804                 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
 1805                     sc->eeprom_temp, volt, sc->temp_off);
 1806         } else {
 1807                 /* Read crystal calibration. */
 1808                 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
 1809                     &sc->eeprom_crystal, sizeof (uint32_t));
 1810                 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
 1811                     le32toh(sc->eeprom_crystal));
 1812         }
 1813 }
 1814 
 1815 /*
 1816  * Translate EEPROM flags to net80211.
 1817  */
 1818 static uint32_t
 1819 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
 1820 {
 1821         uint32_t nflags;
 1822 
 1823         nflags = 0;
 1824         if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
 1825                 nflags |= IEEE80211_CHAN_PASSIVE;
 1826         if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
 1827                 nflags |= IEEE80211_CHAN_NOADHOC;
 1828         if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
 1829                 nflags |= IEEE80211_CHAN_DFS;
 1830                 /* XXX apparently IBSS may still be marked */
 1831                 nflags |= IEEE80211_CHAN_NOADHOC;
 1832         }
 1833 
 1834         return nflags;
 1835 }
 1836 
 1837 static void
 1838 iwn_read_eeprom_band(struct iwn_softc *sc, int n)
 1839 {
 1840         struct ifnet *ifp = sc->sc_ifp;
 1841         struct ieee80211com *ic = ifp->if_l2com;
 1842         struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
 1843         const struct iwn_chan_band *band = &iwn_bands[n];
 1844         struct ieee80211_channel *c;
 1845         uint8_t chan;
 1846         int i, nflags;
 1847 
 1848         for (i = 0; i < band->nchan; i++) {
 1849                 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
 1850                         DPRINTF(sc, IWN_DEBUG_RESET,
 1851                             "skip chan %d flags 0x%x maxpwr %d\n",
 1852                             band->chan[i], channels[i].flags,
 1853                             channels[i].maxpwr);
 1854                         continue;
 1855                 }
 1856                 chan = band->chan[i];
 1857                 nflags = iwn_eeprom_channel_flags(&channels[i]);
 1858 
 1859                 c = &ic->ic_channels[ic->ic_nchans++];
 1860                 c->ic_ieee = chan;
 1861                 c->ic_maxregpower = channels[i].maxpwr;
 1862                 c->ic_maxpower = 2*c->ic_maxregpower;
 1863 
 1864                 if (n == 0) {   /* 2GHz band */
 1865                         c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_G);
 1866                         /* G =>'s B is supported */
 1867                         c->ic_flags = IEEE80211_CHAN_B | nflags;
 1868                         c = &ic->ic_channels[ic->ic_nchans++];
 1869                         c[0] = c[-1];
 1870                         c->ic_flags = IEEE80211_CHAN_G | nflags;
 1871                 } else {        /* 5GHz band */
 1872                         c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_A);
 1873                         c->ic_flags = IEEE80211_CHAN_A | nflags;
 1874                 }
 1875 
 1876                 /* Save maximum allowed TX power for this channel. */
 1877                 sc->maxpwr[chan] = channels[i].maxpwr;
 1878 
 1879                 DPRINTF(sc, IWN_DEBUG_RESET,
 1880                     "add chan %d flags 0x%x maxpwr %d\n", chan,
 1881                     channels[i].flags, channels[i].maxpwr);
 1882 
 1883 #if 0   /* HT */
 1884                 /* XXX no constraints on using HT20 */
 1885                 /* add HT20, HT40 added separately */
 1886                 c = &ic->ic_channels[ic->ic_nchans++];
 1887                 c[0] = c[-1];
 1888                 c->ic_flags |= IEEE80211_CHAN_HT20;
 1889                 /* XXX NARROW =>'s 1/2 and 1/4 width? */
 1890 #endif
 1891         }
 1892 }
 1893 
 1894 #if 0   /* HT */
 1895 static void
 1896 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n)
 1897 {
 1898         struct ifnet *ifp = sc->sc_ifp;
 1899         struct ieee80211com *ic = ifp->if_l2com;
 1900         struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
 1901         const struct iwn_chan_band *band = &iwn_bands[n];
 1902         struct ieee80211_channel *c, *cent, *extc;
 1903         int i;
 1904 
 1905         for (i = 0; i < band->nchan; i++) {
 1906                 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID) ||
 1907                     !(channels[i].flags & IWN_EEPROM_CHAN_WIDE)) {
 1908                         DPRINTF(sc, IWN_DEBUG_RESET,
 1909                             "skip chan %d flags 0x%x maxpwr %d\n",
 1910                             band->chan[i], channels[i].flags,
 1911                             channels[i].maxpwr);
 1912                         continue;
 1913                 }
 1914                 /*
 1915                  * Each entry defines an HT40 channel pair; find the
 1916                  * center channel, then the extension channel above.
 1917                  */
 1918                 cent = ieee80211_find_channel_byieee(ic, band->chan[i],
 1919                     band->flags & ~IEEE80211_CHAN_HT);
 1920                 if (cent == NULL) {     /* XXX shouldn't happen */
 1921                         device_printf(sc->sc_dev,
 1922                             "%s: no entry for channel %d\n",
 1923                             __func__, band->chan[i]);
 1924                         continue;
 1925                 }
 1926                 extc = ieee80211_find_channel(ic, cent->ic_freq+20,
 1927                     band->flags & ~IEEE80211_CHAN_HT);
 1928                 if (extc == NULL) {
 1929                         DPRINTF(sc, IWN_DEBUG_RESET,
 1930                             "skip chan %d, extension channel not found\n",
 1931                             band->chan[i]);
 1932                         continue;
 1933                 }
 1934 
 1935                 DPRINTF(sc, IWN_DEBUG_RESET,
 1936                     "add ht40 chan %d flags 0x%x maxpwr %d\n",
 1937                     band->chan[i], channels[i].flags, channels[i].maxpwr);
 1938 
 1939                 c = &ic->ic_channels[ic->ic_nchans++];
 1940                 c[0] = cent[0];
 1941                 c->ic_extieee = extc->ic_ieee;
 1942                 c->ic_flags &= ~IEEE80211_CHAN_HT;
 1943                 c->ic_flags |= IEEE80211_CHAN_HT40U;
 1944                 c = &ic->ic_channels[ic->ic_nchans++];
 1945                 c[0] = extc[0];
 1946                 c->ic_extieee = cent->ic_ieee;
 1947                 c->ic_flags &= ~IEEE80211_CHAN_HT;
 1948                 c->ic_flags |= IEEE80211_CHAN_HT40D;
 1949         }
 1950 }
 1951 #endif
 1952 
 1953 static void
 1954 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
 1955 {
 1956         struct ifnet *ifp = sc->sc_ifp;
 1957         struct ieee80211com *ic = ifp->if_l2com;
 1958 
 1959         iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
 1960             iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
 1961 
 1962         if (n < 5)
 1963                 iwn_read_eeprom_band(sc, n);
 1964 #if 0   /* HT */
 1965         else
 1966                 iwn_read_eeprom_ht40(sc, n);
 1967 #endif
 1968         ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
 1969 }
 1970 
 1971 static struct iwn_eeprom_chan *
 1972 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
 1973 {
 1974         int i, j;
 1975 
 1976         for (j = 0; j < 7; j++) {
 1977                 for (i = 0; i < iwn_bands[j].nchan; i++) {
 1978                         if (iwn_bands[j].chan[i] == c->ic_ieee)
 1979                                 return &sc->eeprom_channels[j][i];
 1980                 }
 1981         }
 1982 
 1983         return NULL;
 1984 }
 1985 
 1986 /*
 1987  * Enforce flags read from EEPROM.
 1988  */
 1989 static int
 1990 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
 1991     int nchan, struct ieee80211_channel chans[])
 1992 {
 1993         struct iwn_softc *sc = ic->ic_ifp->if_softc;
 1994         int i;
 1995 
 1996         for (i = 0; i < nchan; i++) {
 1997                 struct ieee80211_channel *c = &chans[i];
 1998                 struct iwn_eeprom_chan *channel;
 1999 
 2000                 channel = iwn_find_eeprom_channel(sc, c);
 2001                 if (channel == NULL) {
 2002                         if_printf(ic->ic_ifp,
 2003                             "%s: invalid channel %u freq %u/0x%x\n",
 2004                             __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
 2005                         return EINVAL;
 2006                 }
 2007                 c->ic_flags |= iwn_eeprom_channel_flags(channel);
 2008         }
 2009 
 2010         return 0;
 2011 }
 2012 
 2013 static void
 2014 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
 2015 {
 2016         struct iwn_eeprom_enhinfo enhinfo[35];
 2017         uint16_t val, base;
 2018         int8_t maxpwr;
 2019         int i;
 2020 
 2021         iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
 2022         base = le16toh(val);
 2023         iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
 2024             enhinfo, sizeof enhinfo);
 2025 
 2026         memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr);
 2027         for (i = 0; i < nitems(enhinfo); i++) {
 2028                 if (enhinfo[i].chan == 0 || enhinfo[i].reserved != 0)
 2029                         continue;       /* Skip invalid entries. */
 2030 
 2031                 maxpwr = 0;
 2032                 if (sc->txchainmask & IWN_ANT_A)
 2033                         maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
 2034                 if (sc->txchainmask & IWN_ANT_B)
 2035                         maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
 2036                 if (sc->txchainmask & IWN_ANT_C)
 2037                         maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
 2038                 if (sc->ntxchains == 2)
 2039                         maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
 2040                 else if (sc->ntxchains == 3)
 2041                         maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
 2042                 maxpwr /= 2;    /* Convert half-dBm to dBm. */
 2043 
 2044                 DPRINTF(sc, IWN_DEBUG_RESET, "enhinfo %d, maxpwr=%d\n", i,
 2045                     maxpwr);
 2046                 sc->enh_maxpwr[i] = maxpwr;
 2047         }
 2048 }
 2049 
 2050 static struct ieee80211_node *
 2051 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
 2052 {
 2053         return malloc(sizeof (struct iwn_node), M_80211_NODE,M_NOWAIT | M_ZERO);
 2054 }
 2055 
 2056 static void
 2057 iwn_newassoc(struct ieee80211_node *ni, int isnew)
 2058 {
 2059         struct iwn_node *wn = (void *)ni;
 2060         int ridx, i;
 2061 
 2062         for (i = 0; i < ni->ni_rates.rs_nrates; i++) {
 2063                 ridx = iwn_plcp_signal(ni->ni_rates.rs_rates[i]);
 2064                 wn->ridx[i] = ridx;
 2065         }
 2066 }
 2067 
 2068 static int
 2069 iwn_media_change(struct ifnet *ifp)
 2070 {
 2071         int error;
 2072 
 2073         error = ieee80211_media_change(ifp);
 2074         /* NB: only the fixed rate can change and that doesn't need a reset */
 2075         return (error == ENETRESET ? 0 : error);
 2076 }
 2077 
 2078 static int
 2079 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
 2080 {
 2081         struct iwn_vap *ivp = IWN_VAP(vap);
 2082         struct ieee80211com *ic = vap->iv_ic;
 2083         struct iwn_softc *sc = ic->ic_ifp->if_softc;
 2084         int error = 0;
 2085 
 2086         DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
 2087             ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
 2088 
 2089         IEEE80211_UNLOCK(ic);
 2090         IWN_LOCK(sc);
 2091         callout_stop(&sc->calib_to);
 2092 
 2093         switch (nstate) {
 2094         case IEEE80211_S_ASSOC:
 2095                 if (vap->iv_state != IEEE80211_S_RUN)
 2096                         break;
 2097                 /* FALLTHROUGH */
 2098         case IEEE80211_S_AUTH:
 2099                 if (vap->iv_state == IEEE80211_S_AUTH)
 2100                         break;
 2101 
 2102                 /*
 2103                  * !AUTH -> AUTH transition requires state reset to handle
 2104                  * reassociations correctly.
 2105                  */
 2106                 sc->rxon.associd = 0;
 2107                 sc->rxon.filter &= ~htole32(IWN_FILTER_BSS);
 2108                 sc->calib.state = IWN_CALIB_STATE_INIT;
 2109 
 2110                 if ((error = iwn_auth(sc, vap)) != 0) {
 2111                         device_printf(sc->sc_dev,
 2112                             "%s: could not move to auth state\n", __func__);
 2113                 }
 2114                 break;
 2115 
 2116         case IEEE80211_S_RUN:
 2117                 /*
 2118                  * RUN -> RUN transition; Just restart the timers.
 2119                  */
 2120                 if (vap->iv_state == IEEE80211_S_RUN) {
 2121                         sc->calib_cnt = 0;
 2122                         break;
 2123                 }
 2124 
 2125                 /*
 2126                  * !RUN -> RUN requires setting the association id
 2127                  * which is done with a firmware cmd.  We also defer
 2128                  * starting the timers until that work is done.
 2129                  */
 2130                 if ((error = iwn_run(sc, vap)) != 0) {
 2131                         device_printf(sc->sc_dev,
 2132                             "%s: could not move to run state\n", __func__);
 2133                 }
 2134                 break;
 2135 
 2136         case IEEE80211_S_INIT:
 2137                 sc->calib.state = IWN_CALIB_STATE_INIT;
 2138                 break;
 2139 
 2140         default:
 2141                 break;
 2142         }
 2143         IWN_UNLOCK(sc);
 2144         IEEE80211_LOCK(ic);
 2145         if (error != 0)
 2146                 return error;
 2147         return ivp->iv_newstate(vap, nstate, arg);
 2148 }
 2149 
 2150 static void
 2151 iwn_calib_timeout(void *arg)
 2152 {
 2153         struct iwn_softc *sc = arg;
 2154 
 2155         IWN_LOCK_ASSERT(sc);
 2156 
 2157         /* Force automatic TX power calibration every 60 secs. */
 2158         if (++sc->calib_cnt >= 120) {
 2159                 uint32_t flags = 0;
 2160 
 2161                 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
 2162                     "sending request for statistics");
 2163                 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
 2164                     sizeof flags, 1);
 2165                 sc->calib_cnt = 0;
 2166         }
 2167         callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
 2168             sc);
 2169 }
 2170 
 2171 /*
 2172  * Process an RX_PHY firmware notification.  This is usually immediately
 2173  * followed by an MPDU_RX_DONE notification.
 2174  */
 2175 static void
 2176 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
 2177     struct iwn_rx_data *data)
 2178 {
 2179         struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
 2180 
 2181         DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
 2182         bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 2183 
 2184         /* Save RX statistics, they will be used on MPDU_RX_DONE. */
 2185         memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
 2186         sc->last_rx_valid = 1;
 2187 }
 2188 
 2189 /*
 2190  * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
 2191  * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
 2192  */
 2193 static void
 2194 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
 2195     struct iwn_rx_data *data)
 2196 {
 2197         struct iwn_ops *ops = &sc->ops;
 2198         struct ifnet *ifp = sc->sc_ifp;
 2199         struct ieee80211com *ic = ifp->if_l2com;
 2200         struct iwn_rx_ring *ring = &sc->rxq;
 2201         struct ieee80211_frame *wh;
 2202         struct ieee80211_node *ni;
 2203         struct mbuf *m, *m1;
 2204         struct iwn_rx_stat *stat;
 2205         caddr_t head;
 2206         bus_addr_t paddr;
 2207         uint32_t flags;
 2208         int error, len, rssi, nf;
 2209 
 2210         if (desc->type == IWN_MPDU_RX_DONE) {
 2211                 /* Check for prior RX_PHY notification. */
 2212                 if (!sc->last_rx_valid) {
 2213                         DPRINTF(sc, IWN_DEBUG_ANY,
 2214                             "%s: missing RX_PHY\n", __func__);
 2215                         return;
 2216                 }
 2217                 sc->last_rx_valid = 0;
 2218                 stat = &sc->last_rx_stat;
 2219         } else
 2220                 stat = (struct iwn_rx_stat *)(desc + 1);
 2221 
 2222         bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 2223 
 2224         if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
 2225                 device_printf(sc->sc_dev,
 2226                     "%s: invalid RX statistic header, len %d\n", __func__,
 2227                     stat->cfg_phy_len);
 2228                 return;
 2229         }
 2230         if (desc->type == IWN_MPDU_RX_DONE) {
 2231                 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
 2232                 head = (caddr_t)(mpdu + 1);
 2233                 len = le16toh(mpdu->len);
 2234         } else {
 2235                 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
 2236                 len = le16toh(stat->len);
 2237         }
 2238 
 2239         flags = le32toh(*(uint32_t *)(head + len));
 2240 
 2241         /* Discard frames with a bad FCS early. */
 2242         if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
 2243                 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
 2244                     __func__, flags);
 2245                 ifp->if_ierrors++;
 2246                 return;
 2247         }
 2248         /* Discard frames that are too short. */
 2249         if (len < sizeof (*wh)) {
 2250                 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
 2251                     __func__, len);
 2252                 ifp->if_ierrors++;
 2253                 return;
 2254         }
 2255 
 2256         m1 = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
 2257         if (m1 == NULL) {
 2258                 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
 2259                     __func__);
 2260                 ifp->if_ierrors++;
 2261                 return;
 2262         }
 2263         bus_dmamap_unload(ring->data_dmat, data->map);
 2264 
 2265         error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
 2266             IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
 2267         if (error != 0 && error != EFBIG) {
 2268                 device_printf(sc->sc_dev,
 2269                     "%s: bus_dmamap_load failed, error %d\n", __func__, error);
 2270                 m_freem(m1);
 2271 
 2272                 /* Try to reload the old mbuf. */
 2273                 error = bus_dmamap_load(ring->data_dmat, data->map,
 2274                     mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
 2275                     &paddr, BUS_DMA_NOWAIT);
 2276                 if (error != 0 && error != EFBIG) {
 2277                         panic("%s: could not load old RX mbuf", __func__);
 2278                 }
 2279                 /* Physical address may have changed. */
 2280                 ring->desc[ring->cur] = htole32(paddr >> 8);
 2281                 bus_dmamap_sync(ring->data_dmat, ring->desc_dma.map,
 2282                     BUS_DMASYNC_PREWRITE);
 2283                 ifp->if_ierrors++;
 2284                 return;
 2285         }
 2286 
 2287         m = data->m;
 2288         data->m = m1;
 2289         /* Update RX descriptor. */
 2290         ring->desc[ring->cur] = htole32(paddr >> 8);
 2291         bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
 2292             BUS_DMASYNC_PREWRITE);
 2293 
 2294         /* Finalize mbuf. */
 2295         m->m_pkthdr.rcvif = ifp;
 2296         m->m_data = head;
 2297         m->m_pkthdr.len = m->m_len = len;
 2298 
 2299         /* Grab a reference to the source node. */
 2300         wh = mtod(m, struct ieee80211_frame *);
 2301         ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
 2302         nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
 2303             (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
 2304 
 2305         rssi = ops->get_rssi(sc, stat);
 2306 
 2307         if (ieee80211_radiotap_active(ic)) {
 2308                 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
 2309 
 2310                 tap->wr_flags = 0;
 2311                 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
 2312                         tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
 2313                 tap->wr_dbm_antsignal = (int8_t)rssi;
 2314                 tap->wr_dbm_antnoise = (int8_t)nf;
 2315                 tap->wr_tsft = stat->tstamp;
 2316                 switch (stat->rate) {
 2317                 /* CCK rates. */
 2318                 case  10: tap->wr_rate =   2; break;
 2319                 case  20: tap->wr_rate =   4; break;
 2320                 case  55: tap->wr_rate =  11; break;
 2321                 case 110: tap->wr_rate =  22; break;
 2322                 /* OFDM rates. */
 2323                 case 0xd: tap->wr_rate =  12; break;
 2324                 case 0xf: tap->wr_rate =  18; break;
 2325                 case 0x5: tap->wr_rate =  24; break;
 2326                 case 0x7: tap->wr_rate =  36; break;
 2327                 case 0x9: tap->wr_rate =  48; break;
 2328                 case 0xb: tap->wr_rate =  72; break;
 2329                 case 0x1: tap->wr_rate =  96; break;
 2330                 case 0x3: tap->wr_rate = 108; break;
 2331                 /* Unknown rate: should not happen. */
 2332                 default:  tap->wr_rate =   0;
 2333                 }
 2334         }
 2335 
 2336         IWN_UNLOCK(sc);
 2337 
 2338         /* Send the frame to the 802.11 layer. */
 2339         if (ni != NULL) {
 2340                 (void)ieee80211_input(ni, m, rssi - nf, nf);
 2341                 /* Node is no longer needed. */
 2342                 ieee80211_free_node(ni);
 2343         } else
 2344                 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
 2345 
 2346         IWN_LOCK(sc);
 2347 }
 2348 
 2349 #if 0   /* HT */
 2350 /* Process an incoming Compressed BlockAck. */
 2351 static void
 2352 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
 2353     struct iwn_rx_data *data)
 2354 {
 2355         struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
 2356         struct iwn_tx_ring *txq;
 2357 
 2358         bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 2359 
 2360         txq = &sc->txq[letoh16(ba->qid)];
 2361         /* XXX TBD */
 2362 }
 2363 #endif
 2364 
 2365 /*
 2366  * Process a CALIBRATION_RESULT notification sent by the initialization
 2367  * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
 2368  */
 2369 static void
 2370 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
 2371     struct iwn_rx_data *data)
 2372 {
 2373         struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
 2374         int len, idx = -1;
 2375 
 2376         /* Runtime firmware should not send such a notification. */
 2377         if (sc->sc_flags & IWN_FLAG_CALIB_DONE)
 2378                 return;
 2379 
 2380         len = (le32toh(desc->len) & 0x3fff) - 4;
 2381         bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 2382 
 2383         switch (calib->code) {
 2384         case IWN5000_PHY_CALIB_DC:
 2385                 if ((sc->sc_flags & IWN_FLAG_INTERNAL_PA) == 0 &&
 2386                     (sc->hw_type == IWN_HW_REV_TYPE_5150 ||
 2387                      sc->hw_type >= IWN_HW_REV_TYPE_6000))
 2388                         idx = 0;
 2389                 break;
 2390         case IWN5000_PHY_CALIB_LO:
 2391                 idx = 1;
 2392                 break;
 2393         case IWN5000_PHY_CALIB_TX_IQ:
 2394                 idx = 2;
 2395                 break;
 2396         case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
 2397                 if (sc->hw_type < IWN_HW_REV_TYPE_6000 &&
 2398                     sc->hw_type != IWN_HW_REV_TYPE_5150)
 2399                         idx = 3;
 2400                 break;
 2401         case IWN5000_PHY_CALIB_BASE_BAND:
 2402                 idx = 4;
 2403                 break;
 2404         }
 2405         if (idx == -1)  /* Ignore other results. */
 2406                 return;
 2407 
 2408         /* Save calibration result. */
 2409         if (sc->calibcmd[idx].buf != NULL)
 2410                 free(sc->calibcmd[idx].buf, M_DEVBUF);
 2411         sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
 2412         if (sc->calibcmd[idx].buf == NULL) {
 2413                 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 2414                     "not enough memory for calibration result %d\n",
 2415                     calib->code);
 2416                 return;
 2417         }
 2418         DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 2419             "saving calibration result code=%d len=%d\n", calib->code, len);
 2420         sc->calibcmd[idx].len = len;
 2421         memcpy(sc->calibcmd[idx].buf, calib, len);
 2422 }
 2423 
 2424 /*
 2425  * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
 2426  * The latter is sent by the firmware after each received beacon.
 2427  */
 2428 static void
 2429 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
 2430     struct iwn_rx_data *data)
 2431 {
 2432         struct iwn_ops *ops = &sc->ops;
 2433         struct ifnet *ifp = sc->sc_ifp;
 2434         struct ieee80211com *ic = ifp->if_l2com;
 2435         struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 2436         struct iwn_calib_state *calib = &sc->calib;
 2437         struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
 2438         int temp;
 2439 
 2440         /* Ignore statistics received during a scan. */
 2441         if (vap->iv_state != IEEE80211_S_RUN ||
 2442             (ic->ic_flags & IEEE80211_F_SCAN))
 2443                 return;
 2444 
 2445         bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 2446 
 2447         DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received statistics, cmd %d\n",
 2448             __func__, desc->type);
 2449         sc->calib_cnt = 0;      /* Reset TX power calibration timeout. */
 2450 
 2451         /* Test if temperature has changed. */
 2452         if (stats->general.temp != sc->rawtemp) {
 2453                 /* Convert "raw" temperature to degC. */
 2454                 sc->rawtemp = stats->general.temp;
 2455                 temp = ops->get_temperature(sc);
 2456                 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
 2457                     __func__, temp);
 2458 
 2459                 /* Update TX power if need be (4965AGN only). */
 2460                 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
 2461                         iwn4965_power_calibration(sc, temp);
 2462         }
 2463 
 2464         if (desc->type != IWN_BEACON_STATISTICS)
 2465                 return; /* Reply to a statistics request. */
 2466 
 2467         sc->noise = iwn_get_noise(&stats->rx.general);
 2468         DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
 2469 
 2470         /* Test that RSSI and noise are present in stats report. */
 2471         if (le32toh(stats->rx.general.flags) != 1) {
 2472                 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
 2473                     "received statistics without RSSI");
 2474                 return;
 2475         }
 2476 
 2477         if (calib->state == IWN_CALIB_STATE_ASSOC)
 2478                 iwn_collect_noise(sc, &stats->rx.general);
 2479         else if (calib->state == IWN_CALIB_STATE_RUN)
 2480                 iwn_tune_sensitivity(sc, &stats->rx);
 2481 }
 2482 
 2483 /*
 2484  * Process a TX_DONE firmware notification.  Unfortunately, the 4965AGN
 2485  * and 5000 adapters have different incompatible TX status formats.
 2486  */
 2487 static void
 2488 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
 2489     struct iwn_rx_data *data)
 2490 {
 2491         struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
 2492         struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
 2493 
 2494         DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
 2495             "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
 2496             __func__, desc->qid, desc->idx, stat->ackfailcnt,
 2497             stat->btkillcnt, stat->rate, le16toh(stat->duration),
 2498             le32toh(stat->status));
 2499 
 2500         bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 2501         iwn_tx_done(sc, desc, stat->ackfailcnt, le32toh(stat->status) & 0xff);
 2502 }
 2503 
 2504 static void
 2505 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
 2506     struct iwn_rx_data *data)
 2507 {
 2508         struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
 2509         struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
 2510 
 2511         DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
 2512             "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
 2513             __func__, desc->qid, desc->idx, stat->ackfailcnt,
 2514             stat->btkillcnt, stat->rate, le16toh(stat->duration),
 2515             le32toh(stat->status));
 2516 
 2517 #ifdef notyet
 2518         /* Reset TX scheduler slot. */
 2519         iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
 2520 #endif
 2521 
 2522         bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 2523         iwn_tx_done(sc, desc, stat->ackfailcnt, le16toh(stat->status) & 0xff);
 2524 }
 2525 
 2526 /*
 2527  * Adapter-independent backend for TX_DONE firmware notifications.
 2528  */
 2529 static void
 2530 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
 2531     uint8_t status)
 2532 {
 2533         struct ifnet *ifp = sc->sc_ifp;
 2534         struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
 2535         struct iwn_tx_data *data = &ring->data[desc->idx];
 2536         struct mbuf *m;
 2537         struct ieee80211_node *ni;
 2538         struct ieee80211vap *vap;
 2539 
 2540         KASSERT(data->ni != NULL, ("no node"));
 2541 
 2542         /* Unmap and free mbuf. */
 2543         bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
 2544         bus_dmamap_unload(ring->data_dmat, data->map);
 2545         m = data->m, data->m = NULL;
 2546         ni = data->ni, data->ni = NULL;
 2547         vap = ni->ni_vap;
 2548 
 2549         if (m->m_flags & M_TXCB) {
 2550                 /*
 2551                  * Channels marked for "radar" require traffic to be received
 2552                  * to unlock before we can transmit.  Until traffic is seen
 2553                  * any attempt to transmit is returned immediately with status
 2554                  * set to IWN_TX_FAIL_TX_LOCKED.  Unfortunately this can easily
 2555                  * happen on first authenticate after scanning.  To workaround
 2556                  * this we ignore a failure of this sort in AUTH state so the
 2557                  * 802.11 layer will fall back to using a timeout to wait for
 2558                  * the AUTH reply.  This allows the firmware time to see
 2559                  * traffic so a subsequent retry of AUTH succeeds.  It's
 2560                  * unclear why the firmware does not maintain state for
 2561                  * channels recently visited as this would allow immediate
 2562                  * use of the channel after a scan (where we see traffic).
 2563                  */
 2564                 if (status == IWN_TX_FAIL_TX_LOCKED &&
 2565                     ni->ni_vap->iv_state == IEEE80211_S_AUTH)
 2566                         ieee80211_process_callback(ni, m, 0);
 2567                 else
 2568                         ieee80211_process_callback(ni, m,
 2569                             (status & IWN_TX_FAIL) != 0);
 2570         }
 2571 
 2572         /*
 2573          * Update rate control statistics for the node.
 2574          */
 2575         if (status & IWN_TX_FAIL) {
 2576                 ifp->if_oerrors++;
 2577                 ieee80211_ratectl_tx_complete(vap, ni,
 2578                     IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
 2579         } else {
 2580                 ifp->if_opackets++;
 2581                 ieee80211_ratectl_tx_complete(vap, ni,
 2582                     IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
 2583         }
 2584         m_freem(m);
 2585         ieee80211_free_node(ni);
 2586 
 2587         sc->sc_tx_timer = 0;
 2588         if (--ring->queued < IWN_TX_RING_LOMARK) {
 2589                 sc->qfullmsk &= ~(1 << ring->qid);
 2590                 if (sc->qfullmsk == 0 &&
 2591                     (ifp->if_drv_flags & IFF_DRV_OACTIVE)) {
 2592                         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 2593                         iwn_start_locked(ifp);
 2594                 }
 2595         }
 2596 }
 2597 
 2598 /*
 2599  * Process a "command done" firmware notification.  This is where we wakeup
 2600  * processes waiting for a synchronous command completion.
 2601  */
 2602 static void
 2603 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
 2604 {
 2605         struct iwn_tx_ring *ring = &sc->txq[4];
 2606         struct iwn_tx_data *data;
 2607 
 2608         if ((desc->qid & 0xf) != 4)
 2609                 return; /* Not a command ack. */
 2610 
 2611         data = &ring->data[desc->idx];
 2612 
 2613         /* If the command was mapped in an mbuf, free it. */
 2614         if (data->m != NULL) {
 2615                 bus_dmamap_sync(ring->data_dmat, data->map,
 2616                     BUS_DMASYNC_POSTWRITE);
 2617                 bus_dmamap_unload(ring->data_dmat, data->map);
 2618                 m_freem(data->m);
 2619                 data->m = NULL;
 2620         }
 2621         wakeup(&ring->desc[desc->idx]);
 2622 }
 2623 
 2624 /*
 2625  * Process an INT_FH_RX or INT_SW_RX interrupt.
 2626  */
 2627 static void
 2628 iwn_notif_intr(struct iwn_softc *sc)
 2629 {
 2630         struct iwn_ops *ops = &sc->ops;
 2631         struct ifnet *ifp = sc->sc_ifp;
 2632         struct ieee80211com *ic = ifp->if_l2com;
 2633         struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 2634         uint16_t hw;
 2635 
 2636         bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
 2637             BUS_DMASYNC_POSTREAD);
 2638 
 2639         hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
 2640         while (sc->rxq.cur != hw) {
 2641                 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
 2642                 struct iwn_rx_desc *desc;
 2643 
 2644                 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
 2645                     BUS_DMASYNC_POSTREAD);
 2646                 desc = mtod(data->m, struct iwn_rx_desc *);
 2647 
 2648                 DPRINTF(sc, IWN_DEBUG_RECV,
 2649                     "%s: qid %x idx %d flags %x type %d(%s) len %d\n",
 2650                     __func__, desc->qid & 0xf, desc->idx, desc->flags,
 2651                     desc->type, iwn_intr_str(desc->type),
 2652                     le16toh(desc->len));
 2653 
 2654                 if (!(desc->qid & 0x80))        /* Reply to a command. */
 2655                         iwn_cmd_done(sc, desc);
 2656 
 2657                 switch (desc->type) {
 2658                 case IWN_RX_PHY:
 2659                         iwn_rx_phy(sc, desc, data);
 2660                         break;
 2661 
 2662                 case IWN_RX_DONE:               /* 4965AGN only. */
 2663                 case IWN_MPDU_RX_DONE:
 2664                         /* An 802.11 frame has been received. */
 2665                         iwn_rx_done(sc, desc, data);
 2666                         break;
 2667 
 2668 #if 0   /* HT */
 2669                 case IWN_RX_COMPRESSED_BA:
 2670                         /* A Compressed BlockAck has been received. */
 2671                         iwn_rx_compressed_ba(sc, desc, data);
 2672                         break;
 2673 #endif
 2674 
 2675                 case IWN_TX_DONE:
 2676                         /* An 802.11 frame has been transmitted. */
 2677                         ops->tx_done(sc, desc, data);
 2678                         break;
 2679 
 2680                 case IWN_RX_STATISTICS:
 2681                 case IWN_BEACON_STATISTICS:
 2682                         iwn_rx_statistics(sc, desc, data);
 2683                         break;
 2684 
 2685                 case IWN_BEACON_MISSED:
 2686                 {
 2687                         struct iwn_beacon_missed *miss =
 2688                             (struct iwn_beacon_missed *)(desc + 1);
 2689                         int misses;
 2690 
 2691                         bus_dmamap_sync(sc->rxq.data_dmat, data->map,
 2692                             BUS_DMASYNC_POSTREAD);
 2693                         misses = le32toh(miss->consecutive);
 2694 
 2695                         DPRINTF(sc, IWN_DEBUG_STATE,
 2696                             "%s: beacons missed %d/%d\n", __func__,
 2697                             misses, le32toh(miss->total));
 2698                         /*
 2699                          * If more than 5 consecutive beacons are missed,
 2700                          * reinitialize the sensitivity state machine.
 2701                          */
 2702                         if (vap->iv_state == IEEE80211_S_RUN &&
 2703                             (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
 2704                                 if (misses > 5)
 2705                                         (void)iwn_init_sensitivity(sc);
 2706                                 if (misses >= vap->iv_bmissthreshold) {
 2707                                         IWN_UNLOCK(sc);
 2708                                         ieee80211_beacon_miss(ic);
 2709                                         IWN_LOCK(sc);
 2710                                 }
 2711                         }
 2712                         break;
 2713                 }
 2714                 case IWN_UC_READY:
 2715                 {
 2716                         struct iwn_ucode_info *uc =
 2717                             (struct iwn_ucode_info *)(desc + 1);
 2718 
 2719                         /* The microcontroller is ready. */
 2720                         bus_dmamap_sync(sc->rxq.data_dmat, data->map,
 2721                             BUS_DMASYNC_POSTREAD);
 2722                         DPRINTF(sc, IWN_DEBUG_RESET,
 2723                             "microcode alive notification version=%d.%d "
 2724                             "subtype=%x alive=%x\n", uc->major, uc->minor,
 2725                             uc->subtype, le32toh(uc->valid));
 2726 
 2727                         if (le32toh(uc->valid) != 1) {
 2728                                 device_printf(sc->sc_dev,
 2729                                     "microcontroller initialization failed");
 2730                                 break;
 2731                         }
 2732                         if (uc->subtype == IWN_UCODE_INIT) {
 2733                                 /* Save microcontroller report. */
 2734                                 memcpy(&sc->ucode_info, uc, sizeof (*uc));
 2735                         }
 2736                         /* Save the address of the error log in SRAM. */
 2737                         sc->errptr = le32toh(uc->errptr);
 2738                         break;
 2739                 }
 2740                 case IWN_STATE_CHANGED:
 2741                 {
 2742                         uint32_t *status = (uint32_t *)(desc + 1);
 2743 
 2744                         /*
 2745                          * State change allows hardware switch change to be
 2746                          * noted. However, we handle this in iwn_intr as we
 2747                          * get both the enable/disble intr.
 2748                          */
 2749                         bus_dmamap_sync(sc->rxq.data_dmat, data->map,
 2750                             BUS_DMASYNC_POSTREAD);
 2751                         DPRINTF(sc, IWN_DEBUG_INTR, "state changed to %x\n",
 2752                             le32toh(*status));
 2753                         break;
 2754                 }
 2755                 case IWN_START_SCAN:
 2756                 {
 2757                         struct iwn_start_scan *scan =
 2758                             (struct iwn_start_scan *)(desc + 1);
 2759 
 2760                         bus_dmamap_sync(sc->rxq.data_dmat, data->map,
 2761                             BUS_DMASYNC_POSTREAD);
 2762                         DPRINTF(sc, IWN_DEBUG_ANY,
 2763                             "%s: scanning channel %d status %x\n",
 2764                             __func__, scan->chan, le32toh(scan->status));
 2765                         break;
 2766                 }
 2767                 case IWN_STOP_SCAN:
 2768                 {
 2769                         struct iwn_stop_scan *scan =
 2770                             (struct iwn_stop_scan *)(desc + 1);
 2771 
 2772                         bus_dmamap_sync(sc->rxq.data_dmat, data->map,
 2773                             BUS_DMASYNC_POSTREAD);
 2774                         DPRINTF(sc, IWN_DEBUG_STATE,
 2775                             "scan finished nchan=%d status=%d chan=%d\n",
 2776                             scan->nchan, scan->status, scan->chan);
 2777 
 2778                         IWN_UNLOCK(sc);
 2779                         ieee80211_scan_next(vap);
 2780                         IWN_LOCK(sc);
 2781                         break;
 2782                 }
 2783                 case IWN5000_CALIBRATION_RESULT:
 2784                         iwn5000_rx_calib_results(sc, desc, data);
 2785                         break;
 2786 
 2787                 case IWN5000_CALIBRATION_DONE:
 2788                         sc->sc_flags |= IWN_FLAG_CALIB_DONE;
 2789                         wakeup(sc);
 2790                         break;
 2791                 }
 2792 
 2793                 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
 2794         }
 2795 
 2796         /* Tell the firmware what we have processed. */
 2797         hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
 2798         IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
 2799 }
 2800 
 2801 /*
 2802  * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
 2803  * from power-down sleep mode.
 2804  */
 2805 static void
 2806 iwn_wakeup_intr(struct iwn_softc *sc)
 2807 {
 2808         int qid;
 2809 
 2810         DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
 2811             __func__);
 2812 
 2813         /* Wakeup RX and TX rings. */
 2814         IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
 2815         for (qid = 0; qid < sc->ntxqs; qid++) {
 2816                 struct iwn_tx_ring *ring = &sc->txq[qid];
 2817                 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
 2818         }
 2819 }
 2820 
 2821 static void
 2822 iwn_rftoggle_intr(struct iwn_softc *sc)
 2823 {
 2824         struct ifnet *ifp = sc->sc_ifp;
 2825         struct ieee80211com *ic = ifp->if_l2com;
 2826         uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
 2827 
 2828         IWN_LOCK_ASSERT(sc);
 2829 
 2830         device_printf(sc->sc_dev, "RF switch: radio %s\n",
 2831             (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
 2832         if (tmp & IWN_GP_CNTRL_RFKILL)
 2833                 ieee80211_runtask(ic, &sc->sc_radioon_task);
 2834         else
 2835                 ieee80211_runtask(ic, &sc->sc_radiooff_task);
 2836 }
 2837 
 2838 /*
 2839  * Dump the error log of the firmware when a firmware panic occurs.  Although
 2840  * we can't debug the firmware because it is neither open source nor free, it
 2841  * can help us to identify certain classes of problems.
 2842  */
 2843 static void
 2844 iwn_fatal_intr(struct iwn_softc *sc)
 2845 {
 2846         struct iwn_fw_dump dump;
 2847         int i;
 2848 
 2849         IWN_LOCK_ASSERT(sc);
 2850 
 2851         /* Force a complete recalibration on next init. */
 2852         sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
 2853 
 2854         /* Check that the error log address is valid. */
 2855         if (sc->errptr < IWN_FW_DATA_BASE ||
 2856             sc->errptr + sizeof (dump) >
 2857             IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
 2858                 printf("%s: bad firmware error log address 0x%08x\n", __func__,
 2859                     sc->errptr);
 2860                 return;
 2861         }
 2862         if (iwn_nic_lock(sc) != 0) {
 2863                 printf("%s: could not read firmware error log\n", __func__);
 2864                 return;
 2865         }
 2866         /* Read firmware error log from SRAM. */
 2867         iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
 2868             sizeof (dump) / sizeof (uint32_t));
 2869         iwn_nic_unlock(sc);
 2870 
 2871         if (dump.valid == 0) {
 2872                 printf("%s: firmware error log is empty\n", __func__);
 2873                 return;
 2874         }
 2875         printf("firmware error log:\n");
 2876         printf("  error type      = \"%s\" (0x%08X)\n",
 2877             (dump.id < nitems(iwn_fw_errmsg)) ?
 2878                 iwn_fw_errmsg[dump.id] : "UNKNOWN",
 2879             dump.id);
 2880         printf("  program counter = 0x%08X\n", dump.pc);
 2881         printf("  source line     = 0x%08X\n", dump.src_line);
 2882         printf("  error data      = 0x%08X%08X\n",
 2883             dump.error_data[0], dump.error_data[1]);
 2884         printf("  branch link     = 0x%08X%08X\n",
 2885             dump.branch_link[0], dump.branch_link[1]);
 2886         printf("  interrupt link  = 0x%08X%08X\n",
 2887             dump.interrupt_link[0], dump.interrupt_link[1]);
 2888         printf("  time            = %u\n", dump.time[0]);
 2889 
 2890         /* Dump driver status (TX and RX rings) while we're here. */
 2891         printf("driver status:\n");
 2892         for (i = 0; i < sc->ntxqs; i++) {
 2893                 struct iwn_tx_ring *ring = &sc->txq[i];
 2894                 printf("  tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
 2895                     i, ring->qid, ring->cur, ring->queued);
 2896         }
 2897         printf("  rx ring: cur=%d\n", sc->rxq.cur);
 2898 }
 2899 
 2900 static void
 2901 iwn_intr(void *arg)
 2902 {
 2903         struct iwn_softc *sc = arg;
 2904         struct ifnet *ifp = sc->sc_ifp;
 2905         uint32_t r1, r2, tmp;
 2906 
 2907         IWN_LOCK(sc);
 2908 
 2909         /* Disable interrupts. */
 2910         IWN_WRITE(sc, IWN_INT_MASK, 0);
 2911 
 2912         /* Read interrupts from ICT (fast) or from registers (slow). */
 2913         if (sc->sc_flags & IWN_FLAG_USE_ICT) {
 2914                 tmp = 0;
 2915                 while (sc->ict[sc->ict_cur] != 0) {
 2916                         tmp |= sc->ict[sc->ict_cur];
 2917                         sc->ict[sc->ict_cur] = 0;       /* Acknowledge. */
 2918                         sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
 2919                 }
 2920                 tmp = le32toh(tmp);
 2921                 if (tmp == 0xffffffff)  /* Shouldn't happen. */
 2922                         tmp = 0;
 2923                 else if (tmp & 0xc0000) /* Workaround a HW bug. */
 2924                         tmp |= 0x8000;
 2925                 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
 2926                 r2 = 0; /* Unused. */
 2927         } else {
 2928                 r1 = IWN_READ(sc, IWN_INT);
 2929                 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
 2930                         return; /* Hardware gone! */
 2931                 r2 = IWN_READ(sc, IWN_FH_INT);
 2932         }
 2933 
 2934         DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=%x reg2=%x\n", r1, r2);
 2935 
 2936         if (r1 == 0 && r2 == 0)
 2937                 goto done;      /* Interrupt not for us. */
 2938 
 2939         /* Acknowledge interrupts. */
 2940         IWN_WRITE(sc, IWN_INT, r1);
 2941         if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
 2942                 IWN_WRITE(sc, IWN_FH_INT, r2);
 2943 
 2944         if (r1 & IWN_INT_RF_TOGGLED) {
 2945                 iwn_rftoggle_intr(sc);
 2946                 goto done;
 2947         }
 2948         if (r1 & IWN_INT_CT_REACHED) {
 2949                 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
 2950                     __func__);
 2951         }
 2952         if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
 2953                 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
 2954                     __func__);
 2955                 /* Dump firmware error log and stop. */
 2956                 iwn_fatal_intr(sc);
 2957                 ifp->if_flags &= ~IFF_UP;
 2958                 iwn_stop_locked(sc);
 2959                 goto done;
 2960         }
 2961         if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
 2962             (r2 & IWN_FH_INT_RX)) {
 2963                 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
 2964                         if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
 2965                                 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
 2966                         IWN_WRITE_1(sc, IWN_INT_PERIODIC,
 2967                             IWN_INT_PERIODIC_DIS);
 2968                         iwn_notif_intr(sc);
 2969                         if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
 2970                                 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
 2971                                     IWN_INT_PERIODIC_ENA);
 2972                         }
 2973                 } else
 2974                         iwn_notif_intr(sc);
 2975         }
 2976 
 2977         if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
 2978                 if (sc->sc_flags & IWN_FLAG_USE_ICT)
 2979                         IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
 2980                 wakeup(sc);     /* FH DMA transfer completed. */
 2981         }
 2982 
 2983         if (r1 & IWN_INT_ALIVE)
 2984                 wakeup(sc);     /* Firmware is alive. */
 2985 
 2986         if (r1 & IWN_INT_WAKEUP)
 2987                 iwn_wakeup_intr(sc);
 2988 
 2989 done:
 2990         /* Re-enable interrupts. */
 2991         if (ifp->if_flags & IFF_UP)
 2992                 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
 2993 
 2994         IWN_UNLOCK(sc);
 2995 }
 2996 
 2997 /*
 2998  * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
 2999  * 5000 adapters use a slightly different format).
 3000  */
 3001 static void
 3002 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
 3003     uint16_t len)
 3004 {
 3005         uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
 3006 
 3007         *w = htole16(len + 8);
 3008         bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
 3009             BUS_DMASYNC_PREWRITE);
 3010         if (idx < IWN_SCHED_WINSZ) {
 3011                 *(w + IWN_TX_RING_COUNT) = *w;
 3012                 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
 3013                     BUS_DMASYNC_PREWRITE);
 3014         }
 3015 }
 3016 
 3017 static void
 3018 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
 3019     uint16_t len)
 3020 {
 3021         uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
 3022 
 3023         *w = htole16(id << 12 | (len + 8));
 3024         bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
 3025             BUS_DMASYNC_PREWRITE);
 3026         if (idx < IWN_SCHED_WINSZ) {
 3027                 *(w + IWN_TX_RING_COUNT) = *w;
 3028                 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
 3029                     BUS_DMASYNC_PREWRITE);
 3030         }
 3031 }
 3032 
 3033 #ifdef notyet
 3034 static void
 3035 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
 3036 {
 3037         uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
 3038 
 3039         *w = (*w & htole16(0xf000)) | htole16(1);
 3040         bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
 3041             BUS_DMASYNC_PREWRITE);
 3042         if (idx < IWN_SCHED_WINSZ) {
 3043                 *(w + IWN_TX_RING_COUNT) = *w;
 3044                 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
 3045                     BUS_DMASYNC_PREWRITE);
 3046         }
 3047 }
 3048 #endif
 3049 
 3050 static uint8_t
 3051 iwn_plcp_signal(int rate) {
 3052         int i;
 3053 
 3054         for (i = 0; i < IWN_RIDX_MAX + 1; i++) {
 3055                 if ((rate & IEEE80211_RATE_VAL) == iwn_rates[i].rate)
 3056                         return i;
 3057         }
 3058 
 3059         return 0;
 3060 }
 3061 
 3062 static int
 3063 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
 3064 {
 3065         const struct ieee80211_txparam *tp;
 3066         struct ieee80211vap *vap = ni->ni_vap;
 3067         struct ieee80211com *ic = ni->ni_ic;
 3068         struct iwn_node *wn = (void *)ni;
 3069         struct iwn_tx_ring *ring;
 3070         struct iwn_tx_desc *desc;
 3071         struct iwn_tx_data *data;
 3072         struct iwn_tx_cmd *cmd;
 3073         struct iwn_cmd_data *tx;
 3074         const struct iwn_rate *rinfo;
 3075         struct ieee80211_frame *wh;
 3076         struct ieee80211_key *k = NULL;
 3077         struct mbuf *m1;
 3078         uint32_t flags;
 3079         uint16_t qos;
 3080         u_int hdrlen;
 3081         bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
 3082         uint8_t tid, ridx, txant, type;
 3083         int ac, i, totlen, error, pad, nsegs = 0, rate;
 3084 
 3085         IWN_LOCK_ASSERT(sc);
 3086 
 3087         wh = mtod(m, struct ieee80211_frame *);
 3088         hdrlen = ieee80211_anyhdrsize(wh);
 3089         type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
 3090 
 3091         /* Select EDCA Access Category and TX ring for this frame. */
 3092         if (IEEE80211_QOS_HAS_SEQ(wh)) {
 3093                 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
 3094                 tid = qos & IEEE80211_QOS_TID;
 3095         } else {
 3096                 qos = 0;
 3097                 tid = 0;
 3098         }
 3099         ac = M_WME_GETAC(m);
 3100 
 3101         ring = &sc->txq[ac];
 3102         desc = &ring->desc[ring->cur];
 3103         data = &ring->data[ring->cur];
 3104 
 3105         /* Choose a TX rate index. */
 3106         tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
 3107         if (type == IEEE80211_FC0_TYPE_MGT)
 3108                 rate = tp->mgmtrate;
 3109         else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
 3110                 rate = tp->mcastrate;
 3111         else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
 3112                 rate = tp->ucastrate;
 3113         else {
 3114                 /* XXX pass pktlen */
 3115                 (void) ieee80211_ratectl_rate(ni, NULL, 0);
 3116                 rate = ni->ni_txrate;
 3117         }
 3118         ridx = iwn_plcp_signal(rate);
 3119         rinfo = &iwn_rates[ridx];
 3120 
 3121         /* Encrypt the frame if need be. */
 3122         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
 3123                 /* Retrieve key for TX. */
 3124                 k = ieee80211_crypto_encap(ni, m);
 3125                 if (k == NULL) {
 3126                         m_freem(m);
 3127                         return ENOBUFS;
 3128                 }
 3129                 /* 802.11 header may have moved. */
 3130                 wh = mtod(m, struct ieee80211_frame *);
 3131         }
 3132         totlen = m->m_pkthdr.len;
 3133 
 3134         if (ieee80211_radiotap_active_vap(vap)) {
 3135                 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
 3136 
 3137                 tap->wt_flags = 0;
 3138                 tap->wt_rate = rinfo->rate;
 3139                 if (k != NULL)
 3140                         tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
 3141 
 3142                 ieee80211_radiotap_tx(vap, m);
 3143         }
 3144 
 3145         /* Prepare TX firmware command. */
 3146         cmd = &ring->cmd[ring->cur];
 3147         cmd->code = IWN_CMD_TX_DATA;
 3148         cmd->flags = 0;
 3149         cmd->qid = ring->qid;
 3150         cmd->idx = ring->cur;
 3151 
 3152         tx = (struct iwn_cmd_data *)cmd->data;
 3153         /* NB: No need to clear tx, all fields are reinitialized here. */
 3154         tx->scratch = 0;        /* clear "scratch" area */
 3155 
 3156         flags = 0;
 3157         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
 3158                 /* Unicast frame, check if an ACK is expected. */
 3159                 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
 3160                     IEEE80211_QOS_ACKPOLICY_NOACK)
 3161                         flags |= IWN_TX_NEED_ACK;
 3162         }
 3163         if ((wh->i_fc[0] &
 3164             (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
 3165             (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
 3166                 flags |= IWN_TX_IMM_BA;         /* Cannot happen yet. */
 3167 
 3168         if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
 3169                 flags |= IWN_TX_MORE_FRAG;      /* Cannot happen yet. */
 3170 
 3171         /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
 3172         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
 3173                 /* NB: Group frames are sent using CCK in 802.11b/g. */
 3174                 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
 3175                         flags |= IWN_TX_NEED_RTS;
 3176                 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
 3177                     ridx >= IWN_RIDX_OFDM6) {
 3178                         if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
 3179                                 flags |= IWN_TX_NEED_CTS;
 3180                         else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
 3181                                 flags |= IWN_TX_NEED_RTS;
 3182                 }
 3183                 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
 3184                         if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
 3185                                 /* 5000 autoselects RTS/CTS or CTS-to-self. */
 3186                                 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
 3187                                 flags |= IWN_TX_NEED_PROTECTION;
 3188                         } else
 3189                                 flags |= IWN_TX_FULL_TXOP;
 3190                 }
 3191         }
 3192 
 3193         if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
 3194             type != IEEE80211_FC0_TYPE_DATA)
 3195                 tx->id = sc->broadcast_id;
 3196         else
 3197                 tx->id = wn->id;
 3198 
 3199         if (type == IEEE80211_FC0_TYPE_MGT) {
 3200                 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
 3201 
 3202                 /* Tell HW to set timestamp in probe responses. */
 3203                 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
 3204                         flags |= IWN_TX_INSERT_TSTAMP;
 3205                 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
 3206                     subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
 3207                         tx->timeout = htole16(3);
 3208                 else
 3209                         tx->timeout = htole16(2);
 3210         } else
 3211                 tx->timeout = htole16(0);
 3212 
 3213         if (hdrlen & 3) {
 3214                 /* First segment length must be a multiple of 4. */
 3215                 flags |= IWN_TX_NEED_PADDING;
 3216                 pad = 4 - (hdrlen & 3);
 3217         } else
 3218                 pad = 0;
 3219 
 3220         tx->len = htole16(totlen);
 3221         tx->tid = tid;
 3222         tx->rts_ntries = 60;
 3223         tx->data_ntries = 15;
 3224         tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
 3225         tx->plcp = rinfo->plcp;
 3226         tx->rflags = rinfo->flags;
 3227         if (tx->id == sc->broadcast_id) {
 3228                 /* Group or management frame. */
 3229                 tx->linkq = 0;
 3230                 /* XXX Alternate between antenna A and B? */
 3231                 txant = IWN_LSB(sc->txchainmask);
 3232                 tx->rflags |= IWN_RFLAG_ANT(txant);
 3233         } else {
 3234                 tx->linkq = ni->ni_rates.rs_nrates - ridx - 1;
 3235                 flags |= IWN_TX_LINKQ;  /* enable MRR */
 3236         }
 3237         /* Set physical address of "scratch area". */
 3238         tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
 3239         tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
 3240 
 3241         /* Copy 802.11 header in TX command. */
 3242         memcpy((uint8_t *)(tx + 1), wh, hdrlen);
 3243 
 3244         /* Trim 802.11 header. */
 3245         m_adj(m, hdrlen);
 3246         tx->security = 0;
 3247         tx->flags = htole32(flags);
 3248 
 3249         error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
 3250             &nsegs, BUS_DMA_NOWAIT);
 3251         if (error != 0) {
 3252                 if (error != EFBIG) {
 3253                         device_printf(sc->sc_dev,
 3254                             "%s: can't map mbuf (error %d)\n", __func__, error);
 3255                         m_freem(m);
 3256                         return error;
 3257                 }
 3258                 /* Too many DMA segments, linearize mbuf. */
 3259                 m1 = m_collapse(m, M_DONTWAIT, IWN_MAX_SCATTER);
 3260                 if (m1 == NULL) {
 3261                         device_printf(sc->sc_dev,
 3262                             "%s: could not defrag mbuf\n", __func__);
 3263                         m_freem(m);
 3264                         return ENOBUFS;
 3265                 }
 3266                 m = m1;
 3267 
 3268                 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
 3269                     segs, &nsegs, BUS_DMA_NOWAIT);
 3270                 if (error != 0) {
 3271                         device_printf(sc->sc_dev,
 3272                             "%s: can't map mbuf (error %d)\n", __func__, error);
 3273                         m_freem(m);
 3274                         return error;
 3275                 }
 3276         }
 3277 
 3278         data->m = m;
 3279         data->ni = ni;
 3280 
 3281         DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
 3282             __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
 3283 
 3284         /* Fill TX descriptor. */
 3285         desc->nsegs = 1;
 3286         if (m->m_len != 0)
 3287                 desc->nsegs += nsegs;
 3288         /* First DMA segment is used by the TX command. */
 3289         desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
 3290         desc->segs[0].len  = htole16(IWN_HIADDR(data->cmd_paddr) |
 3291             (4 + sizeof (*tx) + hdrlen + pad) << 4);
 3292         /* Other DMA segments are for data payload. */
 3293         seg = &segs[0];
 3294         for (i = 1; i <= nsegs; i++) {
 3295                 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
 3296                 desc->segs[i].len  = htole16(IWN_HIADDR(seg->ds_addr) |
 3297                     seg->ds_len << 4);
 3298                 seg++;
 3299         }
 3300 
 3301         bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
 3302         bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
 3303             BUS_DMASYNC_PREWRITE);
 3304         bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
 3305             BUS_DMASYNC_PREWRITE);
 3306 
 3307 #ifdef notyet
 3308         /* Update TX scheduler. */
 3309         ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
 3310 #endif
 3311 
 3312         /* Kick TX ring. */
 3313         ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
 3314         IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
 3315 
 3316         /* Mark TX ring as full if we reach a certain threshold. */
 3317         if (++ring->queued > IWN_TX_RING_HIMARK)
 3318                 sc->qfullmsk |= 1 << ring->qid;
 3319 
 3320         return 0;
 3321 }
 3322 
 3323 static int
 3324 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
 3325     struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
 3326 {
 3327         const struct iwn_rate *rinfo;
 3328         struct ifnet *ifp = sc->sc_ifp;
 3329         struct ieee80211vap *vap = ni->ni_vap;
 3330         struct ieee80211com *ic = ifp->if_l2com;
 3331         struct iwn_tx_cmd *cmd;
 3332         struct iwn_cmd_data *tx;
 3333         struct ieee80211_frame *wh;
 3334         struct iwn_tx_ring *ring;
 3335         struct iwn_tx_desc *desc;
 3336         struct iwn_tx_data *data;
 3337         struct mbuf *m1;
 3338         bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
 3339         uint32_t flags;
 3340         u_int hdrlen;
 3341         int ac, totlen, error, pad, nsegs = 0, i, rate;
 3342         uint8_t ridx, type, txant;
 3343 
 3344         IWN_LOCK_ASSERT(sc);
 3345 
 3346         wh = mtod(m, struct ieee80211_frame *);
 3347         hdrlen = ieee80211_anyhdrsize(wh);
 3348         type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
 3349 
 3350         ac = params->ibp_pri & 3;
 3351 
 3352         ring = &sc->txq[ac];
 3353         desc = &ring->desc[ring->cur];
 3354         data = &ring->data[ring->cur];
 3355 
 3356         /* Choose a TX rate index. */
 3357         rate = params->ibp_rate0;
 3358         if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
 3359                 /* XXX fall back to mcast/mgmt rate? */
 3360                 m_freem(m);
 3361                 return EINVAL;
 3362         }
 3363         ridx = iwn_plcp_signal(rate);
 3364         rinfo = &iwn_rates[ridx];
 3365 
 3366         totlen = m->m_pkthdr.len;
 3367 
 3368         /* Prepare TX firmware command. */
 3369         cmd = &ring->cmd[ring->cur];
 3370         cmd->code = IWN_CMD_TX_DATA;
 3371         cmd->flags = 0;
 3372         cmd->qid = ring->qid;
 3373         cmd->idx = ring->cur;
 3374 
 3375         tx = (struct iwn_cmd_data *)cmd->data;
 3376         /* NB: No need to clear tx, all fields are reinitialized here. */
 3377         tx->scratch = 0;        /* clear "scratch" area */
 3378 
 3379         flags = 0;
 3380         if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
 3381                 flags |= IWN_TX_NEED_ACK;
 3382         if (params->ibp_flags & IEEE80211_BPF_RTS) {
 3383                 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
 3384                         /* 5000 autoselects RTS/CTS or CTS-to-self. */
 3385                         flags &= ~IWN_TX_NEED_RTS;
 3386                         flags |= IWN_TX_NEED_PROTECTION;
 3387                 } else
 3388                         flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
 3389         }
 3390         if (params->ibp_flags & IEEE80211_BPF_CTS) {
 3391                 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
 3392                         /* 5000 autoselects RTS/CTS or CTS-to-self. */
 3393                         flags &= ~IWN_TX_NEED_CTS;
 3394                         flags |= IWN_TX_NEED_PROTECTION;
 3395                 } else
 3396                         flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
 3397         }
 3398         if (type == IEEE80211_FC0_TYPE_MGT) {
 3399                 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
 3400 
 3401                 /* Tell HW to set timestamp in probe responses. */
 3402                 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
 3403                         flags |= IWN_TX_INSERT_TSTAMP;
 3404 
 3405                 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
 3406                     subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
 3407                         tx->timeout = htole16(3);
 3408                 else
 3409                         tx->timeout = htole16(2);
 3410         } else
 3411                 tx->timeout = htole16(0);
 3412 
 3413         if (hdrlen & 3) {
 3414                 /* First segment length must be a multiple of 4. */
 3415                 flags |= IWN_TX_NEED_PADDING;
 3416                 pad = 4 - (hdrlen & 3);
 3417         } else
 3418                 pad = 0;
 3419 
 3420         if (ieee80211_radiotap_active_vap(vap)) {
 3421                 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
 3422 
 3423                 tap->wt_flags = 0;
 3424                 tap->wt_rate = rate;
 3425 
 3426                 ieee80211_radiotap_tx(vap, m);
 3427         }
 3428 
 3429         tx->len = htole16(totlen);
 3430         tx->tid = 0;
 3431         tx->id = sc->broadcast_id;
 3432         tx->rts_ntries = params->ibp_try1;
 3433         tx->data_ntries = params->ibp_try0;
 3434         tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
 3435         tx->plcp = rinfo->plcp;
 3436         tx->rflags = rinfo->flags;
 3437         /* Group or management frame. */
 3438         tx->linkq = 0;
 3439         txant = IWN_LSB(sc->txchainmask);
 3440         tx->rflags |= IWN_RFLAG_ANT(txant);
 3441         /* Set physical address of "scratch area". */
 3442         tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
 3443         tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
 3444 
 3445         /* Copy 802.11 header in TX command. */
 3446         memcpy((uint8_t *)(tx + 1), wh, hdrlen);
 3447 
 3448         /* Trim 802.11 header. */
 3449         m_adj(m, hdrlen);
 3450         tx->security = 0;
 3451         tx->flags = htole32(flags);
 3452 
 3453         error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
 3454             &nsegs, BUS_DMA_NOWAIT);
 3455         if (error != 0) {
 3456                 if (error != EFBIG) {
 3457                         device_printf(sc->sc_dev,
 3458                             "%s: can't map mbuf (error %d)\n", __func__, error);
 3459                         m_freem(m);
 3460                         return error;
 3461                 }
 3462                 /* Too many DMA segments, linearize mbuf. */
 3463                 m1 = m_collapse(m, M_DONTWAIT, IWN_MAX_SCATTER);
 3464                 if (m1 == NULL) {
 3465                         device_printf(sc->sc_dev,
 3466                             "%s: could not defrag mbuf\n", __func__);
 3467                         m_freem(m);
 3468                         return ENOBUFS;
 3469                 }
 3470                 m = m1;
 3471 
 3472                 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
 3473                     segs, &nsegs, BUS_DMA_NOWAIT);
 3474                 if (error != 0) {
 3475                         device_printf(sc->sc_dev,
 3476                             "%s: can't map mbuf (error %d)\n", __func__, error);
 3477                         m_freem(m);
 3478                         return error;
 3479                 }
 3480         }
 3481 
 3482         data->m = m;
 3483         data->ni = ni;
 3484 
 3485         DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
 3486             __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
 3487 
 3488         /* Fill TX descriptor. */
 3489         desc->nsegs = 1;
 3490         if (m->m_len != 0)
 3491                 desc->nsegs += nsegs;
 3492         /* First DMA segment is used by the TX command. */
 3493         desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
 3494         desc->segs[0].len  = htole16(IWN_HIADDR(data->cmd_paddr) |
 3495             (4 + sizeof (*tx) + hdrlen + pad) << 4);
 3496         /* Other DMA segments are for data payload. */
 3497         seg = &segs[0];
 3498         for (i = 1; i <= nsegs; i++) {
 3499                 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
 3500                 desc->segs[i].len  = htole16(IWN_HIADDR(seg->ds_addr) |
 3501                     seg->ds_len << 4);
 3502                 seg++;
 3503         }
 3504 
 3505         bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
 3506         bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
 3507             BUS_DMASYNC_PREWRITE);
 3508         bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
 3509             BUS_DMASYNC_PREWRITE);
 3510 
 3511 #ifdef notyet
 3512         /* Update TX scheduler. */
 3513         ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
 3514 #endif
 3515 
 3516         /* Kick TX ring. */
 3517         ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
 3518         IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
 3519 
 3520         /* Mark TX ring as full if we reach a certain threshold. */
 3521         if (++ring->queued > IWN_TX_RING_HIMARK)
 3522                 sc->qfullmsk |= 1 << ring->qid;
 3523 
 3524         return 0;
 3525 }
 3526 
 3527 static int
 3528 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
 3529     const struct ieee80211_bpf_params *params)
 3530 {
 3531         struct ieee80211com *ic = ni->ni_ic;
 3532         struct ifnet *ifp = ic->ic_ifp;
 3533         struct iwn_softc *sc = ifp->if_softc;
 3534         int error = 0;
 3535 
 3536         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
 3537                 ieee80211_free_node(ni);
 3538                 m_freem(m);
 3539                 return ENETDOWN;
 3540         }
 3541 
 3542         IWN_LOCK(sc);
 3543         if (params == NULL) {
 3544                 /*
 3545                  * Legacy path; interpret frame contents to decide
 3546                  * precisely how to send the frame.
 3547                  */
 3548                 error = iwn_tx_data(sc, m, ni);
 3549         } else {
 3550                 /*
 3551                  * Caller supplied explicit parameters to use in
 3552                  * sending the frame.
 3553                  */
 3554                 error = iwn_tx_data_raw(sc, m, ni, params);
 3555         }
 3556         if (error != 0) {
 3557                 /* NB: m is reclaimed on tx failure */
 3558                 ieee80211_free_node(ni);
 3559                 ifp->if_oerrors++;
 3560         }
 3561         sc->sc_tx_timer = 5;
 3562 
 3563         IWN_UNLOCK(sc);
 3564         return error;
 3565 }
 3566 
 3567 static void
 3568 iwn_start(struct ifnet *ifp)
 3569 {
 3570         struct iwn_softc *sc = ifp->if_softc;
 3571 
 3572         IWN_LOCK(sc);
 3573         iwn_start_locked(ifp);
 3574         IWN_UNLOCK(sc);
 3575 }
 3576 
 3577 static void
 3578 iwn_start_locked(struct ifnet *ifp)
 3579 {
 3580         struct iwn_softc *sc = ifp->if_softc;
 3581         struct ieee80211_node *ni;
 3582         struct mbuf *m;
 3583 
 3584         IWN_LOCK_ASSERT(sc);
 3585 
 3586         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ||
 3587             (ifp->if_drv_flags & IFF_DRV_OACTIVE))
 3588                 return;
 3589 
 3590         for (;;) {
 3591                 if (sc->qfullmsk != 0) {
 3592                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
 3593                         break;
 3594                 }
 3595                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
 3596                 if (m == NULL)
 3597                         break;
 3598                 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
 3599                 if (iwn_tx_data(sc, m, ni) != 0) {
 3600                         ieee80211_free_node(ni);
 3601                         ifp->if_oerrors++;
 3602                         continue;
 3603                 }
 3604                 sc->sc_tx_timer = 5;
 3605         }
 3606 }
 3607 
 3608 static void
 3609 iwn_watchdog(void *arg)
 3610 {
 3611         struct iwn_softc *sc = arg;
 3612         struct ifnet *ifp = sc->sc_ifp;
 3613         struct ieee80211com *ic = ifp->if_l2com;
 3614 
 3615         IWN_LOCK_ASSERT(sc);
 3616 
 3617         KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running"));
 3618 
 3619         if (sc->sc_tx_timer > 0) {
 3620                 if (--sc->sc_tx_timer == 0) {
 3621                         if_printf(ifp, "device timeout\n");
 3622                         ieee80211_runtask(ic, &sc->sc_reinit_task);
 3623                         return;
 3624                 }
 3625         }
 3626         callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
 3627 }
 3628 
 3629 static int
 3630 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 3631 {
 3632         struct iwn_softc *sc = ifp->if_softc;
 3633         struct ieee80211com *ic = ifp->if_l2com;
 3634         struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 3635         struct ifreq *ifr = (struct ifreq *) data;
 3636         int error = 0, startall = 0, stop = 0;
 3637 
 3638         switch (cmd) {
 3639         case SIOCGIFADDR:
 3640                 error = ether_ioctl(ifp, cmd, data);
 3641                 break;
 3642         case SIOCSIFFLAGS:
 3643                 IWN_LOCK(sc);
 3644                 if (ifp->if_flags & IFF_UP) {
 3645                         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
 3646                                 iwn_init_locked(sc);
 3647                                 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
 3648                                         startall = 1;
 3649                                 else
 3650                                         stop = 1;
 3651                         }
 3652                 } else {
 3653                         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
 3654                                 iwn_stop_locked(sc);
 3655                 }
 3656                 IWN_UNLOCK(sc);
 3657                 if (startall)
 3658                         ieee80211_start_all(ic);
 3659                 else if (vap != NULL && stop)
 3660                         ieee80211_stop(vap);
 3661                 break;
 3662         case SIOCGIFMEDIA:
 3663                 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
 3664                 break;
 3665         default:
 3666                 error = EINVAL;
 3667                 break;
 3668         }
 3669         return error;
 3670 }
 3671 
 3672 /*
 3673  * Send a command to the firmware.
 3674  */
 3675 static int
 3676 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
 3677 {
 3678         struct iwn_tx_ring *ring = &sc->txq[4];
 3679         struct iwn_tx_desc *desc;
 3680         struct iwn_tx_data *data;
 3681         struct iwn_tx_cmd *cmd;
 3682         struct mbuf *m;
 3683         bus_addr_t paddr;
 3684         int totlen, error;
 3685 
 3686         IWN_LOCK_ASSERT(sc);
 3687 
 3688         desc = &ring->desc[ring->cur];
 3689         data = &ring->data[ring->cur];
 3690         totlen = 4 + size;
 3691 
 3692         if (size > sizeof cmd->data) {
 3693                 /* Command is too large to fit in a descriptor. */
 3694                 if (totlen > MCLBYTES)
 3695                         return EINVAL;
 3696                 m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
 3697                 if (m == NULL)
 3698                         return ENOMEM;
 3699                 cmd = mtod(m, struct iwn_tx_cmd *);
 3700                 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
 3701                     totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
 3702                 if (error != 0) {
 3703                         m_freem(m);
 3704                         return error;
 3705                 }
 3706                 data->m = m;
 3707         } else {
 3708                 cmd = &ring->cmd[ring->cur];
 3709                 paddr = data->cmd_paddr;
 3710         }
 3711 
 3712         cmd->code = code;
 3713         cmd->flags = 0;
 3714         cmd->qid = ring->qid;
 3715         cmd->idx = ring->cur;
 3716         memcpy(cmd->data, buf, size);
 3717 
 3718         desc->nsegs = 1;
 3719         desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
 3720         desc->segs[0].len  = htole16(IWN_HIADDR(paddr) | totlen << 4);
 3721 
 3722         DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
 3723             __func__, iwn_intr_str(cmd->code), cmd->code,
 3724             cmd->flags, cmd->qid, cmd->idx);
 3725 
 3726         if (size > sizeof cmd->data) {
 3727                 bus_dmamap_sync(ring->data_dmat, data->map,
 3728                     BUS_DMASYNC_PREWRITE);
 3729         } else {
 3730                 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
 3731                     BUS_DMASYNC_PREWRITE);
 3732         }
 3733         bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
 3734             BUS_DMASYNC_PREWRITE);
 3735 
 3736 #ifdef notyet
 3737         /* Update TX scheduler. */
 3738         ops->update_sched(sc, ring->qid, ring->cur, 0, 0);
 3739 #endif
 3740 
 3741         /* Kick command ring. */
 3742         ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
 3743         IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
 3744 
 3745         return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
 3746 }
 3747 
 3748 static int
 3749 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
 3750 {
 3751         struct iwn4965_node_info hnode;
 3752         caddr_t src, dst;
 3753 
 3754         /*
 3755          * We use the node structure for 5000 Series internally (it is
 3756          * a superset of the one for 4965AGN). We thus copy the common
 3757          * fields before sending the command.
 3758          */
 3759         src = (caddr_t)node;
 3760         dst = (caddr_t)&hnode;
 3761         memcpy(dst, src, 48);
 3762         /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
 3763         memcpy(dst + 48, src + 72, 20);
 3764         return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
 3765 }
 3766 
 3767 static int
 3768 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
 3769 {
 3770         /* Direct mapping. */
 3771         return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
 3772 }
 3773 
 3774 static int
 3775 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
 3776 {
 3777         struct iwn_node *wn = (void *)ni;
 3778         struct ieee80211_rateset *rs = &ni->ni_rates;
 3779         struct iwn_cmd_link_quality linkq;
 3780         const struct iwn_rate *rinfo;
 3781         uint8_t txant;
 3782         int i, txrate;
 3783 
 3784         /* Use the first valid TX antenna. */
 3785         txant = IWN_LSB(sc->txchainmask);
 3786 
 3787         memset(&linkq, 0, sizeof linkq);
 3788         linkq.id = wn->id;
 3789         linkq.antmsk_1stream = txant;
 3790         linkq.antmsk_2stream = IWN_ANT_AB;
 3791         linkq.ampdu_max = 31;
 3792         linkq.ampdu_threshold = 3;
 3793         linkq.ampdu_limit = htole16(4000);      /* 4ms */
 3794 
 3795         /* Start at highest available bit-rate. */
 3796         txrate = rs->rs_nrates - 1;
 3797         for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
 3798                 rinfo = &iwn_rates[wn->ridx[txrate]];
 3799                 linkq.retry[i].plcp = rinfo->plcp;
 3800                 linkq.retry[i].rflags = rinfo->flags;
 3801                 linkq.retry[i].rflags |= IWN_RFLAG_ANT(txant);
 3802                 /* Next retry at immediate lower bit-rate. */
 3803                 if (txrate > 0)
 3804                         txrate--;
 3805         }
 3806         return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
 3807 }
 3808 
 3809 /*
 3810  * Broadcast node is used to send group-addressed and management frames.
 3811  */
 3812 static int
 3813 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
 3814 {
 3815         struct iwn_ops *ops = &sc->ops;
 3816         struct ifnet *ifp = sc->sc_ifp;
 3817         struct ieee80211com *ic = ifp->if_l2com;
 3818         struct iwn_node_info node;
 3819         struct iwn_cmd_link_quality linkq;
 3820         const struct iwn_rate *rinfo;
 3821         uint8_t txant;
 3822         int i, error;
 3823 
 3824         memset(&node, 0, sizeof node);
 3825         IEEE80211_ADDR_COPY(node.macaddr, ifp->if_broadcastaddr);
 3826         node.id = sc->broadcast_id;
 3827         DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
 3828         if ((error = ops->add_node(sc, &node, async)) != 0)
 3829                 return error;
 3830 
 3831         /* Use the first valid TX antenna. */
 3832         txant = IWN_LSB(sc->txchainmask);
 3833 
 3834         memset(&linkq, 0, sizeof linkq);
 3835         linkq.id = sc->broadcast_id;
 3836         linkq.antmsk_1stream = txant;
 3837         linkq.antmsk_2stream = IWN_ANT_AB;
 3838         linkq.ampdu_max = 64;
 3839         linkq.ampdu_threshold = 3;
 3840         linkq.ampdu_limit = htole16(4000);      /* 4ms */
 3841 
 3842         /* Use lowest mandatory bit-rate. */
 3843         if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
 3844                 rinfo = &iwn_rates[IWN_RIDX_OFDM6];
 3845         else
 3846                 rinfo = &iwn_rates[IWN_RIDX_CCK1];
 3847         linkq.retry[0].plcp = rinfo->plcp;
 3848         linkq.retry[0].rflags = rinfo->flags;
 3849         linkq.retry[0].rflags |= IWN_RFLAG_ANT(txant);
 3850         /* Use same bit-rate for all TX retries. */
 3851         for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
 3852                 linkq.retry[i].plcp = linkq.retry[0].plcp;
 3853                 linkq.retry[i].rflags = linkq.retry[0].rflags;
 3854         }
 3855         return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
 3856 }
 3857 
 3858 static int
 3859 iwn_updateedca(struct ieee80211com *ic)
 3860 {
 3861 #define IWN_EXP2(x)     ((1 << (x)) - 1)        /* CWmin = 2^ECWmin - 1 */
 3862         struct iwn_softc *sc = ic->ic_ifp->if_softc;
 3863         struct iwn_edca_params cmd;
 3864         int aci;
 3865 
 3866         memset(&cmd, 0, sizeof cmd);
 3867         cmd.flags = htole32(IWN_EDCA_UPDATE);
 3868         for (aci = 0; aci < WME_NUM_AC; aci++) {
 3869                 const struct wmeParams *ac =
 3870                     &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
 3871                 cmd.ac[aci].aifsn = ac->wmep_aifsn;
 3872                 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
 3873                 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
 3874                 cmd.ac[aci].txoplimit =
 3875                     htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
 3876         }
 3877         IEEE80211_UNLOCK(ic);
 3878         IWN_LOCK(sc);
 3879         (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
 3880         IWN_UNLOCK(sc);
 3881         IEEE80211_LOCK(ic);
 3882         return 0;
 3883 #undef IWN_EXP2
 3884 }
 3885 
 3886 static void
 3887 iwn_update_mcast(struct ifnet *ifp)
 3888 {
 3889         /* Ignore */
 3890 }
 3891 
 3892 static void
 3893 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
 3894 {
 3895         struct iwn_cmd_led led;
 3896 
 3897         /* Clear microcode LED ownership. */
 3898         IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
 3899 
 3900         led.which = which;
 3901         led.unit = htole32(10000);      /* on/off in unit of 100ms */
 3902         led.off = off;
 3903         led.on = on;
 3904         (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
 3905 }
 3906 
 3907 /*
 3908  * Set the critical temperature at which the firmware will stop the radio
 3909  * and notify us.
 3910  */
 3911 static int
 3912 iwn_set_critical_temp(struct iwn_softc *sc)
 3913 {
 3914         struct iwn_critical_temp crit;
 3915         int32_t temp;
 3916 
 3917         IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
 3918 
 3919         if (sc->hw_type == IWN_HW_REV_TYPE_5150)
 3920                 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
 3921         else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
 3922                 temp = IWN_CTOK(110);
 3923         else
 3924                 temp = 110;
 3925         memset(&crit, 0, sizeof crit);
 3926         crit.tempR = htole32(temp);
 3927         DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
 3928         return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
 3929 }
 3930 
 3931 static int
 3932 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
 3933 {
 3934         struct iwn_cmd_timing cmd;
 3935         uint64_t val, mod;
 3936 
 3937         memset(&cmd, 0, sizeof cmd);
 3938         memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
 3939         cmd.bintval = htole16(ni->ni_intval);
 3940         cmd.lintval = htole16(10);
 3941 
 3942         /* Compute remaining time until next beacon. */
 3943         val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
 3944         mod = le64toh(cmd.tstamp) % val;
 3945         cmd.binitval = htole32((uint32_t)(val - mod));
 3946 
 3947         DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
 3948             ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
 3949 
 3950         return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
 3951 }
 3952 
 3953 static void
 3954 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
 3955 {
 3956         struct ifnet *ifp = sc->sc_ifp;
 3957         struct ieee80211com *ic = ifp->if_l2com;
 3958 
 3959         /* Adjust TX power if need be (delta >= 3 degC). */
 3960         DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
 3961             __func__, sc->temp, temp);
 3962         if (abs(temp - sc->temp) >= 3) {
 3963                 /* Record temperature of last calibration. */
 3964                 sc->temp = temp;
 3965                 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
 3966         }
 3967 }
 3968 
 3969 /*
 3970  * Set TX power for current channel (each rate has its own power settings).
 3971  * This function takes into account the regulatory information from EEPROM,
 3972  * the current temperature and the current voltage.
 3973  */
 3974 static int
 3975 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
 3976     int async)
 3977 {
 3978 /* Fixed-point arithmetic division using a n-bit fractional part. */
 3979 #define fdivround(a, b, n)      \
 3980         ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
 3981 /* Linear interpolation. */
 3982 #define interpolate(x, x1, y1, x2, y2, n)       \
 3983         ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
 3984 
 3985         static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
 3986         struct iwn_ucode_info *uc = &sc->ucode_info;
 3987         struct iwn4965_cmd_txpower cmd;
 3988         struct iwn4965_eeprom_chan_samples *chans;
 3989         const uint8_t *rf_gain, *dsp_gain;
 3990         int32_t vdiff, tdiff;
 3991         int i, c, grp, maxpwr;
 3992         uint8_t chan;
 3993 
 3994         /* Retrieve current channel from last RXON. */
 3995         chan = sc->rxon.chan;
 3996         DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
 3997             chan);
 3998 
 3999         memset(&cmd, 0, sizeof cmd);
 4000         cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
 4001         cmd.chan = chan;
 4002 
 4003         if (IEEE80211_IS_CHAN_5GHZ(ch)) {
 4004                 maxpwr   = sc->maxpwr5GHz;
 4005                 rf_gain  = iwn4965_rf_gain_5ghz;
 4006                 dsp_gain = iwn4965_dsp_gain_5ghz;
 4007         } else {
 4008                 maxpwr   = sc->maxpwr2GHz;
 4009                 rf_gain  = iwn4965_rf_gain_2ghz;
 4010                 dsp_gain = iwn4965_dsp_gain_2ghz;
 4011         }
 4012 
 4013         /* Compute voltage compensation. */
 4014         vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
 4015         if (vdiff > 0)
 4016                 vdiff *= 2;
 4017         if (abs(vdiff) > 2)
 4018                 vdiff = 0;
 4019         DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
 4020             "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
 4021             __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
 4022 
 4023         /* Get channel attenuation group. */
 4024         if (chan <= 20)         /* 1-20 */
 4025                 grp = 4;
 4026         else if (chan <= 43)    /* 34-43 */
 4027                 grp = 0;
 4028         else if (chan <= 70)    /* 44-70 */
 4029                 grp = 1;
 4030         else if (chan <= 124)   /* 71-124 */
 4031                 grp = 2;
 4032         else                    /* 125-200 */
 4033                 grp = 3;
 4034         DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
 4035             "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
 4036 
 4037         /* Get channel sub-band. */
 4038         for (i = 0; i < IWN_NBANDS; i++)
 4039                 if (sc->bands[i].lo != 0 &&
 4040                     sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
 4041                         break;
 4042         if (i == IWN_NBANDS)    /* Can't happen in real-life. */
 4043                 return EINVAL;
 4044         chans = sc->bands[i].chans;
 4045         DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
 4046             "%s: chan %d sub-band=%d\n", __func__, chan, i);
 4047 
 4048         for (c = 0; c < 2; c++) {
 4049                 uint8_t power, gain, temp;
 4050                 int maxchpwr, pwr, ridx, idx;
 4051 
 4052                 power = interpolate(chan,
 4053                     chans[0].num, chans[0].samples[c][1].power,
 4054                     chans[1].num, chans[1].samples[c][1].power, 1);
 4055                 gain  = interpolate(chan,
 4056                     chans[0].num, chans[0].samples[c][1].gain,
 4057                     chans[1].num, chans[1].samples[c][1].gain, 1);
 4058                 temp  = interpolate(chan,
 4059                     chans[0].num, chans[0].samples[c][1].temp,
 4060                     chans[1].num, chans[1].samples[c][1].temp, 1);
 4061                 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
 4062                     "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
 4063                     __func__, c, power, gain, temp);
 4064 
 4065                 /* Compute temperature compensation. */
 4066                 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
 4067                 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
 4068                     "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
 4069                     __func__, tdiff, sc->temp, temp);
 4070 
 4071                 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
 4072                         /* Convert dBm to half-dBm. */
 4073                         maxchpwr = sc->maxpwr[chan] * 2;
 4074                         if ((ridx / 8) & 1)
 4075                                 maxchpwr -= 6;  /* MIMO 2T: -3dB */
 4076 
 4077                         pwr = maxpwr;
 4078 
 4079                         /* Adjust TX power based on rate. */
 4080                         if ((ridx % 8) == 5)
 4081                                 pwr -= 15;      /* OFDM48: -7.5dB */
 4082                         else if ((ridx % 8) == 6)
 4083                                 pwr -= 17;      /* OFDM54: -8.5dB */
 4084                         else if ((ridx % 8) == 7)
 4085                                 pwr -= 20;      /* OFDM60: -10dB */
 4086                         else
 4087                                 pwr -= 10;      /* Others: -5dB */
 4088 
 4089                         /* Do not exceed channel max TX power. */
 4090                         if (pwr > maxchpwr)
 4091                                 pwr = maxchpwr;
 4092 
 4093                         idx = gain - (pwr - power) - tdiff - vdiff;
 4094                         if ((ridx / 8) & 1)     /* MIMO */
 4095                                 idx += (int32_t)le32toh(uc->atten[grp][c]);
 4096 
 4097                         if (cmd.band == 0)
 4098                                 idx += 9;       /* 5GHz */
 4099                         if (ridx == IWN_RIDX_MAX)
 4100                                 idx += 5;       /* CCK */
 4101 
 4102                         /* Make sure idx stays in a valid range. */
 4103                         if (idx < 0)
 4104                                 idx = 0;
 4105                         else if (idx > IWN4965_MAX_PWR_INDEX)
 4106                                 idx = IWN4965_MAX_PWR_INDEX;
 4107 
 4108                         DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
 4109                             "%s: Tx chain %d, rate idx %d: power=%d\n",
 4110                             __func__, c, ridx, idx);
 4111                         cmd.power[ridx].rf_gain[c] = rf_gain[idx];
 4112                         cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
 4113                 }
 4114         }
 4115 
 4116         DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
 4117             "%s: set tx power for chan %d\n", __func__, chan);
 4118         return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
 4119 
 4120 #undef interpolate
 4121 #undef fdivround
 4122 }
 4123 
 4124 static int
 4125 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
 4126     int async)
 4127 {
 4128         struct iwn5000_cmd_txpower cmd;
 4129 
 4130         /*
 4131          * TX power calibration is handled automatically by the firmware
 4132          * for 5000 Series.
 4133          */
 4134         memset(&cmd, 0, sizeof cmd);
 4135         cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
 4136         cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
 4137         cmd.srv_limit = IWN5000_TXPOWER_AUTO;
 4138         DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: setting TX power\n", __func__);
 4139         return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);
 4140 }
 4141 
 4142 /*
 4143  * Retrieve the maximum RSSI (in dBm) among receivers.
 4144  */
 4145 static int
 4146 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
 4147 {
 4148         struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
 4149         uint8_t mask, agc;
 4150         int rssi;
 4151 
 4152         mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
 4153         agc  = (le16toh(phy->agc) >> 7) & 0x7f;
 4154 
 4155         rssi = 0;
 4156         if (mask & IWN_ANT_A)
 4157                 rssi = MAX(rssi, phy->rssi[0]);
 4158         if (mask & IWN_ANT_B)
 4159                 rssi = MAX(rssi, phy->rssi[2]);
 4160         if (mask & IWN_ANT_C)
 4161                 rssi = MAX(rssi, phy->rssi[4]);
 4162 
 4163         DPRINTF(sc, IWN_DEBUG_RECV,
 4164             "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
 4165             mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
 4166             rssi - agc - IWN_RSSI_TO_DBM);
 4167         return rssi - agc - IWN_RSSI_TO_DBM;
 4168 }
 4169 
 4170 static int
 4171 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
 4172 {
 4173         struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
 4174         uint8_t agc;
 4175         int rssi;
 4176 
 4177         agc = (le32toh(phy->agc) >> 9) & 0x7f;
 4178 
 4179         rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
 4180                    le16toh(phy->rssi[1]) & 0xff);
 4181         rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
 4182 
 4183         DPRINTF(sc, IWN_DEBUG_RECV,
 4184             "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
 4185             phy->rssi[0], phy->rssi[1], phy->rssi[2],
 4186             rssi - agc - IWN_RSSI_TO_DBM);
 4187         return rssi - agc - IWN_RSSI_TO_DBM;
 4188 }
 4189 
 4190 /*
 4191  * Retrieve the average noise (in dBm) among receivers.
 4192  */
 4193 static int
 4194 iwn_get_noise(const struct iwn_rx_general_stats *stats)
 4195 {
 4196         int i, total, nbant, noise;
 4197 
 4198         total = nbant = 0;
 4199         for (i = 0; i < 3; i++) {
 4200                 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
 4201                         continue;
 4202                 total += noise;
 4203                 nbant++;
 4204         }
 4205         /* There should be at least one antenna but check anyway. */
 4206         return (nbant == 0) ? -127 : (total / nbant) - 107;
 4207 }
 4208 
 4209 /*
 4210  * Compute temperature (in degC) from last received statistics.
 4211  */
 4212 static int
 4213 iwn4965_get_temperature(struct iwn_softc *sc)
 4214 {
 4215         struct iwn_ucode_info *uc = &sc->ucode_info;
 4216         int32_t r1, r2, r3, r4, temp;
 4217 
 4218         r1 = le32toh(uc->temp[0].chan20MHz);
 4219         r2 = le32toh(uc->temp[1].chan20MHz);
 4220         r3 = le32toh(uc->temp[2].chan20MHz);
 4221         r4 = le32toh(sc->rawtemp);
 4222 
 4223         if (r1 == r3)   /* Prevents division by 0 (should not happen). */
 4224                 return 0;
 4225 
 4226         /* Sign-extend 23-bit R4 value to 32-bit. */
 4227         r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
 4228         /* Compute temperature in Kelvin. */
 4229         temp = (259 * (r4 - r2)) / (r3 - r1);
 4230         temp = (temp * 97) / 100 + 8;
 4231 
 4232         DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
 4233             IWN_KTOC(temp));
 4234         return IWN_KTOC(temp);
 4235 }
 4236 
 4237 static int
 4238 iwn5000_get_temperature(struct iwn_softc *sc)
 4239 {
 4240         int32_t temp;
 4241 
 4242         /*
 4243          * Temperature is not used by the driver for 5000 Series because
 4244          * TX power calibration is handled by firmware.
 4245          */
 4246         temp = le32toh(sc->rawtemp);
 4247         if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
 4248                 temp = (temp / -5) + sc->temp_off;
 4249                 temp = IWN_KTOC(temp);
 4250         }
 4251         return temp;
 4252 }
 4253 
 4254 /*
 4255  * Initialize sensitivity calibration state machine.
 4256  */
 4257 static int
 4258 iwn_init_sensitivity(struct iwn_softc *sc)
 4259 {
 4260         struct iwn_ops *ops = &sc->ops;
 4261         struct iwn_calib_state *calib = &sc->calib;
 4262         uint32_t flags;
 4263         int error;
 4264 
 4265         /* Reset calibration state machine. */
 4266         memset(calib, 0, sizeof (*calib));
 4267         calib->state = IWN_CALIB_STATE_INIT;
 4268         calib->cck_state = IWN_CCK_STATE_HIFA;
 4269         /* Set initial correlation values. */
 4270         calib->ofdm_x1     = sc->limits->min_ofdm_x1;
 4271         calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
 4272         calib->ofdm_x4     = sc->limits->min_ofdm_x4;
 4273         calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
 4274         calib->cck_x4      = 125;
 4275         calib->cck_mrc_x4  = sc->limits->min_cck_mrc_x4;
 4276         calib->energy_cck  = sc->limits->energy_cck;
 4277 
 4278         /* Write initial sensitivity. */
 4279         if ((error = iwn_send_sensitivity(sc)) != 0)
 4280                 return error;
 4281 
 4282         /* Write initial gains. */
 4283         if ((error = ops->init_gains(sc)) != 0)
 4284                 return error;
 4285 
 4286         /* Request statistics at each beacon interval. */
 4287         flags = 0;
 4288         DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
 4289             __func__);
 4290         return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
 4291 }
 4292 
 4293 /*
 4294  * Collect noise and RSSI statistics for the first 20 beacons received
 4295  * after association and use them to determine connected antennas and
 4296  * to set differential gains.
 4297  */
 4298 static void
 4299 iwn_collect_noise(struct iwn_softc *sc,
 4300     const struct iwn_rx_general_stats *stats)
 4301 {
 4302         struct iwn_ops *ops = &sc->ops;
 4303         struct iwn_calib_state *calib = &sc->calib;
 4304         uint32_t val;
 4305         int i;
 4306 
 4307         /* Accumulate RSSI and noise for all 3 antennas. */
 4308         for (i = 0; i < 3; i++) {
 4309                 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
 4310                 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
 4311         }
 4312         /* NB: We update differential gains only once after 20 beacons. */
 4313         if (++calib->nbeacons < 20)
 4314                 return;
 4315 
 4316         /* Determine highest average RSSI. */
 4317         val = MAX(calib->rssi[0], calib->rssi[1]);
 4318         val = MAX(calib->rssi[2], val);
 4319 
 4320         /* Determine which antennas are connected. */
 4321         sc->chainmask = sc->rxchainmask;
 4322         for (i = 0; i < 3; i++)
 4323                 if (val - calib->rssi[i] > 15 * 20)
 4324                         sc->chainmask &= ~(1 << i);
 4325         DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4326             "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
 4327             __func__, sc->rxchainmask, sc->chainmask);
 4328 
 4329         /* If none of the TX antennas are connected, keep at least one. */
 4330         if ((sc->chainmask & sc->txchainmask) == 0)
 4331                 sc->chainmask |= IWN_LSB(sc->txchainmask);
 4332 
 4333         (void)ops->set_gains(sc);
 4334         calib->state = IWN_CALIB_STATE_RUN;
 4335 
 4336 #ifdef notyet
 4337         /* XXX Disable RX chains with no antennas connected. */
 4338         sc->rxon.rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
 4339         (void)iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);
 4340 #endif
 4341 
 4342 #if 0
 4343         /* XXX: not yet */
 4344         /* Enable power-saving mode if requested by user. */
 4345         if (sc->sc_ic.ic_flags & IEEE80211_F_PMGTON)
 4346                 (void)iwn_set_pslevel(sc, 0, 3, 1);
 4347 #endif
 4348 }
 4349 
 4350 static int
 4351 iwn4965_init_gains(struct iwn_softc *sc)
 4352 {
 4353         struct iwn_phy_calib_gain cmd;
 4354 
 4355         memset(&cmd, 0, sizeof cmd);
 4356         cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
 4357         /* Differential gains initially set to 0 for all 3 antennas. */
 4358         DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4359             "%s: setting initial differential gains\n", __func__);
 4360         return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
 4361 }
 4362 
 4363 static int
 4364 iwn5000_init_gains(struct iwn_softc *sc)
 4365 {
 4366         struct iwn_phy_calib cmd;
 4367 
 4368         memset(&cmd, 0, sizeof cmd);
 4369         cmd.code = sc->reset_noise_gain;
 4370         cmd.ngroups = 1;
 4371         cmd.isvalid = 1;
 4372         DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4373             "%s: setting initial differential gains\n", __func__);
 4374         return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
 4375 }
 4376 
 4377 static int
 4378 iwn4965_set_gains(struct iwn_softc *sc)
 4379 {
 4380         struct iwn_calib_state *calib = &sc->calib;
 4381         struct iwn_phy_calib_gain cmd;
 4382         int i, delta, noise;
 4383 
 4384         /* Get minimal noise among connected antennas. */
 4385         noise = INT_MAX;        /* NB: There's at least one antenna. */
 4386         for (i = 0; i < 3; i++)
 4387                 if (sc->chainmask & (1 << i))
 4388                         noise = MIN(calib->noise[i], noise);
 4389 
 4390         memset(&cmd, 0, sizeof cmd);
 4391         cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
 4392         /* Set differential gains for connected antennas. */
 4393         for (i = 0; i < 3; i++) {
 4394                 if (sc->chainmask & (1 << i)) {
 4395                         /* Compute attenuation (in unit of 1.5dB). */
 4396                         delta = (noise - (int32_t)calib->noise[i]) / 30;
 4397                         /* NB: delta <= 0 */
 4398                         /* Limit to [-4.5dB,0]. */
 4399                         cmd.gain[i] = MIN(abs(delta), 3);
 4400                         if (delta < 0)
 4401                                 cmd.gain[i] |= 1 << 2;  /* sign bit */
 4402                 }
 4403         }
 4404         DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4405             "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
 4406             cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
 4407         return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
 4408 }
 4409 
 4410 static int
 4411 iwn5000_set_gains(struct iwn_softc *sc)
 4412 {
 4413         struct iwn_calib_state *calib = &sc->calib;
 4414         struct iwn_phy_calib_gain cmd;
 4415         int i, ant, div, delta;
 4416 
 4417         /* We collected 20 beacons and !=6050 need a 1.5 factor. */
 4418         div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
 4419 
 4420         memset(&cmd, 0, sizeof cmd);
 4421         cmd.code = sc->noise_gain;
 4422         cmd.ngroups = 1;
 4423         cmd.isvalid = 1;
 4424         /* Get first available RX antenna as referential. */
 4425         ant = IWN_LSB(sc->rxchainmask);
 4426         /* Set differential gains for other antennas. */
 4427         for (i = ant + 1; i < 3; i++) {
 4428                 if (sc->chainmask & (1 << i)) {
 4429                         /* The delta is relative to antenna "ant". */
 4430                         delta = ((int32_t)calib->noise[ant] -
 4431                             (int32_t)calib->noise[i]) / div;
 4432                         /* Limit to [-4.5dB,+4.5dB]. */
 4433                         cmd.gain[i - 1] = MIN(abs(delta), 3);
 4434                         if (delta < 0)
 4435                                 cmd.gain[i - 1] |= 1 << 2;      /* sign bit */
 4436                 }
 4437         }
 4438         DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4439             "setting differential gains Ant B/C: %x/%x (%x)\n",
 4440             cmd.gain[0], cmd.gain[1], sc->chainmask);
 4441         return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
 4442 }
 4443 
 4444 /*
 4445  * Tune RF RX sensitivity based on the number of false alarms detected
 4446  * during the last beacon period.
 4447  */
 4448 static void
 4449 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
 4450 {
 4451 #define inc(val, inc, max)                      \
 4452         if ((val) < (max)) {                    \
 4453                 if ((val) < (max) - (inc))      \
 4454                         (val) += (inc);         \
 4455                 else                            \
 4456                         (val) = (max);          \
 4457                 needs_update = 1;               \
 4458         }
 4459 #define dec(val, dec, min)                      \
 4460         if ((val) > (min)) {                    \
 4461                 if ((val) > (min) + (dec))      \
 4462                         (val) -= (dec);         \
 4463                 else                            \
 4464                         (val) = (min);          \
 4465                 needs_update = 1;               \
 4466         }
 4467 
 4468         const struct iwn_sensitivity_limits *limits = sc->limits;
 4469         struct iwn_calib_state *calib = &sc->calib;
 4470         uint32_t val, rxena, fa;
 4471         uint32_t energy[3], energy_min;
 4472         uint8_t noise[3], noise_ref;
 4473         int i, needs_update = 0;
 4474 
 4475         /* Check that we've been enabled long enough. */
 4476         if ((rxena = le32toh(stats->general.load)) == 0)
 4477                 return;
 4478 
 4479         /* Compute number of false alarms since last call for OFDM. */
 4480         fa  = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
 4481         fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
 4482         fa *= 200 * IEEE80211_DUR_TU;   /* 200TU */
 4483 
 4484         /* Save counters values for next call. */
 4485         calib->bad_plcp_ofdm = le32toh(stats->ofdm.bad_plcp);
 4486         calib->fa_ofdm = le32toh(stats->ofdm.fa);
 4487 
 4488         if (fa > 50 * rxena) {
 4489                 /* High false alarm count, decrease sensitivity. */
 4490                 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4491                     "%s: OFDM high false alarm count: %u\n", __func__, fa);
 4492                 inc(calib->ofdm_x1,     1, limits->max_ofdm_x1);
 4493                 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
 4494                 inc(calib->ofdm_x4,     1, limits->max_ofdm_x4);
 4495                 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
 4496 
 4497         } else if (fa < 5 * rxena) {
 4498                 /* Low false alarm count, increase sensitivity. */
 4499                 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4500                     "%s: OFDM low false alarm count: %u\n", __func__, fa);
 4501                 dec(calib->ofdm_x1,     1, limits->min_ofdm_x1);
 4502                 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
 4503                 dec(calib->ofdm_x4,     1, limits->min_ofdm_x4);
 4504                 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
 4505         }
 4506 
 4507         /* Compute maximum noise among 3 receivers. */
 4508         for (i = 0; i < 3; i++)
 4509                 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
 4510         val = MAX(noise[0], noise[1]);
 4511         val = MAX(noise[2], val);
 4512         /* Insert it into our samples table. */
 4513         calib->noise_samples[calib->cur_noise_sample] = val;
 4514         calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
 4515 
 4516         /* Compute maximum noise among last 20 samples. */
 4517         noise_ref = calib->noise_samples[0];
 4518         for (i = 1; i < 20; i++)
 4519                 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
 4520 
 4521         /* Compute maximum energy among 3 receivers. */
 4522         for (i = 0; i < 3; i++)
 4523                 energy[i] = le32toh(stats->general.energy[i]);
 4524         val = MIN(energy[0], energy[1]);
 4525         val = MIN(energy[2], val);
 4526         /* Insert it into our samples table. */
 4527         calib->energy_samples[calib->cur_energy_sample] = val;
 4528         calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
 4529 
 4530         /* Compute minimum energy among last 10 samples. */
 4531         energy_min = calib->energy_samples[0];
 4532         for (i = 1; i < 10; i++)
 4533                 energy_min = MAX(energy_min, calib->energy_samples[i]);
 4534         energy_min += 6;
 4535 
 4536         /* Compute number of false alarms since last call for CCK. */
 4537         fa  = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
 4538         fa += le32toh(stats->cck.fa) - calib->fa_cck;
 4539         fa *= 200 * IEEE80211_DUR_TU;   /* 200TU */
 4540 
 4541         /* Save counters values for next call. */
 4542         calib->bad_plcp_cck = le32toh(stats->cck.bad_plcp);
 4543         calib->fa_cck = le32toh(stats->cck.fa);
 4544 
 4545         if (fa > 50 * rxena) {
 4546                 /* High false alarm count, decrease sensitivity. */
 4547                 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4548                     "%s: CCK high false alarm count: %u\n", __func__, fa);
 4549                 calib->cck_state = IWN_CCK_STATE_HIFA;
 4550                 calib->low_fa = 0;
 4551 
 4552                 if (calib->cck_x4 > 160) {
 4553                         calib->noise_ref = noise_ref;
 4554                         if (calib->energy_cck > 2)
 4555                                 dec(calib->energy_cck, 2, energy_min);
 4556                 }
 4557                 if (calib->cck_x4 < 160) {
 4558                         calib->cck_x4 = 161;
 4559                         needs_update = 1;
 4560                 } else
 4561                         inc(calib->cck_x4, 3, limits->max_cck_x4);
 4562 
 4563                 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
 4564 
 4565         } else if (fa < 5 * rxena) {
 4566                 /* Low false alarm count, increase sensitivity. */
 4567                 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4568                     "%s: CCK low false alarm count: %u\n", __func__, fa);
 4569                 calib->cck_state = IWN_CCK_STATE_LOFA;
 4570                 calib->low_fa++;
 4571 
 4572                 if (calib->cck_state != IWN_CCK_STATE_INIT &&
 4573                     (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
 4574                      calib->low_fa > 100)) {
 4575                         inc(calib->energy_cck, 2, limits->min_energy_cck);
 4576                         dec(calib->cck_x4,     3, limits->min_cck_x4);
 4577                         dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
 4578                 }
 4579         } else {
 4580                 /* Not worth to increase or decrease sensitivity. */
 4581                 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4582                     "%s: CCK normal false alarm count: %u\n", __func__, fa);
 4583                 calib->low_fa = 0;
 4584                 calib->noise_ref = noise_ref;
 4585 
 4586                 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
 4587                         /* Previous interval had many false alarms. */
 4588                         dec(calib->energy_cck, 8, energy_min);
 4589                 }
 4590                 calib->cck_state = IWN_CCK_STATE_INIT;
 4591         }
 4592 
 4593         if (needs_update)
 4594                 (void)iwn_send_sensitivity(sc);
 4595 #undef dec
 4596 #undef inc
 4597 }
 4598 
 4599 static int
 4600 iwn_send_sensitivity(struct iwn_softc *sc)
 4601 {
 4602         struct iwn_calib_state *calib = &sc->calib;
 4603         struct iwn_enhanced_sensitivity_cmd cmd;
 4604         int len;
 4605 
 4606         memset(&cmd, 0, sizeof cmd);
 4607         len = sizeof (struct iwn_sensitivity_cmd);
 4608         cmd.which = IWN_SENSITIVITY_WORKTBL;
 4609         /* OFDM modulation. */
 4610         cmd.corr_ofdm_x1       = htole16(calib->ofdm_x1);
 4611         cmd.corr_ofdm_mrc_x1   = htole16(calib->ofdm_mrc_x1);
 4612         cmd.corr_ofdm_x4       = htole16(calib->ofdm_x4);
 4613         cmd.corr_ofdm_mrc_x4   = htole16(calib->ofdm_mrc_x4);
 4614         cmd.energy_ofdm        = htole16(sc->limits->energy_ofdm);
 4615         cmd.energy_ofdm_th     = htole16(62);
 4616         /* CCK modulation. */
 4617         cmd.corr_cck_x4        = htole16(calib->cck_x4);
 4618         cmd.corr_cck_mrc_x4    = htole16(calib->cck_mrc_x4);
 4619         cmd.energy_cck         = htole16(calib->energy_cck);
 4620         /* Barker modulation: use default values. */
 4621         cmd.corr_barker        = htole16(190);
 4622         cmd.corr_barker_mrc    = htole16(390);
 4623 
 4624         DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 4625             "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
 4626             calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
 4627             calib->ofdm_mrc_x4, calib->cck_x4,
 4628             calib->cck_mrc_x4, calib->energy_cck);
 4629 
 4630         if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
 4631                 goto send;
 4632         /* Enhanced sensitivity settings. */
 4633         len = sizeof (struct iwn_enhanced_sensitivity_cmd);
 4634         cmd.ofdm_det_slope_mrc = htole16(668);
 4635         cmd.ofdm_det_icept_mrc = htole16(4);
 4636         cmd.ofdm_det_slope     = htole16(486);
 4637         cmd.ofdm_det_icept     = htole16(37);
 4638         cmd.cck_det_slope_mrc  = htole16(853);
 4639         cmd.cck_det_icept_mrc  = htole16(4);
 4640         cmd.cck_det_slope      = htole16(476);
 4641         cmd.cck_det_icept      = htole16(99);
 4642 send:
 4643         return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
 4644 }
 4645 
 4646 /*
 4647  * Set STA mode power saving level (between 0 and 5).
 4648  * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
 4649  */
 4650 static int
 4651 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
 4652 {
 4653         struct iwn_pmgt_cmd cmd;
 4654         const struct iwn_pmgt *pmgt;
 4655         uint32_t max, skip_dtim;
 4656         uint32_t reg;
 4657         int i;
 4658 
 4659         /* Select which PS parameters to use. */
 4660         if (dtim <= 2)
 4661                 pmgt = &iwn_pmgt[0][level];
 4662         else if (dtim <= 10)
 4663                 pmgt = &iwn_pmgt[1][level];
 4664         else
 4665                 pmgt = &iwn_pmgt[2][level];
 4666 
 4667         memset(&cmd, 0, sizeof cmd);
 4668         if (level != 0) /* not CAM */
 4669                 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
 4670         if (level == 5)
 4671                 cmd.flags |= htole16(IWN_PS_FAST_PD);
 4672         /* Retrieve PCIe Active State Power Management (ASPM). */
 4673         reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
 4674         if (!(reg & 0x1))       /* L0s Entry disabled. */
 4675                 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
 4676         cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
 4677         cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
 4678 
 4679         if (dtim == 0) {
 4680                 dtim = 1;
 4681                 skip_dtim = 0;
 4682         } else
 4683                 skip_dtim = pmgt->skip_dtim;
 4684         if (skip_dtim != 0) {
 4685                 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
 4686                 max = pmgt->intval[4];
 4687                 if (max == (uint32_t)-1)
 4688                         max = dtim * (skip_dtim + 1);
 4689                 else if (max > dtim)
 4690                         max = (max / dtim) * dtim;
 4691         } else
 4692                 max = dtim;
 4693         for (i = 0; i < 5; i++)
 4694                 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
 4695 
 4696         DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
 4697             level);
 4698         return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
 4699 }
 4700 
 4701 static int
 4702 iwn_send_btcoex(struct iwn_softc *sc)
 4703 {
 4704         struct iwn_bluetooth cmd;
 4705 
 4706         memset(&cmd, 0, sizeof cmd);
 4707         cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
 4708         cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
 4709         cmd.max_kill = IWN_BT_MAX_KILL_DEF;
 4710         DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
 4711             __func__);
 4712         return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
 4713 }
 4714 
 4715 static int
 4716 iwn_send_advanced_btcoex(struct iwn_softc *sc)
 4717 {
 4718         static const uint32_t btcoex_3wire[12] = {
 4719                 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
 4720                 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
 4721                 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
 4722         };
 4723         struct iwn6000_btcoex_config btconfig;
 4724         struct iwn_btcoex_priotable btprio;
 4725         struct iwn_btcoex_prot btprot;
 4726         int error, i;
 4727 
 4728         memset(&btconfig, 0, sizeof btconfig);
 4729         btconfig.flags = 145;
 4730         btconfig.max_kill = 5;
 4731         btconfig.bt3_t7_timer = 1;
 4732         btconfig.kill_ack = htole32(0xffff0000);
 4733         btconfig.kill_cts = htole32(0xffff0000);
 4734         btconfig.sample_time = 2;
 4735         btconfig.bt3_t2_timer = 0xc;
 4736         for (i = 0; i < 12; i++)
 4737                 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
 4738         btconfig.valid = htole16(0xff);
 4739         btconfig.prio_boost = 0xf0;
 4740         DPRINTF(sc, IWN_DEBUG_RESET,
 4741             "%s: configuring advanced bluetooth coexistence\n", __func__);
 4742         error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig, sizeof(btconfig), 1);
 4743         if (error != 0)
 4744                 return error;
 4745 
 4746         memset(&btprio, 0, sizeof btprio);
 4747         btprio.calib_init1 = 0x6;
 4748         btprio.calib_init2 = 0x7;
 4749         btprio.calib_periodic_low1 = 0x2;
 4750         btprio.calib_periodic_low2 = 0x3;
 4751         btprio.calib_periodic_high1 = 0x4;
 4752         btprio.calib_periodic_high2 = 0x5;
 4753         btprio.dtim = 0x6;
 4754         btprio.scan52 = 0x8;
 4755         btprio.scan24 = 0xa;
 4756         error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
 4757             1);
 4758         if (error != 0)
 4759                 return error;
 4760 
 4761         /* Force BT state machine change. */
 4762         memset(&btprot, 0, sizeof btprio);
 4763         btprot.open = 1;
 4764         btprot.type = 1;
 4765         error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
 4766         if (error != 0)
 4767                 return error;
 4768         btprot.open = 0;
 4769         return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
 4770 }
 4771 
 4772 static int
 4773 iwn_config(struct iwn_softc *sc)
 4774 {
 4775         struct iwn_ops *ops = &sc->ops;
 4776         struct ifnet *ifp = sc->sc_ifp;
 4777         struct ieee80211com *ic = ifp->if_l2com;
 4778         uint32_t txmask;
 4779         uint16_t rxchain;
 4780         int error;
 4781 
 4782         if (sc->hw_type == IWN_HW_REV_TYPE_6005) {
 4783                 /* Set radio temperature sensor offset. */
 4784                 error = iwn5000_temp_offset_calib(sc);
 4785                 if (error != 0) {
 4786                         device_printf(sc->sc_dev,
 4787                             "%s: could not set temperature offset\n", __func__);
 4788                         return error;
 4789                 }
 4790         }
 4791 
 4792         /* Configure valid TX chains for >=5000 Series. */
 4793         if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
 4794                 txmask = htole32(sc->txchainmask);
 4795                 DPRINTF(sc, IWN_DEBUG_RESET,
 4796                     "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
 4797                 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
 4798                     sizeof txmask, 0);
 4799                 if (error != 0) {
 4800                         device_printf(sc->sc_dev,
 4801                             "%s: could not configure valid TX chains, "
 4802                             "error %d\n", __func__, error);
 4803                         return error;
 4804                 }
 4805         }
 4806 
 4807         /* Configure bluetooth coexistence. */
 4808         if (sc->sc_flags & IWN_FLAG_ADV_BTCOEX)
 4809                 error = iwn_send_advanced_btcoex(sc);
 4810         else
 4811                 error = iwn_send_btcoex(sc);
 4812         if (error != 0) {
 4813                 device_printf(sc->sc_dev,
 4814                     "%s: could not configure bluetooth coexistence, error %d\n",
 4815                     __func__, error);
 4816                 return error;
 4817         }
 4818 
 4819         /* Set mode, channel, RX filter and enable RX. */
 4820         memset(&sc->rxon, 0, sizeof (struct iwn_rxon));
 4821         IEEE80211_ADDR_COPY(sc->rxon.myaddr, IF_LLADDR(ifp));
 4822         IEEE80211_ADDR_COPY(sc->rxon.wlap, IF_LLADDR(ifp));
 4823         sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
 4824         sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
 4825         if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
 4826                 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
 4827         switch (ic->ic_opmode) {
 4828         case IEEE80211_M_STA:
 4829                 sc->rxon.mode = IWN_MODE_STA;
 4830                 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
 4831                 break;
 4832         case IEEE80211_M_MONITOR:
 4833                 sc->rxon.mode = IWN_MODE_MONITOR;
 4834                 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST |
 4835                     IWN_FILTER_CTL | IWN_FILTER_PROMISC);
 4836                 break;
 4837         default:
 4838                 /* Should not get there. */
 4839                 break;
 4840         }
 4841         sc->rxon.cck_mask  = 0x0f;      /* not yet negotiated */
 4842         sc->rxon.ofdm_mask = 0xff;      /* not yet negotiated */
 4843         sc->rxon.ht_single_mask = 0xff;
 4844         sc->rxon.ht_dual_mask = 0xff;
 4845         sc->rxon.ht_triple_mask = 0xff;
 4846         rxchain =
 4847             IWN_RXCHAIN_VALID(sc->rxchainmask) |
 4848             IWN_RXCHAIN_MIMO_COUNT(2) |
 4849             IWN_RXCHAIN_IDLE_COUNT(2);
 4850         sc->rxon.rxchain = htole16(rxchain);
 4851         DPRINTF(sc, IWN_DEBUG_RESET, "%s: setting configuration\n", __func__);
 4852         error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 0);
 4853         if (error != 0) {
 4854                 device_printf(sc->sc_dev, "%s: RXON command failed\n",
 4855                     __func__);
 4856                 return error;
 4857         }
 4858 
 4859         if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {
 4860                 device_printf(sc->sc_dev, "%s: could not add broadcast node\n",
 4861                     __func__);
 4862                 return error;
 4863         }
 4864 
 4865         /* Configuration has changed, set TX power accordingly. */
 4866         if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) {
 4867                 device_printf(sc->sc_dev, "%s: could not set TX power\n",
 4868                     __func__);
 4869                 return error;
 4870         }
 4871 
 4872         if ((error = iwn_set_critical_temp(sc)) != 0) {
 4873                 device_printf(sc->sc_dev,
 4874                     "%s: could not set critical temperature\n", __func__);
 4875                 return error;
 4876         }
 4877 
 4878         /* Set power saving level to CAM during initialization. */
 4879         if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
 4880                 device_printf(sc->sc_dev,
 4881                     "%s: could not set power saving level\n", __func__);
 4882                 return error;
 4883         }
 4884         return 0;
 4885 }
 4886 
 4887 /*
 4888  * Add an ssid element to a frame.
 4889  */
 4890 static uint8_t *
 4891 ieee80211_add_ssid(uint8_t *frm, const uint8_t *ssid, u_int len)
 4892 {
 4893         *frm++ = IEEE80211_ELEMID_SSID;
 4894         *frm++ = len;
 4895         memcpy(frm, ssid, len);
 4896         return frm + len;
 4897 }
 4898 
 4899 static int
 4900 iwn_scan(struct iwn_softc *sc)
 4901 {
 4902         struct ifnet *ifp = sc->sc_ifp;
 4903         struct ieee80211com *ic = ifp->if_l2com;
 4904         struct ieee80211_scan_state *ss = ic->ic_scan;  /*XXX*/
 4905         struct iwn_scan_hdr *hdr;
 4906         struct iwn_cmd_data *tx;
 4907         struct iwn_scan_essid *essid;
 4908         struct iwn_scan_chan *chan;
 4909         struct ieee80211_frame *wh;
 4910         struct ieee80211_rateset *rs;
 4911         struct ieee80211_channel *c;
 4912         uint8_t *buf, *frm;
 4913         uint16_t rxchain;
 4914         uint8_t txant;
 4915         int buflen, error;
 4916 
 4917         buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
 4918         if (buf == NULL) {
 4919                 device_printf(sc->sc_dev,
 4920                     "%s: could not allocate buffer for scan command\n",
 4921                     __func__);
 4922                 return ENOMEM;
 4923         }
 4924         hdr = (struct iwn_scan_hdr *)buf;
 4925         /*
 4926          * Move to the next channel if no frames are received within 10ms
 4927          * after sending the probe request.
 4928          */
 4929         hdr->quiet_time = htole16(10);          /* timeout in milliseconds */
 4930         hdr->quiet_threshold = htole16(1);      /* min # of packets */
 4931 
 4932         /* Select antennas for scanning. */
 4933         rxchain =
 4934             IWN_RXCHAIN_VALID(sc->rxchainmask) |
 4935             IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
 4936             IWN_RXCHAIN_DRIVER_FORCE;
 4937         if (IEEE80211_IS_CHAN_A(ic->ic_curchan) &&
 4938             sc->hw_type == IWN_HW_REV_TYPE_4965) {
 4939                 /* Ant A must be avoided in 5GHz because of an HW bug. */
 4940                 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_BC);
 4941         } else  /* Use all available RX antennas. */
 4942                 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
 4943         hdr->rxchain = htole16(rxchain);
 4944         hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
 4945 
 4946         tx = (struct iwn_cmd_data *)(hdr + 1);
 4947         tx->flags = htole32(IWN_TX_AUTO_SEQ);
 4948         tx->id = sc->broadcast_id;
 4949         tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
 4950 
 4951         if (IEEE80211_IS_CHAN_A(ic->ic_curchan)) {
 4952                 /* Send probe requests at 6Mbps. */
 4953                 tx->plcp = iwn_rates[IWN_RIDX_OFDM6].plcp;
 4954                 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
 4955         } else {
 4956                 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
 4957                 /* Send probe requests at 1Mbps. */
 4958                 tx->plcp = iwn_rates[IWN_RIDX_CCK1].plcp;
 4959                 tx->rflags = IWN_RFLAG_CCK;
 4960                 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
 4961         }
 4962         /* Use the first valid TX antenna. */
 4963         txant = IWN_LSB(sc->txchainmask);
 4964         tx->rflags |= IWN_RFLAG_ANT(txant);
 4965 
 4966         essid = (struct iwn_scan_essid *)(tx + 1);
 4967         if (ss->ss_ssid[0].len != 0) {
 4968                 essid[0].id = IEEE80211_ELEMID_SSID;
 4969                 essid[0].len = ss->ss_ssid[0].len;
 4970                 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
 4971         }
 4972         /*
 4973          * Build a probe request frame.  Most of the following code is a
 4974          * copy & paste of what is done in net80211.
 4975          */
 4976         wh = (struct ieee80211_frame *)(essid + 20);
 4977         wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
 4978             IEEE80211_FC0_SUBTYPE_PROBE_REQ;
 4979         wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
 4980         IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr);
 4981         IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp));
 4982         IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr);
 4983         *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
 4984         *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
 4985 
 4986         frm = (uint8_t *)(wh + 1);
 4987         frm = ieee80211_add_ssid(frm, NULL, 0);
 4988         frm = ieee80211_add_rates(frm, rs);
 4989         if (rs->rs_nrates > IEEE80211_RATE_SIZE)
 4990                 frm = ieee80211_add_xrates(frm, rs);
 4991 #if 0   /* HT */
 4992         if (ic->ic_flags & IEEE80211_F_HTON)
 4993                 frm = ieee80211_add_htcaps(frm, ic);
 4994 #endif
 4995 
 4996         /* Set length of probe request. */
 4997         tx->len = htole16(frm - (uint8_t *)wh);
 4998 
 4999         c = ic->ic_curchan;
 5000         chan = (struct iwn_scan_chan *)frm;
 5001         chan->chan = htole16(ieee80211_chan2ieee(ic, c));
 5002         chan->flags = 0;
 5003         if (ss->ss_nssid > 0)
 5004                 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
 5005         chan->dsp_gain = 0x6e;
 5006         if (IEEE80211_IS_CHAN_5GHZ(c) &&
 5007             !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
 5008                 chan->rf_gain = 0x3b;
 5009                 chan->active  = htole16(24);
 5010                 chan->passive = htole16(110);
 5011                 chan->flags |= htole32(IWN_CHAN_ACTIVE);
 5012         } else if (IEEE80211_IS_CHAN_5GHZ(c)) {
 5013                 chan->rf_gain = 0x3b;
 5014                 chan->active  = htole16(24);
 5015                 if (sc->rxon.associd)
 5016                         chan->passive = htole16(78);
 5017                 else
 5018                         chan->passive = htole16(110);
 5019                 hdr->crc_threshold = 0xffff;
 5020         } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
 5021                 chan->rf_gain = 0x28;
 5022                 chan->active  = htole16(36);
 5023                 chan->passive = htole16(120);
 5024                 chan->flags |= htole32(IWN_CHAN_ACTIVE);
 5025         } else {
 5026                 chan->rf_gain = 0x28;
 5027                 chan->active  = htole16(36);
 5028                 if (sc->rxon.associd)
 5029                         chan->passive = htole16(88);
 5030                 else
 5031                         chan->passive = htole16(120);
 5032                 hdr->crc_threshold = 0xffff;
 5033         }
 5034 
 5035         DPRINTF(sc, IWN_DEBUG_STATE,
 5036             "%s: chan %u flags 0x%x rf_gain 0x%x "
 5037             "dsp_gain 0x%x active 0x%x passive 0x%x\n", __func__,
 5038             chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
 5039             chan->active, chan->passive);
 5040 
 5041         hdr->nchan++;
 5042         chan++;
 5043         buflen = (uint8_t *)chan - buf;
 5044         hdr->len = htole16(buflen);
 5045 
 5046         DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
 5047             hdr->nchan);
 5048         error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
 5049         free(buf, M_DEVBUF);
 5050         return error;
 5051 }
 5052 
 5053 static int
 5054 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
 5055 {
 5056         struct iwn_ops *ops = &sc->ops;
 5057         struct ifnet *ifp = sc->sc_ifp;
 5058         struct ieee80211com *ic = ifp->if_l2com;
 5059         struct ieee80211_node *ni = vap->iv_bss;
 5060         int error;
 5061 
 5062         /* Update adapter configuration. */
 5063         IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->ni_bssid);
 5064         sc->rxon.chan = ieee80211_chan2ieee(ic, ni->ni_chan);
 5065         sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
 5066         if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
 5067                 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
 5068         if (ic->ic_flags & IEEE80211_F_SHSLOT)
 5069                 sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
 5070         if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
 5071                 sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
 5072         if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
 5073                 sc->rxon.cck_mask  = 0;
 5074                 sc->rxon.ofdm_mask = 0x15;
 5075         } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
 5076                 sc->rxon.cck_mask  = 0x03;
 5077                 sc->rxon.ofdm_mask = 0;
 5078         } else {
 5079                 /* Assume 802.11b/g. */
 5080                 sc->rxon.cck_mask  = 0x0f;
 5081                 sc->rxon.ofdm_mask = 0x15;
 5082         }
 5083         DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
 5084             sc->rxon.chan, sc->rxon.flags, sc->rxon.cck_mask,
 5085             sc->rxon.ofdm_mask);
 5086         error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);
 5087         if (error != 0) {
 5088                 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n",
 5089                     __func__, error);
 5090                 return error;
 5091         }
 5092 
 5093         /* Configuration has changed, set TX power accordingly. */
 5094         if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
 5095                 device_printf(sc->sc_dev,
 5096                     "%s: could not set TX power, error %d\n", __func__, error);
 5097                 return error;
 5098         }
 5099         /*
 5100          * Reconfiguring RXON clears the firmware nodes table so we must
 5101          * add the broadcast node again.
 5102          */
 5103         if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {
 5104                 device_printf(sc->sc_dev,
 5105                     "%s: could not add broadcast node, error %d\n", __func__,
 5106                     error);
 5107                 return error;
 5108         }
 5109         return 0;
 5110 }
 5111 
 5112 static int
 5113 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
 5114 {
 5115 #define MS(v,x) (((v) & x) >> x##_S)
 5116         struct iwn_ops *ops = &sc->ops;
 5117         struct ifnet *ifp = sc->sc_ifp;
 5118         struct ieee80211com *ic = ifp->if_l2com;
 5119         struct ieee80211_node *ni = vap->iv_bss;
 5120         struct iwn_node_info node;
 5121         int error;
 5122 
 5123         if (ic->ic_opmode == IEEE80211_M_MONITOR) {
 5124                 /* Link LED blinks while monitoring. */
 5125                 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
 5126                 return 0;
 5127         }
 5128         if ((error = iwn_set_timing(sc, ni)) != 0) {
 5129                 device_printf(sc->sc_dev,
 5130                     "%s: could not set timing, error %d\n", __func__, error);
 5131                 return error;
 5132         }
 5133 
 5134         /* Update adapter configuration. */
 5135         IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->ni_bssid);
 5136         sc->rxon.associd = htole16(IEEE80211_AID(ni->ni_associd));
 5137         sc->rxon.chan = ieee80211_chan2ieee(ic, ni->ni_chan);
 5138         sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
 5139         if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
 5140                 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
 5141         if (ic->ic_flags & IEEE80211_F_SHSLOT)
 5142                 sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
 5143         if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
 5144                 sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
 5145         if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
 5146                 sc->rxon.cck_mask  = 0;
 5147                 sc->rxon.ofdm_mask = 0x15;
 5148         } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
 5149                 sc->rxon.cck_mask  = 0x03;
 5150                 sc->rxon.ofdm_mask = 0;
 5151         } else {
 5152                 /* Assume 802.11b/g. */
 5153                 sc->rxon.cck_mask  = 0x0f;
 5154                 sc->rxon.ofdm_mask = 0x15;
 5155         }
 5156 #if 0   /* HT */
 5157         if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
 5158                 sc->rxon.flags &= ~htole32(IWN_RXON_HT);
 5159                 if (IEEE80211_IS_CHAN_HT40U(ni->ni_chan))
 5160                         sc->rxon.flags |= htole32(IWN_RXON_HT40U);
 5161                 else if (IEEE80211_IS_CHAN_HT40D(ni->ni_chan))
 5162                         sc->rxon.flags |= htole32(IWN_RXON_HT40D);
 5163                 else
 5164                         sc->rxon.flags |= htole32(IWN_RXON_HT20);
 5165                 sc->rxon.rxchain = htole16(
 5166                           IWN_RXCHAIN_VALID(3)
 5167                         | IWN_RXCHAIN_MIMO_COUNT(3)
 5168                         | IWN_RXCHAIN_IDLE_COUNT(1)
 5169                         | IWN_RXCHAIN_MIMO_FORCE);
 5170 
 5171                 maxrxampdu = MS(ni->ni_htparam, IEEE80211_HTCAP_MAXRXAMPDU);
 5172                 ampdudensity = MS(ni->ni_htparam, IEEE80211_HTCAP_MPDUDENSITY);
 5173         } else
 5174                 maxrxampdu = ampdudensity = 0;
 5175 #endif
 5176         sc->rxon.filter |= htole32(IWN_FILTER_BSS);
 5177         DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x\n",
 5178             sc->rxon.chan, sc->rxon.flags);
 5179         error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);
 5180         if (error != 0) {
 5181                 device_printf(sc->sc_dev,
 5182                     "%s: could not update configuration, error %d\n", __func__,
 5183                     error);
 5184                 return error;
 5185         }
 5186 
 5187         /* Configuration has changed, set TX power accordingly. */
 5188         if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
 5189                 device_printf(sc->sc_dev,
 5190                     "%s: could not set TX power, error %d\n", __func__, error);
 5191                 return error;
 5192         }
 5193 
 5194         /* Fake a join to initialize the TX rate. */
 5195         ((struct iwn_node *)ni)->id = IWN_ID_BSS;
 5196         iwn_newassoc(ni, 1);
 5197 
 5198         /* Add BSS node. */
 5199         memset(&node, 0, sizeof node);
 5200         IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
 5201         node.id = IWN_ID_BSS;
 5202 #ifdef notyet
 5203         node.htflags = htole32(IWN_AMDPU_SIZE_FACTOR(3) |
 5204             IWN_AMDPU_DENSITY(5));      /* 2us */
 5205 #endif
 5206         DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
 5207         error = ops->add_node(sc, &node, 1);
 5208         if (error != 0) {
 5209                 device_printf(sc->sc_dev,
 5210                     "%s: could not add BSS node, error %d\n", __func__, error);
 5211                 return error;
 5212         }
 5213         DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
 5214             __func__, node.id);
 5215         if ((error = iwn_set_link_quality(sc, ni)) != 0) {
 5216                 device_printf(sc->sc_dev,
 5217                     "%s: could not setup link quality for node %d, error %d\n",
 5218                     __func__, node.id, error);
 5219                 return error;
 5220         }
 5221 
 5222         if ((error = iwn_init_sensitivity(sc)) != 0) {
 5223                 device_printf(sc->sc_dev,
 5224                     "%s: could not set sensitivity, error %d\n", __func__,
 5225                     error);
 5226                 return error;
 5227         }
 5228         /* Start periodic calibration timer. */
 5229         sc->calib.state = IWN_CALIB_STATE_ASSOC;
 5230         sc->calib_cnt = 0;
 5231         callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
 5232             sc);
 5233 
 5234         /* Link LED always on while associated. */
 5235         iwn_set_led(sc, IWN_LED_LINK, 0, 1);
 5236         return 0;
 5237 #undef MS
 5238 }
 5239 
 5240 #if 0   /* HT */
 5241 /*
 5242  * This function is called by upper layer when an ADDBA request is received
 5243  * from another STA and before the ADDBA response is sent.
 5244  */
 5245 static int
 5246 iwn_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
 5247     uint8_t tid)
 5248 {
 5249         struct ieee80211_rx_ba *ba = &ni->ni_rx_ba[tid];
 5250         struct iwn_softc *sc = ic->ic_softc;
 5251         struct iwn_ops *ops = &sc->ops;
 5252         struct iwn_node *wn = (void *)ni;
 5253         struct iwn_node_info node;
 5254 
 5255         memset(&node, 0, sizeof node);
 5256         node.id = wn->id;
 5257         node.control = IWN_NODE_UPDATE;
 5258         node.flags = IWN_FLAG_SET_ADDBA;
 5259         node.addba_tid = tid;
 5260         node.addba_ssn = htole16(ba->ba_winstart);
 5261         DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
 5262             wn->id, tid, ba->ba_winstart);
 5263         return ops->add_node(sc, &node, 1);
 5264 }
 5265 
 5266 /*
 5267  * This function is called by upper layer on teardown of an HT-immediate
 5268  * Block Ack agreement (eg. uppon receipt of a DELBA frame).
 5269  */
 5270 static void
 5271 iwn_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
 5272     uint8_t tid)
 5273 {
 5274         struct iwn_softc *sc = ic->ic_softc;
 5275         struct iwn_ops *ops = &sc->ops;
 5276         struct iwn_node *wn = (void *)ni;
 5277         struct iwn_node_info node;
 5278 
 5279         memset(&node, 0, sizeof node);
 5280         node.id = wn->id;
 5281         node.control = IWN_NODE_UPDATE;
 5282         node.flags = IWN_FLAG_SET_DELBA;
 5283         node.delba_tid = tid;
 5284         DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
 5285         (void)ops->add_node(sc, &node, 1);
 5286 }
 5287 
 5288 /*
 5289  * This function is called by upper layer when an ADDBA response is received
 5290  * from another STA.
 5291  */
 5292 static int
 5293 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
 5294     uint8_t tid)
 5295 {
 5296         struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[tid];
 5297         struct iwn_softc *sc = ic->ic_softc;
 5298         struct iwn_ops *ops = &sc->ops;
 5299         struct iwn_node *wn = (void *)ni;
 5300         struct iwn_node_info node;
 5301         int error;
 5302 
 5303         /* Enable TX for the specified RA/TID. */
 5304         wn->disable_tid &= ~(1 << tid);
 5305         memset(&node, 0, sizeof node);
 5306         node.id = wn->id;
 5307         node.control = IWN_NODE_UPDATE;
 5308         node.flags = IWN_FLAG_SET_DISABLE_TID;
 5309         node.disable_tid = htole16(wn->disable_tid);
 5310         error = ops->add_node(sc, &node, 1);
 5311         if (error != 0)
 5312                 return error;
 5313 
 5314         if ((error = iwn_nic_lock(sc)) != 0)
 5315                 return error;
 5316         ops->ampdu_tx_start(sc, ni, tid, ba->ba_winstart);
 5317         iwn_nic_unlock(sc);
 5318         return 0;
 5319 }
 5320 
 5321 static void
 5322 iwn_ampdu_tx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
 5323     uint8_t tid)
 5324 {
 5325         struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[tid];
 5326         struct iwn_softc *sc = ic->ic_softc;
 5327         struct iwn_ops *ops = &sc->ops;
 5328 
 5329         if (iwn_nic_lock(sc) != 0)
 5330                 return;
 5331         ops->ampdu_tx_stop(sc, tid, ba->ba_winstart);
 5332         iwn_nic_unlock(sc);
 5333 }
 5334 
 5335 static void
 5336 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
 5337     uint8_t tid, uint16_t ssn)
 5338 {
 5339         struct iwn_node *wn = (void *)ni;
 5340         int qid = 7 + tid;
 5341 
 5342         /* Stop TX scheduler while we're changing its configuration. */
 5343         iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
 5344             IWN4965_TXQ_STATUS_CHGACT);
 5345 
 5346         /* Assign RA/TID translation to the queue. */
 5347         iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
 5348             wn->id << 4 | tid);
 5349 
 5350         /* Enable chain-building mode for the queue. */
 5351         iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
 5352 
 5353         /* Set starting sequence number from the ADDBA request. */
 5354         IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
 5355         iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
 5356 
 5357         /* Set scheduler window size. */
 5358         iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
 5359             IWN_SCHED_WINSZ);
 5360         /* Set scheduler frame limit. */
 5361         iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
 5362             IWN_SCHED_LIMIT << 16);
 5363 
 5364         /* Enable interrupts for the queue. */
 5365         iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
 5366 
 5367         /* Mark the queue as active. */
 5368         iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
 5369             IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
 5370             iwn_tid2fifo[tid] << 1);
 5371 }
 5372 
 5373 static void
 5374 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)
 5375 {
 5376         int qid = 7 + tid;
 5377 
 5378         /* Stop TX scheduler while we're changing its configuration. */
 5379         iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
 5380             IWN4965_TXQ_STATUS_CHGACT);
 5381 
 5382         /* Set starting sequence number from the ADDBA request. */
 5383         IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
 5384         iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
 5385 
 5386         /* Disable interrupts for the queue. */
 5387         iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
 5388 
 5389         /* Mark the queue as inactive. */
 5390         iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
 5391             IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
 5392 }
 5393 
 5394 static void
 5395 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
 5396     uint8_t tid, uint16_t ssn)
 5397 {
 5398         struct iwn_node *wn = (void *)ni;
 5399         int qid = 10 + tid;
 5400 
 5401         /* Stop TX scheduler while we're changing its configuration. */
 5402         iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
 5403             IWN5000_TXQ_STATUS_CHGACT);
 5404 
 5405         /* Assign RA/TID translation to the queue. */
 5406         iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
 5407             wn->id << 4 | tid);
 5408 
 5409         /* Enable chain-building mode for the queue. */
 5410         iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
 5411 
 5412         /* Enable aggregation for the queue. */
 5413         iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
 5414 
 5415         /* Set starting sequence number from the ADDBA request. */
 5416         IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
 5417         iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
 5418 
 5419         /* Set scheduler window size and frame limit. */
 5420         iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
 5421             IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
 5422 
 5423         /* Enable interrupts for the queue. */
 5424         iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
 5425 
 5426         /* Mark the queue as active. */
 5427         iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
 5428             IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
 5429 }
 5430 
 5431 static void
 5432 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)
 5433 {
 5434         int qid = 10 + tid;
 5435 
 5436         /* Stop TX scheduler while we're changing its configuration. */
 5437         iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
 5438             IWN5000_TXQ_STATUS_CHGACT);
 5439 
 5440         /* Disable aggregation for the queue. */
 5441         iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
 5442 
 5443         /* Set starting sequence number from the ADDBA request. */
 5444         IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
 5445         iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
 5446 
 5447         /* Disable interrupts for the queue. */
 5448         iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
 5449 
 5450         /* Mark the queue as inactive. */
 5451         iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
 5452             IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
 5453 }
 5454 #endif
 5455 
 5456 /*
 5457  * Query calibration tables from the initialization firmware.  We do this
 5458  * only once at first boot.  Called from a process context.
 5459  */
 5460 static int
 5461 iwn5000_query_calibration(struct iwn_softc *sc)
 5462 {
 5463         struct iwn5000_calib_config cmd;
 5464         int error;
 5465 
 5466         memset(&cmd, 0, sizeof cmd);
 5467         cmd.ucode.once.enable = 0xffffffff;
 5468         cmd.ucode.once.start  = 0xffffffff;
 5469         cmd.ucode.once.send   = 0xffffffff;
 5470         cmd.ucode.flags       = 0xffffffff;
 5471         DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
 5472             __func__);
 5473         error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
 5474         if (error != 0)
 5475                 return error;
 5476 
 5477         /* Wait at most two seconds for calibration to complete. */
 5478         if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
 5479                 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
 5480         return error;
 5481 }
 5482 
 5483 /*
 5484  * Send calibration results to the runtime firmware.  These results were
 5485  * obtained on first boot from the initialization firmware.
 5486  */
 5487 static int
 5488 iwn5000_send_calibration(struct iwn_softc *sc)
 5489 {
 5490         int idx, error;
 5491 
 5492         for (idx = 0; idx < 5; idx++) {
 5493                 if (sc->calibcmd[idx].buf == NULL)
 5494                         continue;       /* No results available. */
 5495                 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
 5496                     "send calibration result idx=%d len=%d\n", idx,
 5497                     sc->calibcmd[idx].len);
 5498                 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
 5499                     sc->calibcmd[idx].len, 0);
 5500                 if (error != 0) {
 5501                         device_printf(sc->sc_dev,
 5502                             "%s: could not send calibration result, error %d\n",
 5503                             __func__, error);
 5504                         return error;
 5505                 }
 5506         }
 5507         return 0;
 5508 }
 5509 
 5510 static int
 5511 iwn5000_send_wimax_coex(struct iwn_softc *sc)
 5512 {
 5513         struct iwn5000_wimax_coex wimax;
 5514 
 5515 #ifdef notyet
 5516         if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
 5517                 /* Enable WiMAX coexistence for combo adapters. */
 5518                 wimax.flags =
 5519                     IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
 5520                     IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
 5521                     IWN_WIMAX_COEX_STA_TABLE_VALID |
 5522                     IWN_WIMAX_COEX_ENABLE;
 5523                 memcpy(wimax.events, iwn6050_wimax_events,
 5524                     sizeof iwn6050_wimax_events);
 5525         } else
 5526 #endif
 5527         {
 5528                 /* Disable WiMAX coexistence. */
 5529                 wimax.flags = 0;
 5530                 memset(wimax.events, 0, sizeof wimax.events);
 5531         }
 5532         DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
 5533             __func__);
 5534         return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
 5535 }
 5536 
 5537 static int
 5538 iwn5000_crystal_calib(struct iwn_softc *sc)
 5539 {
 5540         struct iwn5000_phy_calib_crystal cmd;
 5541 
 5542         memset(&cmd, 0, sizeof cmd);
 5543         cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
 5544         cmd.ngroups = 1;
 5545         cmd.isvalid = 1;
 5546         cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
 5547         cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
 5548         DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
 5549             cmd.cap_pin[0], cmd.cap_pin[1]);
 5550         return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
 5551 }
 5552 
 5553 static int
 5554 iwn5000_temp_offset_calib(struct iwn_softc *sc)
 5555 {
 5556         struct iwn5000_phy_calib_temp_offset cmd;
 5557 
 5558         memset(&cmd, 0, sizeof cmd);
 5559         cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
 5560         cmd.ngroups = 1;
 5561         cmd.isvalid = 1;
 5562         if (sc->eeprom_temp != 0)
 5563                 cmd.offset = htole16(sc->eeprom_temp);
 5564         else
 5565                 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
 5566         DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
 5567             le16toh(cmd.offset));
 5568         return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
 5569 }
 5570 
 5571 /*
 5572  * This function is called after the runtime firmware notifies us of its
 5573  * readiness (called in a process context).
 5574  */
 5575 static int
 5576 iwn4965_post_alive(struct iwn_softc *sc)
 5577 {
 5578         int error, qid;
 5579 
 5580         if ((error = iwn_nic_lock(sc)) != 0)
 5581                 return error;
 5582 
 5583         /* Clear TX scheduler state in SRAM. */
 5584         sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
 5585         iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
 5586             IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
 5587 
 5588         /* Set physical address of TX scheduler rings (1KB aligned). */
 5589         iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
 5590 
 5591         IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
 5592 
 5593         /* Disable chain mode for all our 16 queues. */
 5594         iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
 5595 
 5596         for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
 5597                 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
 5598                 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
 5599 
 5600                 /* Set scheduler window size. */
 5601                 iwn_mem_write(sc, sc->sched_base +
 5602                     IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
 5603                 /* Set scheduler frame limit. */
 5604                 iwn_mem_write(sc, sc->sched_base +
 5605                     IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
 5606                     IWN_SCHED_LIMIT << 16);
 5607         }
 5608 
 5609         /* Enable interrupts for all our 16 queues. */
 5610         iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
 5611         /* Identify TX FIFO rings (0-7). */
 5612         iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
 5613 
 5614         /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
 5615         for (qid = 0; qid < 7; qid++) {
 5616                 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
 5617                 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
 5618                     IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
 5619         }
 5620         iwn_nic_unlock(sc);
 5621         return 0;
 5622 }
 5623 
 5624 /*
 5625  * This function is called after the initialization or runtime firmware
 5626  * notifies us of its readiness (called in a process context).
 5627  */
 5628 static int
 5629 iwn5000_post_alive(struct iwn_softc *sc)
 5630 {
 5631         int error, qid;
 5632 
 5633         /* Switch to using ICT interrupt mode. */
 5634         iwn5000_ict_reset(sc);
 5635 
 5636         if ((error = iwn_nic_lock(sc)) != 0)
 5637                 return error;
 5638 
 5639         /* Clear TX scheduler state in SRAM. */
 5640         sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
 5641         iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
 5642             IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
 5643 
 5644         /* Set physical address of TX scheduler rings (1KB aligned). */
 5645         iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
 5646 
 5647         IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
 5648 
 5649         /* Enable chain mode for all queues, except command queue. */
 5650         iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
 5651         iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
 5652 
 5653         for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
 5654                 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
 5655                 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
 5656 
 5657                 iwn_mem_write(sc, sc->sched_base +
 5658                     IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
 5659                 /* Set scheduler window size and frame limit. */
 5660                 iwn_mem_write(sc, sc->sched_base +
 5661                     IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
 5662                     IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
 5663         }
 5664 
 5665         /* Enable interrupts for all our 20 queues. */
 5666         iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
 5667         /* Identify TX FIFO rings (0-7). */
 5668         iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
 5669 
 5670         /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
 5671         for (qid = 0; qid < 7; qid++) {
 5672                 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
 5673                 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
 5674                     IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
 5675         }
 5676         iwn_nic_unlock(sc);
 5677 
 5678         /* Configure WiMAX coexistence for combo adapters. */
 5679         error = iwn5000_send_wimax_coex(sc);
 5680         if (error != 0) {
 5681                 device_printf(sc->sc_dev,
 5682                     "%s: could not configure WiMAX coexistence, error %d\n",
 5683                     __func__, error);
 5684                 return error;
 5685         }
 5686         if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
 5687                 /* Perform crystal calibration. */
 5688                 error = iwn5000_crystal_calib(sc);
 5689                 if (error != 0) {
 5690                         device_printf(sc->sc_dev,
 5691                             "%s: crystal calibration failed, error %d\n",
 5692                             __func__, error);
 5693                         return error;
 5694                 }
 5695         }
 5696         if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
 5697                 /* Query calibration from the initialization firmware. */
 5698                 if ((error = iwn5000_query_calibration(sc)) != 0) {
 5699                         device_printf(sc->sc_dev,
 5700                             "%s: could not query calibration, error %d\n",
 5701                             __func__, error);
 5702                         return error;
 5703                 }
 5704                 /*
 5705                  * We have the calibration results now, reboot with the
 5706                  * runtime firmware (call ourselves recursively!)
 5707                  */
 5708                 iwn_hw_stop(sc);
 5709                 error = iwn_hw_init(sc);
 5710         } else {
 5711                 /* Send calibration results to runtime firmware. */
 5712                 error = iwn5000_send_calibration(sc);
 5713         }
 5714         return error;
 5715 }
 5716 
 5717 /*
 5718  * The firmware boot code is small and is intended to be copied directly into
 5719  * the NIC internal memory (no DMA transfer).
 5720  */
 5721 static int
 5722 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
 5723 {
 5724         int error, ntries;
 5725 
 5726         size /= sizeof (uint32_t);
 5727 
 5728         if ((error = iwn_nic_lock(sc)) != 0)
 5729                 return error;
 5730 
 5731         /* Copy microcode image into NIC memory. */
 5732         iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
 5733             (const uint32_t *)ucode, size);
 5734 
 5735         iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
 5736         iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
 5737         iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
 5738 
 5739         /* Start boot load now. */
 5740         iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
 5741 
 5742         /* Wait for transfer to complete. */
 5743         for (ntries = 0; ntries < 1000; ntries++) {
 5744                 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
 5745                     IWN_BSM_WR_CTRL_START))
 5746                         break;
 5747                 DELAY(10);
 5748         }
 5749         if (ntries == 1000) {
 5750                 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
 5751                     __func__);
 5752                 iwn_nic_unlock(sc);
 5753                 return ETIMEDOUT;
 5754         }
 5755 
 5756         /* Enable boot after power up. */
 5757         iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
 5758 
 5759         iwn_nic_unlock(sc);
 5760         return 0;
 5761 }
 5762 
 5763 static int
 5764 iwn4965_load_firmware(struct iwn_softc *sc)
 5765 {
 5766         struct iwn_fw_info *fw = &sc->fw;
 5767         struct iwn_dma_info *dma = &sc->fw_dma;
 5768         int error;
 5769 
 5770         /* Copy initialization sections into pre-allocated DMA-safe memory. */
 5771         memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
 5772         bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
 5773         memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
 5774             fw->init.text, fw->init.textsz);
 5775         bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
 5776 
 5777         /* Tell adapter where to find initialization sections. */
 5778         if ((error = iwn_nic_lock(sc)) != 0)
 5779                 return error;
 5780         iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
 5781         iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
 5782         iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
 5783             (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
 5784         iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
 5785         iwn_nic_unlock(sc);
 5786 
 5787         /* Load firmware boot code. */
 5788         error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
 5789         if (error != 0) {
 5790                 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
 5791                     __func__);
 5792                 return error;
 5793         }
 5794         /* Now press "execute". */
 5795         IWN_WRITE(sc, IWN_RESET, 0);
 5796 
 5797         /* Wait at most one second for first alive notification. */
 5798         if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
 5799                 device_printf(sc->sc_dev,
 5800                     "%s: timeout waiting for adapter to initialize, error %d\n",
 5801                     __func__, error);
 5802                 return error;
 5803         }
 5804 
 5805         /* Retrieve current temperature for initial TX power calibration. */
 5806         sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
 5807         sc->temp = iwn4965_get_temperature(sc);
 5808 
 5809         /* Copy runtime sections into pre-allocated DMA-safe memory. */
 5810         memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
 5811         bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
 5812         memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
 5813             fw->main.text, fw->main.textsz);
 5814         bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
 5815 
 5816         /* Tell adapter where to find runtime sections. */
 5817         if ((error = iwn_nic_lock(sc)) != 0)
 5818                 return error;
 5819         iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
 5820         iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
 5821         iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
 5822             (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
 5823         iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
 5824             IWN_FW_UPDATED | fw->main.textsz);
 5825         iwn_nic_unlock(sc);
 5826 
 5827         return 0;