The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/dev/ixgb/ixgb_ee.c

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*******************************************************************************
    2 
    3   Copyright (c) 2001-2004, Intel Corporation
    4   All rights reserved.
    5   
    6   Redistribution and use in source and binary forms, with or without
    7   modification, are permitted provided that the following conditions are met:
    8   
    9    1. Redistributions of source code must retain the above copyright notice,
   10       this list of conditions and the following disclaimer.
   11   
   12    2. Redistributions in binary form must reproduce the above copyright
   13       notice, this list of conditions and the following disclaimer in the
   14       documentation and/or other materials provided with the distribution.
   15   
   16    3. Neither the name of the Intel Corporation nor the names of its
   17       contributors may be used to endorse or promote products derived from
   18       this software without specific prior written permission.
   19   
   20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   30   POSSIBILITY OF SUCH DAMAGE.
   31 
   32 *******************************************************************************/
   33 
   34 /*$FreeBSD$*/
   35 
   36 #include <dev/ixgb/ixgb_hw.h> 
   37 #include <dev/ixgb/ixgb_ee.h> 
   38 
   39 /* Local prototypes */
   40 static uint16_t ixgb_shift_in_bits(struct ixgb_hw *hw);
   41 
   42 static void ixgb_shift_out_bits(struct ixgb_hw *hw,
   43                                 uint16_t data,
   44                                 uint16_t count);
   45 static void ixgb_standby_eeprom(struct ixgb_hw *hw);
   46 
   47 static boolean_t ixgb_wait_eeprom_command(struct ixgb_hw *hw);
   48 
   49 static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
   50 
   51 /******************************************************************************
   52  * Raises the EEPROM's clock input.
   53  *
   54  * hw - Struct containing variables accessed by shared code
   55  * eecd_reg - EECD's current value
   56  *****************************************************************************/
   57 static void
   58 ixgb_raise_clock(struct ixgb_hw *hw,
   59                   uint32_t *eecd_reg)
   60 {
   61     /* Raise the clock input to the EEPROM (by setting the SK bit), and then
   62      *  wait 50 microseconds.
   63      */
   64     *eecd_reg = *eecd_reg | IXGB_EECD_SK;
   65     IXGB_WRITE_REG(hw, EECD, *eecd_reg);
   66     usec_delay(50);
   67     return;
   68 }
   69 
   70 /******************************************************************************
   71  * Lowers the EEPROM's clock input.
   72  *
   73  * hw - Struct containing variables accessed by shared code
   74  * eecd_reg - EECD's current value
   75  *****************************************************************************/
   76 static void
   77 ixgb_lower_clock(struct ixgb_hw *hw,
   78                   uint32_t *eecd_reg)
   79 {
   80     /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
   81      * wait 50 microseconds.
   82      */
   83     *eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
   84     IXGB_WRITE_REG(hw, EECD, *eecd_reg);
   85     usec_delay(50);
   86     return;
   87 }
   88 
   89 /******************************************************************************
   90  * Shift data bits out to the EEPROM.
   91  *
   92  * hw - Struct containing variables accessed by shared code
   93  * data - data to send to the EEPROM
   94  * count - number of bits to shift out
   95  *****************************************************************************/
   96 static void
   97 ixgb_shift_out_bits(struct ixgb_hw *hw,
   98                      uint16_t data,
   99                      uint16_t count)
  100 {
  101     uint32_t eecd_reg;
  102     uint32_t mask;
  103 
  104     /* We need to shift "count" bits out to the EEPROM. So, value in the
  105      * "data" parameter will be shifted out to the EEPROM one bit at a time.
  106      * In order to do this, "data" must be broken down into bits.
  107      */
  108     mask = 0x01 << (count - 1);
  109     eecd_reg = IXGB_READ_REG(hw, EECD);
  110     eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
  111     do {
  112         /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
  113          * and then raising and then lowering the clock (the SK bit controls
  114          * the clock input to the EEPROM).  A "" is shifted out to the EEPROM
  115          * by setting "DI" to "" and then raising and then lowering the clock.
  116          */
  117         eecd_reg &= ~IXGB_EECD_DI;
  118 
  119         if(data & mask)
  120             eecd_reg |= IXGB_EECD_DI;
  121 
  122         IXGB_WRITE_REG(hw, EECD, eecd_reg);
  123 
  124         usec_delay(50);
  125 
  126         ixgb_raise_clock(hw, &eecd_reg);
  127         ixgb_lower_clock(hw, &eecd_reg);
  128 
  129         mask = mask >> 1;
  130 
  131     } while(mask);
  132 
  133     /* We leave the "DI" bit set to "" when we leave this routine. */
  134     eecd_reg &= ~IXGB_EECD_DI;
  135     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  136     return;
  137 }
  138 
  139 /******************************************************************************
  140  * Shift data bits in from the EEPROM
  141  *
  142  * hw - Struct containing variables accessed by shared code
  143  *****************************************************************************/
  144 static uint16_t
  145 ixgb_shift_in_bits(struct ixgb_hw *hw)
  146 {
  147     uint32_t eecd_reg;
  148     uint32_t i;
  149     uint16_t data;
  150 
  151     /* In order to read a register from the EEPROM, we need to shift 16 bits
  152      * in from the EEPROM. Bits are "shifted in" by raising the clock input to
  153      * the EEPROM (setting the SK bit), and then reading the value of the "DO"
  154      * bit.  During this "shifting in" process the "DI" bit should always be
  155      * clear..
  156      */
  157 
  158     eecd_reg = IXGB_READ_REG(hw, EECD);
  159 
  160     eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
  161     data = 0;
  162 
  163     for(i = 0; i < 16; i++) {
  164         data = data << 1;
  165         ixgb_raise_clock(hw, &eecd_reg);
  166 
  167         eecd_reg = IXGB_READ_REG(hw, EECD);
  168 
  169         eecd_reg &= ~(IXGB_EECD_DI);
  170         if(eecd_reg & IXGB_EECD_DO)
  171             data |= 1;
  172 
  173         ixgb_lower_clock(hw, &eecd_reg);
  174     }
  175 
  176     return data;
  177 }
  178 
  179 /******************************************************************************
  180  * Prepares EEPROM for access
  181  *
  182  * hw - Struct containing variables accessed by shared code
  183  *
  184  * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
  185  * function should be called before issuing a command to the EEPROM.
  186  *****************************************************************************/
  187 static void
  188 ixgb_setup_eeprom(struct ixgb_hw *hw)
  189 {
  190     uint32_t eecd_reg;
  191 
  192     eecd_reg = IXGB_READ_REG(hw, EECD);
  193 
  194     /*  Clear SK and DI  */
  195     eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI);
  196     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  197 
  198     /*  Set CS  */
  199     eecd_reg |= IXGB_EECD_CS;
  200     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  201     return;
  202 }
  203 
  204 /******************************************************************************
  205  * Returns EEPROM to a "standby" state
  206  *
  207  * hw - Struct containing variables accessed by shared code
  208  *****************************************************************************/
  209 static void
  210 ixgb_standby_eeprom(struct ixgb_hw *hw)
  211 {
  212     uint32_t eecd_reg;
  213 
  214     eecd_reg = IXGB_READ_REG(hw, EECD);
  215 
  216     /*  Deselct EEPROM  */
  217     eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
  218     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  219     usec_delay(50);
  220 
  221     /*  Clock high  */
  222     eecd_reg |= IXGB_EECD_SK;
  223     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  224     usec_delay(50);
  225 
  226     /*  Select EEPROM  */
  227     eecd_reg |= IXGB_EECD_CS;
  228     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  229     usec_delay(50);
  230 
  231     /*  Clock low  */
  232     eecd_reg &= ~IXGB_EECD_SK;
  233     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  234     usec_delay(50);
  235     return;
  236 }
  237 
  238 /******************************************************************************
  239  * Raises then lowers the EEPROM's clock pin
  240  *
  241  * hw - Struct containing variables accessed by shared code
  242  *****************************************************************************/
  243 static void
  244 ixgb_clock_eeprom(struct ixgb_hw *hw)
  245 {
  246     uint32_t eecd_reg;
  247 
  248     eecd_reg = IXGB_READ_REG(hw, EECD);
  249 
  250     /*  Rising edge of clock  */
  251     eecd_reg |= IXGB_EECD_SK;
  252     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  253     usec_delay(50);
  254 
  255     /*  Falling edge of clock  */
  256     eecd_reg &= ~IXGB_EECD_SK;
  257     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  258     usec_delay(50);
  259     return;
  260 }
  261 
  262 /******************************************************************************
  263  * Terminates a command by lowering the EEPROM's chip select pin
  264  *
  265  * hw - Struct containing variables accessed by shared code
  266  *****************************************************************************/
  267 static void
  268 ixgb_cleanup_eeprom(struct ixgb_hw *hw)
  269 {
  270     uint32_t eecd_reg;
  271 
  272     eecd_reg = IXGB_READ_REG(hw, EECD);
  273 
  274     eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI);
  275 
  276     IXGB_WRITE_REG(hw, EECD, eecd_reg);
  277 
  278     ixgb_clock_eeprom(hw);
  279     return;
  280 }
  281 
  282 /******************************************************************************
  283  * Waits for the EEPROM to finish the current command.
  284  *
  285  * hw - Struct containing variables accessed by shared code
  286  *
  287  * The command is done when the EEPROM's data out pin goes high.
  288  *
  289  * Returns:
  290  *      TRUE: EEPROM data pin is high before timeout.
  291  *      FALSE:  Time expired.
  292  *****************************************************************************/
  293 static boolean_t
  294 ixgb_wait_eeprom_command(struct ixgb_hw *hw)
  295 {
  296     uint32_t eecd_reg;
  297     uint32_t i;
  298 
  299 
  300     /* Toggle the CS line.  This in effect tells to EEPROM to actually execute
  301      * the command in question.
  302      */
  303     ixgb_standby_eeprom(hw);
  304 
  305     /* Now read DO repeatedly until is high (equal to '1').  The EEEPROM will
  306      * signal that the command has been completed by raising the DO signal.
  307      * If DO does not go high in 10 milliseconds, then error out.
  308      */
  309     for(i = 0; i < 200; i++) {
  310         eecd_reg = IXGB_READ_REG(hw, EECD);
  311 
  312         if(eecd_reg & IXGB_EECD_DO)
  313             return (TRUE);
  314 
  315         usec_delay(50);
  316     }
  317     ASSERT(0);
  318     return (FALSE);
  319 }
  320 
  321 
  322 /******************************************************************************
  323  * Verifies that the EEPROM has a valid checksum
  324  *
  325  * hw - Struct containing variables accessed by shared code
  326  *
  327  * Reads the first 64 16 bit words of the EEPROM and sums the values read.
  328  * If the the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
  329  * valid.
  330  *
  331  * Returns:
  332  *  TRUE: Checksum is valid
  333  *  FALSE: Checksum is not valid.
  334  *****************************************************************************/
  335 boolean_t
  336 ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
  337 {
  338     uint16_t checksum = 0;
  339     uint16_t i;
  340 
  341     for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
  342         checksum += ixgb_read_eeprom(hw, i);
  343 
  344     if(checksum == (uint16_t) EEPROM_SUM)
  345         return (TRUE);
  346     else
  347         return (FALSE);
  348 }
  349 
  350 /******************************************************************************
  351  * Calculates the EEPROM checksum and writes it to the EEPROM
  352  *
  353  * hw - Struct containing variables accessed by shared code
  354  *
  355  * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
  356  * Writes the difference to word offset 63 of the EEPROM.
  357  *****************************************************************************/
  358 void
  359 ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
  360 {
  361     uint16_t checksum = 0;
  362     uint16_t i;
  363 
  364     for(i = 0; i < EEPROM_CHECKSUM_REG; i++)
  365         checksum += ixgb_read_eeprom(hw, i);
  366 
  367     checksum = (uint16_t) EEPROM_SUM - checksum;
  368 
  369     ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
  370     return;
  371 }
  372 
  373 /******************************************************************************
  374  * Writes a 16 bit word to a given offset in the EEPROM.
  375  *
  376  * hw - Struct containing variables accessed by shared code
  377  * reg - offset within the EEPROM to be written to
  378  * data - 16 bit word to be writen to the EEPROM
  379  *
  380  * If ixgb_update_eeprom_checksum is not called after this function, the
  381  * EEPROM will most likely contain an invalid checksum.
  382  *
  383  *****************************************************************************/
  384 void
  385 ixgb_write_eeprom(struct ixgb_hw *hw,
  386                    uint16_t offset,
  387                    uint16_t data)
  388 {
  389     /*  Prepare the EEPROM for writing  */
  390     ixgb_setup_eeprom(hw);
  391 
  392     /*  Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
  393      *  plus 4-bit dummy).  This puts the EEPROM into write/erase mode.
  394      */
  395     ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5);
  396     ixgb_shift_out_bits(hw, 0, 4);
  397 
  398     /*  Prepare the EEPROM  */
  399     ixgb_standby_eeprom(hw);
  400 
  401     /*  Send the Write command (3-bit opcode + 6-bit addr)  */
  402     ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3);
  403     ixgb_shift_out_bits(hw, offset, 6);
  404 
  405     /*  Send the data  */
  406     ixgb_shift_out_bits(hw, data, 16);
  407 
  408     ixgb_wait_eeprom_command(hw);
  409 
  410     /*  Recover from write  */
  411     ixgb_standby_eeprom(hw);
  412 
  413     /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
  414      * opcode plus 4-bit dummy).  This takes the EEPROM out of write/erase
  415      * mode.
  416      */
  417     ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5);
  418     ixgb_shift_out_bits(hw, 0, 4);
  419 
  420     /*  Done with writing  */
  421     ixgb_cleanup_eeprom(hw);
  422 
  423     return;
  424 }
  425 
  426 /******************************************************************************
  427  * Reads a 16 bit word from the EEPROM.
  428  *
  429  * hw - Struct containing variables accessed by shared code
  430  * offset - offset of 16 bit word in the EEPROM to read
  431  *
  432  * Returns:
  433  *  The 16-bit value read from the eeprom
  434  *****************************************************************************/
  435 uint16_t
  436 ixgb_read_eeprom(struct ixgb_hw *hw,
  437                   uint16_t offset)
  438 {
  439     uint16_t data;
  440 
  441     /*  Prepare the EEPROM for reading  */
  442     ixgb_setup_eeprom(hw);
  443 
  444     /*  Send the READ command (opcode + addr)  */
  445     ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3);
  446     /*
  447      * We have a 64 word EEPROM, there are 6 address bits
  448      */
  449     ixgb_shift_out_bits(hw, offset, 6);
  450 
  451     /*  Read the data  */
  452     data = ixgb_shift_in_bits(hw);
  453 
  454     /*  End this read operation  */
  455     ixgb_standby_eeprom(hw);
  456 
  457     return (data);
  458 }
  459 
  460 /******************************************************************************
  461  * Reads eeprom and stores data in shared structure.
  462  * Validates eeprom checksum and eeprom signature.
  463  *
  464  * hw - Struct containing variables accessed by shared code
  465  *
  466  * Returns:
  467  *      TRUE: if eeprom read is successful
  468  *      FALSE: otherwise.
  469  *****************************************************************************/
  470 boolean_t
  471 ixgb_get_eeprom_data(struct ixgb_hw *hw)
  472 {
  473     uint16_t i;
  474     uint16_t checksum = 0;
  475     struct ixgb_ee_map_type *ee_map;
  476 
  477     DEBUGFUNC("ixgb_get_eeprom_data");
  478 
  479     ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  480 
  481     DEBUGOUT("ixgb_ee: Reading eeprom data\n");
  482     for (i=0; i < IXGB_EEPROM_SIZE ; i++) {
  483         uint16_t ee_data;
  484         ee_data = ixgb_read_eeprom(hw, i);
  485         checksum += ee_data;
  486         hw->eeprom[i] = le16_to_cpu (ee_data);
  487     }
  488 
  489     if (checksum != (uint16_t) EEPROM_SUM) {
  490         DEBUGOUT("ixgb_ee: Checksum invalid.\n");
  491         return (FALSE);
  492     }
  493 
  494     if ((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK))
  495          != le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) {
  496         DEBUGOUT("ixgb_ee: Signature invalid.\n");
  497         return(FALSE);
  498     }
  499 
  500     return(TRUE);
  501 }
  502 
  503 
  504 /******************************************************************************
  505  * Local function to check if the eeprom signature is good
  506  * If the eeprom signature is good, calls ixgb)get_eeprom_data.
  507  *
  508  * hw - Struct containing variables accessed by shared code
  509  *
  510  * Returns:
  511  *      TRUE: eeprom signature was good and the eeprom read was successful
  512  *      FALSE: otherwise.
  513  ******************************************************************************/
  514 static boolean_t
  515 ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
  516 {
  517     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  518 
  519 
  520     if ((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK))
  521                                 == le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) {
  522         return (TRUE);
  523     } else {
  524         return ixgb_get_eeprom_data(hw);
  525     }
  526 }
  527 
  528 /******************************************************************************
  529  * return a word from the eeprom
  530  *
  531  * hw - Struct containing variables accessed by shared code
  532  * index - Offset of eeprom word
  533  *
  534  * Returns:
  535  *          Word at indexed offset in eeprom, if valid, 0 otherwise.
  536  ******************************************************************************/
  537 uint16_t
  538 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index)
  539 {
  540 
  541     if ((index < IXGB_EEPROM_SIZE) &&
  542         (ixgb_check_and_get_eeprom_data (hw) == TRUE)) {
  543        return(hw->eeprom[index]);
  544     }
  545 
  546     return(0);
  547 }
  548 
  549 
  550 /******************************************************************************
  551  * return the mac address from EEPROM
  552  *
  553  * hw       - Struct containing variables accessed by shared code
  554  * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
  555  *
  556  * Returns: None.
  557  ******************************************************************************/
  558 void
  559 ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
  560                         uint8_t *mac_addr)
  561 {
  562     int i;
  563     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  564 
  565     DEBUGFUNC("ixgb_get_ee_mac_addr");
  566 
  567     if (ixgb_check_and_get_eeprom_data (hw) == TRUE) {
  568         for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) {
  569             mac_addr[i] = ee_map->mac_addr[i];
  570             DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]);
  571         }
  572     }
  573 }
  574 
  575 /******************************************************************************
  576  * return the compatibility flags from EEPROM
  577  *
  578  * hw - Struct containing variables accessed by shared code
  579  *
  580  * Returns:
  581  *          compatibility flags if EEPROM contents are valid, 0 otherwise
  582  ******************************************************************************/
  583 uint16_t
  584 ixgb_get_ee_compatibility(struct ixgb_hw *hw)
  585 {
  586     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  587 
  588     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  589        return(ee_map->compatibility);
  590 
  591     return(0);
  592 }
  593 
  594 /******************************************************************************
  595  * return the Printed Board Assembly number from EEPROM
  596  *
  597  * hw - Struct containing variables accessed by shared code
  598  *
  599  * Returns:
  600  *          PBA number if EEPROM contents are valid, 0 otherwise
  601  ******************************************************************************/
  602 uint32_t
  603 ixgb_get_ee_pba_number(struct ixgb_hw *hw)
  604 {
  605     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  606        return (   le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
  607                | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16));
  608 
  609     return(0);
  610 }
  611 
  612 /******************************************************************************
  613  * return the Initialization Control Word 1 from EEPROM
  614  *
  615  * hw - Struct containing variables accessed by shared code
  616  *
  617  * Returns:
  618  *          Initialization Control Word 1 if EEPROM contents are valid, 0 otherwise
  619  ******************************************************************************/
  620 uint16_t
  621 ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw)
  622 {
  623     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  624 
  625     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  626        return(ee_map->init_ctrl_reg_1);
  627 
  628     return(0);
  629 }
  630 
  631 /******************************************************************************
  632  * return the Initialization Control Word 2 from EEPROM
  633  *
  634  * hw - Struct containing variables accessed by shared code
  635  *
  636  * Returns:
  637  *          Initialization Control Word 2 if EEPROM contents are valid, 0 otherwise
  638  ******************************************************************************/
  639 uint16_t
  640 ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw)
  641 {
  642     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  643 
  644     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  645        return(ee_map->init_ctrl_reg_2);
  646 
  647     return(0);
  648 }
  649 
  650 /******************************************************************************
  651  * return the Subsystem Id from EEPROM
  652  *
  653  * hw - Struct containing variables accessed by shared code
  654  *
  655  * Returns:
  656  *          Subsystem Id if EEPROM contents are valid, 0 otherwise
  657  ******************************************************************************/
  658 uint16_t
  659 ixgb_get_ee_subsystem_id(struct ixgb_hw *hw)
  660 {
  661     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  662 
  663     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  664        return(ee_map->subsystem_id);
  665 
  666     return(0);
  667 }
  668 
  669 /******************************************************************************
  670  * return the Sub Vendor Id from EEPROM
  671  *
  672  * hw - Struct containing variables accessed by shared code
  673  *
  674  * Returns:
  675  *          Sub Vendor Id if EEPROM contents are valid, 0 otherwise
  676  ******************************************************************************/
  677 uint16_t
  678 ixgb_get_ee_subvendor_id(struct ixgb_hw *hw)
  679 {
  680     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  681 
  682     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  683        return(ee_map->subvendor_id);
  684 
  685     return(0);
  686 }
  687 
  688 /******************************************************************************
  689  * return the Device Id from EEPROM
  690  *
  691  * hw - Struct containing variables accessed by shared code
  692  *
  693  * Returns:
  694  *          Device Id if EEPROM contents are valid, 0 otherwise
  695  ******************************************************************************/
  696 uint16_t
  697 ixgb_get_ee_device_id(struct ixgb_hw *hw)
  698 {
  699     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  700 
  701     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  702        return(ee_map->device_id);
  703 
  704     return(0);
  705 }
  706 
  707 /******************************************************************************
  708  * return the Vendor Id from EEPROM
  709  *
  710  * hw - Struct containing variables accessed by shared code
  711  *
  712  * Returns:
  713  *          Device Id if EEPROM contents are valid, 0 otherwise
  714  ******************************************************************************/
  715 uint16_t
  716 ixgb_get_ee_vendor_id(struct ixgb_hw *hw)
  717 {
  718     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  719 
  720     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  721        return(ee_map->vendor_id);
  722 
  723     return(0);
  724 }
  725 
  726 /******************************************************************************
  727  * return the Software Defined Pins Register from EEPROM
  728  *
  729  * hw - Struct containing variables accessed by shared code
  730  *
  731  * Returns:
  732  *          SDP Register if EEPROM contents are valid, 0 otherwise
  733  ******************************************************************************/
  734 uint16_t
  735 ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw)
  736 {
  737     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  738 
  739     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  740        return(ee_map->swdpins_reg);
  741 
  742     return(0);
  743 }
  744 
  745 /******************************************************************************
  746  * return the D3 Power Management Bits from EEPROM
  747  *
  748  * hw - Struct containing variables accessed by shared code
  749  *
  750  * Returns:
  751  *          D3 Power Management Bits if EEPROM contents are valid, 0 otherwise
  752  ******************************************************************************/
  753 uint8_t
  754 ixgb_get_ee_d3_power(struct ixgb_hw *hw)
  755 {
  756     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  757 
  758     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  759        return(ee_map->d3_power);
  760 
  761     return(0);
  762 }
  763 
  764 /******************************************************************************
  765  * return the D0 Power Management Bits from EEPROM
  766  *
  767  * hw - Struct containing variables accessed by shared code
  768  *
  769  * Returns:
  770  *          D0 Power Management Bits if EEPROM contents are valid, 0 otherwise
  771  ******************************************************************************/
  772 uint8_t
  773 ixgb_get_ee_d0_power(struct ixgb_hw *hw)
  774 {
  775     struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
  776 
  777     if (ixgb_check_and_get_eeprom_data (hw) == TRUE)
  778        return(ee_map->d0_power);
  779 
  780     return(0);
  781 }

Cache object: dec35d45901639bbdc290d37da769f33


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.