The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/dev/ixgbe/ixgbe_osdep.h

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    1 /******************************************************************************
    2 
    3   Copyright (c) 2001-2010, Intel Corporation 
    4   All rights reserved.
    5   
    6   Redistribution and use in source and binary forms, with or without 
    7   modification, are permitted provided that the following conditions are met:
    8   
    9    1. Redistributions of source code must retain the above copyright notice, 
   10       this list of conditions and the following disclaimer.
   11   
   12    2. Redistributions in binary form must reproduce the above copyright 
   13       notice, this list of conditions and the following disclaimer in the 
   14       documentation and/or other materials provided with the distribution.
   15   
   16    3. Neither the name of the Intel Corporation nor the names of its 
   17       contributors may be used to endorse or promote products derived from 
   18       this software without specific prior written permission.
   19   
   20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
   22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
   23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
   24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
   25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
   26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
   27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
   28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
   29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   30   POSSIBILITY OF SUCH DAMAGE.
   31 
   32 ******************************************************************************/
   33 /*$FreeBSD: releng/9.0/sys/dev/ixgbe/ixgbe_osdep.h 215911 2010-11-26 22:46:32Z jfv $*/
   34 
   35 #ifndef _IXGBE_OS_H_
   36 #define _IXGBE_OS_H_
   37 
   38 #include <sys/types.h>
   39 #include <sys/param.h>
   40 #include <sys/systm.h>
   41 #include <sys/mbuf.h>
   42 #include <sys/protosw.h>
   43 #include <sys/socket.h>
   44 #include <sys/malloc.h>
   45 #include <sys/kernel.h>
   46 #include <sys/bus.h>
   47 #include <machine/bus.h>
   48 #include <sys/rman.h>
   49 #include <machine/resource.h>
   50 #include <vm/vm.h>
   51 #include <vm/pmap.h>
   52 #include <machine/clock.h>
   53 #include <dev/pci/pcivar.h>
   54 #include <dev/pci/pcireg.h>
   55 
   56 #define ASSERT(x) if(!(x)) panic("IXGBE: x")
   57 
   58 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
   59 #define usec_delay(x) DELAY(x)
   60 #define msec_delay(x) DELAY(1000*(x))
   61 
   62 #define DBG 0 
   63 #define MSGOUT(S, A, B)     printf(S "\n", A, B)
   64 #define DEBUGFUNC(F)        DEBUGOUT(F);
   65 #if DBG
   66         #define DEBUGOUT(S)         printf(S "\n")
   67         #define DEBUGOUT1(S,A)      printf(S "\n",A)
   68         #define DEBUGOUT2(S,A,B)    printf(S "\n",A,B)
   69         #define DEBUGOUT3(S,A,B,C)  printf(S "\n",A,B,C)
   70         #define DEBUGOUT7(S,A,B,C,D,E,F,G)  printf(S "\n",A,B,C,D,E,F,G)
   71 #else
   72         #define DEBUGOUT(S)
   73         #define DEBUGOUT1(S,A)
   74         #define DEBUGOUT2(S,A,B)
   75         #define DEBUGOUT3(S,A,B,C)
   76         #define DEBUGOUT6(S,A,B,C,D,E,F)
   77         #define DEBUGOUT7(S,A,B,C,D,E,F,G)
   78 #endif
   79 
   80 #define FALSE               0
   81 #define false               0 /* shared code requires this */
   82 #define TRUE                1
   83 #define true                1
   84 #define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
   85 #define PCI_COMMAND_REGISTER            PCIR_COMMAND
   86 #define UNREFERENCED_PARAMETER(_p)
   87 
   88 
   89 #define IXGBE_NTOHL(_i) ntohl(_i)
   90 #define IXGBE_NTOHS(_i) ntohs(_i)
   91 
   92 typedef uint8_t         u8;
   93 typedef int8_t          s8;
   94 typedef uint16_t        u16;
   95 typedef uint32_t        u32;
   96 typedef int32_t         s32;
   97 typedef uint64_t        u64;
   98 typedef boolean_t       bool;
   99 
  100 #define le16_to_cpu 
  101 
  102 #if __FreeBSD_version < 800000
  103 #if defined(__i386__) || defined(__amd64__)
  104 #define mb()    __asm volatile("mfence" ::: "memory")
  105 #define wmb()   __asm volatile("sfence" ::: "memory")
  106 #define rmb()   __asm volatile("lfence" ::: "memory")
  107 #else
  108 #define mb()
  109 #define rmb()
  110 #define wmb()
  111 #endif
  112 #endif
  113 
  114 #if defined(__i386__) || defined(__amd64__)
  115 static __inline
  116 void prefetch(void *x)
  117 {
  118         __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
  119 }
  120 #else
  121 #define prefetch(x)
  122 #endif
  123 
  124 struct ixgbe_osdep
  125 {
  126         bus_space_tag_t    mem_bus_space_tag;
  127         bus_space_handle_t mem_bus_space_handle;
  128         struct device     *dev;
  129 };
  130 
  131 /* These routines are needed by the shared code */
  132 struct ixgbe_hw; 
  133 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
  134 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
  135 
  136 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
  137 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
  138 
  139 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
  140 
  141 #define IXGBE_READ_REG(a, reg) (\
  142    bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
  143                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
  144                      reg))
  145 
  146 #define IXGBE_WRITE_REG(a, reg, value) (\
  147    bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
  148                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
  149                      reg, value))
  150 
  151 
  152 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
  153    bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
  154                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
  155                      (reg + ((offset) << 2))))
  156 
  157 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
  158       bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
  159                       ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
  160                       (reg + ((offset) << 2)), value))
  161 
  162 
  163 #endif /* _IXGBE_OS_H_ */

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