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3 Copyright (c) 2001-2010, Intel Corporation
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32 ******************************************************************************/
33 /*$FreeBSD: releng/9.0/sys/dev/ixgbe/ixgbe_vf.c 215911 2010-11-26 22:46:32Z jfv $*/
34
35
36 #include "ixgbe_api.h"
37 #include "ixgbe_type.h"
38 #include "ixgbe_vf.h"
39
40 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
41 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw);
42 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw);
43 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw);
44 s32 ixgbe_stop_hw_vf(struct ixgbe_hw *hw);
45 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw);
46 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw);
47 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr);
48 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw,
49 ixgbe_link_speed speed, bool autoneg,
50 bool autoneg_wait_to_complete);
51 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
52 bool *link_up, bool autoneg_wait_to_complete);
53 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
54 u32 enable_addr);
55 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
56 u32 mc_addr_count, ixgbe_mc_addr_itr);
57 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on);
58
59 #ifndef IXGBE_VFWRITE_REG
60 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
61 #endif
62 #ifndef IXGBE_VFREAD_REG
63 #define IXGBE_VFREAD_REG IXGBE_READ_REG
64 #endif
65
66 /**
67 * ixgbe_init_ops_vf - Initialize the pointers for vf
68 * @hw: pointer to hardware structure
69 *
70 * This will assign function pointers, adapter-specific functions can
71 * override the assignment of generic function pointers by assigning
72 * their own adapter-specific function pointers.
73 * Does not touch the hardware.
74 **/
75 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
76 {
77 /* MAC */
78 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
79 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
80 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
81 /* Cannot clear stats on VF */
82 hw->mac.ops.clear_hw_cntrs = NULL;
83 hw->mac.ops.get_media_type = NULL;
84 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
85 hw->mac.ops.stop_adapter = ixgbe_stop_hw_vf;
86 hw->mac.ops.get_bus_info = NULL;
87
88 /* Link */
89 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
90 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
91 hw->mac.ops.get_link_capabilities = NULL;
92
93 /* RAR, Multicast, VLAN */
94 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
95 hw->mac.ops.init_rx_addrs = NULL;
96 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
97 hw->mac.ops.enable_mc = NULL;
98 hw->mac.ops.disable_mc = NULL;
99 hw->mac.ops.clear_vfta = NULL;
100 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
101
102 hw->mac.max_tx_queues = 1;
103 hw->mac.max_rx_queues = 1;
104
105 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
106
107 return IXGBE_SUCCESS;
108 }
109
110 /**
111 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
112 * @hw: pointer to hardware structure
113 *
114 * Starts the hardware by filling the bus info structure and media type, clears
115 * all on chip counters, initializes receive address registers, multicast
116 * table, VLAN filter table, calls routine to set up link and flow control
117 * settings, and leaves transmit and receive units disabled and uninitialized
118 **/
119 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
120 {
121 /* Clear adapter stopped flag */
122 hw->adapter_stopped = FALSE;
123
124 return IXGBE_SUCCESS;
125 }
126
127 /**
128 * ixgbe_init_hw_vf - virtual function hardware initialization
129 * @hw: pointer to hardware structure
130 *
131 * Initialize the hardware by resetting the hardware and then starting
132 * the hardware
133 **/
134 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
135 {
136 s32 status = hw->mac.ops.start_hw(hw);
137
138 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
139
140 return status;
141 }
142
143 /**
144 * ixgbe_reset_hw_vf - Performs hardware reset
145 * @hw: pointer to hardware structure
146 *
147 * Resets the hardware by reseting the transmit and receive units, masks and
148 * clears all interrupts.
149 **/
150 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
151 {
152 struct ixgbe_mbx_info *mbx = &hw->mbx;
153 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
154 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
155 u32 ctrl, msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
156 u8 *addr = (u8 *)(&msgbuf[1]);
157
158 DEBUGFUNC("ixgbevf_reset_hw_vf");
159
160 /* Call adapter stop to disable tx/rx and clear interrupts */
161 hw->mac.ops.stop_adapter(hw);
162
163 DEBUGOUT("Issuing a function level reset to MAC\n");
164 ctrl = IXGBE_VFREAD_REG(hw, IXGBE_VFCTRL);
165 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, (ctrl | IXGBE_CTRL_RST));
166 IXGBE_WRITE_FLUSH(hw);
167
168 usec_delay(1);
169
170 /* we cannot reset while the RSTI / RSTD bits are asserted */
171 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
172 timeout--;
173 usec_delay(5);
174 }
175
176 if (timeout) {
177 /* mailbox timeout can now become active */
178 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
179
180 msgbuf[0] = IXGBE_VF_RESET;
181 mbx->ops.write_posted(hw, msgbuf, 1, 0);
182
183 msec_delay(10);
184
185 /* set our "perm_addr" based on info provided by PF */
186 /* also set up the mc_filter_type which is piggy backed
187 * on the mac address in word 3 */
188 ret_val = mbx->ops.read_posted(hw, msgbuf,
189 IXGBE_VF_PERMADDR_MSG_LEN, 0);
190 if (!ret_val) {
191 if (msgbuf[0] == (IXGBE_VF_RESET |
192 IXGBE_VT_MSGTYPE_ACK)) {
193 memcpy(hw->mac.perm_addr, addr,
194 IXGBE_ETH_LENGTH_OF_ADDRESS);
195 hw->mac.mc_filter_type =
196 msgbuf[IXGBE_VF_MC_TYPE_WORD];
197 } else {
198 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
199 }
200 }
201 }
202
203 return ret_val;
204 }
205
206 /**
207 * ixgbe_stop_hw_vf - Generic stop Tx/Rx units
208 * @hw: pointer to hardware structure
209 *
210 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
211 * disables transmit and receive units. The adapter_stopped flag is used by
212 * the shared code and drivers to determine if the adapter is in a stopped
213 * state and should not touch the hardware.
214 **/
215 s32 ixgbe_stop_hw_vf(struct ixgbe_hw *hw)
216 {
217 u32 number_of_queues;
218 u32 reg_val;
219 u16 i;
220
221 /*
222 * Set the adapter_stopped flag so other driver functions stop touching
223 * the hardware
224 */
225 hw->adapter_stopped = TRUE;
226
227 /* Disable the receive unit by stopped each queue */
228 number_of_queues = hw->mac.max_rx_queues;
229 for (i = 0; i < number_of_queues; i++) {
230 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
231 if (reg_val & IXGBE_RXDCTL_ENABLE) {
232 reg_val &= ~IXGBE_RXDCTL_ENABLE;
233 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
234 }
235 }
236
237 IXGBE_WRITE_FLUSH(hw);
238
239 /* Clear interrupt mask to stop from interrupts being generated */
240 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
241
242 /* Clear any pending interrupts */
243 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
244
245 /* Disable the transmit unit. Each queue must be disabled. */
246 number_of_queues = hw->mac.max_tx_queues;
247 for (i = 0; i < number_of_queues; i++) {
248 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFTXDCTL(i));
249 if (reg_val & IXGBE_TXDCTL_ENABLE) {
250 reg_val &= ~IXGBE_TXDCTL_ENABLE;
251 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
252 }
253 }
254
255 return IXGBE_SUCCESS;
256 }
257
258 /**
259 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
260 * @hw: pointer to hardware structure
261 * @mc_addr: the multicast address
262 *
263 * Extracts the 12 bits, from a multicast address, to determine which
264 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
265 * incoming rx multicast addresses, to determine the bit-vector to check in
266 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
267 * by the MO field of the MCSTCTRL. The MO field is set during initialization
268 * to mc_filter_type.
269 **/
270 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
271 {
272 u32 vector = 0;
273
274 switch (hw->mac.mc_filter_type) {
275 case 0: /* use bits [47:36] of the address */
276 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
277 break;
278 case 1: /* use bits [46:35] of the address */
279 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
280 break;
281 case 2: /* use bits [45:34] of the address */
282 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
283 break;
284 case 3: /* use bits [43:32] of the address */
285 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
286 break;
287 default: /* Invalid mc_filter_type */
288 DEBUGOUT("MC filter type param set incorrectly\n");
289 ASSERT(0);
290 break;
291 }
292
293 /* vector can only be 12-bits or boundary will be exceeded */
294 vector &= 0xFFF;
295 return vector;
296 }
297
298 /**
299 * ixgbe_set_rar_vf - set device MAC address
300 * @hw: pointer to hardware structure
301 * @index: Receive address register to write
302 * @addr: Address to put into receive address register
303 * @vmdq: VMDq "set" or "pool" index
304 * @enable_addr: set flag that address is active
305 **/
306 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
307 u32 enable_addr)
308 {
309 struct ixgbe_mbx_info *mbx = &hw->mbx;
310 u32 msgbuf[3];
311 u8 *msg_addr = (u8 *)(&msgbuf[1]);
312 s32 ret_val;
313 UNREFERENCED_PARAMETER(vmdq);
314 UNREFERENCED_PARAMETER(enable_addr);
315 UNREFERENCED_PARAMETER(index);
316
317 memset(msgbuf, 0, 12);
318 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
319 memcpy(msg_addr, addr, 6);
320 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
321
322 if (!ret_val)
323 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
324
325 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
326
327 /* if nacked the address was rejected, use "perm_addr" */
328 if (!ret_val &&
329 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
330 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
331
332 return ret_val;
333 }
334
335 /**
336 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
337 * @hw: pointer to the HW structure
338 * @mc_addr_list: array of multicast addresses to program
339 * @mc_addr_count: number of multicast addresses to program
340 * @next: caller supplied function to return next address in list
341 *
342 * Updates the Multicast Table Array.
343 **/
344 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
345 u32 mc_addr_count, ixgbe_mc_addr_itr next)
346 {
347 struct ixgbe_mbx_info *mbx = &hw->mbx;
348 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
349 u16 *vector_list = (u16 *)&msgbuf[1];
350 u32 vector;
351 u32 cnt, i;
352 u32 vmdq;
353
354 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
355
356 /* Each entry in the list uses 1 16 bit word. We have 30
357 * 16 bit words available in our HW msg buffer (minus 1 for the
358 * msg type). That's 30 hash values if we pack 'em right. If
359 * there are more than 30 MC addresses to add then punt the
360 * extras for now and then add code to handle more than 30 later.
361 * It would be unusual for a server to request that many multi-cast
362 * addresses except for in large enterprise network environments.
363 */
364
365 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
366
367 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
368 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
369 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
370
371 for (i = 0; i < cnt; i++) {
372 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
373 DEBUGOUT1("Hash value = 0x%03X\n", vector);
374 vector_list[i] = (u16)vector;
375 }
376
377 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
378 }
379
380 /**
381 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
382 * @hw: pointer to the HW structure
383 * @vlan: 12 bit VLAN ID
384 * @vind: unused by VF drivers
385 * @vlan_on: if TRUE then set bit, else clear bit
386 **/
387 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
388 {
389 struct ixgbe_mbx_info *mbx = &hw->mbx;
390 u32 msgbuf[2];
391 UNREFERENCED_PARAMETER(vind);
392
393 msgbuf[0] = IXGBE_VF_SET_VLAN;
394 msgbuf[1] = vlan;
395 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
396 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
397
398 return(mbx->ops.write_posted(hw, msgbuf, 2, 0));
399 }
400
401 /**
402 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
403 * @hw: pointer to hardware structure
404 *
405 * Returns the number of transmit queues for the given adapter.
406 **/
407 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
408 {
409 UNREFERENCED_PARAMETER(hw);
410 return IXGBE_VF_MAX_TX_QUEUES;
411 }
412
413 /**
414 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
415 * @hw: pointer to hardware structure
416 *
417 * Returns the number of receive queues for the given adapter.
418 **/
419 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
420 {
421 UNREFERENCED_PARAMETER(hw);
422 return IXGBE_VF_MAX_RX_QUEUES;
423 }
424
425 /**
426 * ixgbe_get_mac_addr_vf - Read device MAC address
427 * @hw: pointer to the HW structure
428 **/
429 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
430 {
431 int i;
432
433 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
434 mac_addr[i] = hw->mac.perm_addr[i];
435
436 return IXGBE_SUCCESS;
437 }
438
439 /**
440 * ixgbe_setup_mac_link_vf - Setup MAC link settings
441 * @hw: pointer to hardware structure
442 * @speed: new link speed
443 * @autoneg: TRUE if autonegotiation enabled
444 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
445 *
446 * Set the link speed in the AUTOC register and restarts link.
447 **/
448 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw,
449 ixgbe_link_speed speed, bool autoneg,
450 bool autoneg_wait_to_complete)
451 {
452 UNREFERENCED_PARAMETER(hw);
453 UNREFERENCED_PARAMETER(speed);
454 UNREFERENCED_PARAMETER(autoneg);
455 UNREFERENCED_PARAMETER(autoneg_wait_to_complete);
456 return IXGBE_SUCCESS;
457 }
458
459 /**
460 * ixgbe_check_mac_link_vf - Get link/speed status
461 * @hw: pointer to hardware structure
462 * @speed: pointer to link speed
463 * @link_up: TRUE is link is up, FALSE otherwise
464 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
465 *
466 * Reads the links register to determine if link is up and the current speed
467 **/
468 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
469 bool *link_up, bool autoneg_wait_to_complete)
470 {
471 u32 links_reg;
472 UNREFERENCED_PARAMETER(autoneg_wait_to_complete);
473
474 if (!(hw->mbx.ops.check_for_rst(hw, 0))) {
475 *link_up = FALSE;
476 *speed = 0;
477 return -1;
478 }
479
480 links_reg = IXGBE_VFREAD_REG(hw, IXGBE_VFLINKS);
481
482 if (links_reg & IXGBE_LINKS_UP)
483 *link_up = TRUE;
484 else
485 *link_up = FALSE;
486
487 if ((links_reg & IXGBE_LINKS_SPEED_10G_82599) ==
488 IXGBE_LINKS_SPEED_10G_82599)
489 *speed = IXGBE_LINK_SPEED_10GB_FULL;
490 else
491 *speed = IXGBE_LINK_SPEED_1GB_FULL;
492
493 return IXGBE_SUCCESS;
494 }
495
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