Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ixgbe/ixv.h
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1 /****************************************************************************** 2 3 Copyright (c) 2001-2010, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD: releng/9.0/sys/dev/ixgbe/ixv.h 217132 2011-01-07 23:39:41Z jfv $*/ 34 35 36 #ifndef _IXV_H_ 37 #define _IXV_H_ 38 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/protosw.h> 44 #include <sys/socket.h> 45 #include <sys/malloc.h> 46 #include <sys/kernel.h> 47 #include <sys/module.h> 48 #include <sys/sockio.h> 49 50 #include <net/if.h> 51 #include <net/if_arp.h> 52 #include <net/bpf.h> 53 #include <net/ethernet.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 57 #include <net/bpf.h> 58 #include <net/if_types.h> 59 #include <net/if_vlan_var.h> 60 61 #include <netinet/in_systm.h> 62 #include <netinet/in.h> 63 #include <netinet/if_ether.h> 64 #include <netinet/ip.h> 65 #include <netinet/ip6.h> 66 #include <netinet/tcp.h> 67 #include <netinet/tcp_lro.h> 68 #include <netinet/udp.h> 69 70 #include <machine/in_cksum.h> 71 72 #include <sys/bus.h> 73 #include <machine/bus.h> 74 #include <sys/rman.h> 75 #include <machine/resource.h> 76 #include <vm/vm.h> 77 #include <vm/pmap.h> 78 #include <machine/clock.h> 79 #include <dev/pci/pcivar.h> 80 #include <dev/pci/pcireg.h> 81 #include <sys/proc.h> 82 #include <sys/sysctl.h> 83 #include <sys/endian.h> 84 #include <sys/taskqueue.h> 85 #include <sys/pcpu.h> 86 #include <sys/smp.h> 87 #include <machine/smp.h> 88 89 #include "ixgbe_api.h" 90 #include "ixgbe_vf.h" 91 92 /* Tunables */ 93 94 /* 95 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 96 * number of transmit descriptors allocated by the driver. Increasing this 97 * value allows the driver to queue more transmits. Each descriptor is 16 98 * bytes. Performance tests have show the 2K value to be optimal for top 99 * performance. 100 */ 101 #define DEFAULT_TXD 1024 102 #define PERFORM_TXD 2048 103 #define MAX_TXD 4096 104 #define MIN_TXD 64 105 106 /* 107 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 108 * number of receive descriptors allocated for each RX queue. Increasing this 109 * value allows the driver to buffer more incoming packets. Each descriptor 110 * is 16 bytes. A receive buffer is also allocated for each descriptor. 111 * 112 * Note: with 8 rings and a dual port card, it is possible to bump up 113 * against the system mbuf pool limit, you can tune nmbclusters 114 * to adjust for this. 115 */ 116 #define DEFAULT_RXD 1024 117 #define PERFORM_RXD 2048 118 #define MAX_RXD 4096 119 #define MIN_RXD 64 120 121 /* Alignment for rings */ 122 #define DBA_ALIGN 128 123 124 /* 125 * This parameter controls the maximum no of times the driver will loop in 126 * the isr. Minimum Value = 1 127 */ 128 #define MAX_LOOP 10 129 130 /* 131 * This is the max watchdog interval, ie. the time that can 132 * pass between any two TX clean operations, such only happening 133 * when the TX hardware is functioning. 134 */ 135 #define IXV_WATCHDOG (10 * hz) 136 137 /* 138 * This parameters control when the driver calls the routine to reclaim 139 * transmit descriptors. 140 */ 141 #define IXV_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 142 #define IXV_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 143 144 #define IXV_MAX_FRAME_SIZE 0x3F00 145 146 /* Flow control constants */ 147 #define IXV_FC_PAUSE 0xFFFF 148 #define IXV_FC_HI 0x20000 149 #define IXV_FC_LO 0x10000 150 151 /* Defines for printing debug information */ 152 #define DEBUG_INIT 0 153 #define DEBUG_IOCTL 0 154 #define DEBUG_HW 0 155 156 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 157 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 158 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 159 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 160 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 161 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 162 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 163 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 164 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 165 166 #define MAX_NUM_MULTICAST_ADDRESSES 128 167 #define IXV_EITR_DEFAULT 128 168 #define IXV_SCATTER 32 169 #define IXV_RX_HDR 128 170 #define MSIX_BAR 3 171 #define IXV_TSO_SIZE 65535 172 #define IXV_BR_SIZE 4096 173 #define IXV_LINK_ITR 2000 174 #define TX_BUFFER_SIZE ((u32) 1514) 175 #define VFTA_SIZE 128 176 177 /* Offload bits in mbuf flag */ 178 #if __FreeBSD_version >= 800000 179 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 180 #else 181 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 182 #endif 183 184 /* 185 ***************************************************************************** 186 * vendor_info_array 187 * 188 * This array contains the list of Subvendor/Subdevice IDs on which the driver 189 * should load. 190 * 191 ***************************************************************************** 192 */ 193 typedef struct _ixv_vendor_info_t { 194 unsigned int vendor_id; 195 unsigned int device_id; 196 unsigned int subvendor_id; 197 unsigned int subdevice_id; 198 unsigned int index; 199 } ixv_vendor_info_t; 200 201 202 struct ixv_tx_buf { 203 u32 eop_index; 204 struct mbuf *m_head; 205 bus_dmamap_t map; 206 }; 207 208 struct ixv_rx_buf { 209 struct mbuf *m_head; 210 struct mbuf *m_pack; 211 struct mbuf *fmp; 212 bus_dmamap_t hmap; 213 bus_dmamap_t pmap; 214 }; 215 216 /* 217 * Bus dma allocation structure used by ixv_dma_malloc and ixv_dma_free. 218 */ 219 struct ixv_dma_alloc { 220 bus_addr_t dma_paddr; 221 caddr_t dma_vaddr; 222 bus_dma_tag_t dma_tag; 223 bus_dmamap_t dma_map; 224 bus_dma_segment_t dma_seg; 225 bus_size_t dma_size; 226 int dma_nseg; 227 }; 228 229 /* 230 ** Driver queue struct: this is the interrupt container 231 ** for the associated tx and rx ring. 232 */ 233 struct ix_queue { 234 struct adapter *adapter; 235 u32 msix; /* This queue's MSIX vector */ 236 u32 eims; /* This queue's EIMS bit */ 237 u32 eitr_setting; 238 u32 eitr; /* cached reg */ 239 struct resource *res; 240 void *tag; 241 struct tx_ring *txr; 242 struct rx_ring *rxr; 243 struct task que_task; 244 struct taskqueue *tq; 245 u64 irqs; 246 }; 247 248 /* 249 * The transmit ring, one per queue 250 */ 251 struct tx_ring { 252 struct adapter *adapter; 253 struct mtx tx_mtx; 254 u32 me; 255 bool watchdog_check; 256 int watchdog_time; 257 union ixgbe_adv_tx_desc *tx_base; 258 struct ixv_dma_alloc txdma; 259 u32 next_avail_desc; 260 u32 next_to_clean; 261 struct ixv_tx_buf *tx_buffers; 262 volatile u16 tx_avail; 263 u32 txd_cmd; 264 bus_dma_tag_t txtag; 265 char mtx_name[16]; 266 struct buf_ring *br; 267 /* Soft Stats */ 268 u32 bytes; 269 u32 packets; 270 u64 no_desc_avail; 271 u64 total_packets; 272 }; 273 274 275 /* 276 * The Receive ring, one per rx queue 277 */ 278 struct rx_ring { 279 struct adapter *adapter; 280 struct mtx rx_mtx; 281 u32 me; 282 union ixgbe_adv_rx_desc *rx_base; 283 struct ixv_dma_alloc rxdma; 284 struct lro_ctrl lro; 285 bool lro_enabled; 286 bool hdr_split; 287 bool discard; 288 u32 next_to_refresh; 289 u32 next_to_check; 290 char mtx_name[16]; 291 struct ixv_rx_buf *rx_buffers; 292 bus_dma_tag_t htag; 293 bus_dma_tag_t ptag; 294 295 u32 bytes; /* Used for AIM calc */ 296 u32 packets; 297 298 /* Soft stats */ 299 u64 rx_irq; 300 u64 rx_split_packets; 301 u64 rx_packets; 302 u64 rx_bytes; 303 u64 rx_discarded; 304 }; 305 306 /* Our adapter structure */ 307 struct adapter { 308 struct ifnet *ifp; 309 struct ixgbe_hw hw; 310 311 struct ixgbe_osdep osdep; 312 struct device *dev; 313 314 struct resource *pci_mem; 315 struct resource *msix_mem; 316 317 /* 318 * Interrupt resources: this set is 319 * either used for legacy, or for Link 320 * when doing MSIX 321 */ 322 void *tag; 323 struct resource *res; 324 325 struct ifmedia media; 326 struct callout timer; 327 int msix; 328 int if_flags; 329 330 struct mtx core_mtx; 331 332 eventhandler_tag vlan_attach; 333 eventhandler_tag vlan_detach; 334 335 u16 num_vlans; 336 u16 num_queues; 337 338 /* Info about the board itself */ 339 bool link_active; 340 u16 max_frame_size; 341 u32 link_speed; 342 bool link_up; 343 u32 mbxvec; 344 345 /* Mbuf cluster size */ 346 u32 rx_mbuf_sz; 347 348 /* Support for pluggable optics */ 349 struct task mbx_task; /* Mailbox tasklet */ 350 struct taskqueue *tq; 351 352 /* 353 ** Queues: 354 ** This is the irq holder, it has 355 ** and RX/TX pair or rings associated 356 ** with it. 357 */ 358 struct ix_queue *queues; 359 360 /* 361 * Transmit rings: 362 * Allocated at run time, an array of rings. 363 */ 364 struct tx_ring *tx_rings; 365 int num_tx_desc; 366 367 /* 368 * Receive rings: 369 * Allocated at run time, an array of rings. 370 */ 371 struct rx_ring *rx_rings; 372 int num_rx_desc; 373 u64 que_mask; 374 u32 rx_process_limit; 375 376 /* Misc stats maintained by the driver */ 377 unsigned long dropped_pkts; 378 unsigned long mbuf_defrag_failed; 379 unsigned long mbuf_header_failed; 380 unsigned long mbuf_packet_failed; 381 unsigned long no_tx_map_avail; 382 unsigned long no_tx_dma_setup; 383 unsigned long watchdog_events; 384 unsigned long tso_tx; 385 unsigned long mbx_irq; 386 387 struct ixgbevf_hw_stats stats; 388 }; 389 390 391 #define IXV_CORE_LOCK_INIT(_sc, _name) \ 392 mtx_init(&(_sc)->core_mtx, _name, "IXV Core Lock", MTX_DEF) 393 #define IXV_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 394 #define IXV_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 395 #define IXV_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 396 #define IXV_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 397 #define IXV_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 398 #define IXV_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 399 #define IXV_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 400 #define IXV_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 401 #define IXV_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 402 #define IXV_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 403 #define IXV_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 404 #define IXV_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 405 406 /* Workaround to make 8.0 buildable */ 407 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 408 static __inline int 409 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 410 { 411 #ifdef ALTQ 412 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 413 return (1); 414 #endif 415 return (!buf_ring_empty(br)); 416 } 417 #endif 418 #endif /* _IXV_H_ */
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