The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/liquidio/base/lio_iq.h

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    1 /*
    2  *   BSD LICENSE
    3  *
    4  *   Copyright(c) 2017 Cavium, Inc.. All rights reserved.
    5  *   All rights reserved.
    6  *
    7  *   Redistribution and use in source and binary forms, with or without
    8  *   modification, are permitted provided that the following conditions
    9  *   are met:
   10  *
   11  *     * Redistributions of source code must retain the above copyright
   12  *       notice, this list of conditions and the following disclaimer.
   13  *     * Redistributions in binary form must reproduce the above copyright
   14  *       notice, this list of conditions and the following disclaimer in
   15  *       the documentation and/or other materials provided with the
   16  *       distribution.
   17  *     * Neither the name of Cavium, Inc. nor the names of its
   18  *       contributors may be used to endorse or promote products derived
   19  *       from this software without specific prior written permission.
   20  *
   21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
   24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
   25  *   OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
   27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
   31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   32  */
   33 /*$FreeBSD$*/
   34 
   35 /*   \file  lio_iq.h
   36  *   \brief Host Driver: Implementation of Octeon input queues. "Input" is
   37  *   with respect to the Octeon device on the NIC. From this driver's
   38  *   point of view they are egress queues.
   39  */
   40 
   41 #ifndef __LIO_IQ_H__
   42 #define __LIO_IQ_H__
   43 
   44 #define LIO_IQ_SEND_OK          0
   45 #define LIO_IQ_SEND_STOP        1
   46 #define LIO_IQ_SEND_FAILED     -1
   47 
   48 /*-------------------------  INSTRUCTION QUEUE --------------------------*/
   49 
   50 #define LIO_REQTYPE_NONE                 0
   51 #define LIO_REQTYPE_NORESP_NET           1
   52 #define LIO_REQTYPE_NORESP_NET_SG        2
   53 #define LIO_REQTYPE_RESP_NET             3
   54 #define LIO_REQTYPE_SOFT_COMMAND         4
   55 
   56 /*
   57  * This structure is used by NIC driver to store information required
   58  * to free the mbuf when the packet has been fetched by Octeon.
   59  * Bytes offset below assume worst-case of a 64-bit system.
   60  */
   61 struct lio_mbuf_free_info {
   62         /* Pointer to mbuf. */
   63         struct mbuf             *mb;
   64 
   65         /* Pointer to gather list. */
   66         struct lio_gather       *g;
   67 
   68         bus_dmamap_t            map;
   69 };
   70 
   71 struct lio_request_list {
   72         uint32_t                        reqtype;
   73         void                            *buf;
   74         bus_dmamap_t                    map;
   75         struct lio_mbuf_free_info       finfo;
   76 };
   77 
   78 /* Input Queue statistics. Each input queue has four stats fields. */
   79 struct lio_iq_stats {
   80         uint64_t        instr_posted;           /**< Instructions posted to this queue. */
   81         uint64_t        instr_processed;        /**< Instructions processed in this queue. */
   82         uint64_t        instr_dropped;          /**< Instructions that could not be processed */
   83         uint64_t        bytes_sent;             /**< Bytes sent through this queue. */
   84         uint64_t        sgentry_sent;           /**< Gather entries sent through this queue. */
   85         uint64_t        tx_done;                /**< Num of packets sent to network. */
   86         uint64_t        tx_iq_busy;             /**< Numof times this iq was found to be full. */
   87         uint64_t        tx_dropped;             /**< Numof pkts dropped dueto xmitpath errors. */
   88         uint64_t        tx_tot_bytes;           /**< Total count of bytes sento to network. */
   89         uint64_t        tx_gso;                 /* count of tso */
   90         uint64_t        tx_vxlan;               /* tunnel */
   91         uint64_t        tx_dmamap_fail;
   92         uint64_t        tx_restart;
   93         uint64_t        mbuf_defrag_failed;
   94 };
   95 
   96 /*
   97  *  The instruction (input) queue.
   98  *  The input queue is used to post raw (instruction) mode data or packet
   99  *  data to Octeon device from the host. Each input queue for
  100  *  a Octeon device has one such structure to represent it.
  101  */
  102 struct lio_instr_queue {
  103         struct octeon_device    *oct_dev;
  104 
  105         /* A lock to protect access to the input ring.  */
  106         struct mtx              lock;
  107 
  108         /* A lock to protect while enqueue to the input ring.  */
  109         struct mtx              enq_lock;
  110 
  111         /* A lock to protect while posting on the ring.  */
  112         struct mtx              post_lock;
  113 
  114         uint32_t                pkt_in_done;
  115 
  116         /* A lock to protect access to the input ring. */
  117         struct mtx              iq_flush_running_lock;
  118 
  119         /* Flag that indicates if the queue uses 64 byte commands. */
  120         uint32_t                iqcmd_64B:1;
  121 
  122         /* Queue info. */
  123         union octeon_txpciq     txpciq;
  124 
  125         uint32_t                rsvd:17;
  126 
  127         uint32_t                status:8;
  128 
  129         /* Maximum no. of instructions in this queue. */
  130         uint32_t                max_count;
  131 
  132         /* Index in input ring where the driver should write the next packet */
  133         uint32_t                host_write_index;
  134 
  135         /*
  136          * Index in input ring where Octeon is expected to read the next
  137          * packet.
  138          */
  139         uint32_t                octeon_read_index;
  140 
  141         /*
  142          * This index aids in finding the window in the queue where Octeon
  143          * has read the commands.
  144          */
  145         uint32_t                flush_index;
  146 
  147         /* This field keeps track of the instructions pending in this queue. */
  148         volatile int            instr_pending;
  149 
  150         uint32_t                reset_instr_cnt;
  151 
  152         /* Pointer to the Virtual Base addr of the input ring. */
  153         uint8_t                 *base_addr;
  154         bus_dma_tag_t           txtag;
  155 
  156         struct lio_request_list *request_list;
  157 
  158         struct buf_ring         *br;
  159 
  160         /* Octeon doorbell register for the ring. */
  161         uint32_t                doorbell_reg;
  162 
  163         /* Octeon instruction count register for this ring. */
  164         uint32_t                inst_cnt_reg;
  165 
  166         /* Number of instructions pending to be posted to Octeon. */
  167         uint32_t                fill_cnt;
  168 
  169         /* The last time that the doorbell was rung. */
  170         uint64_t                last_db_time;
  171 
  172         /*
  173          * The doorbell timeout. If the doorbell was not rung for this time
  174          * and fill_cnt is non-zero, ring the doorbell again.
  175          */
  176         uint32_t                db_timeout;
  177 
  178         /* Statistics for this input queue. */
  179         struct lio_iq_stats     stats;
  180 
  181         /* DMA mapped base address of the input descriptor ring. */
  182         uint64_t                base_addr_dma;
  183 
  184         /* Application context */
  185         void                    *app_ctx;
  186 
  187         /* network stack queue index */
  188         int                     q_index;
  189 
  190         /* os ifidx associated with this queue */
  191         int                     ifidx;
  192 
  193 };
  194 
  195 /*----------------------  INSTRUCTION FORMAT ----------------------------*/
  196 
  197 struct lio_instr3_64B {
  198         /* Pointer where the input data is available. */
  199         uint64_t        dptr;
  200 
  201         /* Instruction Header. */
  202         uint64_t        ih3;
  203 
  204         /* Instruction Header. */
  205         uint64_t        pki_ih3;
  206 
  207         /* Input Request Header. */
  208         uint64_t        irh;
  209 
  210         /* opcode/subcode specific parameters */
  211         uint64_t        ossp[2];
  212 
  213         /* Return Data Parameters */
  214         uint64_t        rdp;
  215 
  216         /*
  217          * Pointer where the response for a RAW mode packet will be written
  218          * by Octeon.
  219          */
  220         uint64_t        rptr;
  221 
  222 };
  223 
  224 union lio_instr_64B {
  225         struct lio_instr3_64B   cmd3;
  226 };
  227 
  228 /* The size of each buffer in soft command buffer pool */
  229 #define LIO_SOFT_COMMAND_BUFFER_SIZE    2048
  230 
  231 struct lio_soft_command {
  232         /* Soft command buffer info. */
  233         struct lio_stailq_node  node;
  234         uint64_t                dma_addr;
  235         uint32_t                size;
  236 
  237         /* Command and return status */
  238         union lio_instr_64B     cmd;
  239 
  240 #define COMPLETION_WORD_INIT    0xffffffffffffffffULL
  241         uint64_t                *status_word;
  242 
  243         /* Data buffer info */
  244         void                    *virtdptr;
  245         uint64_t                dmadptr;
  246         uint32_t                datasize;
  247 
  248         /* Return buffer info */
  249         void                    *virtrptr;
  250         uint64_t                dmarptr;
  251         uint32_t                rdatasize;
  252 
  253         /* Context buffer info */
  254         void                    *ctxptr;
  255         uint32_t                ctxsize;
  256 
  257         /* Time out and callback */
  258         int                     wait_time;
  259         int                     timeout;
  260         uint32_t                iq_no;
  261         void                    (*callback) (struct octeon_device *, uint32_t,
  262                                              void *);
  263         void                    *callback_arg;
  264 };
  265 
  266 /* Maximum number of buffers to allocate into soft command buffer pool */
  267 #define LIO_MAX_SOFT_COMMAND_BUFFERS    256
  268 
  269 /* Head of a soft command buffer pool. */
  270 struct lio_sc_buffer_pool {
  271         /* List structure to add delete pending entries to */
  272         struct lio_stailq_head  head;
  273 
  274         /* A lock for this response list */
  275         struct mtx              lock;
  276 
  277         volatile uint32_t       alloc_buf_count;
  278 };
  279 
  280 #define LIO_INCR_INSTRQUEUE_PKT_COUNT(octeon_dev_ptr, iq_no, field, count) \
  281                 (((octeon_dev_ptr)->instr_queue[iq_no]->stats.field) += count)
  282 
  283 int     lio_setup_sc_buffer_pool(struct octeon_device *oct);
  284 int     lio_free_sc_buffer_pool(struct octeon_device *oct);
  285 struct lio_soft_command *lio_alloc_soft_command(struct octeon_device *oct,
  286                                                 uint32_t datasize,
  287                                                 uint32_t rdatasize,
  288                                                 uint32_t ctxsize);
  289 void    lio_free_soft_command(struct octeon_device *oct,
  290                               struct lio_soft_command *sc);
  291 
  292 /*
  293  *  lio_init_instr_queue()
  294  *  @param octeon_dev      - pointer to the octeon device structure.
  295  *  @param txpciq          - queue to be initialized (0 <= q_no <= 3).
  296  *
  297  *  Called at driver init time for each input queue. iq_conf has the
  298  *  configuration parameters for the queue.
  299  *
  300  *  @return  Success: 0   Failure: 1
  301  */
  302 int     lio_init_instr_queue(struct octeon_device *octeon_dev,
  303                              union octeon_txpciq txpciq, uint32_t num_descs);
  304 
  305 /*
  306  *  lio_delete_instr_queue()
  307  *  @param octeon_dev      - pointer to the octeon device structure.
  308  *  @param iq_no           - queue to be deleted
  309  *
  310  *  Called at driver unload time for each input queue. Deletes all
  311  *  allocated resources for the input queue.
  312  *
  313  *  @return  Success: 0   Failure: 1
  314  */
  315 int     lio_delete_instr_queue(struct octeon_device *octeon_dev,
  316                                uint32_t iq_no);
  317 
  318 int     lio_wait_for_instr_fetch(struct octeon_device *oct);
  319 
  320 int     lio_process_iq_request_list(struct octeon_device *oct,
  321                                     struct lio_instr_queue *iq,
  322                                     uint32_t budget);
  323 
  324 int     lio_send_command(struct octeon_device *oct, uint32_t iq_no,
  325                          uint32_t force_db, void *cmd, void *buf,
  326                          uint32_t datasize, uint32_t reqtype);
  327 
  328 void    lio_prepare_soft_command(struct octeon_device *oct,
  329                                  struct lio_soft_command *sc,
  330                                  uint8_t opcode, uint8_t subcode,
  331                                  uint32_t irh_ossp, uint64_t ossp0,
  332                                  uint64_t ossp1);
  333 
  334 int     lio_send_soft_command(struct octeon_device *oct,
  335                               struct lio_soft_command *sc);
  336 
  337 int     lio_setup_iq(struct octeon_device *oct, int ifidx,
  338                      int q_index, union octeon_txpciq iq_no,
  339                      uint32_t num_descs);
  340 int     lio_flush_iq(struct octeon_device *oct, struct lio_instr_queue *iq,
  341                      uint32_t budget);
  342 #endif  /* __LIO_IQ_H__ */

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