FreeBSD/Linux Kernel Cross Reference
sys/dev/malo/if_malo.c
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
5 * Copyright (c) 2007 Marvell Semiconductor, Inc.
6 * Copyright (c) 2007 Sam Leffler, Errno Consulting
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer,
14 * without modification.
15 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
16 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
17 * redistribution must be conditioned upon including a substantially
18 * similar Disclaimer requirement for further binary redistribution.
19 *
20 * NO WARRANTY
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
24 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
25 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
26 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
29 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGES.
32 */
33
34 #include <sys/cdefs.h>
35 #ifdef __FreeBSD__
36 __FBSDID("$FreeBSD$");
37 #endif
38
39 #include "opt_malo.h"
40
41 #include <sys/param.h>
42 #include <sys/endian.h>
43 #include <sys/kernel.h>
44 #include <sys/malloc.h>
45 #include <sys/socket.h>
46 #include <sys/sockio.h>
47 #include <sys/sysctl.h>
48 #include <sys/taskqueue.h>
49
50 #include <machine/bus.h>
51 #include <sys/bus.h>
52
53 #include <net/if.h>
54 #include <net/if_var.h>
55 #include <net/if_dl.h>
56 #include <net/if_media.h>
57 #include <net/if_types.h>
58 #include <net/ethernet.h>
59
60 #include <net80211/ieee80211_var.h>
61 #include <net80211/ieee80211_regdomain.h>
62
63 #include <net/bpf.h>
64
65 #include <dev/malo/if_malo.h>
66
67 SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
68 "Marvell 88w8335 driver parameters");
69
70 static int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/
71 SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &malo_txcoalesce,
72 0, "tx buffers to send at once");
73 static int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */
74 SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &malo_rxbuf,
75 0, "rx buffers allocated");
76 static int malo_rxquota = MALO_RXBUF; /* # max buffers to process */
77 SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RWTUN, &malo_rxquota,
78 0, "max rx buffers to process per interrupt");
79 static int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */
80 SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RWTUN, &malo_txbuf,
81 0, "tx buffers allocated");
82
83 #ifdef MALO_DEBUG
84 static int malo_debug = 0;
85 SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RWTUN, &malo_debug,
86 0, "control debugging printfs");
87 enum {
88 MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
89 MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */
90 MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */
91 MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */
92 MALO_DEBUG_RESET = 0x00000010, /* reset processing */
93 MALO_DEBUG_INTR = 0x00000040, /* ISR */
94 MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */
95 MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */
96 MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */
97 MALO_DEBUG_NODE = 0x00000800, /* node management */
98 MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */
99 MALO_DEBUG_FW = 0x00008000, /* firmware */
100 MALO_DEBUG_ANY = 0xffffffff
101 };
102 #define IS_BEACON(wh) \
103 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \
104 IEEE80211_FC0_SUBTYPE_MASK)) == \
105 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
106 #define IFF_DUMPPKTS_RECV(sc, wh) \
107 (((sc->malo_debug & MALO_DEBUG_RECV) && \
108 ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))))
109 #define IFF_DUMPPKTS_XMIT(sc) \
110 (sc->malo_debug & MALO_DEBUG_XMIT)
111 #define DPRINTF(sc, m, fmt, ...) do { \
112 if (sc->malo_debug & (m)) \
113 printf(fmt, __VA_ARGS__); \
114 } while (0)
115 #else
116 #define DPRINTF(sc, m, fmt, ...) do { \
117 (void) sc; \
118 } while (0)
119 #endif
120
121 static MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers");
122
123 static struct ieee80211vap *malo_vap_create(struct ieee80211com *,
124 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
125 const uint8_t [IEEE80211_ADDR_LEN],
126 const uint8_t [IEEE80211_ADDR_LEN]);
127 static void malo_vap_delete(struct ieee80211vap *);
128 static int malo_dma_setup(struct malo_softc *);
129 static int malo_setup_hwdma(struct malo_softc *);
130 static void malo_txq_init(struct malo_softc *, struct malo_txq *, int);
131 static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *);
132 static void malo_parent(struct ieee80211com *);
133 static int malo_transmit(struct ieee80211com *, struct mbuf *);
134 static void malo_start(struct malo_softc *);
135 static void malo_watchdog(void *);
136 static void malo_updateslot(struct ieee80211com *);
137 static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int);
138 static void malo_scan_start(struct ieee80211com *);
139 static void malo_scan_end(struct ieee80211com *);
140 static void malo_set_channel(struct ieee80211com *);
141 static int malo_raw_xmit(struct ieee80211_node *, struct mbuf *,
142 const struct ieee80211_bpf_params *);
143 static void malo_sysctlattach(struct malo_softc *);
144 static void malo_announce(struct malo_softc *);
145 static void malo_dma_cleanup(struct malo_softc *);
146 static void malo_stop(struct malo_softc *);
147 static int malo_chan_set(struct malo_softc *, struct ieee80211_channel *);
148 static int malo_mode_init(struct malo_softc *);
149 static void malo_tx_proc(void *, int);
150 static void malo_rx_proc(void *, int);
151 static void malo_init(void *);
152
153 /*
154 * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1
155 * operations are done in the "hal" except getting H/W MAC address at
156 * malo_attach and there should be no reference to them here.
157 */
158 static uint32_t
159 malo_bar0_read4(struct malo_softc *sc, bus_size_t off)
160 {
161 return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off);
162 }
163
164 static void
165 malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val)
166 {
167 DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n",
168 __func__, (uintmax_t)off, val);
169
170 bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val);
171 }
172
173 int
174 malo_attach(uint16_t devid, struct malo_softc *sc)
175 {
176 struct ieee80211com *ic = &sc->malo_ic;
177 struct malo_hal *mh;
178 int error;
179 uint8_t bands[IEEE80211_MODE_BYTES];
180
181 MALO_LOCK_INIT(sc);
182 callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0);
183 mbufq_init(&sc->malo_snd, ifqmaxlen);
184
185 mh = malo_hal_attach(sc->malo_dev, devid,
186 sc->malo_io1h, sc->malo_io1t, sc->malo_dmat);
187 if (mh == NULL) {
188 device_printf(sc->malo_dev, "unable to attach HAL\n");
189 error = EIO;
190 goto bad;
191 }
192 sc->malo_mh = mh;
193
194 /*
195 * Load firmware so we can get setup. We arbitrarily pick station
196 * firmware; we'll re-load firmware as needed so setting up
197 * the wrong mode isn't a big deal.
198 */
199 error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m");
200 if (error != 0) {
201 device_printf(sc->malo_dev, "unable to setup firmware\n");
202 goto bad1;
203 }
204 /* XXX gethwspecs() extracts correct informations? not maybe! */
205 error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs);
206 if (error != 0) {
207 device_printf(sc->malo_dev, "unable to fetch h/w specs\n");
208 goto bad1;
209 }
210
211 DPRINTF(sc, MALO_DEBUG_FW,
212 "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x"
213 "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x"
214 "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x"
215 "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x"
216 "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x",
217 sc->malo_hwspecs.hwversion,
218 sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb,
219 sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb,
220 sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna,
221 sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0,
222 sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write,
223 sc->malo_hwspecs.ul_fw_awakecookie,
224 sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1],
225 sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]);
226
227 /* NB: firmware looks that it does not export regdomain info API. */
228 memset(bands, 0, sizeof(bands));
229 setbit(bands, IEEE80211_MODE_11B);
230 setbit(bands, IEEE80211_MODE_11G);
231 ieee80211_init_channels(ic, NULL, bands);
232
233 sc->malo_txantenna = 0x2; /* h/w default */
234 sc->malo_rxantenna = 0xffff; /* h/w default */
235
236 /*
237 * Allocate tx + rx descriptors and populate the lists.
238 * We immediately push the information to the firmware
239 * as otherwise it gets upset.
240 */
241 error = malo_dma_setup(sc);
242 if (error != 0) {
243 device_printf(sc->malo_dev,
244 "failed to setup descriptors: %d\n", error);
245 goto bad1;
246 }
247 error = malo_setup_hwdma(sc); /* push to firmware */
248 if (error != 0) /* NB: malo_setupdma prints msg */
249 goto bad2;
250
251 sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT,
252 taskqueue_thread_enqueue, &sc->malo_tq);
253 taskqueue_start_threads(&sc->malo_tq, 1, PI_NET,
254 "%s taskq", device_get_nameunit(sc->malo_dev));
255
256 NET_TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc);
257 TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc);
258
259 ic->ic_softc = sc;
260 ic->ic_name = device_get_nameunit(sc->malo_dev);
261 /* XXX not right but it's not used anywhere important */
262 ic->ic_phytype = IEEE80211_T_OFDM;
263 ic->ic_opmode = IEEE80211_M_STA;
264 ic->ic_caps =
265 IEEE80211_C_STA /* station mode supported */
266 | IEEE80211_C_BGSCAN /* capable of bg scanning */
267 | IEEE80211_C_MONITOR /* monitor mode */
268 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
269 | IEEE80211_C_SHSLOT /* short slot time supported */
270 | IEEE80211_C_TXPMGT /* capable of txpow mgt */
271 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
272 ;
273 IEEE80211_ADDR_COPY(ic->ic_macaddr, sc->malo_hwspecs.macaddr);
274
275 /*
276 * Transmit requires space in the packet for a special format transmit
277 * record and optional padding between this record and the payload.
278 * Ask the net80211 layer to arrange this when encapsulating
279 * packets so we can add it efficiently.
280 */
281 ic->ic_headroom = sizeof(struct malo_txrec) -
282 sizeof(struct ieee80211_frame);
283
284 /* call MI attach routine. */
285 ieee80211_ifattach(ic);
286 /* override default methods */
287 ic->ic_vap_create = malo_vap_create;
288 ic->ic_vap_delete = malo_vap_delete;
289 ic->ic_raw_xmit = malo_raw_xmit;
290 ic->ic_updateslot = malo_updateslot;
291 ic->ic_scan_start = malo_scan_start;
292 ic->ic_scan_end = malo_scan_end;
293 ic->ic_set_channel = malo_set_channel;
294 ic->ic_parent = malo_parent;
295 ic->ic_transmit = malo_transmit;
296
297 sc->malo_invalid = 0; /* ready to go, enable int handling */
298
299 ieee80211_radiotap_attach(ic,
300 &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th),
301 MALO_TX_RADIOTAP_PRESENT,
302 &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th),
303 MALO_RX_RADIOTAP_PRESENT);
304
305 /*
306 * Setup dynamic sysctl's.
307 */
308 malo_sysctlattach(sc);
309
310 if (bootverbose)
311 ieee80211_announce(ic);
312 malo_announce(sc);
313
314 return 0;
315 bad2:
316 malo_dma_cleanup(sc);
317 bad1:
318 malo_hal_detach(mh);
319 bad:
320 sc->malo_invalid = 1;
321
322 return error;
323 }
324
325 static struct ieee80211vap *
326 malo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
327 enum ieee80211_opmode opmode, int flags,
328 const uint8_t bssid[IEEE80211_ADDR_LEN],
329 const uint8_t mac[IEEE80211_ADDR_LEN])
330 {
331 struct malo_softc *sc = ic->ic_softc;
332 struct malo_vap *mvp;
333 struct ieee80211vap *vap;
334
335 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
336 device_printf(sc->malo_dev, "multiple vaps not supported\n");
337 return NULL;
338 }
339 switch (opmode) {
340 case IEEE80211_M_STA:
341 if (opmode == IEEE80211_M_STA)
342 flags |= IEEE80211_CLONE_NOBEACONS;
343 /* fall thru... */
344 case IEEE80211_M_MONITOR:
345 break;
346 default:
347 device_printf(sc->malo_dev, "%s mode not supported\n",
348 ieee80211_opmode_name[opmode]);
349 return NULL; /* unsupported */
350 }
351 mvp = malloc(sizeof(struct malo_vap), M_80211_VAP, M_WAITOK | M_ZERO);
352 vap = &mvp->malo_vap;
353 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
354
355 /* override state transition machine */
356 mvp->malo_newstate = vap->iv_newstate;
357 vap->iv_newstate = malo_newstate;
358
359 /* complete setup */
360 ieee80211_vap_attach(vap,
361 ieee80211_media_change, ieee80211_media_status, mac);
362 ic->ic_opmode = opmode;
363 return vap;
364 }
365
366 static void
367 malo_vap_delete(struct ieee80211vap *vap)
368 {
369 struct malo_vap *mvp = MALO_VAP(vap);
370
371 ieee80211_vap_detach(vap);
372 free(mvp, M_80211_VAP);
373 }
374
375 int
376 malo_intr(void *arg)
377 {
378 struct malo_softc *sc = arg;
379 struct malo_hal *mh = sc->malo_mh;
380 uint32_t status;
381
382 if (sc->malo_invalid) {
383 /*
384 * The hardware is not ready/present, don't touch anything.
385 * Note this can happen early on if the IRQ is shared.
386 */
387 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
388 return (FILTER_STRAY);
389 }
390
391 /*
392 * Figure out the reason(s) for the interrupt.
393 */
394 malo_hal_getisr(mh, &status); /* NB: clears ISR too */
395 if (status == 0) /* must be a shared irq */
396 return (FILTER_STRAY);
397
398 DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
399 __func__, status, sc->malo_imask);
400
401 if (status & MALO_A2HRIC_BIT_RX_RDY)
402 taskqueue_enqueue(sc->malo_tq, &sc->malo_rxtask);
403 if (status & MALO_A2HRIC_BIT_TX_DONE)
404 taskqueue_enqueue(sc->malo_tq, &sc->malo_txtask);
405 if (status & MALO_A2HRIC_BIT_OPC_DONE)
406 malo_hal_cmddone(mh);
407 if (status & MALO_A2HRIC_BIT_MAC_EVENT)
408 ;
409 if (status & MALO_A2HRIC_BIT_RX_PROBLEM)
410 ;
411 if (status & MALO_A2HRIC_BIT_ICV_ERROR) {
412 /* TKIP ICV error */
413 sc->malo_stats.mst_rx_badtkipicv++;
414 }
415 #ifdef MALO_DEBUG
416 if (((status | sc->malo_imask) ^ sc->malo_imask) != 0)
417 DPRINTF(sc, MALO_DEBUG_INTR,
418 "%s: can't handle interrupt status 0x%x\n",
419 __func__, status);
420 #endif
421 return (FILTER_HANDLED);
422 }
423
424 static void
425 malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
426 {
427 bus_addr_t *paddr = (bus_addr_t*) arg;
428
429 KASSERT(error == 0, ("error %u on bus_dma callback", error));
430
431 *paddr = segs->ds_addr;
432 }
433
434 static int
435 malo_desc_setup(struct malo_softc *sc, const char *name,
436 struct malo_descdma *dd,
437 int nbuf, size_t bufsize, int ndesc, size_t descsize)
438 {
439 int error;
440 uint8_t *ds;
441
442 DPRINTF(sc, MALO_DEBUG_RESET,
443 "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
444 __func__, name, nbuf, (uintmax_t) bufsize,
445 ndesc, (uintmax_t) descsize);
446
447 dd->dd_name = name;
448 dd->dd_desc_len = nbuf * ndesc * descsize;
449
450 /*
451 * Setup DMA descriptor area.
452 */
453 error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */
454 PAGE_SIZE, 0, /* alignment, bounds */
455 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
456 BUS_SPACE_MAXADDR, /* highaddr */
457 NULL, NULL, /* filter, filterarg */
458 dd->dd_desc_len, /* maxsize */
459 1, /* nsegments */
460 dd->dd_desc_len, /* maxsegsize */
461 BUS_DMA_ALLOCNOW, /* flags */
462 NULL, /* lockfunc */
463 NULL, /* lockarg */
464 &dd->dd_dmat);
465 if (error != 0) {
466 device_printf(sc->malo_dev, "cannot allocate %s DMA tag\n",
467 dd->dd_name);
468 return error;
469 }
470
471 /* allocate descriptors */
472 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
473 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap);
474 if (error != 0) {
475 device_printf(sc->malo_dev,
476 "unable to alloc memory for %u %s descriptors, "
477 "error %u\n", nbuf * ndesc, dd->dd_name, error);
478 goto fail1;
479 }
480
481 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
482 dd->dd_desc, dd->dd_desc_len,
483 malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT);
484 if (error != 0) {
485 device_printf(sc->malo_dev,
486 "unable to map %s descriptors, error %u\n",
487 dd->dd_name, error);
488 goto fail2;
489 }
490
491 ds = dd->dd_desc;
492 memset(ds, 0, dd->dd_desc_len);
493 DPRINTF(sc, MALO_DEBUG_RESET,
494 "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n",
495 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
496 (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
497
498 return 0;
499 fail2:
500 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
501 fail1:
502 bus_dma_tag_destroy(dd->dd_dmat);
503 memset(dd, 0, sizeof(*dd));
504 return error;
505 }
506
507 #define DS2PHYS(_dd, _ds) \
508 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
509
510 static int
511 malo_rxdma_setup(struct malo_softc *sc)
512 {
513 int error, bsize, i;
514 struct malo_rxbuf *bf;
515 struct malo_rxdesc *ds;
516
517 error = malo_desc_setup(sc, "rx", &sc->malo_rxdma,
518 malo_rxbuf, sizeof(struct malo_rxbuf),
519 1, sizeof(struct malo_rxdesc));
520 if (error != 0)
521 return error;
522
523 /*
524 * Allocate rx buffers and set them up.
525 */
526 bsize = malo_rxbuf * sizeof(struct malo_rxbuf);
527 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
528 if (bf == NULL) {
529 device_printf(sc->malo_dev,
530 "malloc of %u rx buffers failed\n", bsize);
531 return error;
532 }
533 sc->malo_rxdma.dd_bufptr = bf;
534
535 STAILQ_INIT(&sc->malo_rxbuf);
536 ds = sc->malo_rxdma.dd_desc;
537 for (i = 0; i < malo_rxbuf; i++, bf++, ds++) {
538 bf->bf_desc = ds;
539 bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds);
540 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
541 &bf->bf_dmamap);
542 if (error != 0) {
543 device_printf(sc->malo_dev,
544 "%s: unable to dmamap for rx buffer, error %d\n",
545 __func__, error);
546 return error;
547 }
548 /* NB: tail is intentional to preserve descriptor order */
549 STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list);
550 }
551 return 0;
552 }
553
554 static int
555 malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq)
556 {
557 int error, bsize, i;
558 struct malo_txbuf *bf;
559 struct malo_txdesc *ds;
560
561 error = malo_desc_setup(sc, "tx", &txq->dma,
562 malo_txbuf, sizeof(struct malo_txbuf),
563 MALO_TXDESC, sizeof(struct malo_txdesc));
564 if (error != 0)
565 return error;
566
567 /* allocate and setup tx buffers */
568 bsize = malo_txbuf * sizeof(struct malo_txbuf);
569 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
570 if (bf == NULL) {
571 device_printf(sc->malo_dev, "malloc of %u tx buffers failed\n",
572 malo_txbuf);
573 return ENOMEM;
574 }
575 txq->dma.dd_bufptr = bf;
576
577 STAILQ_INIT(&txq->free);
578 txq->nfree = 0;
579 ds = txq->dma.dd_desc;
580 for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) {
581 bf->bf_desc = ds;
582 bf->bf_daddr = DS2PHYS(&txq->dma, ds);
583 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
584 &bf->bf_dmamap);
585 if (error != 0) {
586 device_printf(sc->malo_dev,
587 "unable to create dmamap for tx "
588 "buffer %u, error %u\n", i, error);
589 return error;
590 }
591 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
592 txq->nfree++;
593 }
594
595 return 0;
596 }
597
598 static void
599 malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd)
600 {
601 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
602 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
603 bus_dma_tag_destroy(dd->dd_dmat);
604
605 memset(dd, 0, sizeof(*dd));
606 }
607
608 static void
609 malo_rxdma_cleanup(struct malo_softc *sc)
610 {
611 struct malo_rxbuf *bf;
612
613 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
614 if (bf->bf_m != NULL) {
615 m_freem(bf->bf_m);
616 bf->bf_m = NULL;
617 }
618 if (bf->bf_dmamap != NULL) {
619 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
620 bf->bf_dmamap = NULL;
621 }
622 }
623 STAILQ_INIT(&sc->malo_rxbuf);
624 if (sc->malo_rxdma.dd_bufptr != NULL) {
625 free(sc->malo_rxdma.dd_bufptr, M_MALODEV);
626 sc->malo_rxdma.dd_bufptr = NULL;
627 }
628 if (sc->malo_rxdma.dd_desc_len != 0)
629 malo_desc_cleanup(sc, &sc->malo_rxdma);
630 }
631
632 static void
633 malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq)
634 {
635 struct malo_txbuf *bf;
636 struct ieee80211_node *ni;
637
638 STAILQ_FOREACH(bf, &txq->free, bf_list) {
639 if (bf->bf_m != NULL) {
640 m_freem(bf->bf_m);
641 bf->bf_m = NULL;
642 }
643 ni = bf->bf_node;
644 bf->bf_node = NULL;
645 if (ni != NULL) {
646 /*
647 * Reclaim node reference.
648 */
649 ieee80211_free_node(ni);
650 }
651 if (bf->bf_dmamap != NULL) {
652 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
653 bf->bf_dmamap = NULL;
654 }
655 }
656 STAILQ_INIT(&txq->free);
657 txq->nfree = 0;
658 if (txq->dma.dd_bufptr != NULL) {
659 free(txq->dma.dd_bufptr, M_MALODEV);
660 txq->dma.dd_bufptr = NULL;
661 }
662 if (txq->dma.dd_desc_len != 0)
663 malo_desc_cleanup(sc, &txq->dma);
664 }
665
666 static void
667 malo_dma_cleanup(struct malo_softc *sc)
668 {
669 int i;
670
671 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
672 malo_txdma_cleanup(sc, &sc->malo_txq[i]);
673
674 malo_rxdma_cleanup(sc);
675 }
676
677 static int
678 malo_dma_setup(struct malo_softc *sc)
679 {
680 int error, i;
681
682 /* rxdma initializing. */
683 error = malo_rxdma_setup(sc);
684 if (error != 0)
685 return error;
686
687 /* NB: we just have 1 tx queue now. */
688 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
689 error = malo_txdma_setup(sc, &sc->malo_txq[i]);
690 if (error != 0) {
691 malo_dma_cleanup(sc);
692
693 return error;
694 }
695
696 malo_txq_init(sc, &sc->malo_txq[i], i);
697 }
698
699 return 0;
700 }
701
702 static void
703 malo_hal_set_rxtxdma(struct malo_softc *sc)
704 {
705 int i;
706
707 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read,
708 sc->malo_hwdma.rxdesc_read);
709 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write,
710 sc->malo_hwdma.rxdesc_read);
711
712 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
713 malo_bar0_write4(sc,
714 sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]);
715 }
716 }
717
718 /*
719 * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are
720 * for compatibility with older firmware. For current firmware we send
721 * this information with a cmd block via malo_hal_sethwdma.
722 */
723 static int
724 malo_setup_hwdma(struct malo_softc *sc)
725 {
726 int i;
727 struct malo_txq *txq;
728
729 sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr;
730
731 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
732 txq = &sc->malo_txq[i];
733 sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr;
734 }
735 sc->malo_hwdma.maxnum_txwcb = malo_txbuf;
736 sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES;
737
738 malo_hal_set_rxtxdma(sc);
739
740 return 0;
741 }
742
743 static void
744 malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum)
745 {
746 struct malo_txbuf *bf, *bn;
747 struct malo_txdesc *ds;
748
749 MALO_TXQ_LOCK_INIT(sc, txq);
750 txq->qnum = qnum;
751 txq->txpri = 0; /* XXX */
752
753 STAILQ_FOREACH(bf, &txq->free, bf_list) {
754 bf->bf_txq = txq;
755
756 ds = bf->bf_desc;
757 bn = STAILQ_NEXT(bf, bf_list);
758 if (bn == NULL)
759 bn = STAILQ_FIRST(&txq->free);
760 ds->physnext = htole32(bn->bf_daddr);
761 }
762 STAILQ_INIT(&txq->active);
763 }
764
765 /*
766 * Reclaim resources for a setup queue.
767 */
768 static void
769 malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq)
770 {
771 /* XXX hal work? */
772 MALO_TXQ_LOCK_DESTROY(txq);
773 }
774
775 /*
776 * Allocate a tx buffer for sending a frame.
777 */
778 static struct malo_txbuf *
779 malo_getbuf(struct malo_softc *sc, struct malo_txq *txq)
780 {
781 struct malo_txbuf *bf;
782
783 MALO_TXQ_LOCK(txq);
784 bf = STAILQ_FIRST(&txq->free);
785 if (bf != NULL) {
786 STAILQ_REMOVE_HEAD(&txq->free, bf_list);
787 txq->nfree--;
788 }
789 MALO_TXQ_UNLOCK(txq);
790 if (bf == NULL) {
791 DPRINTF(sc, MALO_DEBUG_XMIT,
792 "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
793 sc->malo_stats.mst_tx_qstop++;
794 }
795 return bf;
796 }
797
798 static int
799 malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0)
800 {
801 struct mbuf *m;
802 int error;
803
804 /*
805 * Load the DMA map so any coalescing is done. This also calculates
806 * the number of descriptors we need.
807 */
808 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
809 bf->bf_segs, &bf->bf_nseg,
810 BUS_DMA_NOWAIT);
811 if (error == EFBIG) {
812 /* XXX packet requires too many descriptors */
813 bf->bf_nseg = MALO_TXDESC + 1;
814 } else if (error != 0) {
815 sc->malo_stats.mst_tx_busdma++;
816 m_freem(m0);
817 return error;
818 }
819 /*
820 * Discard null packets and check for packets that require too many
821 * TX descriptors. We try to convert the latter to a cluster.
822 */
823 if (error == EFBIG) { /* too many desc's, linearize */
824 sc->malo_stats.mst_tx_linear++;
825 m = m_defrag(m0, M_NOWAIT);
826 if (m == NULL) {
827 m_freem(m0);
828 sc->malo_stats.mst_tx_nombuf++;
829 return ENOMEM;
830 }
831 m0 = m;
832 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
833 bf->bf_segs, &bf->bf_nseg,
834 BUS_DMA_NOWAIT);
835 if (error != 0) {
836 sc->malo_stats.mst_tx_busdma++;
837 m_freem(m0);
838 return error;
839 }
840 KASSERT(bf->bf_nseg <= MALO_TXDESC,
841 ("too many segments after defrag; nseg %u", bf->bf_nseg));
842 } else if (bf->bf_nseg == 0) { /* null packet, discard */
843 sc->malo_stats.mst_tx_nodata++;
844 m_freem(m0);
845 return EIO;
846 }
847 DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n",
848 __func__, m0, m0->m_pkthdr.len);
849 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
850 bf->bf_m = m0;
851
852 return 0;
853 }
854
855 #ifdef MALO_DEBUG
856 static void
857 malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix)
858 {
859 const struct malo_rxdesc *ds = bf->bf_desc;
860 uint32_t status = le32toh(ds->status);
861
862 printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n"
863 " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x"
864 " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr,
865 le32toh(ds->physnext), le32toh(ds->physbuffdata),
866 ds->rxcontrol,
867 ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ?
868 "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !",
869 ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel,
870 ds->rate, le16toh(ds->qosctrl));
871 }
872
873 static void
874 malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix)
875 {
876 const struct malo_txdesc *ds = bf->bf_desc;
877 uint32_t status = le32toh(ds->status);
878
879 printf("Q%u[%3u]", qnum, ix);
880 printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr);
881 printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
882 le32toh(ds->physnext),
883 le32toh(ds->pktptr), le16toh(ds->pktlen), status,
884 status & MALO_TXD_STATUS_USED ?
885 "" : (status & 3) != 0 ? " *" : " !");
886 printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
887 ds->datarate, ds->txpriority, le16toh(ds->qosctrl),
888 le32toh(ds->sap_pktinfo), le16toh(ds->format));
889 #if 0
890 {
891 const uint8_t *cp = (const uint8_t *) ds;
892 int i;
893 for (i = 0; i < sizeof(struct malo_txdesc); i++) {
894 printf("%02x ", cp[i]);
895 if (((i+1) % 16) == 0)
896 printf("\n");
897 }
898 printf("\n");
899 }
900 #endif
901 }
902 #endif /* MALO_DEBUG */
903
904 static __inline void
905 malo_updatetxrate(struct ieee80211_node *ni, int rix)
906 {
907 static const int ieeerates[] =
908 { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 };
909 if (rix < nitems(ieeerates))
910 ni->ni_txrate = ieeerates[rix];
911 }
912
913 static int
914 malo_fix2rate(int fix_rate)
915 {
916 static const int rates[] =
917 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 };
918 return (fix_rate < nitems(rates) ? rates[fix_rate] : 0);
919 }
920
921 /*
922 * Process completed xmit descriptors from the specified queue.
923 */
924 static int
925 malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq)
926 {
927 struct malo_txbuf *bf;
928 struct malo_txdesc *ds;
929 struct ieee80211_node *ni;
930 int nreaped;
931 uint32_t status;
932
933 DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n",
934 __func__, txq->qnum);
935 for (nreaped = 0;; nreaped++) {
936 MALO_TXQ_LOCK(txq);
937 bf = STAILQ_FIRST(&txq->active);
938 if (bf == NULL) {
939 MALO_TXQ_UNLOCK(txq);
940 break;
941 }
942 ds = bf->bf_desc;
943 MALO_TXDESC_SYNC(txq, ds,
944 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
945 if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) {
946 MALO_TXQ_UNLOCK(txq);
947 break;
948 }
949 STAILQ_REMOVE_HEAD(&txq->active, bf_list);
950 MALO_TXQ_UNLOCK(txq);
951
952 #ifdef MALO_DEBUG
953 if (sc->malo_debug & MALO_DEBUG_XMIT_DESC)
954 malo_printtxbuf(bf, txq->qnum, nreaped);
955 #endif
956 ni = bf->bf_node;
957 if (ni != NULL) {
958 status = le32toh(ds->status);
959 if (status & MALO_TXD_STATUS_OK) {
960 uint16_t format = le16toh(ds->format);
961 uint8_t txant =_IEEE80211_MASKSHIFT(
962 format, MALO_TXD_ANTENNA);
963
964 sc->malo_stats.mst_ant_tx[txant]++;
965 if (status & MALO_TXD_STATUS_OK_RETRY)
966 sc->malo_stats.mst_tx_retries++;
967 if (status & MALO_TXD_STATUS_OK_MORE_RETRY)
968 sc->malo_stats.mst_tx_mretries++;
969 malo_updatetxrate(ni, ds->datarate);
970 sc->malo_stats.mst_tx_rate = ds->datarate;
971 } else {
972 if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR)
973 sc->malo_stats.mst_tx_linkerror++;
974 if (status & MALO_TXD_STATUS_FAILED_XRETRY)
975 sc->malo_stats.mst_tx_xretries++;
976 if (status & MALO_TXD_STATUS_FAILED_AGING)
977 sc->malo_stats.mst_tx_aging++;
978 }
979 /* XXX strip fw len in case header inspected */
980 m_adj(bf->bf_m, sizeof(uint16_t));
981 ieee80211_tx_complete(ni, bf->bf_m,
982 (status & MALO_TXD_STATUS_OK) == 0);
983 } else
984 m_freem(bf->bf_m);
985
986 ds->status = htole32(MALO_TXD_STATUS_IDLE);
987 ds->pktlen = htole32(0);
988
989 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
990 BUS_DMASYNC_POSTWRITE);
991 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
992 bf->bf_m = NULL;
993 bf->bf_node = NULL;
994
995 MALO_TXQ_LOCK(txq);
996 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
997 txq->nfree++;
998 MALO_TXQ_UNLOCK(txq);
999 }
1000 return nreaped;
1001 }
1002
1003 /*
1004 * Deferred processing of transmit interrupt.
1005 */
1006 static void
1007 malo_tx_proc(void *arg, int npending)
1008 {
1009 struct malo_softc *sc = arg;
1010 int i, nreaped;
1011
1012 /*
1013 * Process each active queue.
1014 */
1015 nreaped = 0;
1016 MALO_LOCK(sc);
1017 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
1018 if (!STAILQ_EMPTY(&sc->malo_txq[i].active))
1019 nreaped += malo_tx_processq(sc, &sc->malo_txq[i]);
1020 }
1021
1022 if (nreaped != 0) {
1023 sc->malo_timer = 0;
1024 malo_start(sc);
1025 }
1026 MALO_UNLOCK(sc);
1027 }
1028
1029 static int
1030 malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni,
1031 struct malo_txbuf *bf, struct mbuf *m0)
1032 {
1033 #define IS_DATA_FRAME(wh) \
1034 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA)
1035 int error, iswep;
1036 int hdrlen, pktlen;
1037 struct ieee80211_frame *wh;
1038 struct ieee80211com *ic = &sc->malo_ic;
1039 struct ieee80211vap *vap = ni->ni_vap;
1040 struct malo_txdesc *ds;
1041 struct malo_txrec *tr;
1042 struct malo_txq *txq;
1043 uint16_t qos;
1044
1045 wh = mtod(m0, struct ieee80211_frame *);
1046 iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1047 hdrlen = ieee80211_anyhdrsize(wh);
1048 pktlen = m0->m_pkthdr.len;
1049 if (IEEE80211_QOS_HAS_SEQ(wh)) {
1050 qos = *(uint16_t *)ieee80211_getqos(wh);
1051 } else
1052 qos = 0;
1053
1054 if (iswep) {
1055 struct ieee80211_key *k;
1056
1057 /*
1058 * Construct the 802.11 header+trailer for an encrypted
1059 * frame. The only reason this can fail is because of an
1060 * unknown or unsupported cipher/key type.
1061 *
1062 * NB: we do this even though the firmware will ignore
1063 * what we've done for WEP and TKIP as we need the
1064 * ExtIV filled in for CCMP and this also adjusts
1065 * the headers which simplifies our work below.
1066 */
1067 k = ieee80211_crypto_encap(ni, m0);
1068 if (k == NULL) {
1069 /*
1070 * This can happen when the key is yanked after the
1071 * frame was queued. Just discard the frame; the
1072 * 802.11 layer counts failures and provides
1073 * debugging/diagnostics.
1074 */
1075 m_freem(m0);
1076 return EIO;
1077 }
1078
1079 /*
1080 * Adjust the packet length for the crypto additions
1081 * done during encap and any other bits that the f/w
1082 * will add later on.
1083 */
1084 pktlen = m0->m_pkthdr.len;
1085
1086 /* packet header may have moved, reset our local pointer */
1087 wh = mtod(m0, struct ieee80211_frame *);
1088 }
1089
1090 if (ieee80211_radiotap_active_vap(vap)) {
1091 sc->malo_tx_th.wt_flags = 0; /* XXX */
1092 if (iswep)
1093 sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1094 sc->malo_tx_th.wt_txpower = ni->ni_txpower;
1095 sc->malo_tx_th.wt_antenna = sc->malo_txantenna;
1096
1097 ieee80211_radiotap_tx(vap, m0);
1098 }
1099
1100 /*
1101 * Copy up/down the 802.11 header; the firmware requires
1102 * we present a 2-byte payload length followed by a
1103 * 4-address header (w/o QoS), followed (optionally) by
1104 * any WEP/ExtIV header (but only filled in for CCMP).
1105 * We are assured the mbuf has sufficient headroom to
1106 * prepend in-place by the setup of ic_headroom in
1107 * malo_attach.
1108 */
1109 if (hdrlen < sizeof(struct malo_txrec)) {
1110 const int space = sizeof(struct malo_txrec) - hdrlen;
1111 if (M_LEADINGSPACE(m0) < space) {
1112 /* NB: should never happen */
1113 device_printf(sc->malo_dev,
1114 "not enough headroom, need %d found %zd, "
1115 "m_flags 0x%x m_len %d\n",
1116 space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
1117 ieee80211_dump_pkt(ic,
1118 mtod(m0, const uint8_t *), m0->m_len, 0, -1);
1119 m_freem(m0);
1120 /* XXX stat */
1121 return EIO;
1122 }
1123 M_PREPEND(m0, space, M_NOWAIT);
1124 }
1125 tr = mtod(m0, struct malo_txrec *);
1126 if (wh != (struct ieee80211_frame *) &tr->wh)
1127 ovbcopy(wh, &tr->wh, hdrlen);
1128 /*
1129 * Note: the "firmware length" is actually the length of the fully
1130 * formed "802.11 payload". That is, it's everything except for
1131 * the 802.11 header. In particular this includes all crypto
1132 * material including the MIC!
1133 */
1134 tr->fwlen = htole16(pktlen - hdrlen);
1135
1136 /*
1137 * Load the DMA map so any coalescing is done. This
1138 * also calculates the number of descriptors we need.
1139 */
1140 error = malo_tx_dmasetup(sc, bf, m0);
1141 if (error != 0)
1142 return error;
1143 bf->bf_node = ni; /* NB: held reference */
1144 m0 = bf->bf_m; /* NB: may have changed */
1145 tr = mtod(m0, struct malo_txrec *);
1146 wh = (struct ieee80211_frame *)&tr->wh;
1147
1148 /*
1149 * Formulate tx descriptor.
1150 */
1151 ds = bf->bf_desc;
1152 txq = bf->bf_txq;
1153
1154 ds->qosctrl = qos; /* NB: already little-endian */
1155 ds->pktptr = htole32(bf->bf_segs[0].ds_addr);
1156 ds->pktlen = htole16(bf->bf_segs[0].ds_len);
1157 /* NB: pPhysNext setup once, don't touch */
1158 ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0;
1159 ds->sap_pktinfo = 0;
1160 ds->format = 0;
1161
1162 /*
1163 * Select transmit rate.
1164 */
1165 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1166 case IEEE80211_FC0_TYPE_MGT:
1167 sc->malo_stats.mst_tx_mgmt++;
1168 /* fall thru... */
1169 case IEEE80211_FC0_TYPE_CTL:
1170 ds->txpriority = 1;
1171 break;
1172 case IEEE80211_FC0_TYPE_DATA:
1173 ds->txpriority = txq->qnum;
1174 break;
1175 default:
1176 device_printf(sc->malo_dev, "bogus frame type 0x%x (%s)\n",
1177 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1178 /* XXX statistic */
1179 m_freem(m0);
1180 return EIO;
1181 }
1182
1183 #ifdef MALO_DEBUG
1184 if (IFF_DUMPPKTS_XMIT(sc))
1185 ieee80211_dump_pkt(ic,
1186 mtod(m0, const uint8_t *)+sizeof(uint16_t),
1187 m0->m_len - sizeof(uint16_t), ds->datarate, -1);
1188 #endif
1189
1190 MALO_TXQ_LOCK(txq);
1191 if (!IS_DATA_FRAME(wh))
1192 ds->status |= htole32(1);
1193 ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED);
1194 STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
1195 MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1196
1197 sc->malo_timer = 5;
1198 MALO_TXQ_UNLOCK(txq);
1199 return 0;
1200 }
1201
1202 static int
1203 malo_transmit(struct ieee80211com *ic, struct mbuf *m)
1204 {
1205 struct malo_softc *sc = ic->ic_softc;
1206 int error;
1207
1208 MALO_LOCK(sc);
1209 if (!sc->malo_running) {
1210 MALO_UNLOCK(sc);
1211 return (ENXIO);
1212 }
1213 error = mbufq_enqueue(&sc->malo_snd, m);
1214 if (error) {
1215 MALO_UNLOCK(sc);
1216 return (error);
1217 }
1218 malo_start(sc);
1219 MALO_UNLOCK(sc);
1220 return (0);
1221 }
1222
1223 static void
1224 malo_start(struct malo_softc *sc)
1225 {
1226 struct ieee80211_node *ni;
1227 struct malo_txq *txq = &sc->malo_txq[0];
1228 struct malo_txbuf *bf = NULL;
1229 struct mbuf *m;
1230 int nqueued = 0;
1231
1232 MALO_LOCK_ASSERT(sc);
1233
1234 if (!sc->malo_running || sc->malo_invalid)
1235 return;
1236
1237 while ((m = mbufq_dequeue(&sc->malo_snd)) != NULL) {
1238 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1239 bf = malo_getbuf(sc, txq);
1240 if (bf == NULL) {
1241 mbufq_prepend(&sc->malo_snd, m);
1242 sc->malo_stats.mst_tx_qstop++;
1243 break;
1244 }
1245 /*
1246 * Pass the frame to the h/w for transmission.
1247 */
1248 if (malo_tx_start(sc, ni, bf, m)) {
1249 if_inc_counter(ni->ni_vap->iv_ifp,
1250 IFCOUNTER_OERRORS, 1);
1251 if (bf != NULL) {
1252 bf->bf_m = NULL;
1253 bf->bf_node = NULL;
1254 MALO_TXQ_LOCK(txq);
1255 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1256 MALO_TXQ_UNLOCK(txq);
1257 }
1258 ieee80211_free_node(ni);
1259 continue;
1260 }
1261 nqueued++;
1262
1263 if (nqueued >= malo_txcoalesce) {
1264 /*
1265 * Poke the firmware to process queued frames;
1266 * see below about (lack of) locking.
1267 */
1268 nqueued = 0;
1269 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1270 }
1271 }
1272
1273 if (nqueued) {
1274 /*
1275 * NB: We don't need to lock against tx done because
1276 * this just prods the firmware to check the transmit
1277 * descriptors. The firmware will also start fetching
1278 * descriptors by itself if it notices new ones are
1279 * present when it goes to deliver a tx done interrupt
1280 * to the host. So if we race with tx done processing
1281 * it's ok. Delivering the kick here rather than in
1282 * malo_tx_start is an optimization to avoid poking the
1283 * firmware for each packet.
1284 *
1285 * NB: the queue id isn't used so 0 is ok.
1286 */
1287 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1288 }
1289 }
1290
1291 static void
1292 malo_watchdog(void *arg)
1293 {
1294 struct malo_softc *sc = arg;
1295
1296 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1297 if (sc->malo_timer == 0 || --sc->malo_timer > 0)
1298 return;
1299
1300 if (sc->malo_running && !sc->malo_invalid) {
1301 device_printf(sc->malo_dev, "watchdog timeout\n");
1302
1303 /* XXX no way to reset h/w. now */
1304
1305 counter_u64_add(sc->malo_ic.ic_oerrors, 1);
1306 sc->malo_stats.mst_watchdog++;
1307 }
1308 }
1309
1310 static int
1311 malo_hal_reset(struct malo_softc *sc)
1312 {
1313 static int first = 0;
1314 struct ieee80211com *ic = &sc->malo_ic;
1315 struct malo_hal *mh = sc->malo_mh;
1316
1317 if (first == 0) {
1318 /*
1319 * NB: when the device firstly is initialized, sometimes
1320 * firmware could override rx/tx dma registers so we re-set
1321 * these values once.
1322 */
1323 malo_hal_set_rxtxdma(sc);
1324 first = 1;
1325 }
1326
1327 malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna);
1328 malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna);
1329 malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE);
1330 malo_chan_set(sc, ic->ic_curchan);
1331
1332 /* XXX needs other stuffs? */
1333
1334 return 1;
1335 }
1336
1337 static __inline struct mbuf *
1338 malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf)
1339 {
1340 struct mbuf *m;
1341 bus_addr_t paddr;
1342 int error;
1343
1344 /* XXX don't need mbuf, just dma buffer */
1345 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
1346 if (m == NULL) {
1347 sc->malo_stats.mst_rx_nombuf++; /* XXX */
1348 return NULL;
1349 }
1350 error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap,
1351 mtod(m, caddr_t), MJUMPAGESIZE,
1352 malo_load_cb, &paddr, BUS_DMA_NOWAIT);
1353 if (error != 0) {
1354 device_printf(sc->malo_dev,
1355 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1356 m_freem(m);
1357 return NULL;
1358 }
1359 bf->bf_data = paddr;
1360 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1361
1362 return m;
1363 }
1364
1365 static int
1366 malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf)
1367 {
1368 struct malo_rxdesc *ds;
1369
1370 ds = bf->bf_desc;
1371 if (bf->bf_m == NULL) {
1372 bf->bf_m = malo_getrxmbuf(sc, bf);
1373 if (bf->bf_m == NULL) {
1374 /* mark descriptor to be skipped */
1375 ds->rxcontrol = MALO_RXD_CTRL_OS_OWN;
1376 /* NB: don't need PREREAD */
1377 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
1378 return ENOMEM;
1379 }
1380 }
1381
1382 /*
1383 * Setup descriptor.
1384 */
1385 ds->qosctrl = 0;
1386 ds->snr = 0;
1387 ds->status = MALO_RXD_STATUS_IDLE;
1388 ds->channel = 0;
1389 ds->pktlen = htole16(MALO_RXSIZE);
1390 ds->nf = 0;
1391 ds->physbuffdata = htole32(bf->bf_data);
1392 /* NB: don't touch pPhysNext, set once */
1393 ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN;
1394 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1395
1396 return 0;
1397 }
1398
1399 /*
1400 * Setup the rx data structures. This should only be done once or we may get
1401 * out of sync with the firmware.
1402 */
1403 static int
1404 malo_startrecv(struct malo_softc *sc)
1405 {
1406 struct malo_rxbuf *bf, *prev;
1407 struct malo_rxdesc *ds;
1408
1409 if (sc->malo_recvsetup == 1) {
1410 malo_mode_init(sc); /* set filters, etc. */
1411 return 0;
1412 }
1413
1414 prev = NULL;
1415 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
1416 int error = malo_rxbuf_init(sc, bf);
1417 if (error != 0) {
1418 DPRINTF(sc, MALO_DEBUG_RECV,
1419 "%s: malo_rxbuf_init failed %d\n",
1420 __func__, error);
1421 return error;
1422 }
1423 if (prev != NULL) {
1424 ds = prev->bf_desc;
1425 ds->physnext = htole32(bf->bf_daddr);
1426 }
1427 prev = bf;
1428 }
1429 if (prev != NULL) {
1430 ds = prev->bf_desc;
1431 ds->physnext =
1432 htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr);
1433 }
1434
1435 sc->malo_recvsetup = 1;
1436
1437 malo_mode_init(sc); /* set filters, etc. */
1438
1439 return 0;
1440 }
1441
1442 static void
1443 malo_init_locked(struct malo_softc *sc)
1444 {
1445 struct malo_hal *mh = sc->malo_mh;
1446 int error;
1447
1448 MALO_LOCK_ASSERT(sc);
1449
1450 /*
1451 * Stop anything previously setup. This is safe whether this is
1452 * the first time through or not.
1453 */
1454 malo_stop(sc);
1455
1456 /*
1457 * Push state to the firmware.
1458 */
1459 if (!malo_hal_reset(sc)) {
1460 device_printf(sc->malo_dev,
1461 "%s: unable to reset hardware\n", __func__);
1462 return;
1463 }
1464
1465 /*
1466 * Setup recv (once); transmit is already good to go.
1467 */
1468 error = malo_startrecv(sc);
1469 if (error != 0) {
1470 device_printf(sc->malo_dev,
1471 "%s: unable to start recv logic, error %d\n",
1472 __func__, error);
1473 return;
1474 }
1475
1476 /*
1477 * Enable interrupts.
1478 */
1479 sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY
1480 | MALO_A2HRIC_BIT_TX_DONE
1481 | MALO_A2HRIC_BIT_OPC_DONE
1482 | MALO_A2HRIC_BIT_MAC_EVENT
1483 | MALO_A2HRIC_BIT_RX_PROBLEM
1484 | MALO_A2HRIC_BIT_ICV_ERROR
1485 | MALO_A2HRIC_BIT_RADAR_DETECT
1486 | MALO_A2HRIC_BIT_CHAN_SWITCH;
1487
1488 sc->malo_running = 1;
1489 malo_hal_intrset(mh, sc->malo_imask);
1490 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1491 }
1492
1493 static void
1494 malo_init(void *arg)
1495 {
1496 struct malo_softc *sc = (struct malo_softc *) arg;
1497 struct ieee80211com *ic = &sc->malo_ic;
1498
1499 MALO_LOCK(sc);
1500 malo_init_locked(sc);
1501 MALO_UNLOCK(sc);
1502
1503 if (sc->malo_running)
1504 ieee80211_start_all(ic); /* start all vap's */
1505 }
1506
1507 struct malo_copy_maddr_ctx {
1508 uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX];
1509 int nmc;
1510 };
1511
1512 static u_int
1513 malo_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int nmc)
1514 {
1515 struct malo_copy_maddr_ctx *ctx = arg;
1516
1517 if (ctx->nmc == MALO_HAL_MCAST_MAX)
1518 return (0);
1519
1520 IEEE80211_ADDR_COPY(ctx->macs + (ctx->nmc * IEEE80211_ADDR_LEN),
1521 LLADDR(sdl));
1522 ctx->nmc++;
1523
1524 return (1);
1525 }
1526
1527 /*
1528 * Set the multicast filter contents into the hardware.
1529 */
1530 static void
1531 malo_setmcastfilter(struct malo_softc *sc)
1532 {
1533 struct malo_copy_maddr_ctx ctx;
1534 struct ieee80211com *ic = &sc->malo_ic;
1535 struct ieee80211vap *vap;
1536
1537
1538 if (ic->ic_opmode == IEEE80211_M_MONITOR || ic->ic_allmulti > 0 ||
1539 ic->ic_promisc > 0)
1540 goto all;
1541
1542 ctx.nmc = 0;
1543 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next)
1544 if_foreach_llmaddr(vap->iv_ifp, malo_copy_maddr, &ctx);
1545
1546 malo_hal_setmcast(sc->malo_mh, ctx.nmc, ctx.macs);
1547
1548 all:
1549 /*
1550 * XXX we don't know how to set the f/w for supporting
1551 * IFF_ALLMULTI | IFF_PROMISC cases
1552 */
1553 return;
1554 }
1555
1556 static int
1557 malo_mode_init(struct malo_softc *sc)
1558 {
1559 struct ieee80211com *ic = &sc->malo_ic;
1560 struct malo_hal *mh = sc->malo_mh;
1561
1562 malo_hal_setpromisc(mh, ic->ic_promisc > 0);
1563 malo_setmcastfilter(sc);
1564
1565 return ENXIO;
1566 }
1567
1568 static void
1569 malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq)
1570 {
1571 struct ieee80211_node *ni;
1572 struct malo_txbuf *bf;
1573 u_int ix __unused;
1574
1575 /*
1576 * NB: this assumes output has been stopped and
1577 * we do not need to block malo_tx_tasklet
1578 */
1579 for (ix = 0;; ix++) {
1580 MALO_TXQ_LOCK(txq);
1581 bf = STAILQ_FIRST(&txq->active);
1582 if (bf == NULL) {
1583 MALO_TXQ_UNLOCK(txq);
1584 break;
1585 }
1586 STAILQ_REMOVE_HEAD(&txq->active, bf_list);
1587 MALO_TXQ_UNLOCK(txq);
1588 #ifdef MALO_DEBUG
1589 if (sc->malo_debug & MALO_DEBUG_RESET) {
1590 struct ieee80211com *ic = &sc->malo_ic;
1591 const struct malo_txrec *tr =
1592 mtod(bf->bf_m, const struct malo_txrec *);
1593 malo_printtxbuf(bf, txq->qnum, ix);
1594 ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
1595 bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
1596 }
1597 #endif /* MALO_DEBUG */
1598 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1599 ni = bf->bf_node;
1600 bf->bf_node = NULL;
1601 if (ni != NULL) {
1602 /*
1603 * Reclaim node reference.
1604 */
1605 ieee80211_free_node(ni);
1606 }
1607 m_freem(bf->bf_m);
1608 bf->bf_m = NULL;
1609
1610 MALO_TXQ_LOCK(txq);
1611 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1612 txq->nfree++;
1613 MALO_TXQ_UNLOCK(txq);
1614 }
1615 }
1616
1617 static void
1618 malo_stop(struct malo_softc *sc)
1619 {
1620 struct malo_hal *mh = sc->malo_mh;
1621 int i;
1622
1623 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u running %u\n",
1624 __func__, sc->malo_invalid, sc->malo_running);
1625
1626 MALO_LOCK_ASSERT(sc);
1627
1628 if (!sc->malo_running)
1629 return;
1630
1631 /*
1632 * Shutdown the hardware and driver:
1633 * disable interrupts
1634 * turn off the radio
1635 * drain and release tx queues
1636 *
1637 * Note that some of this work is not possible if the hardware
1638 * is gone (invalid).
1639 */
1640 sc->malo_running = 0;
1641 callout_stop(&sc->malo_watchdog_timer);
1642 sc->malo_timer = 0;
1643 /* disable interrupt. */
1644 malo_hal_intrset(mh, 0);
1645 /* turn off the radio. */
1646 malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE);
1647
1648 /* drain and release tx queues. */
1649 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
1650 malo_tx_draintxq(sc, &sc->malo_txq[i]);
1651 }
1652
1653 static void
1654 malo_parent(struct ieee80211com *ic)
1655 {
1656 struct malo_softc *sc = ic->ic_softc;
1657 int startall = 0;
1658
1659 MALO_LOCK(sc);
1660 if (ic->ic_nrunning > 0) {
1661 /*
1662 * Beware of being called during attach/detach
1663 * to reset promiscuous mode. In that case we
1664 * will still be marked UP but not RUNNING.
1665 * However trying to re-init the interface
1666 * is the wrong thing to do as we've already
1667 * torn down much of our state. There's
1668 * probably a better way to deal with this.
1669 */
1670 if (!sc->malo_running && !sc->malo_invalid) {
1671 malo_init(sc);
1672 startall = 1;
1673 }
1674 /*
1675 * To avoid rescanning another access point,
1676 * do not call malo_init() here. Instead,
1677 * only reflect promisc mode settings.
1678 */
1679 malo_mode_init(sc);
1680 } else if (sc->malo_running)
1681 malo_stop(sc);
1682 MALO_UNLOCK(sc);
1683 if (startall)
1684 ieee80211_start_all(ic);
1685 }
1686
1687 /*
1688 * Callback from the 802.11 layer to update the slot time
1689 * based on the current setting. We use it to notify the
1690 * firmware of ERP changes and the f/w takes care of things
1691 * like slot time and preamble.
1692 */
1693 static void
1694 malo_updateslot(struct ieee80211com *ic)
1695 {
1696 struct malo_softc *sc = ic->ic_softc;
1697 struct malo_hal *mh = sc->malo_mh;
1698 int error;
1699
1700 /* NB: can be called early; suppress needless cmds */
1701 if (!sc->malo_running)
1702 return;
1703
1704 DPRINTF(sc, MALO_DEBUG_RESET,
1705 "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n",
1706 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1707 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags);
1708
1709 if (ic->ic_flags & IEEE80211_F_SHSLOT)
1710 error = malo_hal_set_slot(mh, 1);
1711 else
1712 error = malo_hal_set_slot(mh, 0);
1713
1714 if (error != 0)
1715 device_printf(sc->malo_dev, "setting %s slot failed\n",
1716 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long");
1717 }
1718
1719 static int
1720 malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1721 {
1722 struct ieee80211com *ic = vap->iv_ic;
1723 struct malo_softc *sc = ic->ic_softc;
1724 struct malo_hal *mh = sc->malo_mh;
1725 int error;
1726
1727 DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1728 ieee80211_state_name[vap->iv_state],
1729 ieee80211_state_name[nstate]);
1730
1731 /*
1732 * Invoke the net80211 layer first so iv_bss is setup.
1733 */
1734 error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg);
1735 if (error != 0)
1736 return error;
1737
1738 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1739 struct ieee80211_node *ni = vap->iv_bss;
1740 enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan);
1741 const struct ieee80211_txparam *tp = &vap->iv_txparms[mode];
1742
1743 DPRINTF(sc, MALO_DEBUG_STATE,
1744 "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
1745 "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n",
1746 if_name(vap->iv_ifp), __func__, vap->iv_flags,
1747 ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
1748 ieee80211_chan2ieee(ic, ic->ic_curchan),
1749 ni->ni_associd, mode, tp->ucastrate);
1750
1751 malo_hal_setradio(mh, 1,
1752 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ?
1753 MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE);
1754 malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd);
1755 malo_hal_set_rate(mh, mode,
1756 tp->ucastrate == IEEE80211_FIXED_RATE_NONE ?
1757 0 : malo_fix2rate(tp->ucastrate));
1758 }
1759 return 0;
1760 }
1761
1762 static int
1763 malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1764 const struct ieee80211_bpf_params *params)
1765 {
1766 struct ieee80211com *ic = ni->ni_ic;
1767 struct malo_softc *sc = ic->ic_softc;
1768 struct malo_txbuf *bf;
1769 struct malo_txq *txq;
1770
1771 if (!sc->malo_running || sc->malo_invalid) {
1772 m_freem(m);
1773 return ENETDOWN;
1774 }
1775
1776 /*
1777 * Grab a TX buffer and associated resources. Note that we depend
1778 * on the classification by the 802.11 layer to get to the right h/w
1779 * queue. Management frames must ALWAYS go on queue 1 but we
1780 * cannot just force that here because we may receive non-mgt frames.
1781 */
1782 txq = &sc->malo_txq[0];
1783 bf = malo_getbuf(sc, txq);
1784 if (bf == NULL) {
1785 m_freem(m);
1786 return ENOBUFS;
1787 }
1788
1789 /*
1790 * Pass the frame to the h/w for transmission.
1791 */
1792 if (malo_tx_start(sc, ni, bf, m) != 0) {
1793 bf->bf_m = NULL;
1794 bf->bf_node = NULL;
1795 MALO_TXQ_LOCK(txq);
1796 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1797 txq->nfree++;
1798 MALO_TXQ_UNLOCK(txq);
1799
1800 return EIO; /* XXX */
1801 }
1802
1803 /*
1804 * NB: We don't need to lock against tx done because this just
1805 * prods the firmware to check the transmit descriptors. The firmware
1806 * will also start fetching descriptors by itself if it notices
1807 * new ones are present when it goes to deliver a tx done interrupt
1808 * to the host. So if we race with tx done processing it's ok.
1809 * Delivering the kick here rather than in malo_tx_start is
1810 * an optimization to avoid poking the firmware for each packet.
1811 *
1812 * NB: the queue id isn't used so 0 is ok.
1813 */
1814 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1815
1816 return 0;
1817 }
1818
1819 static void
1820 malo_sysctlattach(struct malo_softc *sc)
1821 {
1822 #ifdef MALO_DEBUG
1823 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev);
1824 struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev);
1825
1826 sc->malo_debug = malo_debug;
1827 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1828 "debug", CTLFLAG_RW, &sc->malo_debug, 0,
1829 "control debugging printfs");
1830 #endif
1831 }
1832
1833 static void
1834 malo_announce(struct malo_softc *sc)
1835 {
1836
1837 device_printf(sc->malo_dev,
1838 "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n",
1839 sc->malo_hwspecs.hwversion,
1840 (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff,
1841 (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff,
1842 (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff,
1843 (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff,
1844 sc->malo_hwspecs.regioncode);
1845
1846 if (bootverbose || malo_rxbuf != MALO_RXBUF)
1847 device_printf(sc->malo_dev,
1848 "using %u rx buffers\n", malo_rxbuf);
1849 if (bootverbose || malo_txbuf != MALO_TXBUF)
1850 device_printf(sc->malo_dev,
1851 "using %u tx buffers\n", malo_txbuf);
1852 }
1853
1854 /*
1855 * Convert net80211 channel to a HAL channel.
1856 */
1857 static void
1858 malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan)
1859 {
1860 hc->channel = chan->ic_ieee;
1861
1862 *(uint32_t *)&hc->flags = 0;
1863 if (IEEE80211_IS_CHAN_2GHZ(chan))
1864 hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ;
1865 }
1866
1867 /*
1868 * Set/change channels. If the channel is really being changed,
1869 * it's done by reseting the chip. To accomplish this we must
1870 * first cleanup any pending DMA, then restart stuff after a la
1871 * malo_init.
1872 */
1873 static int
1874 malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan)
1875 {
1876 struct malo_hal *mh = sc->malo_mh;
1877 struct malo_hal_channel hchan;
1878
1879 DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
1880 __func__, chan->ic_freq, chan->ic_flags);
1881
1882 /*
1883 * Convert to a HAL channel description with the flags constrained
1884 * to reflect the current operating mode.
1885 */
1886 malo_mapchan(&hchan, chan);
1887 malo_hal_intrset(mh, 0); /* disable interrupts */
1888 malo_hal_setchannel(mh, &hchan);
1889 malo_hal_settxpower(mh, &hchan);
1890
1891 /*
1892 * Update internal state.
1893 */
1894 sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq);
1895 sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq);
1896 if (IEEE80211_IS_CHAN_ANYG(chan)) {
1897 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
1898 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
1899 } else {
1900 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
1901 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
1902 }
1903 sc->malo_curchan = hchan;
1904 malo_hal_intrset(mh, sc->malo_imask);
1905
1906 return 0;
1907 }
1908
1909 static void
1910 malo_scan_start(struct ieee80211com *ic)
1911 {
1912 struct malo_softc *sc = ic->ic_softc;
1913
1914 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
1915 }
1916
1917 static void
1918 malo_scan_end(struct ieee80211com *ic)
1919 {
1920 struct malo_softc *sc = ic->ic_softc;
1921
1922 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
1923 }
1924
1925 static void
1926 malo_set_channel(struct ieee80211com *ic)
1927 {
1928 struct malo_softc *sc = ic->ic_softc;
1929
1930 (void) malo_chan_set(sc, ic->ic_curchan);
1931 }
1932
1933 static void
1934 malo_rx_proc(void *arg, int npending)
1935 {
1936 struct epoch_tracker et;
1937 struct malo_softc *sc = arg;
1938 struct ieee80211com *ic = &sc->malo_ic;
1939 struct malo_rxbuf *bf;
1940 struct malo_rxdesc *ds;
1941 struct mbuf *m, *mnew;
1942 struct ieee80211_qosframe *wh;
1943 struct ieee80211_node *ni;
1944 int off, len, hdrlen, pktlen, rssi, ntodo;
1945 uint8_t *data, status;
1946 uint32_t readptr, writeptr;
1947
1948 DPRINTF(sc, MALO_DEBUG_RX_PROC,
1949 "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n",
1950 __func__, npending,
1951 sc->malo_hwspecs.rxdesc_read,
1952 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read),
1953 sc->malo_hwspecs.rxdesc_write,
1954 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write));
1955
1956 readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read);
1957 writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write);
1958 if (readptr == writeptr)
1959 return;
1960
1961 bf = sc->malo_rxnext;
1962 for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) {
1963 if (bf == NULL) {
1964 bf = STAILQ_FIRST(&sc->malo_rxbuf);
1965 break;
1966 }
1967 ds = bf->bf_desc;
1968 if (bf->bf_m == NULL) {
1969 /*
1970 * If data allocation failed previously there
1971 * will be no buffer; try again to re-populate it.
1972 * Note the firmware will not advance to the next
1973 * descriptor with a dma buffer so we must mimic
1974 * this or we'll get out of sync.
1975 */
1976 DPRINTF(sc, MALO_DEBUG_ANY,
1977 "%s: rx buf w/o dma memory\n", __func__);
1978 (void)malo_rxbuf_init(sc, bf);
1979 break;
1980 }
1981 MALO_RXDESC_SYNC(sc, ds,
1982 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1983 if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN)
1984 break;
1985
1986 readptr = le32toh(ds->physnext);
1987
1988 #ifdef MALO_DEBUG
1989 if (sc->malo_debug & MALO_DEBUG_RECV_DESC)
1990 malo_printrxbuf(bf, 0);
1991 #endif
1992 status = ds->status;
1993 if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) {
1994 counter_u64_add(ic->ic_ierrors, 1);
1995 goto rx_next;
1996 }
1997 /*
1998 * Sync the data buffer.
1999 */
2000 len = le16toh(ds->pktlen);
2001 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
2002 BUS_DMASYNC_POSTREAD);
2003 /*
2004 * The 802.11 header is provided all or in part at the front;
2005 * use it to calculate the true size of the header that we'll
2006 * construct below. We use this to figure out where to copy
2007 * payload prior to constructing the header.
2008 */
2009 m = bf->bf_m;
2010 data = mtod(m, uint8_t *);
2011 hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t));
2012 off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2013
2014 /*
2015 * Calculate RSSI. XXX wrong
2016 */
2017 rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */
2018 if (rssi > 100)
2019 rssi = 100;
2020
2021 pktlen = hdrlen + (len - off);
2022 /*
2023 * NB: we know our frame is at least as large as
2024 * IEEE80211_MIN_LEN because there is a 4-address frame at
2025 * the front. Hence there's no need to vet the packet length.
2026 * If the frame in fact is too small it should be discarded
2027 * at the net80211 layer.
2028 */
2029
2030 /* XXX don't need mbuf, just dma buffer */
2031 mnew = malo_getrxmbuf(sc, bf);
2032 if (mnew == NULL) {
2033 counter_u64_add(ic->ic_ierrors, 1);
2034 goto rx_next;
2035 }
2036 /*
2037 * Attach the dma buffer to the mbuf; malo_rxbuf_init will
2038 * re-setup the rx descriptor using the replacement dma
2039 * buffer we just installed above.
2040 */
2041 bf->bf_m = mnew;
2042 m->m_data += off - hdrlen;
2043 m->m_pkthdr.len = m->m_len = pktlen;
2044
2045 /*
2046 * Piece 802.11 header together.
2047 */
2048 wh = mtod(m, struct ieee80211_qosframe *);
2049 /* NB: don't need to do this sometimes but ... */
2050 /* XXX special case so we can memcpy after m_devget? */
2051 ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2052 if (IEEE80211_QOS_HAS_SEQ(wh))
2053 *(uint16_t *)ieee80211_getqos(wh) = ds->qosctrl;
2054 if (ieee80211_radiotap_active(ic)) {
2055 sc->malo_rx_th.wr_flags = 0;
2056 sc->malo_rx_th.wr_rate = ds->rate;
2057 sc->malo_rx_th.wr_antsignal = rssi;
2058 sc->malo_rx_th.wr_antnoise = ds->nf;
2059 }
2060 #ifdef MALO_DEBUG
2061 if (IFF_DUMPPKTS_RECV(sc, wh)) {
2062 ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2063 len, ds->rate, rssi);
2064 }
2065 #endif
2066 /* dispatch */
2067 ni = ieee80211_find_rxnode(ic,
2068 (struct ieee80211_frame_min *)wh);
2069 NET_EPOCH_ENTER(et);
2070 if (ni != NULL) {
2071 (void) ieee80211_input(ni, m, rssi, ds->nf);
2072 ieee80211_free_node(ni);
2073 } else
2074 (void) ieee80211_input_all(ic, m, rssi, ds->nf);
2075 NET_EPOCH_EXIT(et);
2076 rx_next:
2077 /* NB: ignore ENOMEM so we process more descriptors */
2078 (void) malo_rxbuf_init(sc, bf);
2079 bf = STAILQ_NEXT(bf, bf_list);
2080 }
2081
2082 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr);
2083 sc->malo_rxnext = bf;
2084
2085 if (mbufq_first(&sc->malo_snd) != NULL)
2086 malo_start(sc);
2087 }
2088
2089 /*
2090 * Reclaim all tx queue resources.
2091 */
2092 static void
2093 malo_tx_cleanup(struct malo_softc *sc)
2094 {
2095 int i;
2096
2097 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
2098 malo_tx_cleanupq(sc, &sc->malo_txq[i]);
2099 }
2100
2101 int
2102 malo_detach(struct malo_softc *sc)
2103 {
2104 struct ieee80211com *ic = &sc->malo_ic;
2105
2106 malo_stop(sc);
2107
2108 if (sc->malo_tq != NULL) {
2109 taskqueue_drain(sc->malo_tq, &sc->malo_rxtask);
2110 taskqueue_drain(sc->malo_tq, &sc->malo_txtask);
2111 taskqueue_free(sc->malo_tq);
2112 sc->malo_tq = NULL;
2113 }
2114
2115 /*
2116 * NB: the order of these is important:
2117 * o call the 802.11 layer before detaching the hal to
2118 * insure callbacks into the driver to delete global
2119 * key cache entries can be handled
2120 * o reclaim the tx queue data structures after calling
2121 * the 802.11 layer as we'll get called back to reclaim
2122 * node state and potentially want to use them
2123 * o to cleanup the tx queues the hal is called, so detach
2124 * it last
2125 * Other than that, it's straightforward...
2126 */
2127 ieee80211_ifdetach(ic);
2128 callout_drain(&sc->malo_watchdog_timer);
2129 malo_dma_cleanup(sc);
2130 malo_tx_cleanup(sc);
2131 malo_hal_detach(sc->malo_mh);
2132 mbufq_drain(&sc->malo_snd);
2133 MALO_LOCK_DESTROY(sc);
2134
2135 return 0;
2136 }
2137
2138 void
2139 malo_shutdown(struct malo_softc *sc)
2140 {
2141
2142 malo_stop(sc);
2143 }
2144
2145 void
2146 malo_suspend(struct malo_softc *sc)
2147 {
2148
2149 malo_stop(sc);
2150 }
2151
2152 void
2153 malo_resume(struct malo_softc *sc)
2154 {
2155
2156 if (sc->malo_ic.ic_nrunning > 0)
2157 malo_init(sc);
2158 }
Cache object: fed41d29f1be1933b219cf166a28c42c
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