FreeBSD/Linux Kernel Cross Reference
sys/dev/malo/if_malo.c
1 /*-
2 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
3 * Copyright (c) 2007 Marvell Semiconductor, Inc.
4 * Copyright (c) 2007 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 * redistribution must be conditioned upon including a substantially
16 * similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 */
31
32 #include <sys/cdefs.h>
33 #ifdef __FreeBSD__
34 __FBSDID("$FreeBSD: releng/10.4/sys/dev/malo/if_malo.c 278808 2015-02-15 20:02:29Z marius $");
35 #endif
36
37 #include "opt_malo.h"
38
39 #include <sys/param.h>
40 #include <sys/endian.h>
41 #include <sys/kernel.h>
42 #include <sys/socket.h>
43 #include <sys/sockio.h>
44 #include <sys/sysctl.h>
45 #include <sys/taskqueue.h>
46
47 #include <machine/bus.h>
48 #include <sys/bus.h>
49
50 #include <net/if.h>
51 #include <net/if_dl.h>
52 #include <net/if_media.h>
53 #include <net/if_types.h>
54 #include <net/ethernet.h>
55
56 #include <net80211/ieee80211_var.h>
57 #include <net80211/ieee80211_regdomain.h>
58
59 #include <net/bpf.h>
60
61 #include <dev/malo/if_malo.h>
62
63 SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0,
64 "Marvell 88w8335 driver parameters");
65
66 static int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/
67 SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce,
68 0, "tx buffers to send at once");
69 TUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce);
70 static int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */
71 SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf,
72 0, "rx buffers allocated");
73 TUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf);
74 static int malo_rxquota = MALO_RXBUF; /* # max buffers to process */
75 SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota,
76 0, "max rx buffers to process per interrupt");
77 TUNABLE_INT("hw.malo.rxquota", &malo_rxquota);
78 static int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */
79 SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf,
80 0, "tx buffers allocated");
81 TUNABLE_INT("hw.malo.txbuf", &malo_txbuf);
82
83 #ifdef MALO_DEBUG
84 static int malo_debug = 0;
85 SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug,
86 0, "control debugging printfs");
87 TUNABLE_INT("hw.malo.debug", &malo_debug);
88 enum {
89 MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
90 MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */
91 MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */
92 MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */
93 MALO_DEBUG_RESET = 0x00000010, /* reset processing */
94 MALO_DEBUG_INTR = 0x00000040, /* ISR */
95 MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */
96 MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */
97 MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */
98 MALO_DEBUG_NODE = 0x00000800, /* node management */
99 MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */
100 MALO_DEBUG_FW = 0x00008000, /* firmware */
101 MALO_DEBUG_ANY = 0xffffffff
102 };
103 #define IS_BEACON(wh) \
104 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \
105 IEEE80211_FC0_SUBTYPE_MASK)) == \
106 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
107 #define IFF_DUMPPKTS_RECV(sc, wh) \
108 (((sc->malo_debug & MALO_DEBUG_RECV) && \
109 ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \
110 (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == \
111 (IFF_DEBUG|IFF_LINK2))
112 #define IFF_DUMPPKTS_XMIT(sc) \
113 ((sc->malo_debug & MALO_DEBUG_XMIT) || \
114 (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) == \
115 (IFF_DEBUG | IFF_LINK2))
116 #define DPRINTF(sc, m, fmt, ...) do { \
117 if (sc->malo_debug & (m)) \
118 printf(fmt, __VA_ARGS__); \
119 } while (0)
120 #else
121 #define DPRINTF(sc, m, fmt, ...) do { \
122 (void) sc; \
123 } while (0)
124 #endif
125
126 static MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers");
127
128 static struct ieee80211vap *malo_vap_create(struct ieee80211com *,
129 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
130 const uint8_t [IEEE80211_ADDR_LEN],
131 const uint8_t [IEEE80211_ADDR_LEN]);
132 static void malo_vap_delete(struct ieee80211vap *);
133 static int malo_dma_setup(struct malo_softc *);
134 static int malo_setup_hwdma(struct malo_softc *);
135 static void malo_txq_init(struct malo_softc *, struct malo_txq *, int);
136 static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *);
137 static void malo_start(struct ifnet *);
138 static void malo_watchdog(void *);
139 static int malo_ioctl(struct ifnet *, u_long, caddr_t);
140 static void malo_updateslot(struct ifnet *);
141 static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int);
142 static void malo_scan_start(struct ieee80211com *);
143 static void malo_scan_end(struct ieee80211com *);
144 static void malo_set_channel(struct ieee80211com *);
145 static int malo_raw_xmit(struct ieee80211_node *, struct mbuf *,
146 const struct ieee80211_bpf_params *);
147 static void malo_sysctlattach(struct malo_softc *);
148 static void malo_announce(struct malo_softc *);
149 static void malo_dma_cleanup(struct malo_softc *);
150 static void malo_stop_locked(struct ifnet *, int);
151 static int malo_chan_set(struct malo_softc *, struct ieee80211_channel *);
152 static int malo_mode_init(struct malo_softc *);
153 static void malo_tx_proc(void *, int);
154 static void malo_rx_proc(void *, int);
155 static void malo_init(void *);
156
157 /*
158 * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1
159 * operations are done in the "hal" except getting H/W MAC address at
160 * malo_attach and there should be no reference to them here.
161 */
162 static uint32_t
163 malo_bar0_read4(struct malo_softc *sc, bus_size_t off)
164 {
165 return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off);
166 }
167
168 static void
169 malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val)
170 {
171 DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n",
172 __func__, (uintmax_t)off, val);
173
174 bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val);
175 }
176
177 int
178 malo_attach(uint16_t devid, struct malo_softc *sc)
179 {
180 int error;
181 struct ieee80211com *ic;
182 struct ifnet *ifp;
183 struct malo_hal *mh;
184 uint8_t bands;
185
186 ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211);
187 if (ifp == NULL) {
188 device_printf(sc->malo_dev, "can not if_alloc()\n");
189 return ENOSPC;
190 }
191 ic = ifp->if_l2com;
192
193 MALO_LOCK_INIT(sc);
194 callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0);
195
196 /* set these up early for if_printf use */
197 if_initname(ifp, device_get_name(sc->malo_dev),
198 device_get_unit(sc->malo_dev));
199
200 mh = malo_hal_attach(sc->malo_dev, devid,
201 sc->malo_io1h, sc->malo_io1t, sc->malo_dmat);
202 if (mh == NULL) {
203 if_printf(ifp, "unable to attach HAL\n");
204 error = EIO;
205 goto bad;
206 }
207 sc->malo_mh = mh;
208
209 /*
210 * Load firmware so we can get setup. We arbitrarily pick station
211 * firmware; we'll re-load firmware as needed so setting up
212 * the wrong mode isn't a big deal.
213 */
214 error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m");
215 if (error != 0) {
216 if_printf(ifp, "unable to setup firmware\n");
217 goto bad1;
218 }
219 /* XXX gethwspecs() extracts correct informations? not maybe! */
220 error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs);
221 if (error != 0) {
222 if_printf(ifp, "unable to fetch h/w specs\n");
223 goto bad1;
224 }
225
226 DPRINTF(sc, MALO_DEBUG_FW,
227 "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x"
228 "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x"
229 "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x"
230 "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x"
231 "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x",
232 sc->malo_hwspecs.hwversion,
233 sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb,
234 sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb,
235 sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna,
236 sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0,
237 sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write,
238 sc->malo_hwspecs.ul_fw_awakecookie,
239 sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1],
240 sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]);
241
242 /* NB: firmware looks that it does not export regdomain info API. */
243 bands = 0;
244 setbit(&bands, IEEE80211_MODE_11B);
245 setbit(&bands, IEEE80211_MODE_11G);
246 ieee80211_init_channels(ic, NULL, &bands);
247
248 sc->malo_txantenna = 0x2; /* h/w default */
249 sc->malo_rxantenna = 0xffff; /* h/w default */
250
251 /*
252 * Allocate tx + rx descriptors and populate the lists.
253 * We immediately push the information to the firmware
254 * as otherwise it gets upset.
255 */
256 error = malo_dma_setup(sc);
257 if (error != 0) {
258 if_printf(ifp, "failed to setup descriptors: %d\n", error);
259 goto bad1;
260 }
261 error = malo_setup_hwdma(sc); /* push to firmware */
262 if (error != 0) /* NB: malo_setupdma prints msg */
263 goto bad2;
264
265 sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT,
266 taskqueue_thread_enqueue, &sc->malo_tq);
267 taskqueue_start_threads(&sc->malo_tq, 1, PI_NET,
268 "%s taskq", ifp->if_xname);
269
270 TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc);
271 TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc);
272
273 ifp->if_softc = sc;
274 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
275 ifp->if_start = malo_start;
276 ifp->if_ioctl = malo_ioctl;
277 ifp->if_init = malo_init;
278 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
279 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
280 IFQ_SET_READY(&ifp->if_snd);
281
282 ic->ic_ifp = ifp;
283 /* XXX not right but it's not used anywhere important */
284 ic->ic_phytype = IEEE80211_T_OFDM;
285 ic->ic_opmode = IEEE80211_M_STA;
286 ic->ic_caps =
287 IEEE80211_C_STA /* station mode supported */
288 | IEEE80211_C_BGSCAN /* capable of bg scanning */
289 | IEEE80211_C_MONITOR /* monitor mode */
290 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
291 | IEEE80211_C_SHSLOT /* short slot time supported */
292 | IEEE80211_C_TXPMGT /* capable of txpow mgt */
293 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
294 ;
295
296 /*
297 * Transmit requires space in the packet for a special format transmit
298 * record and optional padding between this record and the payload.
299 * Ask the net80211 layer to arrange this when encapsulating
300 * packets so we can add it efficiently.
301 */
302 ic->ic_headroom = sizeof(struct malo_txrec) -
303 sizeof(struct ieee80211_frame);
304
305 /* call MI attach routine. */
306 ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr);
307 /* override default methods */
308 ic->ic_vap_create = malo_vap_create;
309 ic->ic_vap_delete = malo_vap_delete;
310 ic->ic_raw_xmit = malo_raw_xmit;
311 ic->ic_updateslot = malo_updateslot;
312
313 ic->ic_scan_start = malo_scan_start;
314 ic->ic_scan_end = malo_scan_end;
315 ic->ic_set_channel = malo_set_channel;
316
317 sc->malo_invalid = 0; /* ready to go, enable int handling */
318
319 ieee80211_radiotap_attach(ic,
320 &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th),
321 MALO_TX_RADIOTAP_PRESENT,
322 &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th),
323 MALO_RX_RADIOTAP_PRESENT);
324
325 /*
326 * Setup dynamic sysctl's.
327 */
328 malo_sysctlattach(sc);
329
330 if (bootverbose)
331 ieee80211_announce(ic);
332 malo_announce(sc);
333
334 return 0;
335 bad2:
336 malo_dma_cleanup(sc);
337 bad1:
338 malo_hal_detach(mh);
339 bad:
340 if_free(ifp);
341 sc->malo_invalid = 1;
342
343 return error;
344 }
345
346 static struct ieee80211vap *
347 malo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
348 enum ieee80211_opmode opmode, int flags,
349 const uint8_t bssid[IEEE80211_ADDR_LEN],
350 const uint8_t mac[IEEE80211_ADDR_LEN])
351 {
352 struct ifnet *ifp = ic->ic_ifp;
353 struct malo_vap *mvp;
354 struct ieee80211vap *vap;
355
356 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
357 if_printf(ifp, "multiple vaps not supported\n");
358 return NULL;
359 }
360 switch (opmode) {
361 case IEEE80211_M_STA:
362 if (opmode == IEEE80211_M_STA)
363 flags |= IEEE80211_CLONE_NOBEACONS;
364 /* fall thru... */
365 case IEEE80211_M_MONITOR:
366 break;
367 default:
368 if_printf(ifp, "%s mode not supported\n",
369 ieee80211_opmode_name[opmode]);
370 return NULL; /* unsupported */
371 }
372 mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap),
373 M_80211_VAP, M_NOWAIT | M_ZERO);
374 if (mvp == NULL) {
375 if_printf(ifp, "cannot allocate vap state block\n");
376 return NULL;
377 }
378 vap = &mvp->malo_vap;
379 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
380
381 /* override state transition machine */
382 mvp->malo_newstate = vap->iv_newstate;
383 vap->iv_newstate = malo_newstate;
384
385 /* complete setup */
386 ieee80211_vap_attach(vap,
387 ieee80211_media_change, ieee80211_media_status);
388 ic->ic_opmode = opmode;
389 return vap;
390 }
391
392 static void
393 malo_vap_delete(struct ieee80211vap *vap)
394 {
395 struct malo_vap *mvp = MALO_VAP(vap);
396
397 ieee80211_vap_detach(vap);
398 free(mvp, M_80211_VAP);
399 }
400
401 int
402 malo_intr(void *arg)
403 {
404 struct malo_softc *sc = arg;
405 struct malo_hal *mh = sc->malo_mh;
406 uint32_t status;
407
408 if (sc->malo_invalid) {
409 /*
410 * The hardware is not ready/present, don't touch anything.
411 * Note this can happen early on if the IRQ is shared.
412 */
413 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
414 return (FILTER_STRAY);
415 }
416
417 /*
418 * Figure out the reason(s) for the interrupt.
419 */
420 malo_hal_getisr(mh, &status); /* NB: clears ISR too */
421 if (status == 0) /* must be a shared irq */
422 return (FILTER_STRAY);
423
424 DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
425 __func__, status, sc->malo_imask);
426
427 if (status & MALO_A2HRIC_BIT_RX_RDY)
428 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask);
429 if (status & MALO_A2HRIC_BIT_TX_DONE)
430 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask);
431 if (status & MALO_A2HRIC_BIT_OPC_DONE)
432 malo_hal_cmddone(mh);
433 if (status & MALO_A2HRIC_BIT_MAC_EVENT)
434 ;
435 if (status & MALO_A2HRIC_BIT_RX_PROBLEM)
436 ;
437 if (status & MALO_A2HRIC_BIT_ICV_ERROR) {
438 /* TKIP ICV error */
439 sc->malo_stats.mst_rx_badtkipicv++;
440 }
441 #ifdef MALO_DEBUG
442 if (((status | sc->malo_imask) ^ sc->malo_imask) != 0)
443 DPRINTF(sc, MALO_DEBUG_INTR,
444 "%s: can't handle interrupt status 0x%x\n",
445 __func__, status);
446 #endif
447 return (FILTER_HANDLED);
448 }
449
450 static void
451 malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
452 {
453 bus_addr_t *paddr = (bus_addr_t*) arg;
454
455 KASSERT(error == 0, ("error %u on bus_dma callback", error));
456
457 *paddr = segs->ds_addr;
458 }
459
460 static int
461 malo_desc_setup(struct malo_softc *sc, const char *name,
462 struct malo_descdma *dd,
463 int nbuf, size_t bufsize, int ndesc, size_t descsize)
464 {
465 int error;
466 struct ifnet *ifp = sc->malo_ifp;
467 uint8_t *ds;
468
469 DPRINTF(sc, MALO_DEBUG_RESET,
470 "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
471 __func__, name, nbuf, (uintmax_t) bufsize,
472 ndesc, (uintmax_t) descsize);
473
474 dd->dd_name = name;
475 dd->dd_desc_len = nbuf * ndesc * descsize;
476
477 /*
478 * Setup DMA descriptor area.
479 */
480 error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */
481 PAGE_SIZE, 0, /* alignment, bounds */
482 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
483 BUS_SPACE_MAXADDR, /* highaddr */
484 NULL, NULL, /* filter, filterarg */
485 dd->dd_desc_len, /* maxsize */
486 1, /* nsegments */
487 dd->dd_desc_len, /* maxsegsize */
488 BUS_DMA_ALLOCNOW, /* flags */
489 NULL, /* lockfunc */
490 NULL, /* lockarg */
491 &dd->dd_dmat);
492 if (error != 0) {
493 if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name);
494 return error;
495 }
496
497 /* allocate descriptors */
498 error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap);
499 if (error != 0) {
500 if_printf(ifp, "unable to create dmamap for %s descriptors, "
501 "error %u\n", dd->dd_name, error);
502 goto fail0;
503 }
504
505 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
506 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap);
507 if (error != 0) {
508 if_printf(ifp, "unable to alloc memory for %u %s descriptors, "
509 "error %u\n", nbuf * ndesc, dd->dd_name, error);
510 goto fail1;
511 }
512
513 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
514 dd->dd_desc, dd->dd_desc_len,
515 malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT);
516 if (error != 0) {
517 if_printf(ifp, "unable to map %s descriptors, error %u\n",
518 dd->dd_name, error);
519 goto fail2;
520 }
521
522 ds = dd->dd_desc;
523 memset(ds, 0, dd->dd_desc_len);
524 DPRINTF(sc, MALO_DEBUG_RESET,
525 "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n",
526 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
527 (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
528
529 return 0;
530 fail2:
531 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
532 fail1:
533 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
534 fail0:
535 bus_dma_tag_destroy(dd->dd_dmat);
536 memset(dd, 0, sizeof(*dd));
537 return error;
538 }
539
540 #define DS2PHYS(_dd, _ds) \
541 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
542
543 static int
544 malo_rxdma_setup(struct malo_softc *sc)
545 {
546 struct ifnet *ifp = sc->malo_ifp;
547 int error, bsize, i;
548 struct malo_rxbuf *bf;
549 struct malo_rxdesc *ds;
550
551 error = malo_desc_setup(sc, "rx", &sc->malo_rxdma,
552 malo_rxbuf, sizeof(struct malo_rxbuf),
553 1, sizeof(struct malo_rxdesc));
554 if (error != 0)
555 return error;
556
557 /*
558 * Allocate rx buffers and set them up.
559 */
560 bsize = malo_rxbuf * sizeof(struct malo_rxbuf);
561 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
562 if (bf == NULL) {
563 if_printf(ifp, "malloc of %u rx buffers failed\n", bsize);
564 return error;
565 }
566 sc->malo_rxdma.dd_bufptr = bf;
567
568 STAILQ_INIT(&sc->malo_rxbuf);
569 ds = sc->malo_rxdma.dd_desc;
570 for (i = 0; i < malo_rxbuf; i++, bf++, ds++) {
571 bf->bf_desc = ds;
572 bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds);
573 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
574 &bf->bf_dmamap);
575 if (error != 0) {
576 if_printf(ifp, "%s: unable to dmamap for rx buffer, "
577 "error %d\n", __func__, error);
578 return error;
579 }
580 /* NB: tail is intentional to preserve descriptor order */
581 STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list);
582 }
583 return 0;
584 }
585
586 static int
587 malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq)
588 {
589 struct ifnet *ifp = sc->malo_ifp;
590 int error, bsize, i;
591 struct malo_txbuf *bf;
592 struct malo_txdesc *ds;
593
594 error = malo_desc_setup(sc, "tx", &txq->dma,
595 malo_txbuf, sizeof(struct malo_txbuf),
596 MALO_TXDESC, sizeof(struct malo_txdesc));
597 if (error != 0)
598 return error;
599
600 /* allocate and setup tx buffers */
601 bsize = malo_txbuf * sizeof(struct malo_txbuf);
602 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
603 if (bf == NULL) {
604 if_printf(ifp, "malloc of %u tx buffers failed\n",
605 malo_txbuf);
606 return ENOMEM;
607 }
608 txq->dma.dd_bufptr = bf;
609
610 STAILQ_INIT(&txq->free);
611 txq->nfree = 0;
612 ds = txq->dma.dd_desc;
613 for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) {
614 bf->bf_desc = ds;
615 bf->bf_daddr = DS2PHYS(&txq->dma, ds);
616 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
617 &bf->bf_dmamap);
618 if (error != 0) {
619 if_printf(ifp, "unable to create dmamap for tx "
620 "buffer %u, error %u\n", i, error);
621 return error;
622 }
623 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
624 txq->nfree++;
625 }
626
627 return 0;
628 }
629
630 static void
631 malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd)
632 {
633 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
634 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
635 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
636 bus_dma_tag_destroy(dd->dd_dmat);
637
638 memset(dd, 0, sizeof(*dd));
639 }
640
641 static void
642 malo_rxdma_cleanup(struct malo_softc *sc)
643 {
644 struct malo_rxbuf *bf;
645
646 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
647 if (bf->bf_m != NULL) {
648 m_freem(bf->bf_m);
649 bf->bf_m = NULL;
650 }
651 if (bf->bf_dmamap != NULL) {
652 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
653 bf->bf_dmamap = NULL;
654 }
655 }
656 STAILQ_INIT(&sc->malo_rxbuf);
657 if (sc->malo_rxdma.dd_bufptr != NULL) {
658 free(sc->malo_rxdma.dd_bufptr, M_MALODEV);
659 sc->malo_rxdma.dd_bufptr = NULL;
660 }
661 if (sc->malo_rxdma.dd_desc_len != 0)
662 malo_desc_cleanup(sc, &sc->malo_rxdma);
663 }
664
665 static void
666 malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq)
667 {
668 struct malo_txbuf *bf;
669 struct ieee80211_node *ni;
670
671 STAILQ_FOREACH(bf, &txq->free, bf_list) {
672 if (bf->bf_m != NULL) {
673 m_freem(bf->bf_m);
674 bf->bf_m = NULL;
675 }
676 ni = bf->bf_node;
677 bf->bf_node = NULL;
678 if (ni != NULL) {
679 /*
680 * Reclaim node reference.
681 */
682 ieee80211_free_node(ni);
683 }
684 if (bf->bf_dmamap != NULL) {
685 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
686 bf->bf_dmamap = NULL;
687 }
688 }
689 STAILQ_INIT(&txq->free);
690 txq->nfree = 0;
691 if (txq->dma.dd_bufptr != NULL) {
692 free(txq->dma.dd_bufptr, M_MALODEV);
693 txq->dma.dd_bufptr = NULL;
694 }
695 if (txq->dma.dd_desc_len != 0)
696 malo_desc_cleanup(sc, &txq->dma);
697 }
698
699 static void
700 malo_dma_cleanup(struct malo_softc *sc)
701 {
702 int i;
703
704 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
705 malo_txdma_cleanup(sc, &sc->malo_txq[i]);
706
707 malo_rxdma_cleanup(sc);
708 }
709
710 static int
711 malo_dma_setup(struct malo_softc *sc)
712 {
713 int error, i;
714
715 /* rxdma initializing. */
716 error = malo_rxdma_setup(sc);
717 if (error != 0)
718 return error;
719
720 /* NB: we just have 1 tx queue now. */
721 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
722 error = malo_txdma_setup(sc, &sc->malo_txq[i]);
723 if (error != 0) {
724 malo_dma_cleanup(sc);
725
726 return error;
727 }
728
729 malo_txq_init(sc, &sc->malo_txq[i], i);
730 }
731
732 return 0;
733 }
734
735 static void
736 malo_hal_set_rxtxdma(struct malo_softc *sc)
737 {
738 int i;
739
740 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read,
741 sc->malo_hwdma.rxdesc_read);
742 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write,
743 sc->malo_hwdma.rxdesc_read);
744
745 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
746 malo_bar0_write4(sc,
747 sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]);
748 }
749 }
750
751 /*
752 * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are
753 * for compatibility with older firmware. For current firmware we send
754 * this information with a cmd block via malo_hal_sethwdma.
755 */
756 static int
757 malo_setup_hwdma(struct malo_softc *sc)
758 {
759 int i;
760 struct malo_txq *txq;
761
762 sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr;
763
764 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
765 txq = &sc->malo_txq[i];
766 sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr;
767 }
768 sc->malo_hwdma.maxnum_txwcb = malo_txbuf;
769 sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES;
770
771 malo_hal_set_rxtxdma(sc);
772
773 return 0;
774 }
775
776 static void
777 malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum)
778 {
779 struct malo_txbuf *bf, *bn;
780 struct malo_txdesc *ds;
781
782 MALO_TXQ_LOCK_INIT(sc, txq);
783 txq->qnum = qnum;
784 txq->txpri = 0; /* XXX */
785
786 STAILQ_FOREACH(bf, &txq->free, bf_list) {
787 bf->bf_txq = txq;
788
789 ds = bf->bf_desc;
790 bn = STAILQ_NEXT(bf, bf_list);
791 if (bn == NULL)
792 bn = STAILQ_FIRST(&txq->free);
793 ds->physnext = htole32(bn->bf_daddr);
794 }
795 STAILQ_INIT(&txq->active);
796 }
797
798 /*
799 * Reclaim resources for a setup queue.
800 */
801 static void
802 malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq)
803 {
804 /* XXX hal work? */
805 MALO_TXQ_LOCK_DESTROY(txq);
806 }
807
808 /*
809 * Allocate a tx buffer for sending a frame.
810 */
811 static struct malo_txbuf *
812 malo_getbuf(struct malo_softc *sc, struct malo_txq *txq)
813 {
814 struct malo_txbuf *bf;
815
816 MALO_TXQ_LOCK(txq);
817 bf = STAILQ_FIRST(&txq->free);
818 if (bf != NULL) {
819 STAILQ_REMOVE_HEAD(&txq->free, bf_list);
820 txq->nfree--;
821 }
822 MALO_TXQ_UNLOCK(txq);
823 if (bf == NULL) {
824 DPRINTF(sc, MALO_DEBUG_XMIT,
825 "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
826 sc->malo_stats.mst_tx_qstop++;
827 }
828 return bf;
829 }
830
831 static int
832 malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0)
833 {
834 struct mbuf *m;
835 int error;
836
837 /*
838 * Load the DMA map so any coalescing is done. This also calculates
839 * the number of descriptors we need.
840 */
841 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
842 bf->bf_segs, &bf->bf_nseg,
843 BUS_DMA_NOWAIT);
844 if (error == EFBIG) {
845 /* XXX packet requires too many descriptors */
846 bf->bf_nseg = MALO_TXDESC + 1;
847 } else if (error != 0) {
848 sc->malo_stats.mst_tx_busdma++;
849 m_freem(m0);
850 return error;
851 }
852 /*
853 * Discard null packets and check for packets that require too many
854 * TX descriptors. We try to convert the latter to a cluster.
855 */
856 if (error == EFBIG) { /* too many desc's, linearize */
857 sc->malo_stats.mst_tx_linear++;
858 m = m_defrag(m0, M_NOWAIT);
859 if (m == NULL) {
860 m_freem(m0);
861 sc->malo_stats.mst_tx_nombuf++;
862 return ENOMEM;
863 }
864 m0 = m;
865 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
866 bf->bf_segs, &bf->bf_nseg,
867 BUS_DMA_NOWAIT);
868 if (error != 0) {
869 sc->malo_stats.mst_tx_busdma++;
870 m_freem(m0);
871 return error;
872 }
873 KASSERT(bf->bf_nseg <= MALO_TXDESC,
874 ("too many segments after defrag; nseg %u", bf->bf_nseg));
875 } else if (bf->bf_nseg == 0) { /* null packet, discard */
876 sc->malo_stats.mst_tx_nodata++;
877 m_freem(m0);
878 return EIO;
879 }
880 DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n",
881 __func__, m0, m0->m_pkthdr.len);
882 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
883 bf->bf_m = m0;
884
885 return 0;
886 }
887
888 #ifdef MALO_DEBUG
889 static void
890 malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix)
891 {
892 const struct malo_rxdesc *ds = bf->bf_desc;
893 uint32_t status = le32toh(ds->status);
894
895 printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n"
896 " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x"
897 " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr,
898 le32toh(ds->physnext), le32toh(ds->physbuffdata),
899 ds->rxcontrol,
900 ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ?
901 "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !",
902 ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel,
903 ds->rate, le16toh(ds->qosctrl));
904 }
905
906 static void
907 malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix)
908 {
909 const struct malo_txdesc *ds = bf->bf_desc;
910 uint32_t status = le32toh(ds->status);
911
912 printf("Q%u[%3u]", qnum, ix);
913 printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr);
914 printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
915 le32toh(ds->physnext),
916 le32toh(ds->pktptr), le16toh(ds->pktlen), status,
917 status & MALO_TXD_STATUS_USED ?
918 "" : (status & 3) != 0 ? " *" : " !");
919 printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
920 ds->datarate, ds->txpriority, le16toh(ds->qosctrl),
921 le32toh(ds->sap_pktinfo), le16toh(ds->format));
922 #if 0
923 {
924 const uint8_t *cp = (const uint8_t *) ds;
925 int i;
926 for (i = 0; i < sizeof(struct malo_txdesc); i++) {
927 printf("%02x ", cp[i]);
928 if (((i+1) % 16) == 0)
929 printf("\n");
930 }
931 printf("\n");
932 }
933 #endif
934 }
935 #endif /* MALO_DEBUG */
936
937 static __inline void
938 malo_updatetxrate(struct ieee80211_node *ni, int rix)
939 {
940 #define N(x) (sizeof(x)/sizeof(x[0]))
941 static const int ieeerates[] =
942 { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 };
943 if (rix < N(ieeerates))
944 ni->ni_txrate = ieeerates[rix];
945 #undef N
946 }
947
948 static int
949 malo_fix2rate(int fix_rate)
950 {
951 #define N(x) (sizeof(x)/sizeof(x[0]))
952 static const int rates[] =
953 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 };
954 return (fix_rate < N(rates) ? rates[fix_rate] : 0);
955 #undef N
956 }
957
958 /* idiomatic shorthands: MS = mask+shift, SM = shift+mask */
959 #define MS(v,x) (((v) & x) >> x##_S)
960 #define SM(v,x) (((v) << x##_S) & x)
961
962 /*
963 * Process completed xmit descriptors from the specified queue.
964 */
965 static int
966 malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq)
967 {
968 struct malo_txbuf *bf;
969 struct malo_txdesc *ds;
970 struct ieee80211_node *ni;
971 int nreaped;
972 uint32_t status;
973
974 DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n",
975 __func__, txq->qnum);
976 for (nreaped = 0;; nreaped++) {
977 MALO_TXQ_LOCK(txq);
978 bf = STAILQ_FIRST(&txq->active);
979 if (bf == NULL) {
980 MALO_TXQ_UNLOCK(txq);
981 break;
982 }
983 ds = bf->bf_desc;
984 MALO_TXDESC_SYNC(txq, ds,
985 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
986 if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) {
987 MALO_TXQ_UNLOCK(txq);
988 break;
989 }
990 STAILQ_REMOVE_HEAD(&txq->active, bf_list);
991 MALO_TXQ_UNLOCK(txq);
992
993 #ifdef MALO_DEBUG
994 if (sc->malo_debug & MALO_DEBUG_XMIT_DESC)
995 malo_printtxbuf(bf, txq->qnum, nreaped);
996 #endif
997 ni = bf->bf_node;
998 if (ni != NULL) {
999 status = le32toh(ds->status);
1000 if (status & MALO_TXD_STATUS_OK) {
1001 uint16_t format = le16toh(ds->format);
1002 uint8_t txant = MS(format, MALO_TXD_ANTENNA);
1003
1004 sc->malo_stats.mst_ant_tx[txant]++;
1005 if (status & MALO_TXD_STATUS_OK_RETRY)
1006 sc->malo_stats.mst_tx_retries++;
1007 if (status & MALO_TXD_STATUS_OK_MORE_RETRY)
1008 sc->malo_stats.mst_tx_mretries++;
1009 malo_updatetxrate(ni, ds->datarate);
1010 sc->malo_stats.mst_tx_rate = ds->datarate;
1011 } else {
1012 if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR)
1013 sc->malo_stats.mst_tx_linkerror++;
1014 if (status & MALO_TXD_STATUS_FAILED_XRETRY)
1015 sc->malo_stats.mst_tx_xretries++;
1016 if (status & MALO_TXD_STATUS_FAILED_AGING)
1017 sc->malo_stats.mst_tx_aging++;
1018 }
1019 /*
1020 * Do any tx complete callback. Note this must
1021 * be done before releasing the node reference.
1022 * XXX no way to figure out if frame was ACK'd
1023 */
1024 if (bf->bf_m->m_flags & M_TXCB) {
1025 /* XXX strip fw len in case header inspected */
1026 m_adj(bf->bf_m, sizeof(uint16_t));
1027 ieee80211_process_callback(ni, bf->bf_m,
1028 (status & MALO_TXD_STATUS_OK) == 0);
1029 }
1030 /*
1031 * Reclaim reference to node.
1032 *
1033 * NB: the node may be reclaimed here if, for example
1034 * this is a DEAUTH message that was sent and the
1035 * node was timed out due to inactivity.
1036 */
1037 ieee80211_free_node(ni);
1038 }
1039 ds->status = htole32(MALO_TXD_STATUS_IDLE);
1040 ds->pktlen = htole32(0);
1041
1042 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
1043 BUS_DMASYNC_POSTWRITE);
1044 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1045 m_freem(bf->bf_m);
1046 bf->bf_m = NULL;
1047 bf->bf_node = NULL;
1048
1049 MALO_TXQ_LOCK(txq);
1050 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1051 txq->nfree++;
1052 MALO_TXQ_UNLOCK(txq);
1053 }
1054 return nreaped;
1055 }
1056
1057 /*
1058 * Deferred processing of transmit interrupt.
1059 */
1060 static void
1061 malo_tx_proc(void *arg, int npending)
1062 {
1063 struct malo_softc *sc = arg;
1064 struct ifnet *ifp = sc->malo_ifp;
1065 int i, nreaped;
1066
1067 /*
1068 * Process each active queue.
1069 */
1070 nreaped = 0;
1071 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
1072 if (!STAILQ_EMPTY(&sc->malo_txq[i].active))
1073 nreaped += malo_tx_processq(sc, &sc->malo_txq[i]);
1074 }
1075
1076 if (nreaped != 0) {
1077 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1078 sc->malo_timer = 0;
1079 malo_start(ifp);
1080 }
1081 }
1082
1083 static int
1084 malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni,
1085 struct malo_txbuf *bf, struct mbuf *m0)
1086 {
1087 #define IEEE80211_DIR_DSTODS(wh) \
1088 ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
1089 #define IS_DATA_FRAME(wh) \
1090 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA)
1091 int error, ismcast, iswep;
1092 int copyhdrlen, hdrlen, pktlen;
1093 struct ieee80211_frame *wh;
1094 struct ifnet *ifp = sc->malo_ifp;
1095 struct ieee80211com *ic = ifp->if_l2com;
1096 struct ieee80211vap *vap = ni->ni_vap;
1097 struct malo_txdesc *ds;
1098 struct malo_txrec *tr;
1099 struct malo_txq *txq;
1100 uint16_t qos;
1101
1102 wh = mtod(m0, struct ieee80211_frame *);
1103 iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1104 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1105 copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh);
1106 pktlen = m0->m_pkthdr.len;
1107 if (IEEE80211_QOS_HAS_SEQ(wh)) {
1108 if (IEEE80211_DIR_DSTODS(wh)) {
1109 qos = *(uint16_t *)
1110 (((struct ieee80211_qosframe_addr4 *) wh)->i_qos);
1111 copyhdrlen -= sizeof(qos);
1112 } else
1113 qos = *(uint16_t *)
1114 (((struct ieee80211_qosframe *) wh)->i_qos);
1115 } else
1116 qos = 0;
1117
1118 if (iswep) {
1119 struct ieee80211_key *k;
1120
1121 /*
1122 * Construct the 802.11 header+trailer for an encrypted
1123 * frame. The only reason this can fail is because of an
1124 * unknown or unsupported cipher/key type.
1125 *
1126 * NB: we do this even though the firmware will ignore
1127 * what we've done for WEP and TKIP as we need the
1128 * ExtIV filled in for CCMP and this also adjusts
1129 * the headers which simplifies our work below.
1130 */
1131 k = ieee80211_crypto_encap(ni, m0);
1132 if (k == NULL) {
1133 /*
1134 * This can happen when the key is yanked after the
1135 * frame was queued. Just discard the frame; the
1136 * 802.11 layer counts failures and provides
1137 * debugging/diagnostics.
1138 */
1139 m_freem(m0);
1140 return EIO;
1141 }
1142
1143 /*
1144 * Adjust the packet length for the crypto additions
1145 * done during encap and any other bits that the f/w
1146 * will add later on.
1147 */
1148 pktlen = m0->m_pkthdr.len;
1149
1150 /* packet header may have moved, reset our local pointer */
1151 wh = mtod(m0, struct ieee80211_frame *);
1152 }
1153
1154 if (ieee80211_radiotap_active_vap(vap)) {
1155 sc->malo_tx_th.wt_flags = 0; /* XXX */
1156 if (iswep)
1157 sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1158 sc->malo_tx_th.wt_txpower = ni->ni_txpower;
1159 sc->malo_tx_th.wt_antenna = sc->malo_txantenna;
1160
1161 ieee80211_radiotap_tx(vap, m0);
1162 }
1163
1164 /*
1165 * Copy up/down the 802.11 header; the firmware requires
1166 * we present a 2-byte payload length followed by a
1167 * 4-address header (w/o QoS), followed (optionally) by
1168 * any WEP/ExtIV header (but only filled in for CCMP).
1169 * We are assured the mbuf has sufficient headroom to
1170 * prepend in-place by the setup of ic_headroom in
1171 * malo_attach.
1172 */
1173 if (hdrlen < sizeof(struct malo_txrec)) {
1174 const int space = sizeof(struct malo_txrec) - hdrlen;
1175 if (M_LEADINGSPACE(m0) < space) {
1176 /* NB: should never happen */
1177 device_printf(sc->malo_dev,
1178 "not enough headroom, need %d found %zd, "
1179 "m_flags 0x%x m_len %d\n",
1180 space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
1181 ieee80211_dump_pkt(ic,
1182 mtod(m0, const uint8_t *), m0->m_len, 0, -1);
1183 m_freem(m0);
1184 /* XXX stat */
1185 return EIO;
1186 }
1187 M_PREPEND(m0, space, M_NOWAIT);
1188 }
1189 tr = mtod(m0, struct malo_txrec *);
1190 if (wh != (struct ieee80211_frame *) &tr->wh)
1191 ovbcopy(wh, &tr->wh, hdrlen);
1192 /*
1193 * Note: the "firmware length" is actually the length of the fully
1194 * formed "802.11 payload". That is, it's everything except for
1195 * the 802.11 header. In particular this includes all crypto
1196 * material including the MIC!
1197 */
1198 tr->fwlen = htole16(pktlen - hdrlen);
1199
1200 /*
1201 * Load the DMA map so any coalescing is done. This
1202 * also calculates the number of descriptors we need.
1203 */
1204 error = malo_tx_dmasetup(sc, bf, m0);
1205 if (error != 0)
1206 return error;
1207 bf->bf_node = ni; /* NB: held reference */
1208 m0 = bf->bf_m; /* NB: may have changed */
1209 tr = mtod(m0, struct malo_txrec *);
1210 wh = (struct ieee80211_frame *)&tr->wh;
1211
1212 /*
1213 * Formulate tx descriptor.
1214 */
1215 ds = bf->bf_desc;
1216 txq = bf->bf_txq;
1217
1218 ds->qosctrl = qos; /* NB: already little-endian */
1219 ds->pktptr = htole32(bf->bf_segs[0].ds_addr);
1220 ds->pktlen = htole16(bf->bf_segs[0].ds_len);
1221 /* NB: pPhysNext setup once, don't touch */
1222 ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0;
1223 ds->sap_pktinfo = 0;
1224 ds->format = 0;
1225
1226 /*
1227 * Select transmit rate.
1228 */
1229 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1230 case IEEE80211_FC0_TYPE_MGT:
1231 sc->malo_stats.mst_tx_mgmt++;
1232 /* fall thru... */
1233 case IEEE80211_FC0_TYPE_CTL:
1234 ds->txpriority = 1;
1235 break;
1236 case IEEE80211_FC0_TYPE_DATA:
1237 ds->txpriority = txq->qnum;
1238 break;
1239 default:
1240 if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1241 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1242 /* XXX statistic */
1243 m_freem(m0);
1244 return EIO;
1245 }
1246
1247 #ifdef MALO_DEBUG
1248 if (IFF_DUMPPKTS_XMIT(sc))
1249 ieee80211_dump_pkt(ic,
1250 mtod(m0, const uint8_t *)+sizeof(uint16_t),
1251 m0->m_len - sizeof(uint16_t), ds->datarate, -1);
1252 #endif
1253
1254 MALO_TXQ_LOCK(txq);
1255 if (!IS_DATA_FRAME(wh))
1256 ds->status |= htole32(1);
1257 ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED);
1258 STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
1259 MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1260
1261 ifp->if_opackets++;
1262 sc->malo_timer = 5;
1263 MALO_TXQ_UNLOCK(txq);
1264 return 0;
1265 #undef IEEE80211_DIR_DSTODS
1266 }
1267
1268 static void
1269 malo_start(struct ifnet *ifp)
1270 {
1271 struct malo_softc *sc = ifp->if_softc;
1272 struct ieee80211_node *ni;
1273 struct malo_txq *txq = &sc->malo_txq[0];
1274 struct malo_txbuf *bf = NULL;
1275 struct mbuf *m;
1276 int nqueued = 0;
1277
1278 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid)
1279 return;
1280
1281 for (;;) {
1282 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1283 if (m == NULL)
1284 break;
1285 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1286 bf = malo_getbuf(sc, txq);
1287 if (bf == NULL) {
1288 IFQ_DRV_PREPEND(&ifp->if_snd, m);
1289
1290 /* XXX blocks other traffic */
1291 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1292 sc->malo_stats.mst_tx_qstop++;
1293 break;
1294 }
1295 /*
1296 * Pass the frame to the h/w for transmission.
1297 */
1298 if (malo_tx_start(sc, ni, bf, m)) {
1299 ifp->if_oerrors++;
1300 if (bf != NULL) {
1301 bf->bf_m = NULL;
1302 bf->bf_node = NULL;
1303 MALO_TXQ_LOCK(txq);
1304 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1305 MALO_TXQ_UNLOCK(txq);
1306 }
1307 ieee80211_free_node(ni);
1308 continue;
1309 }
1310 nqueued++;
1311
1312 if (nqueued >= malo_txcoalesce) {
1313 /*
1314 * Poke the firmware to process queued frames;
1315 * see below about (lack of) locking.
1316 */
1317 nqueued = 0;
1318 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1319 }
1320 }
1321
1322 if (nqueued) {
1323 /*
1324 * NB: We don't need to lock against tx done because
1325 * this just prods the firmware to check the transmit
1326 * descriptors. The firmware will also start fetching
1327 * descriptors by itself if it notices new ones are
1328 * present when it goes to deliver a tx done interrupt
1329 * to the host. So if we race with tx done processing
1330 * it's ok. Delivering the kick here rather than in
1331 * malo_tx_start is an optimization to avoid poking the
1332 * firmware for each packet.
1333 *
1334 * NB: the queue id isn't used so 0 is ok.
1335 */
1336 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1337 }
1338 }
1339
1340 static void
1341 malo_watchdog(void *arg)
1342 {
1343 struct malo_softc *sc;
1344 struct ifnet *ifp;
1345
1346 sc = arg;
1347 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1348 if (sc->malo_timer == 0 || --sc->malo_timer > 0)
1349 return;
1350
1351 ifp = sc->malo_ifp;
1352 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) {
1353 if_printf(ifp, "watchdog timeout\n");
1354
1355 /* XXX no way to reset h/w. now */
1356
1357 ifp->if_oerrors++;
1358 sc->malo_stats.mst_watchdog++;
1359 }
1360 }
1361
1362 static int
1363 malo_hal_reset(struct malo_softc *sc)
1364 {
1365 static int first = 0;
1366 struct ifnet *ifp = sc->malo_ifp;
1367 struct ieee80211com *ic = ifp->if_l2com;
1368 struct malo_hal *mh = sc->malo_mh;
1369
1370 if (first == 0) {
1371 /*
1372 * NB: when the device firstly is initialized, sometimes
1373 * firmware could override rx/tx dma registers so we re-set
1374 * these values once.
1375 */
1376 malo_hal_set_rxtxdma(sc);
1377 first = 1;
1378 }
1379
1380 malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna);
1381 malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna);
1382 malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE);
1383 malo_chan_set(sc, ic->ic_curchan);
1384
1385 /* XXX needs other stuffs? */
1386
1387 return 1;
1388 }
1389
1390 static __inline struct mbuf *
1391 malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf)
1392 {
1393 struct mbuf *m;
1394 bus_addr_t paddr;
1395 int error;
1396
1397 /* XXX don't need mbuf, just dma buffer */
1398 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
1399 if (m == NULL) {
1400 sc->malo_stats.mst_rx_nombuf++; /* XXX */
1401 return NULL;
1402 }
1403 error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap,
1404 mtod(m, caddr_t), MJUMPAGESIZE,
1405 malo_load_cb, &paddr, BUS_DMA_NOWAIT);
1406 if (error != 0) {
1407 if_printf(sc->malo_ifp,
1408 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1409 m_freem(m);
1410 return NULL;
1411 }
1412 bf->bf_data = paddr;
1413 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1414
1415 return m;
1416 }
1417
1418 static int
1419 malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf)
1420 {
1421 struct malo_rxdesc *ds;
1422
1423 ds = bf->bf_desc;
1424 if (bf->bf_m == NULL) {
1425 bf->bf_m = malo_getrxmbuf(sc, bf);
1426 if (bf->bf_m == NULL) {
1427 /* mark descriptor to be skipped */
1428 ds->rxcontrol = MALO_RXD_CTRL_OS_OWN;
1429 /* NB: don't need PREREAD */
1430 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
1431 return ENOMEM;
1432 }
1433 }
1434
1435 /*
1436 * Setup descriptor.
1437 */
1438 ds->qosctrl = 0;
1439 ds->snr = 0;
1440 ds->status = MALO_RXD_STATUS_IDLE;
1441 ds->channel = 0;
1442 ds->pktlen = htole16(MALO_RXSIZE);
1443 ds->nf = 0;
1444 ds->physbuffdata = htole32(bf->bf_data);
1445 /* NB: don't touch pPhysNext, set once */
1446 ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN;
1447 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1448
1449 return 0;
1450 }
1451
1452 /*
1453 * Setup the rx data structures. This should only be done once or we may get
1454 * out of sync with the firmware.
1455 */
1456 static int
1457 malo_startrecv(struct malo_softc *sc)
1458 {
1459 struct malo_rxbuf *bf, *prev;
1460 struct malo_rxdesc *ds;
1461
1462 if (sc->malo_recvsetup == 1) {
1463 malo_mode_init(sc); /* set filters, etc. */
1464 return 0;
1465 }
1466
1467 prev = NULL;
1468 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
1469 int error = malo_rxbuf_init(sc, bf);
1470 if (error != 0) {
1471 DPRINTF(sc, MALO_DEBUG_RECV,
1472 "%s: malo_rxbuf_init failed %d\n",
1473 __func__, error);
1474 return error;
1475 }
1476 if (prev != NULL) {
1477 ds = prev->bf_desc;
1478 ds->physnext = htole32(bf->bf_daddr);
1479 }
1480 prev = bf;
1481 }
1482 if (prev != NULL) {
1483 ds = prev->bf_desc;
1484 ds->physnext =
1485 htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr);
1486 }
1487
1488 sc->malo_recvsetup = 1;
1489
1490 malo_mode_init(sc); /* set filters, etc. */
1491
1492 return 0;
1493 }
1494
1495 static void
1496 malo_init_locked(struct malo_softc *sc)
1497 {
1498 struct ifnet *ifp = sc->malo_ifp;
1499 struct malo_hal *mh = sc->malo_mh;
1500 int error;
1501
1502 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n",
1503 __func__, ifp->if_flags);
1504
1505 MALO_LOCK_ASSERT(sc);
1506
1507 /*
1508 * Stop anything previously setup. This is safe whether this is
1509 * the first time through or not.
1510 */
1511 malo_stop_locked(ifp, 0);
1512
1513 /*
1514 * Push state to the firmware.
1515 */
1516 if (!malo_hal_reset(sc)) {
1517 if_printf(ifp, "%s: unable to reset hardware\n", __func__);
1518 return;
1519 }
1520
1521 /*
1522 * Setup recv (once); transmit is already good to go.
1523 */
1524 error = malo_startrecv(sc);
1525 if (error != 0) {
1526 if_printf(ifp, "%s: unable to start recv logic, error %d\n",
1527 __func__, error);
1528 return;
1529 }
1530
1531 /*
1532 * Enable interrupts.
1533 */
1534 sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY
1535 | MALO_A2HRIC_BIT_TX_DONE
1536 | MALO_A2HRIC_BIT_OPC_DONE
1537 | MALO_A2HRIC_BIT_MAC_EVENT
1538 | MALO_A2HRIC_BIT_RX_PROBLEM
1539 | MALO_A2HRIC_BIT_ICV_ERROR
1540 | MALO_A2HRIC_BIT_RADAR_DETECT
1541 | MALO_A2HRIC_BIT_CHAN_SWITCH;
1542
1543 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1544 malo_hal_intrset(mh, sc->malo_imask);
1545 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1546 }
1547
1548 static void
1549 malo_init(void *arg)
1550 {
1551 struct malo_softc *sc = (struct malo_softc *) arg;
1552 struct ifnet *ifp = sc->malo_ifp;
1553 struct ieee80211com *ic = ifp->if_l2com;
1554
1555 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n",
1556 __func__, ifp->if_flags);
1557
1558 MALO_LOCK(sc);
1559 malo_init_locked(sc);
1560
1561 MALO_UNLOCK(sc);
1562
1563 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1564 ieee80211_start_all(ic); /* start all vap's */
1565 }
1566
1567 /*
1568 * Set the multicast filter contents into the hardware.
1569 */
1570 static void
1571 malo_setmcastfilter(struct malo_softc *sc)
1572 {
1573 struct ifnet *ifp = sc->malo_ifp;
1574 struct ieee80211com *ic = ifp->if_l2com;
1575 struct ifmultiaddr *ifma;
1576 uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX];
1577 uint8_t *mp;
1578 int nmc;
1579
1580 mp = macs;
1581 nmc = 0;
1582
1583 if (ic->ic_opmode == IEEE80211_M_MONITOR ||
1584 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)))
1585 goto all;
1586
1587 if_maddr_rlock(ifp);
1588 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1589 if (ifma->ifma_addr->sa_family != AF_LINK)
1590 continue;
1591
1592 if (nmc == MALO_HAL_MCAST_MAX) {
1593 ifp->if_flags |= IFF_ALLMULTI;
1594 if_maddr_runlock(ifp);
1595 goto all;
1596 }
1597 IEEE80211_ADDR_COPY(mp,
1598 LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
1599
1600 mp += IEEE80211_ADDR_LEN, nmc++;
1601 }
1602 if_maddr_runlock(ifp);
1603
1604 malo_hal_setmcast(sc->malo_mh, nmc, macs);
1605
1606 all:
1607 /*
1608 * XXX we don't know how to set the f/w for supporting
1609 * IFF_ALLMULTI | IFF_PROMISC cases
1610 */
1611 return;
1612 }
1613
1614 static int
1615 malo_mode_init(struct malo_softc *sc)
1616 {
1617 struct ifnet *ifp = sc->malo_ifp;
1618 struct ieee80211com *ic = ifp->if_l2com;
1619 struct malo_hal *mh = sc->malo_mh;
1620
1621 /*
1622 * NB: Ignore promisc in hostap mode; it's set by the
1623 * bridge. This is wrong but we have no way to
1624 * identify internal requests (from the bridge)
1625 * versus external requests such as for tcpdump.
1626 */
1627 malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) &&
1628 ic->ic_opmode != IEEE80211_M_HOSTAP);
1629 malo_setmcastfilter(sc);
1630
1631 return ENXIO;
1632 }
1633
1634 static void
1635 malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq)
1636 {
1637 struct ieee80211_node *ni;
1638 struct malo_txbuf *bf;
1639 u_int ix;
1640
1641 /*
1642 * NB: this assumes output has been stopped and
1643 * we do not need to block malo_tx_tasklet
1644 */
1645 for (ix = 0;; ix++) {
1646 MALO_TXQ_LOCK(txq);
1647 bf = STAILQ_FIRST(&txq->active);
1648 if (bf == NULL) {
1649 MALO_TXQ_UNLOCK(txq);
1650 break;
1651 }
1652 STAILQ_REMOVE_HEAD(&txq->active, bf_list);
1653 MALO_TXQ_UNLOCK(txq);
1654 #ifdef MALO_DEBUG
1655 if (sc->malo_debug & MALO_DEBUG_RESET) {
1656 struct ifnet *ifp = sc->malo_ifp;
1657 struct ieee80211com *ic = ifp->if_l2com;
1658 const struct malo_txrec *tr =
1659 mtod(bf->bf_m, const struct malo_txrec *);
1660 malo_printtxbuf(bf, txq->qnum, ix);
1661 ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
1662 bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
1663 }
1664 #endif /* MALO_DEBUG */
1665 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1666 ni = bf->bf_node;
1667 bf->bf_node = NULL;
1668 if (ni != NULL) {
1669 /*
1670 * Reclaim node reference.
1671 */
1672 ieee80211_free_node(ni);
1673 }
1674 m_freem(bf->bf_m);
1675 bf->bf_m = NULL;
1676
1677 MALO_TXQ_LOCK(txq);
1678 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1679 txq->nfree++;
1680 MALO_TXQ_UNLOCK(txq);
1681 }
1682 }
1683
1684 static void
1685 malo_stop_locked(struct ifnet *ifp, int disable)
1686 {
1687 struct malo_softc *sc = ifp->if_softc;
1688 struct malo_hal *mh = sc->malo_mh;
1689 int i;
1690
1691 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n",
1692 __func__, sc->malo_invalid, ifp->if_flags);
1693
1694 MALO_LOCK_ASSERT(sc);
1695
1696 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1697 return;
1698
1699 /*
1700 * Shutdown the hardware and driver:
1701 * disable interrupts
1702 * turn off the radio
1703 * drain and release tx queues
1704 *
1705 * Note that some of this work is not possible if the hardware
1706 * is gone (invalid).
1707 */
1708 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1709 callout_stop(&sc->malo_watchdog_timer);
1710 sc->malo_timer = 0;
1711 /* diable interrupt. */
1712 malo_hal_intrset(mh, 0);
1713 /* turn off the radio. */
1714 malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE);
1715
1716 /* drain and release tx queues. */
1717 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
1718 malo_tx_draintxq(sc, &sc->malo_txq[i]);
1719 }
1720
1721 static int
1722 malo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1723 {
1724 #define MALO_IS_RUNNING(ifp) \
1725 ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING))
1726 struct malo_softc *sc = ifp->if_softc;
1727 struct ieee80211com *ic = ifp->if_l2com;
1728 struct ifreq *ifr = (struct ifreq *) data;
1729 int error = 0, startall = 0;
1730
1731 MALO_LOCK(sc);
1732 switch (cmd) {
1733 case SIOCSIFFLAGS:
1734 if (MALO_IS_RUNNING(ifp)) {
1735 /*
1736 * To avoid rescanning another access point,
1737 * do not call malo_init() here. Instead,
1738 * only reflect promisc mode settings.
1739 */
1740 malo_mode_init(sc);
1741 } else if (ifp->if_flags & IFF_UP) {
1742 /*
1743 * Beware of being called during attach/detach
1744 * to reset promiscuous mode. In that case we
1745 * will still be marked UP but not RUNNING.
1746 * However trying to re-init the interface
1747 * is the wrong thing to do as we've already
1748 * torn down much of our state. There's
1749 * probably a better way to deal with this.
1750 */
1751 if (!sc->malo_invalid) {
1752 malo_init_locked(sc);
1753 startall = 1;
1754 }
1755 } else
1756 malo_stop_locked(ifp, 1);
1757 break;
1758 case SIOCGIFMEDIA:
1759 case SIOCSIFMEDIA:
1760 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1761 break;
1762 default:
1763 error = ether_ioctl(ifp, cmd, data);
1764 break;
1765 }
1766 MALO_UNLOCK(sc);
1767
1768 if (startall)
1769 ieee80211_start_all(ic);
1770 return error;
1771 #undef MALO_IS_RUNNING
1772 }
1773
1774 /*
1775 * Callback from the 802.11 layer to update the slot time
1776 * based on the current setting. We use it to notify the
1777 * firmware of ERP changes and the f/w takes care of things
1778 * like slot time and preamble.
1779 */
1780 static void
1781 malo_updateslot(struct ifnet *ifp)
1782 {
1783 struct malo_softc *sc = ifp->if_softc;
1784 struct ieee80211com *ic = ifp->if_l2com;
1785 struct malo_hal *mh = sc->malo_mh;
1786 int error;
1787
1788 /* NB: can be called early; suppress needless cmds */
1789 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1790 return;
1791
1792 DPRINTF(sc, MALO_DEBUG_RESET,
1793 "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n",
1794 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1795 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags);
1796
1797 if (ic->ic_flags & IEEE80211_F_SHSLOT)
1798 error = malo_hal_set_slot(mh, 1);
1799 else
1800 error = malo_hal_set_slot(mh, 0);
1801
1802 if (error != 0)
1803 device_printf(sc->malo_dev, "setting %s slot failed\n",
1804 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long");
1805 }
1806
1807 static int
1808 malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1809 {
1810 struct ieee80211com *ic = vap->iv_ic;
1811 struct malo_softc *sc = ic->ic_ifp->if_softc;
1812 struct malo_hal *mh = sc->malo_mh;
1813 int error;
1814
1815 DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1816 ieee80211_state_name[vap->iv_state],
1817 ieee80211_state_name[nstate]);
1818
1819 /*
1820 * Invoke the net80211 layer first so iv_bss is setup.
1821 */
1822 error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg);
1823 if (error != 0)
1824 return error;
1825
1826 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1827 struct ieee80211_node *ni = vap->iv_bss;
1828 enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan);
1829 const struct ieee80211_txparam *tp = &vap->iv_txparms[mode];
1830
1831 DPRINTF(sc, MALO_DEBUG_STATE,
1832 "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
1833 "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n",
1834 vap->iv_ifp->if_xname, __func__, vap->iv_flags,
1835 ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
1836 ieee80211_chan2ieee(ic, ic->ic_curchan),
1837 ni->ni_associd, mode, tp->ucastrate);
1838
1839 malo_hal_setradio(mh, 1,
1840 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ?
1841 MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE);
1842 malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd);
1843 malo_hal_set_rate(mh, mode,
1844 tp->ucastrate == IEEE80211_FIXED_RATE_NONE ?
1845 0 : malo_fix2rate(tp->ucastrate));
1846 }
1847 return 0;
1848 }
1849
1850 static int
1851 malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1852 const struct ieee80211_bpf_params *params)
1853 {
1854 struct ieee80211com *ic = ni->ni_ic;
1855 struct ifnet *ifp = ic->ic_ifp;
1856 struct malo_softc *sc = ifp->if_softc;
1857 struct malo_txbuf *bf;
1858 struct malo_txq *txq;
1859
1860 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) {
1861 ieee80211_free_node(ni);
1862 m_freem(m);
1863 return ENETDOWN;
1864 }
1865
1866 /*
1867 * Grab a TX buffer and associated resources. Note that we depend
1868 * on the classification by the 802.11 layer to get to the right h/w
1869 * queue. Management frames must ALWAYS go on queue 1 but we
1870 * cannot just force that here because we may receive non-mgt frames.
1871 */
1872 txq = &sc->malo_txq[0];
1873 bf = malo_getbuf(sc, txq);
1874 if (bf == NULL) {
1875 /* XXX blocks other traffic */
1876 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1877 ieee80211_free_node(ni);
1878 m_freem(m);
1879 return ENOBUFS;
1880 }
1881
1882 /*
1883 * Pass the frame to the h/w for transmission.
1884 */
1885 if (malo_tx_start(sc, ni, bf, m) != 0) {
1886 ifp->if_oerrors++;
1887 bf->bf_m = NULL;
1888 bf->bf_node = NULL;
1889 MALO_TXQ_LOCK(txq);
1890 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1891 txq->nfree++;
1892 MALO_TXQ_UNLOCK(txq);
1893
1894 ieee80211_free_node(ni);
1895 return EIO; /* XXX */
1896 }
1897
1898 /*
1899 * NB: We don't need to lock against tx done because this just
1900 * prods the firmware to check the transmit descriptors. The firmware
1901 * will also start fetching descriptors by itself if it notices
1902 * new ones are present when it goes to deliver a tx done interrupt
1903 * to the host. So if we race with tx done processing it's ok.
1904 * Delivering the kick here rather than in malo_tx_start is
1905 * an optimization to avoid poking the firmware for each packet.
1906 *
1907 * NB: the queue id isn't used so 0 is ok.
1908 */
1909 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1910
1911 return 0;
1912 }
1913
1914 static void
1915 malo_sysctlattach(struct malo_softc *sc)
1916 {
1917 #ifdef MALO_DEBUG
1918 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev);
1919 struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev);
1920
1921 sc->malo_debug = malo_debug;
1922 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1923 "debug", CTLFLAG_RW, &sc->malo_debug, 0,
1924 "control debugging printfs");
1925 #endif
1926 }
1927
1928 static void
1929 malo_announce(struct malo_softc *sc)
1930 {
1931 struct ifnet *ifp = sc->malo_ifp;
1932
1933 if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n",
1934 sc->malo_hwspecs.hwversion,
1935 (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff,
1936 (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff,
1937 (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff,
1938 (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff,
1939 sc->malo_hwspecs.regioncode);
1940
1941 if (bootverbose || malo_rxbuf != MALO_RXBUF)
1942 if_printf(ifp, "using %u rx buffers\n", malo_rxbuf);
1943 if (bootverbose || malo_txbuf != MALO_TXBUF)
1944 if_printf(ifp, "using %u tx buffers\n", malo_txbuf);
1945 }
1946
1947 /*
1948 * Convert net80211 channel to a HAL channel.
1949 */
1950 static void
1951 malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan)
1952 {
1953 hc->channel = chan->ic_ieee;
1954
1955 *(uint32_t *)&hc->flags = 0;
1956 if (IEEE80211_IS_CHAN_2GHZ(chan))
1957 hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ;
1958 }
1959
1960 /*
1961 * Set/change channels. If the channel is really being changed,
1962 * it's done by reseting the chip. To accomplish this we must
1963 * first cleanup any pending DMA, then restart stuff after a la
1964 * malo_init.
1965 */
1966 static int
1967 malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan)
1968 {
1969 struct malo_hal *mh = sc->malo_mh;
1970 struct malo_hal_channel hchan;
1971
1972 DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
1973 __func__, chan->ic_freq, chan->ic_flags);
1974
1975 /*
1976 * Convert to a HAL channel description with the flags constrained
1977 * to reflect the current operating mode.
1978 */
1979 malo_mapchan(&hchan, chan);
1980 malo_hal_intrset(mh, 0); /* disable interrupts */
1981 malo_hal_setchannel(mh, &hchan);
1982 malo_hal_settxpower(mh, &hchan);
1983
1984 /*
1985 * Update internal state.
1986 */
1987 sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq);
1988 sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq);
1989 if (IEEE80211_IS_CHAN_ANYG(chan)) {
1990 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
1991 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
1992 } else {
1993 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
1994 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
1995 }
1996 sc->malo_curchan = hchan;
1997 malo_hal_intrset(mh, sc->malo_imask);
1998
1999 return 0;
2000 }
2001
2002 static void
2003 malo_scan_start(struct ieee80211com *ic)
2004 {
2005 struct ifnet *ifp = ic->ic_ifp;
2006 struct malo_softc *sc = ifp->if_softc;
2007
2008 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
2009 }
2010
2011 static void
2012 malo_scan_end(struct ieee80211com *ic)
2013 {
2014 struct ifnet *ifp = ic->ic_ifp;
2015 struct malo_softc *sc = ifp->if_softc;
2016
2017 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
2018 }
2019
2020 static void
2021 malo_set_channel(struct ieee80211com *ic)
2022 {
2023 struct ifnet *ifp = ic->ic_ifp;
2024 struct malo_softc *sc = ifp->if_softc;
2025
2026 (void) malo_chan_set(sc, ic->ic_curchan);
2027 }
2028
2029 static void
2030 malo_rx_proc(void *arg, int npending)
2031 {
2032 #define IEEE80211_DIR_DSTODS(wh) \
2033 ((((const struct ieee80211_frame *)wh)->i_fc[1] & \
2034 IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
2035 struct malo_softc *sc = arg;
2036 struct ifnet *ifp = sc->malo_ifp;
2037 struct ieee80211com *ic = ifp->if_l2com;
2038 struct malo_rxbuf *bf;
2039 struct malo_rxdesc *ds;
2040 struct mbuf *m, *mnew;
2041 struct ieee80211_qosframe *wh;
2042 struct ieee80211_qosframe_addr4 *wh4;
2043 struct ieee80211_node *ni;
2044 int off, len, hdrlen, pktlen, rssi, ntodo;
2045 uint8_t *data, status;
2046 uint32_t readptr, writeptr;
2047
2048 DPRINTF(sc, MALO_DEBUG_RX_PROC,
2049 "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n",
2050 __func__, npending,
2051 sc->malo_hwspecs.rxdesc_read,
2052 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read),
2053 sc->malo_hwspecs.rxdesc_write,
2054 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write));
2055
2056 readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read);
2057 writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write);
2058 if (readptr == writeptr)
2059 return;
2060
2061 bf = sc->malo_rxnext;
2062 for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) {
2063 if (bf == NULL) {
2064 bf = STAILQ_FIRST(&sc->malo_rxbuf);
2065 break;
2066 }
2067 ds = bf->bf_desc;
2068 if (bf->bf_m == NULL) {
2069 /*
2070 * If data allocation failed previously there
2071 * will be no buffer; try again to re-populate it.
2072 * Note the firmware will not advance to the next
2073 * descriptor with a dma buffer so we must mimic
2074 * this or we'll get out of sync.
2075 */
2076 DPRINTF(sc, MALO_DEBUG_ANY,
2077 "%s: rx buf w/o dma memory\n", __func__);
2078 (void)malo_rxbuf_init(sc, bf);
2079 break;
2080 }
2081 MALO_RXDESC_SYNC(sc, ds,
2082 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2083 if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN)
2084 break;
2085
2086 readptr = le32toh(ds->physnext);
2087
2088 #ifdef MALO_DEBUG
2089 if (sc->malo_debug & MALO_DEBUG_RECV_DESC)
2090 malo_printrxbuf(bf, 0);
2091 #endif
2092 status = ds->status;
2093 if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) {
2094 ifp->if_ierrors++;
2095 goto rx_next;
2096 }
2097 /*
2098 * Sync the data buffer.
2099 */
2100 len = le16toh(ds->pktlen);
2101 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
2102 BUS_DMASYNC_POSTREAD);
2103 /*
2104 * The 802.11 header is provided all or in part at the front;
2105 * use it to calculate the true size of the header that we'll
2106 * construct below. We use this to figure out where to copy
2107 * payload prior to constructing the header.
2108 */
2109 m = bf->bf_m;
2110 data = mtod(m, uint8_t *);
2111 hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t));
2112 off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2113
2114 /*
2115 * Calculate RSSI. XXX wrong
2116 */
2117 rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */
2118 if (rssi > 100)
2119 rssi = 100;
2120
2121 pktlen = hdrlen + (len - off);
2122 /*
2123 * NB: we know our frame is at least as large as
2124 * IEEE80211_MIN_LEN because there is a 4-address frame at
2125 * the front. Hence there's no need to vet the packet length.
2126 * If the frame in fact is too small it should be discarded
2127 * at the net80211 layer.
2128 */
2129
2130 /* XXX don't need mbuf, just dma buffer */
2131 mnew = malo_getrxmbuf(sc, bf);
2132 if (mnew == NULL) {
2133 ifp->if_ierrors++;
2134 goto rx_next;
2135 }
2136 /*
2137 * Attach the dma buffer to the mbuf; malo_rxbuf_init will
2138 * re-setup the rx descriptor using the replacement dma
2139 * buffer we just installed above.
2140 */
2141 bf->bf_m = mnew;
2142 m->m_data += off - hdrlen;
2143 m->m_pkthdr.len = m->m_len = pktlen;
2144 m->m_pkthdr.rcvif = ifp;
2145
2146 /*
2147 * Piece 802.11 header together.
2148 */
2149 wh = mtod(m, struct ieee80211_qosframe *);
2150 /* NB: don't need to do this sometimes but ... */
2151 /* XXX special case so we can memcpy after m_devget? */
2152 ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2153 if (IEEE80211_QOS_HAS_SEQ(wh)) {
2154 if (IEEE80211_DIR_DSTODS(wh)) {
2155 wh4 = mtod(m,
2156 struct ieee80211_qosframe_addr4*);
2157 *(uint16_t *)wh4->i_qos = ds->qosctrl;
2158 } else {
2159 *(uint16_t *)wh->i_qos = ds->qosctrl;
2160 }
2161 }
2162 if (ieee80211_radiotap_active(ic)) {
2163 sc->malo_rx_th.wr_flags = 0;
2164 sc->malo_rx_th.wr_rate = ds->rate;
2165 sc->malo_rx_th.wr_antsignal = rssi;
2166 sc->malo_rx_th.wr_antnoise = ds->nf;
2167 }
2168 #ifdef MALO_DEBUG
2169 if (IFF_DUMPPKTS_RECV(sc, wh)) {
2170 ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2171 len, ds->rate, rssi);
2172 }
2173 #endif
2174 ifp->if_ipackets++;
2175
2176 /* dispatch */
2177 ni = ieee80211_find_rxnode(ic,
2178 (struct ieee80211_frame_min *)wh);
2179 if (ni != NULL) {
2180 (void) ieee80211_input(ni, m, rssi, ds->nf);
2181 ieee80211_free_node(ni);
2182 } else
2183 (void) ieee80211_input_all(ic, m, rssi, ds->nf);
2184 rx_next:
2185 /* NB: ignore ENOMEM so we process more descriptors */
2186 (void) malo_rxbuf_init(sc, bf);
2187 bf = STAILQ_NEXT(bf, bf_list);
2188 }
2189
2190 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr);
2191 sc->malo_rxnext = bf;
2192
2193 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
2194 !IFQ_IS_EMPTY(&ifp->if_snd))
2195 malo_start(ifp);
2196 #undef IEEE80211_DIR_DSTODS
2197 }
2198
2199 static void
2200 malo_stop(struct ifnet *ifp, int disable)
2201 {
2202 struct malo_softc *sc = ifp->if_softc;
2203
2204 MALO_LOCK(sc);
2205 malo_stop_locked(ifp, disable);
2206 MALO_UNLOCK(sc);
2207 }
2208
2209 /*
2210 * Reclaim all tx queue resources.
2211 */
2212 static void
2213 malo_tx_cleanup(struct malo_softc *sc)
2214 {
2215 int i;
2216
2217 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
2218 malo_tx_cleanupq(sc, &sc->malo_txq[i]);
2219 }
2220
2221 int
2222 malo_detach(struct malo_softc *sc)
2223 {
2224 struct ifnet *ifp = sc->malo_ifp;
2225 struct ieee80211com *ic = ifp->if_l2com;
2226
2227 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2228 __func__, ifp->if_flags);
2229
2230 malo_stop(ifp, 1);
2231
2232 if (sc->malo_tq != NULL) {
2233 taskqueue_drain(sc->malo_tq, &sc->malo_rxtask);
2234 taskqueue_drain(sc->malo_tq, &sc->malo_txtask);
2235 taskqueue_free(sc->malo_tq);
2236 sc->malo_tq = NULL;
2237 }
2238
2239 /*
2240 * NB: the order of these is important:
2241 * o call the 802.11 layer before detaching the hal to
2242 * insure callbacks into the driver to delete global
2243 * key cache entries can be handled
2244 * o reclaim the tx queue data structures after calling
2245 * the 802.11 layer as we'll get called back to reclaim
2246 * node state and potentially want to use them
2247 * o to cleanup the tx queues the hal is called, so detach
2248 * it last
2249 * Other than that, it's straightforward...
2250 */
2251 ieee80211_ifdetach(ic);
2252 callout_drain(&sc->malo_watchdog_timer);
2253 malo_dma_cleanup(sc);
2254 malo_tx_cleanup(sc);
2255 malo_hal_detach(sc->malo_mh);
2256 if_free(ifp);
2257
2258 MALO_LOCK_DESTROY(sc);
2259
2260 return 0;
2261 }
2262
2263 void
2264 malo_shutdown(struct malo_softc *sc)
2265 {
2266 malo_stop(sc->malo_ifp, 1);
2267 }
2268
2269 void
2270 malo_suspend(struct malo_softc *sc)
2271 {
2272 struct ifnet *ifp = sc->malo_ifp;
2273
2274 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2275 __func__, ifp->if_flags);
2276
2277 malo_stop(ifp, 1);
2278 }
2279
2280 void
2281 malo_resume(struct malo_softc *sc)
2282 {
2283 struct ifnet *ifp = sc->malo_ifp;
2284
2285 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2286 __func__, ifp->if_flags);
2287
2288 if (ifp->if_flags & IFF_UP)
2289 malo_init(sc);
2290 }
Cache object: 3cb58f699aaf977c627497565a9db91b
|