The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/marvell/gtidmavar.h

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    1 /*      $NetBSD: gtidmavar.h,v 1.1 2003/03/05 22:08:21 matt Exp $       */
    2 
    3 /*
    4  * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  * 3. All advertising materials mentioning features or use of this software
   16  *    must display the following acknowledgement:
   17  *      This product includes software developed for the NetBSD Project by
   18  *      Allegro Networks, Inc., and Wasabi Systems, Inc.
   19  * 4. The name of Allegro Networks, Inc. may not be used to endorse
   20  *    or promote products derived from this software without specific prior
   21  *    written permission.
   22  * 5. The name of Wasabi Systems, Inc. may not be used to endorse
   23  *    or promote products derived from this software without specific prior
   24  *    written permission.
   25  *
   26  * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND
   27  * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
   28  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
   29  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   30  * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC.
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  * POSSIBILITY OF SUCH DAMAGE.
   38  */
   39 
   40 /*
   41  * idmavar.h -- defines for GT-64260 IDMA driver
   42  *
   43  * creation     Wed Aug 15 00:48:10 PDT 2001    cliff
   44  */
   45 
   46 #ifndef _IDMAVAR_H
   47 #define _IDMAVAR_H
   48 
   49 /*
   50  * IDMA Overview:
   51  *
   52  *      A driver allocates an IDMA channel, registering for callbacks.
   53  *      The channel includes descriptors and a pending queue
   54  *
   55  *      The driver allocates & details descriptors, then requests start
   56  *
   57  *              ... time passes ...
   58  *
   59  *      On completion the callback is made, passing the opaque "arg" 
   60  *      (e.g. a softc), a descriptor handle, and completion status
   61  *      The driver callback completes the transaction and frees
   62  *      or recycles the descriptor.
   63  *
   64  *      If the channel is no longer needed the driver may free it,
   65  *      but we expect drivers to hold channels long term
   66  *      (i.e till shutdown).
   67  *
   68  * Descriptors:
   69  *
   70  *      Hardware descriptors are coupled 1:1 with descriptor handles.
   71  *      The descriptors themselves are as defined by GT-64260 spec;
   72  *      descriptor handles control descriptor use.  They are separate
   73  *      to allow efficient packing of descriptors in DMA mapped memory.
   74  */
   75  
   76 /*
   77  * NOTE:
   78  *      interrupt priority IPL_IDMA is determined by worst case client driver
   79  *      since each IDMA IRQ is shared across 4 channels
   80  *      so adjust as needed
   81  */
   82 #define IPL_IDMA        IPL_NET
   83 #define splidma()       splraise(IPL_IDMA)
   84 
   85 #define IDMA_DMSEG_MAX 1
   86 typedef struct idma_dmamem {
   87         bus_dmamap_t idm_map;           /* dmamem'ed memory */
   88         caddr_t idm_kva;                /* kva of dmamem memory */
   89         int idm_nsegs;                  /* # of segment in idm_segs */
   90         int idm_maxsegs;                /* maximum # of segments allowed */
   91         size_t idm_size;                /* size of memory region */
   92         bus_dma_segment_t idm_segs[IDMA_DMSEG_MAX];
   93 } idma_dmamem_t;
   94 
   95 /*
   96  * descriptor handle
   97  */
   98 typedef enum {
   99         IDH_FREE,
  100         IDH_ALLOC,
  101         IDH_QWAIT,
  102         IDH_PENDING,
  103         IDH_RETRY,
  104         IDH_DONE,
  105         IDH_CANCEL,
  106         IDH_ABORT
  107 } idma_desch_state_t;
  108 typedef enum {
  109         IDS_OK,
  110         IDS_FAIL
  111 } idma_sts_t;
  112 struct idma_chan;
  113 typedef struct idma_desch {
  114         idma_desch_state_t idh_state;
  115         struct idma_desch *idh_next;
  116         struct idma_chan *idh_chan;
  117         u_int32_t idh_hold;
  118         SIMPLEQ_ENTRY(idma_desch) idh_q;
  119         struct idma_desc *idh_desc_va;
  120         struct idma_desc *idh_desc_pa;
  121         void *idh_aux;
  122         u_int64_t tb;
  123 } idma_desch_t;
  124 
  125 
  126 /*
  127  * descriptor handle queue head
  128  */
  129 typedef unsigned int idma_chan_state_t;
  130 #define IDC_FREE        0
  131 #define IDC_ALLOC       1
  132 #define IDC_IDLE        2
  133 #define IDC_STOPPED     4
  134 #define IDC_QFULL       8
  135 typedef struct idma_q {
  136         unsigned int idq_depth;
  137         SIMPLEQ_HEAD(, idma_desch) idq_q;
  138 } idma_q_t;
  139 
  140 /*
  141  * IDMA channel control
  142  */
  143 struct idma_softc;
  144 typedef struct idma_chan {
  145         idma_chan_state_t idc_state;
  146         struct idma_softc *idc_sc;
  147         unsigned int idc_chan;                  /* channel number */
  148         int (*idc_callback) __P((void *, struct idma_desch *, u_int32_t));
  149                                                 /* completion callback */
  150         void *idc_arg;                          /* completion callback arg */
  151         idma_q_t idc_q;                         /* pending transactions */
  152         unsigned int idc_ndesch;                /* # descriptor handles */
  153         idma_desch_t *idc_active;               /* active transaction */
  154         idma_desch_t *idc_desch_free;           /* allocation ptr */
  155         idma_desch_t *idc_desch_done;           /* completion ptr */
  156         idma_desch_t *idc_desch;                /* descriptor handles */
  157         idma_dmamem_t idc_desc_mem;             /* descriptor dmamem */
  158         unsigned long idc_done_count;           /* running done count */
  159         unsigned long idc_abort_count;          /* running abort count */
  160 } idma_chan_t;
  161 
  162 
  163 /*
  164  * IDMA driver softc
  165  */
  166 typedef unsigned int idma_state_t;
  167 #define IDMA_ATTACHED   1
  168 typedef struct idma_softc {
  169         struct device idma_dev;
  170         struct gt_softc *idma_gt;
  171         bus_space_tag_t idma_bustag;
  172         bus_dma_tag_t idma_dmatag;
  173         bus_space_handle_t idma_bushandle;
  174         bus_addr_t idma_reg_base;
  175         bus_size_t idma_reg_size;
  176         u_int32_t idma_ien;
  177         struct callout idma_callout;
  178         unsigned int idma_callout_state;
  179         unsigned int idma_burst_size;
  180         idma_state_t idma_state;
  181         idma_chan_t idma_chan[NIDMA_CHANS];
  182         void *idma_ih[4];
  183 } idma_softc_t;
  184 
  185 /*
  186  * IDMA external function prototypes
  187  */
  188 extern void idma_chan_free __P((idma_chan_t *));
  189 extern idma_chan_t *idma_chan_alloc
  190         __P((unsigned int, int (*) __P((void *, struct idma_desch *, u_int32_t)), void *));
  191 
  192 extern void idma_desch_free __P((idma_desch_t *));
  193 extern idma_desch_t *idma_desch_alloc __P((idma_chan_t *));
  194 extern void idma_desch_list_free __P((idma_desch_t *));
  195 
  196 extern void idma_desc_list_free __P((idma_desch_t *));
  197 extern idma_desch_t *idma_desch_list_alloc __P((idma_chan_t *, unsigned int));
  198 
  199 extern void idma_intr_enb __P((idma_chan_t *));
  200 extern void idma_intr_dis __P((idma_chan_t *));
  201 
  202 extern int idma_start __P((idma_desch_t *));
  203 extern void idma_qflush __P((idma_chan_t *));
  204 
  205 extern void idma_abort __P((idma_desch_t *, unsigned int, const char *));
  206 
  207 /*
  208  * flags for idma_abort()
  209  */
  210 #define IDMA_ABORT_CANCEL       1       /* don't atempt completion or retry */
  211 
  212 
  213 #endif /* _IDMAVAR_H */

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