Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/mfi/mfivar.h
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1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause 3 * 4 * Copyright (c) 2006 IronPort Systems 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 /*- 29 * Copyright (c) 2007 LSI Corp. 30 * Copyright (c) 2007 Rajesh Prabhakaran. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 42 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 43 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 44 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 45 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 46 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 47 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 48 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 49 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 50 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 51 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 52 * SUCH DAMAGE. 53 */ 54 55 #ifndef _MFIVAR_H 56 #define _MFIVAR_H 57 58 #include <sys/cdefs.h> 59 __FBSDID("$FreeBSD$"); 60 61 #include <sys/lock.h> 62 #include <sys/sx.h> 63 64 #include <sys/types.h> 65 #include <sys/taskqueue.h> 66 #include "opt_mfi.h" 67 68 /* 69 * SCSI structures and definitions are used from here, but no linking 70 * requirements are made to CAM. 71 */ 72 #include <cam/scsi/scsi_all.h> 73 74 struct mfi_hwcomms { 75 uint32_t hw_pi; 76 uint32_t hw_ci; 77 uint32_t hw_reply_q[1]; 78 }; 79 #define MEGASAS_MAX_NAME 32 80 #define MEGASAS_VERSION "4.23" 81 82 struct mfi_softc; 83 struct disk; 84 struct ccb_hdr; 85 86 struct mfi_command { 87 TAILQ_ENTRY(mfi_command) cm_link; 88 time_t cm_timestamp; 89 struct mfi_softc *cm_sc; 90 union mfi_frame *cm_frame; 91 bus_addr_t cm_frame_busaddr; 92 struct mfi_sense *cm_sense; 93 bus_addr_t cm_sense_busaddr; 94 bus_dmamap_t cm_dmamap; 95 union mfi_sgl *cm_sg; 96 void *cm_data; 97 int cm_len; 98 int cm_stp_len; 99 int cm_total_frame_size; 100 int cm_extra_frames; 101 int cm_flags; 102 #define MFI_CMD_MAPPED (1<<0) 103 #define MFI_CMD_DATAIN (1<<1) 104 #define MFI_CMD_DATAOUT (1<<2) 105 #define MFI_CMD_COMPLETED (1<<3) 106 #define MFI_CMD_POLLED (1<<4) 107 #define MFI_CMD_SCSI (1<<5) 108 #define MFI_CMD_CCB (1<<6) 109 #define MFI_CMD_BIO (1<<7) 110 #define MFI_CMD_TBOLT (1<<8) 111 #define MFI_ON_MFIQ_FREE (1<<9) 112 #define MFI_ON_MFIQ_READY (1<<10) 113 #define MFI_ON_MFIQ_BUSY (1<<11) 114 #define MFI_ON_MFIQ_MASK (MFI_ON_MFIQ_FREE | MFI_ON_MFIQ_READY| \ 115 MFI_ON_MFIQ_BUSY) 116 #define MFI_CMD_FLAGS_FMT "\2" \ 117 "\1MAPPED" \ 118 "\2DATAIN" \ 119 "\3DATAOUT" \ 120 "\4COMPLETED" \ 121 "\5POLLED" \ 122 "\6SCSI" \ 123 "\7BIO" \ 124 "\10TBOLT" \ 125 "\11Q_FREE" \ 126 "\12Q_READY" \ 127 "\13Q_BUSY" 128 uint8_t retry_for_fw_reset; 129 void (* cm_complete)(struct mfi_command *cm); 130 void *cm_private; 131 int cm_index; 132 int cm_error; 133 }; 134 135 struct mfi_disk { 136 TAILQ_ENTRY(mfi_disk) ld_link; 137 device_t ld_dev; 138 int ld_id; 139 int ld_unit; 140 struct mfi_softc *ld_controller; 141 struct mfi_ld_info *ld_info; 142 struct disk *ld_disk; 143 int ld_flags; 144 #define MFI_DISK_FLAGS_OPEN 0x01 145 #define MFI_DISK_FLAGS_DISABLED 0x02 146 }; 147 148 struct mfi_disk_pending { 149 TAILQ_ENTRY(mfi_disk_pending) ld_link; 150 int ld_id; 151 }; 152 153 struct mfi_system_pd { 154 TAILQ_ENTRY(mfi_system_pd) pd_link; 155 device_t pd_dev; 156 int pd_id; 157 int pd_unit; 158 struct mfi_softc *pd_controller; 159 struct mfi_pd_info *pd_info; 160 struct disk *pd_disk; 161 int pd_flags; 162 }; 163 164 struct mfi_system_pending { 165 TAILQ_ENTRY(mfi_system_pending) pd_link; 166 int pd_id; 167 }; 168 169 struct mfi_evt_queue_elm { 170 TAILQ_ENTRY(mfi_evt_queue_elm) link; 171 struct mfi_evt_detail detail; 172 }; 173 174 struct mfi_aen { 175 TAILQ_ENTRY(mfi_aen) aen_link; 176 struct proc *p; 177 }; 178 179 struct mfi_skinny_dma_info { 180 bus_dma_tag_t dmat[514]; 181 bus_dmamap_t dmamap[514]; 182 uint32_t mem[514]; 183 int noofmaps; 184 }; 185 186 struct megasas_sge 187 { 188 bus_addr_t phys_addr; 189 uint32_t length; 190 }; 191 192 struct mfi_cmd_tbolt; 193 194 struct mfi_softc { 195 device_t mfi_dev; 196 int mfi_flags; 197 #define MFI_FLAGS_SG64 (1<<0) 198 #define MFI_FLAGS_QFRZN (1<<1) 199 #define MFI_FLAGS_OPEN (1<<2) 200 #define MFI_FLAGS_STOP (1<<3) 201 #define MFI_FLAGS_1064R (1<<4) 202 #define MFI_FLAGS_1078 (1<<5) 203 #define MFI_FLAGS_GEN2 (1<<6) 204 #define MFI_FLAGS_SKINNY (1<<7) 205 #define MFI_FLAGS_TBOLT (1<<8) 206 #define MFI_FLAGS_MRSAS (1<<9) 207 #define MFI_FLAGS_INVADER (1<<10) 208 #define MFI_FLAGS_FURY (1<<11) 209 // Start: LSIP200113393 210 bus_dma_tag_t verbuf_h_dmat; 211 bus_dmamap_t verbuf_h_dmamap; 212 bus_addr_t verbuf_h_busaddr; 213 uint32_t *verbuf; 214 void *kbuff_arr[MAX_IOCTL_SGE]; 215 bus_dma_tag_t mfi_kbuff_arr_dmat[2]; 216 bus_dmamap_t mfi_kbuff_arr_dmamap[2]; 217 bus_addr_t mfi_kbuff_arr_busaddr[2]; 218 219 struct mfi_hwcomms *mfi_comms; 220 TAILQ_HEAD(,mfi_command) mfi_free; 221 TAILQ_HEAD(,mfi_command) mfi_ready; 222 TAILQ_HEAD(BUSYQ,mfi_command) mfi_busy; 223 struct bio_queue_head mfi_bioq; 224 struct mfi_qstat mfi_qstat[MFIQ_COUNT]; 225 226 struct resource *mfi_regs_resource; 227 bus_space_handle_t mfi_bhandle; 228 bus_space_tag_t mfi_btag; 229 int mfi_regs_rid; 230 231 bus_dma_tag_t mfi_parent_dmat; 232 bus_dma_tag_t mfi_buffer_dmat; 233 234 bus_dma_tag_t mfi_comms_dmat; 235 bus_dmamap_t mfi_comms_dmamap; 236 bus_addr_t mfi_comms_busaddr; 237 238 bus_dma_tag_t mfi_frames_dmat; 239 bus_dmamap_t mfi_frames_dmamap; 240 bus_addr_t mfi_frames_busaddr; 241 union mfi_frame *mfi_frames; 242 243 bus_dma_tag_t mfi_tb_init_dmat; 244 bus_dmamap_t mfi_tb_init_dmamap; 245 bus_addr_t mfi_tb_init_busaddr; 246 bus_addr_t mfi_tb_ioc_init_busaddr; 247 union mfi_frame *mfi_tb_init; 248 249 TAILQ_HEAD(,mfi_evt_queue_elm) mfi_evt_queue; 250 struct task mfi_evt_task; 251 struct task mfi_map_sync_task; 252 TAILQ_HEAD(,mfi_aen) mfi_aen_pids; 253 struct mfi_command *mfi_aen_cm; 254 struct mfi_command *mfi_skinny_cm; 255 struct mfi_command *mfi_map_sync_cm; 256 int cm_aen_abort; 257 int cm_map_abort; 258 uint32_t mfi_aen_triggered; 259 uint32_t mfi_poll_waiting; 260 uint32_t mfi_boot_seq_num; 261 struct selinfo mfi_select; 262 int mfi_delete_busy_volumes; 263 int mfi_keep_deleted_volumes; 264 int mfi_detaching; 265 266 bus_dma_tag_t mfi_sense_dmat; 267 bus_dmamap_t mfi_sense_dmamap; 268 bus_addr_t mfi_sense_busaddr; 269 struct mfi_sense *mfi_sense; 270 271 struct resource *mfi_irq; 272 void *mfi_intr; 273 int mfi_irq_rid; 274 275 struct intr_config_hook mfi_ich; 276 eventhandler_tag eh; 277 /* OCR flags */ 278 uint8_t adpreset; 279 uint8_t issuepend_done; 280 uint8_t disableOnlineCtrlReset; 281 uint32_t mfiStatus; 282 uint32_t last_seq_num; 283 uint32_t volatile hw_crit_error; 284 285 /* 286 * Allocation for the command array. Used as an indexable array to 287 * recover completed commands. 288 */ 289 struct mfi_command *mfi_commands; 290 /* 291 * How many commands the firmware can handle. Also how big the reply 292 * queue is, minus 1. 293 */ 294 int mfi_max_fw_cmds; 295 /* 296 * How many S/G elements we'll ever actually use 297 */ 298 int mfi_max_sge; 299 /* 300 * How many bytes a compound frame is, including all of the extra frames 301 * that are used for S/G elements. 302 */ 303 int mfi_cmd_size; 304 /* 305 * How large an S/G element is. Used to calculate the number of single 306 * frames in a command. 307 */ 308 int mfi_sge_size; 309 /* 310 * Max number of sectors that the firmware allows 311 */ 312 uint32_t mfi_max_io; 313 314 TAILQ_HEAD(,mfi_disk) mfi_ld_tqh; 315 TAILQ_HEAD(,mfi_system_pd) mfi_syspd_tqh; 316 TAILQ_HEAD(,mfi_disk_pending) mfi_ld_pend_tqh; 317 TAILQ_HEAD(,mfi_system_pending) mfi_syspd_pend_tqh; 318 eventhandler_tag mfi_eh; 319 struct cdev *mfi_cdev; 320 321 TAILQ_HEAD(, ccb_hdr) mfi_cam_ccbq; 322 struct mfi_command * (* mfi_cam_start)(void *); 323 void (*mfi_cam_rescan_cb)(struct mfi_softc *, 324 uint32_t); 325 struct callout mfi_watchdog_callout; 326 struct mtx mfi_io_lock; 327 struct sx mfi_config_lock; 328 329 /* Controller type specific interfaces */ 330 void (*mfi_enable_intr)(struct mfi_softc *sc); 331 void (*mfi_disable_intr)(struct mfi_softc *sc); 332 int32_t (*mfi_read_fw_status)(struct mfi_softc *sc); 333 int (*mfi_check_clear_intr)(struct mfi_softc *sc); 334 void (*mfi_issue_cmd)(struct mfi_softc *sc, bus_addr_t bus_add, 335 uint32_t frame_cnt); 336 int (*mfi_adp_reset)(struct mfi_softc *sc); 337 int (*mfi_adp_check_reset)(struct mfi_softc *sc); 338 void (*mfi_intr_ptr)(void *sc); 339 340 /* ThunderBolt */ 341 uint32_t mfi_tbolt; 342 uint32_t MFA_enabled; 343 /* Single Reply structure size */ 344 uint16_t reply_size; 345 /* Singler message size. */ 346 uint16_t raid_io_msg_size; 347 TAILQ_HEAD(TB, mfi_cmd_tbolt) mfi_cmd_tbolt_tqh; 348 /* ThunderBolt base contiguous memory mapping. */ 349 bus_dma_tag_t mfi_tb_dmat; 350 bus_dmamap_t mfi_tb_dmamap; 351 bus_addr_t mfi_tb_busaddr; 352 /* ThunderBolt Contiguous DMA memory Mapping */ 353 uint8_t * request_message_pool; 354 uint8_t * request_message_pool_align; 355 uint8_t * request_desc_pool; 356 bus_addr_t request_msg_busaddr; 357 bus_addr_t reply_frame_busaddr; 358 bus_addr_t sg_frame_busaddr; 359 /* ThunderBolt IOC Init Descriptor */ 360 bus_dma_tag_t mfi_tb_ioc_init_dmat; 361 bus_dmamap_t mfi_tb_ioc_init_dmamap; 362 uint8_t * mfi_tb_ioc_init_desc; 363 struct mfi_cmd_tbolt **mfi_cmd_pool_tbolt; 364 /* Virtual address of reply Frame Pool */ 365 struct mfi_mpi2_reply_header* reply_frame_pool; 366 struct mfi_mpi2_reply_header* reply_frame_pool_align; 367 368 /* Last reply frame address */ 369 uint8_t * reply_pool_limit; 370 uint16_t last_reply_idx; 371 uint8_t max_SGEs_in_chain_message; 372 uint8_t max_SGEs_in_main_message; 373 uint8_t chain_offset_value_for_main_message; 374 uint8_t chain_offset_value_for_mpt_ptmsg; 375 }; 376 377 union desc_value { 378 uint64_t word; 379 struct { 380 uint32_t low; 381 uint32_t high; 382 }u; 383 }; 384 385 // TODO find the right definition 386 #define XXX_MFI_CMD_OP_INIT2 0x9 387 /* 388 * Request descriptor types 389 */ 390 #define MFI_REQ_DESCRIPT_FLAGS_LD_IO 0x7 391 #define MFI_REQ_DESCRIPT_FLAGS_MFA 0x1 392 #define MFI_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 0x1 393 #define MFI_FUSION_FP_DEFAULT_TIMEOUT 0x14 394 #define MFI_LOAD_BALANCE_FLAG 0x1 395 #define MFI_DCMD_MBOX_PEND_FLAG 0x1 396 397 //#define MR_PROT_INFO_TYPE_CONTROLLER 0x08 398 #define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f 399 #define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9 400 #define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB 401 #define MEGASAS_SCSI_ADDL_CDB_LEN 0x18 402 #define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20 403 #define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60 404 #define MEGASAS_EEDPBLOCKSIZE 512 405 struct mfi_cmd_tbolt { 406 union mfi_mpi2_request_descriptor *request_desc; 407 struct mfi_mpi2_request_raid_scsi_io *io_request; 408 bus_addr_t io_request_phys_addr; 409 bus_addr_t sg_frame_phys_addr; 410 bus_addr_t sense_phys_addr; 411 MPI2_SGE_IO_UNION *sg_frame; 412 uint8_t *sense; 413 TAILQ_ENTRY(mfi_cmd_tbolt) next; 414 /* 415 * Context for a MFI frame. 416 * Used to get the mfi cmd from list when a MFI cmd is completed 417 */ 418 uint32_t sync_cmd_idx; 419 uint16_t index; 420 uint8_t status; 421 }; 422 423 extern int mfi_attach(struct mfi_softc *); 424 extern void mfi_free(struct mfi_softc *); 425 extern int mfi_shutdown(struct mfi_softc *); 426 extern void mfi_startio(struct mfi_softc *); 427 extern void mfi_disk_complete(struct bio *); 428 extern int mfi_disk_disable(struct mfi_disk *); 429 extern void mfi_disk_enable(struct mfi_disk *); 430 extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int); 431 extern int mfi_syspd_disable(struct mfi_system_pd *); 432 extern void mfi_syspd_enable(struct mfi_system_pd *); 433 extern int mfi_dump_syspd_blocks(struct mfi_softc *, int id, uint64_t, void *, 434 int); 435 extern int mfi_transition_firmware(struct mfi_softc *sc); 436 extern int mfi_aen_setup(struct mfi_softc *sc, uint32_t seq_start); 437 extern void mfi_complete(struct mfi_softc *sc, struct mfi_command *cm); 438 extern int mfi_mapcmd(struct mfi_softc *sc,struct mfi_command *cm); 439 extern int mfi_wait_command(struct mfi_softc *sc, struct mfi_command *cm); 440 extern void mfi_tbolt_enable_intr_ppc(struct mfi_softc *); 441 extern void mfi_tbolt_disable_intr_ppc(struct mfi_softc *); 442 extern int32_t mfi_tbolt_read_fw_status_ppc(struct mfi_softc *); 443 extern int32_t mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *); 444 extern void mfi_tbolt_issue_cmd_ppc(struct mfi_softc *, bus_addr_t, uint32_t); 445 extern void mfi_tbolt_init_globals(struct mfi_softc*); 446 extern uint32_t mfi_tbolt_get_memory_requirement(struct mfi_softc *); 447 extern int mfi_tbolt_init_desc_pool(struct mfi_softc *, uint8_t *, uint32_t); 448 extern int mfi_tbolt_init_MFI_queue(struct mfi_softc *); 449 extern void mfi_intr_tbolt(void *arg); 450 extern int mfi_tbolt_alloc_cmd(struct mfi_softc *sc); 451 extern int mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_command *cm); 452 extern int mfi_tbolt_adp_reset(struct mfi_softc *sc); 453 extern int mfi_tbolt_reset(struct mfi_softc *sc); 454 extern void mfi_tbolt_sync_map_info(struct mfi_softc *sc); 455 extern void mfi_handle_map_sync(void *context, int pending); 456 extern int mfi_dcmd_command(struct mfi_softc *, struct mfi_command **, 457 uint32_t, void **, size_t); 458 extern int mfi_build_cdb(int, uint8_t, u_int64_t, u_int32_t, uint8_t *); 459 460 #define MFIQ_ADD(sc, qname) \ 461 do { \ 462 struct mfi_qstat *qs; \ 463 \ 464 qs = &(sc)->mfi_qstat[qname]; \ 465 qs->q_length++; \ 466 if (qs->q_length > qs->q_max) \ 467 qs->q_max = qs->q_length; \ 468 } while (0) 469 470 #define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length-- 471 472 #define MFIQ_INIT(sc, qname) \ 473 do { \ 474 sc->mfi_qstat[qname].q_length = 0; \ 475 sc->mfi_qstat[qname].q_max = 0; \ 476 } while (0) 477 478 #define MFIQ_COMMAND_QUEUE(name, index) \ 479 static __inline void \ 480 mfi_initq_ ## name (struct mfi_softc *sc) \ 481 { \ 482 TAILQ_INIT(&sc->mfi_ ## name); \ 483 MFIQ_INIT(sc, index); \ 484 } \ 485 static __inline void \ 486 mfi_enqueue_ ## name (struct mfi_command *cm) \ 487 { \ 488 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 489 panic("command %p is on another queue, " \ 490 "flags = %#x\n", cm, cm->cm_flags); \ 491 } \ 492 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 493 cm->cm_flags |= MFI_ON_ ## index; \ 494 MFIQ_ADD(cm->cm_sc, index); \ 495 } \ 496 static __inline void \ 497 mfi_requeue_ ## name (struct mfi_command *cm) \ 498 { \ 499 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 500 panic("command %p is on another queue, " \ 501 "flags = %#x\n", cm, cm->cm_flags); \ 502 } \ 503 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 504 cm->cm_flags |= MFI_ON_ ## index; \ 505 MFIQ_ADD(cm->cm_sc, index); \ 506 } \ 507 static __inline struct mfi_command * \ 508 mfi_dequeue_ ## name (struct mfi_softc *sc) \ 509 { \ 510 struct mfi_command *cm; \ 511 \ 512 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \ 513 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 514 panic("command %p not in queue, " \ 515 "flags = %#x, bit = %#x\n", cm, \ 516 cm->cm_flags, MFI_ON_ ## index); \ 517 } \ 518 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \ 519 cm->cm_flags &= ~MFI_ON_ ## index; \ 520 MFIQ_REMOVE(sc, index); \ 521 } \ 522 return (cm); \ 523 } \ 524 static __inline void \ 525 mfi_remove_ ## name (struct mfi_command *cm) \ 526 { \ 527 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 528 panic("command %p not in queue, flags = %#x, " \ 529 "bit = %#x\n", cm, cm->cm_flags, \ 530 MFI_ON_ ## index); \ 531 } \ 532 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 533 cm->cm_flags &= ~MFI_ON_ ## index; \ 534 MFIQ_REMOVE(cm->cm_sc, index); \ 535 } \ 536 struct hack 537 538 MFIQ_COMMAND_QUEUE(free, MFIQ_FREE); 539 MFIQ_COMMAND_QUEUE(ready, MFIQ_READY); 540 MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY); 541 542 static __inline void 543 mfi_initq_bio(struct mfi_softc *sc) 544 { 545 bioq_init(&sc->mfi_bioq); 546 MFIQ_INIT(sc, MFIQ_BIO); 547 } 548 549 static __inline void 550 mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp) 551 { 552 bioq_insert_tail(&sc->mfi_bioq, bp); 553 MFIQ_ADD(sc, MFIQ_BIO); 554 } 555 556 static __inline struct bio * 557 mfi_dequeue_bio(struct mfi_softc *sc) 558 { 559 struct bio *bp; 560 561 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) { 562 bioq_remove(&sc->mfi_bioq, bp); 563 MFIQ_REMOVE(sc, MFIQ_BIO); 564 } 565 return (bp); 566 } 567 568 /* 569 * This is from the original scsi_extract_sense() in CAM. It's copied 570 * here because CAM now uses a non-inline version that follows more complex 571 * additions to the SPC spec, and we don't want to force a dependency on 572 * the CAM module for such a trivial action. 573 */ 574 static __inline void 575 mfi_extract_sense(struct scsi_sense_data_fixed *sense, 576 int *error_code, int *sense_key, int *asc, int *ascq) 577 { 578 579 *error_code = sense->error_code & SSD_ERRCODE; 580 *sense_key = sense->flags & SSD_KEY; 581 *asc = (sense->extra_len >= 5) ? sense->add_sense_code : 0; 582 *ascq = (sense->extra_len >= 6) ? sense->add_sense_code_qual : 0; 583 } 584 585 static __inline void 586 mfi_print_sense(struct mfi_softc *sc, void *sense) 587 { 588 int error, key, asc, ascq; 589 590 mfi_extract_sense((struct scsi_sense_data_fixed *)sense, 591 &error, &key, &asc, &ascq); 592 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, " 593 "asc %d, ascq %d\n", error, key, asc, ascq); 594 } 595 596 597 #define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \ 598 sc->mfi_bhandle, (reg), (val)) 599 #define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \ 600 (sc)->mfi_bhandle, (reg)) 601 #define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \ 602 sc->mfi_bhandle, (reg), (val)) 603 #define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \ 604 (sc)->mfi_bhandle, (reg)) 605 #define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \ 606 sc->mfi_bhandle, (reg), (val)) 607 #define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \ 608 (sc)->mfi_bhandle, (reg)) 609 610 MALLOC_DECLARE(M_MFIBUF); 611 SYSCTL_DECL(_hw_mfi); 612 613 #define MFI_RESET_WAIT_TIME 180 614 #define MFI_CMD_TIMEOUT 30 615 #define MFI_SYS_PD_IO 0 616 #define MFI_LD_IO 1 617 #define MFI_SKINNY_MEMORY 0x02000000 618 #define MFI_MAXPHYS (128 * 1024) 619 620 #ifdef MFI_DEBUG 621 extern void mfi_print_cmd(struct mfi_command *cm); 622 extern void mfi_dump_cmds(struct mfi_softc *sc); 623 extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *, 624 const char *, int); 625 #define MFI_PRINT_CMD(cm) mfi_print_cmd(cm) 626 #define MFI_DUMP_CMDS(sc) mfi_dump_cmds(sc) 627 #define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__) 628 #else 629 #define MFI_PRINT_CMD(cm) 630 #define MFI_DUMP_CMDS(sc) 631 #define MFI_VALIDATE_CMD(sc, cm) 632 #endif 633 634 extern void mfi_release_command(struct mfi_command *); 635 extern void mfi_tbolt_return_cmd(struct mfi_softc *, 636 struct mfi_cmd_tbolt *, struct mfi_command *); 637 638 #endif /* _MFIVAR_H */
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