FreeBSD/Linux Kernel Cross Reference
sys/dev/mfi/mfivar.h
1 /*-
2 * Copyright (c) 2006 IronPort Systems
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26 /*-
27 * Copyright (c) 2007 LSI Corp.
28 * Copyright (c) 2007 Rajesh Prabhakaran.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 * 1. Redistributions of source code must retain the above copyright
35 * notice, this list of conditions and the following disclaimer.
36 * 2. Redistributions in binary form must reproduce the above copyright
37 * notice, this list of conditions and the following disclaimer in the
38 * documentation and/or other materials provided with the distribution.
39 *
40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
50 * SUCH DAMAGE.
51 */
52
53 #ifndef _MFIVAR_H
54 #define _MFIVAR_H
55
56 #include <sys/cdefs.h>
57 __FBSDID("$FreeBSD: releng/8.4/sys/dev/mfi/mfivar.h 243826 2012-12-03 18:47:25Z delphij $");
58
59 #include <sys/lock.h>
60 #include <sys/sx.h>
61
62 #include <sys/types.h>
63 #include <sys/taskqueue.h>
64 #include "opt_mfi.h"
65
66 /*
67 * SCSI structures and definitions are used from here, but no linking
68 * requirements are made to CAM.
69 */
70 #include <cam/scsi/scsi_all.h>
71
72 struct mfi_hwcomms {
73 uint32_t hw_pi;
74 uint32_t hw_ci;
75 uint32_t hw_reply_q[1];
76 };
77 #define MEGASAS_MAX_NAME 32
78 #define MEGASAS_VERSION "4.23"
79
80 struct mfi_softc;
81 struct disk;
82 struct ccb_hdr;
83
84 struct mfi_command {
85 TAILQ_ENTRY(mfi_command) cm_link;
86 time_t cm_timestamp;
87 struct mfi_softc *cm_sc;
88 union mfi_frame *cm_frame;
89 bus_addr_t cm_frame_busaddr;
90 struct mfi_sense *cm_sense;
91 bus_addr_t cm_sense_busaddr;
92 bus_dmamap_t cm_dmamap;
93 union mfi_sgl *cm_sg;
94 void *cm_data;
95 int cm_len;
96 int cm_stp_len;
97 int cm_total_frame_size;
98 int cm_extra_frames;
99 int cm_flags;
100 #define MFI_CMD_MAPPED (1<<0)
101 #define MFI_CMD_DATAIN (1<<1)
102 #define MFI_CMD_DATAOUT (1<<2)
103 #define MFI_CMD_COMPLETED (1<<3)
104 #define MFI_CMD_POLLED (1<<4)
105 #define MFI_ON_MFIQ_FREE (1<<5)
106 #define MFI_ON_MFIQ_READY (1<<6)
107 #define MFI_ON_MFIQ_BUSY (1<<7)
108 #define MFI_ON_MFIQ_MASK ((1<<5)|(1<<6)|(1<<7))
109 #define MFI_CMD_SCSI (1<<8)
110 uint8_t retry_for_fw_reset;
111 void (* cm_complete)(struct mfi_command *cm);
112 void *cm_private;
113 int cm_index;
114 int cm_error;
115 };
116
117 struct mfi_disk {
118 TAILQ_ENTRY(mfi_disk) ld_link;
119 device_t ld_dev;
120 int ld_id;
121 int ld_unit;
122 struct mfi_softc *ld_controller;
123 struct mfi_ld_info *ld_info;
124 struct disk *ld_disk;
125 int ld_flags;
126 #define MFI_DISK_FLAGS_OPEN 0x01
127 #define MFI_DISK_FLAGS_DISABLED 0x02
128 };
129
130 struct mfi_disk_pending {
131 TAILQ_ENTRY(mfi_disk_pending) ld_link;
132 int ld_id;
133 };
134
135 struct mfi_system_pd {
136 TAILQ_ENTRY(mfi_system_pd) pd_link;
137 device_t pd_dev;
138 int pd_id;
139 int pd_unit;
140 struct mfi_softc *pd_controller;
141 struct mfi_pd_info *pd_info;
142 struct disk *pd_disk;
143 int pd_flags;
144 };
145
146 struct mfi_system_pending {
147 TAILQ_ENTRY(mfi_system_pending) pd_link;
148 int pd_id;
149 };
150
151 struct mfi_evt_queue_elm {
152 TAILQ_ENTRY(mfi_evt_queue_elm) link;
153 struct mfi_evt_detail detail;
154 };
155
156 struct mfi_aen {
157 TAILQ_ENTRY(mfi_aen) aen_link;
158 struct proc *p;
159 };
160
161 struct mfi_skinny_dma_info {
162 bus_dma_tag_t dmat[514];
163 bus_dmamap_t dmamap[514];
164 uint32_t mem[514];
165 int noofmaps;
166 };
167
168 struct megasas_sge
169 {
170 bus_addr_t phys_addr;
171 uint32_t length;
172 };
173
174 struct mfi_cmd_tbolt;
175
176 struct mfi_softc {
177 device_t mfi_dev;
178 int mfi_flags;
179 #define MFI_FLAGS_SG64 (1<<0)
180 #define MFI_FLAGS_QFRZN (1<<1)
181 #define MFI_FLAGS_OPEN (1<<2)
182 #define MFI_FLAGS_STOP (1<<3)
183 #define MFI_FLAGS_1064R (1<<4)
184 #define MFI_FLAGS_1078 (1<<5)
185 #define MFI_FLAGS_GEN2 (1<<6)
186 #define MFI_FLAGS_SKINNY (1<<7)
187 #define MFI_FLAGS_TBOLT (1<<8)
188 // Start: LSIP200113393
189 bus_dma_tag_t verbuf_h_dmat;
190 bus_dmamap_t verbuf_h_dmamap;
191 bus_addr_t verbuf_h_busaddr;
192 uint32_t *verbuf;
193 void *kbuff_arr[MAX_IOCTL_SGE];
194 bus_dma_tag_t mfi_kbuff_arr_dmat[2];
195 bus_dmamap_t mfi_kbuff_arr_dmamap[2];
196 bus_addr_t mfi_kbuff_arr_busaddr[2];
197
198 struct mfi_hwcomms *mfi_comms;
199 TAILQ_HEAD(,mfi_command) mfi_free;
200 TAILQ_HEAD(,mfi_command) mfi_ready;
201 TAILQ_HEAD(BUSYQ,mfi_command) mfi_busy;
202 struct bio_queue_head mfi_bioq;
203 struct mfi_qstat mfi_qstat[MFIQ_COUNT];
204
205 struct resource *mfi_regs_resource;
206 bus_space_handle_t mfi_bhandle;
207 bus_space_tag_t mfi_btag;
208 int mfi_regs_rid;
209
210 bus_dma_tag_t mfi_parent_dmat;
211 bus_dma_tag_t mfi_buffer_dmat;
212
213 bus_dma_tag_t mfi_comms_dmat;
214 bus_dmamap_t mfi_comms_dmamap;
215 bus_addr_t mfi_comms_busaddr;
216
217 bus_dma_tag_t mfi_frames_dmat;
218 bus_dmamap_t mfi_frames_dmamap;
219 bus_addr_t mfi_frames_busaddr;
220 union mfi_frame *mfi_frames;
221
222 bus_dma_tag_t mfi_tb_init_dmat;
223 bus_dmamap_t mfi_tb_init_dmamap;
224 bus_addr_t mfi_tb_init_busaddr;
225 bus_addr_t mfi_tb_ioc_init_busaddr;
226 union mfi_frame *mfi_tb_init;
227
228 TAILQ_HEAD(,mfi_evt_queue_elm) mfi_evt_queue;
229 struct task mfi_evt_task;
230 struct task mfi_map_sync_task;
231 TAILQ_HEAD(,mfi_aen) mfi_aen_pids;
232 struct mfi_command *mfi_aen_cm;
233 struct mfi_command *mfi_skinny_cm;
234 struct mfi_command *mfi_map_sync_cm;
235 int cm_aen_abort;
236 int cm_map_abort;
237 uint32_t mfi_aen_triggered;
238 uint32_t mfi_poll_waiting;
239 uint32_t mfi_boot_seq_num;
240 struct selinfo mfi_select;
241 int mfi_delete_busy_volumes;
242 int mfi_keep_deleted_volumes;
243 int mfi_detaching;
244
245 bus_dma_tag_t mfi_sense_dmat;
246 bus_dmamap_t mfi_sense_dmamap;
247 bus_addr_t mfi_sense_busaddr;
248 struct mfi_sense *mfi_sense;
249
250 struct resource *mfi_irq;
251 void *mfi_intr;
252 int mfi_irq_rid;
253
254 struct intr_config_hook mfi_ich;
255 eventhandler_tag eh;
256 /* OCR flags */
257 uint8_t adpreset;
258 uint8_t issuepend_done;
259 uint8_t disableOnlineCtrlReset;
260 uint32_t mfiStatus;
261 uint32_t last_seq_num;
262 uint32_t volatile hw_crit_error;
263
264 /*
265 * Allocation for the command array. Used as an indexable array to
266 * recover completed commands.
267 */
268 struct mfi_command *mfi_commands;
269 /*
270 * How many commands were actually allocated
271 */
272 int mfi_total_cmds;
273 /*
274 * How many commands the firmware can handle. Also how big the reply
275 * queue is, minus 1.
276 */
277 int mfi_max_fw_cmds;
278 /*
279 * How many S/G elements we'll ever actually use
280 */
281 int mfi_max_sge;
282 /*
283 * How many bytes a compound frame is, including all of the extra frames
284 * that are used for S/G elements.
285 */
286 int mfi_cmd_size;
287 /*
288 * How large an S/G element is. Used to calculate the number of single
289 * frames in a command.
290 */
291 int mfi_sge_size;
292 /*
293 * Max number of sectors that the firmware allows
294 */
295 uint32_t mfi_max_io;
296
297 TAILQ_HEAD(,mfi_disk) mfi_ld_tqh;
298 TAILQ_HEAD(,mfi_system_pd) mfi_syspd_tqh;
299 TAILQ_HEAD(,mfi_disk_pending) mfi_ld_pend_tqh;
300 TAILQ_HEAD(,mfi_system_pending) mfi_syspd_pend_tqh;
301 eventhandler_tag mfi_eh;
302 struct cdev *mfi_cdev;
303
304 TAILQ_HEAD(, ccb_hdr) mfi_cam_ccbq;
305 struct mfi_command * (* mfi_cam_start)(void *);
306 struct callout mfi_watchdog_callout;
307 struct mtx mfi_io_lock;
308 struct sx mfi_config_lock;
309
310 /* Controller type specific interfaces */
311 void (*mfi_enable_intr)(struct mfi_softc *sc);
312 void (*mfi_disable_intr)(struct mfi_softc *sc);
313 int32_t (*mfi_read_fw_status)(struct mfi_softc *sc);
314 int (*mfi_check_clear_intr)(struct mfi_softc *sc);
315 void (*mfi_issue_cmd)(struct mfi_softc *sc, bus_addr_t bus_add,
316 uint32_t frame_cnt);
317 int (*mfi_adp_reset)(struct mfi_softc *sc);
318 int (*mfi_adp_check_reset)(struct mfi_softc *sc);
319 void (*mfi_intr_ptr)(void *sc);
320
321 /* ThunderBolt */
322 uint32_t mfi_tbolt;
323 uint32_t MFA_enabled;
324 /* Single Reply structure size */
325 uint16_t reply_size;
326 /* Singler message size. */
327 uint16_t raid_io_msg_size;
328 TAILQ_HEAD(TB, mfi_cmd_tbolt) mfi_cmd_tbolt_tqh;
329 /* ThunderBolt base contiguous memory mapping. */
330 bus_dma_tag_t mfi_tb_dmat;
331 bus_dmamap_t mfi_tb_dmamap;
332 bus_addr_t mfi_tb_busaddr;
333 /* ThunderBolt Contiguous DMA memory Mapping */
334 uint8_t * request_message_pool;
335 uint8_t * request_message_pool_align;
336 uint8_t * request_desc_pool;
337 bus_addr_t request_msg_busaddr;
338 bus_addr_t reply_frame_busaddr;
339 bus_addr_t sg_frame_busaddr;
340 /* ThunderBolt IOC Init Descriptor */
341 bus_dma_tag_t mfi_tb_ioc_init_dmat;
342 bus_dmamap_t mfi_tb_ioc_init_dmamap;
343 uint8_t * mfi_tb_ioc_init_desc;
344 struct mfi_cmd_tbolt **mfi_cmd_pool_tbolt;
345 /* Virtual address of reply Frame Pool */
346 struct mfi_mpi2_reply_header* reply_frame_pool;
347 struct mfi_mpi2_reply_header* reply_frame_pool_align;
348
349 /* Last reply frame address */
350 uint8_t * reply_pool_limit;
351 uint16_t last_reply_idx;
352 uint8_t max_SGEs_in_chain_message;
353 uint8_t max_SGEs_in_main_message;
354 uint8_t chain_offset_value_for_main_message;
355 uint8_t chain_offset_value_for_mpt_ptmsg;
356 };
357
358 union desc_value {
359 uint64_t word;
360 struct {
361 uint32_t low;
362 uint32_t high;
363 }u;
364 };
365
366 // TODO find the right definition
367 #define XXX_MFI_CMD_OP_INIT2 0x9
368 /*
369 * Request descriptor types
370 */
371 #define MFI_REQ_DESCRIPT_FLAGS_LD_IO 0x7
372 #define MFI_REQ_DESCRIPT_FLAGS_MFA 0x1
373 #define MFI_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 0x1
374 #define MFI_FUSION_FP_DEFAULT_TIMEOUT 0x14
375 #define MFI_LOAD_BALANCE_FLAG 0x1
376 #define MFI_DCMD_MBOX_PEND_FLAG 0x1
377
378 //#define MR_PROT_INFO_TYPE_CONTROLLER 0x08
379 #define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f
380 #define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9
381 #define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB
382 #define MEGASAS_SCSI_ADDL_CDB_LEN 0x18
383 #define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20
384 #define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60
385 #define MEGASAS_EEDPBLOCKSIZE 512
386 struct mfi_cmd_tbolt {
387 union mfi_mpi2_request_descriptor *request_desc;
388 struct mfi_mpi2_request_raid_scsi_io *io_request;
389 bus_addr_t io_request_phys_addr;
390 bus_addr_t sg_frame_phys_addr;
391 bus_addr_t sense_phys_addr;
392 MPI2_SGE_IO_UNION *sg_frame;
393 uint8_t *sense;
394 TAILQ_ENTRY(mfi_cmd_tbolt) next;
395 /*
396 * Context for a MFI frame.
397 * Used to get the mfi cmd from list when a MFI cmd is completed
398 */
399 uint32_t sync_cmd_idx;
400 uint16_t index;
401 uint8_t status;
402 };
403
404 extern int mfi_attach(struct mfi_softc *);
405 extern void mfi_free(struct mfi_softc *);
406 extern int mfi_shutdown(struct mfi_softc *);
407 extern void mfi_startio(struct mfi_softc *);
408 extern void mfi_disk_complete(struct bio *);
409 extern int mfi_disk_disable(struct mfi_disk *);
410 extern void mfi_disk_enable(struct mfi_disk *);
411 extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int);
412 extern int mfi_syspd_disable(struct mfi_system_pd *);
413 extern void mfi_syspd_enable(struct mfi_system_pd *);
414 extern int mfi_dump_syspd_blocks(struct mfi_softc *, int id, uint64_t, void *,
415 int);
416 extern int mfi_transition_firmware(struct mfi_softc *sc);
417 extern int mfi_aen_setup(struct mfi_softc *sc, uint32_t seq_start);
418 extern void mfi_complete(struct mfi_softc *sc, struct mfi_command *cm);
419 extern int mfi_mapcmd(struct mfi_softc *sc,struct mfi_command *cm);
420 extern int mfi_wait_command(struct mfi_softc *sc, struct mfi_command *cm);
421 extern void mfi_tbolt_enable_intr_ppc(struct mfi_softc *);
422 extern void mfi_tbolt_disable_intr_ppc(struct mfi_softc *);
423 extern int32_t mfi_tbolt_read_fw_status_ppc(struct mfi_softc *);
424 extern int32_t mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *);
425 extern void mfi_tbolt_issue_cmd_ppc(struct mfi_softc *, bus_addr_t, uint32_t);
426 extern void mfi_tbolt_init_globals(struct mfi_softc*);
427 extern uint32_t mfi_tbolt_get_memory_requirement(struct mfi_softc *);
428 extern int mfi_tbolt_init_desc_pool(struct mfi_softc *, uint8_t *, uint32_t);
429 extern int mfi_tbolt_init_MFI_queue(struct mfi_softc *);
430 extern void mfi_intr_tbolt(void *arg);
431 extern int mfi_tbolt_alloc_cmd(struct mfi_softc *sc);
432 extern int mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_command *cm);
433 extern int mfi_tbolt_adp_reset(struct mfi_softc *sc);
434 extern int mfi_tbolt_reset(struct mfi_softc *sc);
435 extern void mfi_tbolt_sync_map_info(struct mfi_softc *sc);
436 extern void mfi_handle_map_sync(void *context, int pending);
437 extern int mfi_dcmd_command(struct mfi_softc *, struct mfi_command **,
438 uint32_t, void **, size_t);
439 extern int mfi_build_cdb(int, uint8_t, u_int64_t, u_int32_t, uint8_t *);
440
441 #define MFIQ_ADD(sc, qname) \
442 do { \
443 struct mfi_qstat *qs; \
444 \
445 qs = &(sc)->mfi_qstat[qname]; \
446 qs->q_length++; \
447 if (qs->q_length > qs->q_max) \
448 qs->q_max = qs->q_length; \
449 } while (0)
450
451 #define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length--
452
453 #define MFIQ_INIT(sc, qname) \
454 do { \
455 sc->mfi_qstat[qname].q_length = 0; \
456 sc->mfi_qstat[qname].q_max = 0; \
457 } while (0)
458
459 #define MFIQ_COMMAND_QUEUE(name, index) \
460 static __inline void \
461 mfi_initq_ ## name (struct mfi_softc *sc) \
462 { \
463 TAILQ_INIT(&sc->mfi_ ## name); \
464 MFIQ_INIT(sc, index); \
465 } \
466 static __inline void \
467 mfi_enqueue_ ## name (struct mfi_command *cm) \
468 { \
469 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \
470 printf("command %p is on another queue, " \
471 "flags = %#x\n", cm, cm->cm_flags); \
472 panic("command is on another queue"); \
473 } \
474 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
475 cm->cm_flags |= MFI_ON_ ## index; \
476 MFIQ_ADD(cm->cm_sc, index); \
477 } \
478 static __inline void \
479 mfi_requeue_ ## name (struct mfi_command *cm) \
480 { \
481 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \
482 printf("command %p is on another queue, " \
483 "flags = %#x\n", cm, cm->cm_flags); \
484 panic("command is on another queue"); \
485 } \
486 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
487 cm->cm_flags |= MFI_ON_ ## index; \
488 MFIQ_ADD(cm->cm_sc, index); \
489 } \
490 static __inline struct mfi_command * \
491 mfi_dequeue_ ## name (struct mfi_softc *sc) \
492 { \
493 struct mfi_command *cm; \
494 \
495 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \
496 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \
497 printf("command %p not in queue, " \
498 "flags = %#x, bit = %#x\n", cm, \
499 cm->cm_flags, MFI_ON_ ## index); \
500 panic("command not in queue"); \
501 } \
502 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \
503 cm->cm_flags &= ~MFI_ON_ ## index; \
504 MFIQ_REMOVE(sc, index); \
505 } \
506 return (cm); \
507 } \
508 static __inline void \
509 mfi_remove_ ## name (struct mfi_command *cm) \
510 { \
511 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \
512 printf("command %p not in queue, flags = %#x, " \
513 "bit = %#x\n", cm, cm->cm_flags, \
514 MFI_ON_ ## index); \
515 panic("command not in queue"); \
516 } \
517 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
518 cm->cm_flags &= ~MFI_ON_ ## index; \
519 MFIQ_REMOVE(cm->cm_sc, index); \
520 } \
521 struct hack
522
523 MFIQ_COMMAND_QUEUE(free, MFIQ_FREE);
524 MFIQ_COMMAND_QUEUE(ready, MFIQ_READY);
525 MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY);
526
527 static __inline void
528 mfi_initq_bio(struct mfi_softc *sc)
529 {
530 bioq_init(&sc->mfi_bioq);
531 MFIQ_INIT(sc, MFIQ_BIO);
532 }
533
534 static __inline void
535 mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp)
536 {
537 bioq_insert_tail(&sc->mfi_bioq, bp);
538 MFIQ_ADD(sc, MFIQ_BIO);
539 }
540
541 static __inline struct bio *
542 mfi_dequeue_bio(struct mfi_softc *sc)
543 {
544 struct bio *bp;
545
546 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) {
547 bioq_remove(&sc->mfi_bioq, bp);
548 MFIQ_REMOVE(sc, MFIQ_BIO);
549 }
550 return (bp);
551 }
552
553 static __inline void
554 mfi_print_sense(struct mfi_softc *sc, void *sense)
555 {
556 int error, key, asc, ascq;
557
558 scsi_extract_sense((struct scsi_sense_data *)sense,
559 &error, &key, &asc, &ascq);
560 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, "
561 "asc %d, ascq %d\n", error, key, asc, ascq);
562 }
563
564
565 #define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \
566 sc->mfi_bhandle, (reg), (val))
567 #define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \
568 (sc)->mfi_bhandle, (reg))
569 #define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \
570 sc->mfi_bhandle, (reg), (val))
571 #define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \
572 (sc)->mfi_bhandle, (reg))
573 #define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \
574 sc->mfi_bhandle, (reg), (val))
575 #define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \
576 (sc)->mfi_bhandle, (reg))
577
578 MALLOC_DECLARE(M_MFIBUF);
579 SYSCTL_DECL(_hw_mfi);
580
581 #define MFI_RESET_WAIT_TIME 180
582 #define MFI_CMD_TIMEOUT 30
583 #define MFI_SYS_PD_IO 0
584 #define MFI_LD_IO 1
585 #define MFI_SKINNY_MEMORY 0x02000000
586 #define MFI_MAXPHYS (128 * 1024)
587
588 #ifdef MFI_DEBUG
589 extern void mfi_print_cmd(struct mfi_command *cm);
590 extern void mfi_dump_cmds(struct mfi_softc *sc);
591 extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *, const char *, int );
592 #define MFI_PRINT_CMD(cm) mfi_print_cmd(cm)
593 #define MFI_DUMP_CMDS(sc) mfi_dump_cmds(sc)
594 #define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__)
595 #else
596 #define MFI_PRINT_CMD(cm)
597 #define MFI_DUMP_CMDS(sc)
598 #define MFI_VALIDATE_CMD(sc, cm)
599 #endif
600
601 extern void mfi_release_command(struct mfi_command *cm);
602
603 #endif /* _MFIVAR_H */
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