The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/acphyreg.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2001 Semen Ustimenko (semenu@FreeBSD.org)
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  * $FreeBSD$
   29  */
   30 
   31 #ifndef _DEV_MII_ACPHYREG_H_
   32 #define _DEV_MII_ACPHYREG_H_
   33 
   34 /*
   35  * Register definitions for the Altima Communications AC101
   36  */
   37 
   38 #define MII_ACPHY_POL           0x10    /* Polarity int level */
   39 
   40 /* High byte is interrupt mask register */
   41 #define MII_ACPHY_INT           0x11    /* Interrupt control/status */
   42 #define AC_INT_ACOMP            0x0001  /* Autoneg complete */
   43 #define AC_INT_REM_FLT          0x0002  /* Remote fault */
   44 #define AC_INT_LINK_DOWN        0x0004  /* Link not OK */
   45 #define AC_INT_LP_ACK           0x0008  /* FLP ack recved */
   46 #define AC_INT_PD_FLT           0x0010  /* Parallel detect fault */
   47 #define AC_INT_PAGE_RECV        0x0020  /* New page recved */
   48 #define AC_INT_RX_ER            0x0040  /* RX_ER transitions high */
   49 #define AC_INT_JAB              0x0080  /* Jabber detected */
   50 
   51 #define MII_ACPHY_DIAG          0x12    /* Diagnostic */
   52 #define AC_DIAG_RX_LOCK         0x0100
   53 #define AC_DIAG_RX_PASS         0x0200
   54 #define AC_DIAG_SPEED           0x0400  /* Aneg speed result */
   55 #define AC_DIAG_DUPLEX          0x0800  /* Aneg duplex result */
   56 
   57 #define MII_ACPHY_PWRLOOP       0x13    /* Power/Loopback */
   58 #define MII_ACPHY_CBLMEAS       0x14    /* Cable meas. */
   59 
   60 #define MII_ACPHY_MCTL          0x15    /* Mode control */
   61 #define AC_MCTL_FX_SEL          0x0001  /* FX mode */
   62 #define AC_MCTL_BYP_PCS         0x0002  /* Bypass PCS */
   63 #define AC_MCTL_SCRMBL          0x0004  /* Data scrambling */
   64 #define AC_MCTL_REM_LOOP        0x0008  /* Remote loopback */
   65 #define AC_MCTL_DIS_WDT         0x0010  /* Disable watchdog timer */
   66 #define AC_MCTL_DIS_REC         0x0020  /* Disable recv error counter */
   67 #define AC_MCTL_REC_FULL        0x0040  /* Recv error counter full */
   68 #define AC_MCTL_FRC_FEF         0x0080  /* Force Far End Fault Insert. */
   69 #define AC_MCTL_DIS_FEF         0x0100  /* Disable FEF Insertion */
   70 #define AC_MCTL_LED_SEL         0x0200  /* Compat LED config */
   71 #define AC_MCTL_ALED_SEL        0x0400  /* ActLED RX&TX - RX only */
   72 #define AC_MCTL_10BT_SEL        0x0800  /* Enable 7-wire interface */
   73 #define AC_MCTL_DIS_JAB         0x1000  /* Disable jabber */
   74 #define AC_MCTL_FRC_LINK        0x2000  /* Force TX link up */
   75 #define AC_MCTL_DIS_NLP         0x4000  /* Disable NLP check */
   76 
   77 #define MII_ACPHY_REC           0x18    /* Recv error counter */
   78 
   79 #endif /* _DEV_MII_ACPHYREG_H_ */

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