atphy.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice unmodified, this list of conditions, and the following
   12  *    disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD$");
   32 
   33 /*
   34  * Driver for the Attansic/Atheros F1 10/100/1000 PHY.
   35  */
   36 
   37 #include <sys/param.h>
   38 #include <sys/systm.h>
   39 #include <sys/kernel.h>
   40 #include <sys/module.h>
   41 #include <sys/socket.h>
   42 #include <sys/bus.h>
   43 
   44 #include <net/if.h>
   45 #include <net/if_media.h>
   46 
   47 #include <dev/mii/mii.h>
   48 #include <dev/mii/miivar.h>
   49 #include "miidevs.h"
   50 
   51 #include <dev/mii/atphyreg.h>
   52 
   53 #include "miibus_if.h"
   54 
   55 static int atphy_probe(device_t);
   56 static int atphy_attach(device_t);
   57 
   58 static device_method_t atphy_methods[] = {
   59         /* Device interface. */
   60         DEVMETHOD(device_probe,         atphy_probe),
   61         DEVMETHOD(device_attach,        atphy_attach),
   62         DEVMETHOD(device_detach,        mii_phy_detach),
   63         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   64         DEVMETHOD_END
   65 };
   66 
   67 static devclass_t atphy_devclass;
   68 static driver_t atphy_driver = {
   69         "atphy",
   70         atphy_methods,
   71         sizeof(struct mii_softc)
   72 };
   73 
   74 DRIVER_MODULE(atphy, miibus, atphy_driver, atphy_devclass, 0, 0);
   75 
   76 static int      atphy_service(struct mii_softc *, struct mii_data *, int);
   77 static void     atphy_status(struct mii_softc *);
   78 static void     atphy_reset(struct mii_softc *);
   79 static uint16_t atphy_anar(struct ifmedia_entry *);
   80 static int      atphy_setmedia(struct mii_softc *, int);
   81 
   82 static const struct mii_phydesc atphys[] = {
   83         MII_PHY_DESC(xxATHEROS, F1),
   84         MII_PHY_DESC(xxATHEROS, F1_7),
   85         MII_PHY_DESC(xxATHEROS, AR8021),
   86         MII_PHY_DESC(xxATHEROS, F2),
   87         MII_PHY_END
   88 };
   89 
   90 static const struct mii_phy_funcs atphy_funcs = {
   91         atphy_service,
   92         atphy_status,
   93         atphy_reset
   94 };
   95 
   96 static int
   97 atphy_probe(device_t dev)
   98 {
   99 
  100         return (mii_phy_dev_probe(dev, atphys, BUS_PROBE_DEFAULT));
  101 }
  102 
  103 static int
  104 atphy_attach(device_t dev)
  105 {
  106 
  107         mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &atphy_funcs, 1);
  108         return (0);
  109 }
  110 
  111 static int
  112 atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  113 {
  114         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  115         uint16_t anar, bmcr, bmsr;
  116 
  117         switch (cmd) {
  118         case MII_POLLSTAT:
  119                 break;
  120 
  121         case MII_MEDIACHG:
  122                 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO ||
  123                     IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
  124                         atphy_setmedia(sc, ife->ifm_media);
  125                         break;
  126                 }
  127 
  128                 bmcr = 0;
  129                 switch (IFM_SUBTYPE(ife->ifm_media)) {
  130                 case IFM_100_TX:
  131                         bmcr = BMCR_S100;
  132                         break;
  133                 case IFM_10_T:
  134                         bmcr = BMCR_S10;
  135                         break;
  136                 case IFM_NONE:
  137                         bmcr = PHY_READ(sc, MII_BMCR);
  138                         /*
  139                          * XXX
  140                          * Due to an unknown reason powering down PHY resulted
  141                          * in unexpected results such as inaccessibility of
  142                          * hardware of freshly rebooted system. Disable
  143                          * powering down PHY until I got more information for
  144                          * Attansic/Atheros PHY hardwares.
  145                          */
  146                         PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
  147                         goto done;
  148                 default:
  149                         return (EINVAL);
  150                 }
  151 
  152                 anar = atphy_anar(ife);
  153                 if ((ife->ifm_media & IFM_FDX) != 0) {
  154                         bmcr |= BMCR_FDX;
  155                         if ((ife->ifm_media & IFM_FLOW) != 0 ||
  156                             (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
  157                                 anar |= ANAR_PAUSE_TOWARDS;
  158                 }
  159 
  160                 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX |
  161                     EXTSR_1000THDX)) != 0)
  162                         PHY_WRITE(sc, MII_100T2CR, 0);
  163                 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
  164 
  165                 /*
  166                  * Reset the PHY so all changes take effect.
  167                  */
  168                 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN |
  169                     BMCR_STARTNEG);
  170 done:
  171                 break;
  172 
  173         case MII_TICK:
  174                 /*
  175                  * Only used for autonegotiation.
  176                  */
  177                 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
  178                         sc->mii_ticks = 0;
  179                         break;
  180                 }
  181 
  182                 /*
  183                  * Check for link.
  184                  * Read the status register twice; BMSR_LINK is latch-low.
  185                  */
  186                 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  187                 if (bmsr & BMSR_LINK) {
  188                         sc->mii_ticks = 0;
  189                         break;
  190                 }
  191 
  192                 /* Announce link loss right after it happens. */
  193                 if (sc->mii_ticks++ == 0)
  194                         break;
  195                 if (sc->mii_ticks <= sc->mii_anegticks)
  196                         return (0);
  197 
  198                 sc->mii_ticks = 0;
  199                 atphy_setmedia(sc, ife->ifm_media);
  200                 break;
  201         }
  202 
  203         /* Update the media status. */
  204         PHY_STATUS(sc);
  205 
  206         /* Callback if something changed. */
  207         mii_phy_update(sc, cmd);
  208         return (0);
  209 }
  210 
  211 static void
  212 atphy_status(struct mii_softc *sc)
  213 {
  214         struct mii_data *mii = sc->mii_pdata;
  215         uint32_t bmsr, bmcr, ssr;
  216 
  217         mii->mii_media_status = IFM_AVALID;
  218         mii->mii_media_active = IFM_ETHER;
  219 
  220         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  221         if ((bmsr & BMSR_LINK) != 0)
  222                 mii->mii_media_status |= IFM_ACTIVE;
  223 
  224         bmcr = PHY_READ(sc, MII_BMCR);
  225         if ((bmcr & BMCR_ISO) != 0) {
  226                 mii->mii_media_active |= IFM_NONE;
  227                 mii->mii_media_status = 0;
  228                 return;
  229         }
  230 
  231         if ((bmcr & BMCR_LOOP) != 0)
  232                 mii->mii_media_active |= IFM_LOOP;
  233 
  234         ssr = PHY_READ(sc, ATPHY_SSR);
  235         if ((ssr & ATPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
  236                 /* Erg, still trying, I guess... */
  237                 mii->mii_media_active |= IFM_NONE;
  238                 return;
  239         }
  240 
  241         switch (ssr & ATPHY_SSR_SPEED_MASK) {
  242         case ATPHY_SSR_1000MBS:
  243                 mii->mii_media_active |= IFM_1000_T;
  244                 /*
  245                  * atphy(4) has a valid link so reset mii_ticks.
  246                  * Resetting mii_ticks is needed in order to
  247                  * detect link loss after auto-negotiation.
  248                  */
  249                 sc->mii_ticks = 0;
  250                 break;
  251         case ATPHY_SSR_100MBS:
  252                 mii->mii_media_active |= IFM_100_TX;
  253                 sc->mii_ticks = 0;
  254                 break;
  255         case ATPHY_SSR_10MBS:
  256                 mii->mii_media_active |= IFM_10_T;
  257                 sc->mii_ticks = 0;
  258                 break;
  259         default:
  260                 mii->mii_media_active |= IFM_NONE;
  261                 return;
  262         }
  263 
  264         if ((ssr & ATPHY_SSR_DUPLEX) != 0)
  265                 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
  266         else
  267                 mii->mii_media_active |= IFM_HDX;
  268                 
  269         if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
  270             (PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0)
  271                 mii->mii_media_active |= IFM_ETH_MASTER;
  272 }
  273 
  274 static void
  275 atphy_reset(struct mii_softc *sc)
  276 {
  277         struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
  278         uint32_t reg;
  279         int i;
  280 
  281         /* Take PHY out of power down mode. */
  282         PHY_WRITE(sc, 29, 0x29);
  283         PHY_WRITE(sc, 30, 0);
  284 
  285         reg = PHY_READ(sc, ATPHY_SCR);
  286         /* Enable automatic crossover. */
  287         reg |= ATPHY_SCR_AUTO_X_MODE;
  288         /* Disable power down. */
  289         reg &= ~ATPHY_SCR_MAC_PDOWN;
  290         /* Enable CRS on Tx. */
  291         reg |= ATPHY_SCR_ASSERT_CRS_ON_TX;
  292         /* Auto correction for reversed cable polarity. */
  293         reg |= ATPHY_SCR_POLARITY_REVERSAL;
  294         PHY_WRITE(sc, ATPHY_SCR, reg);
  295 
  296         /* Workaround F1 bug to reset phy. */
  297         atphy_setmedia(sc, ife == NULL ? IFM_AUTO : ife->ifm_media);
  298 
  299         for (i = 0; i < 1000; i++) {
  300                 DELAY(1);
  301                 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
  302                         break;
  303         }
  304 }
  305 
  306 static uint16_t
  307 atphy_anar(struct ifmedia_entry *ife)
  308 {
  309         uint16_t anar;
  310 
  311         anar = 0;
  312         switch (IFM_SUBTYPE(ife->ifm_media)) {
  313         case IFM_AUTO:
  314                 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
  315                 return (anar);
  316         case IFM_1000_T:
  317                 return (anar);
  318         case IFM_100_TX:
  319                 anar |= ANAR_TX;
  320                 break;
  321         case IFM_10_T:
  322                 anar |= ANAR_10;
  323                 break;
  324         default:
  325                 return (0);
  326         }
  327 
  328         if ((ife->ifm_media & IFM_FDX) != 0) {
  329                 if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX)
  330                         anar |= ANAR_TX_FD;
  331                 else
  332                         anar |= ANAR_10_FD;
  333         }
  334 
  335         return (anar);
  336 }
  337 
  338 static int
  339 atphy_setmedia(struct mii_softc *sc, int media)
  340 {
  341         uint16_t anar;
  342 
  343         anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
  344         if ((IFM_SUBTYPE(media) == IFM_AUTO || (media & IFM_FDX) != 0) &&
  345             ((media & IFM_FLOW) != 0 ||
  346             (sc->mii_flags & MIIF_FORCEPAUSE) != 0))
  347                 anar |= ANAR_PAUSE_TOWARDS;
  348         PHY_WRITE(sc, MII_ANAR, anar);
  349         if ((sc->mii_extcapabilities &
  350              (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
  351                 PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX |
  352                     GTCR_ADV_1000THDX);
  353         else if (sc->mii_mpd_model == MII_MODEL_xxATHEROS_F1) {
  354                 /*
  355                  * AR8132 has 10/100 PHY and the PHY uses the same
  356                  * model number of F1 gigabit PHY.  The PHY has no
  357                  * ability to establish gigabit link so explicitly
  358                  * disable 1000baseT configuration for the PHY.
  359                  * Otherwise, there is a case that atphy(4) could
  360                  * not establish a link against gigabit link partner
  361                  * unless the link partner supports down-shifting.
  362                  */
  363                 PHY_WRITE(sc, MII_100T2CR, 0);
  364         }
  365         PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
  366 
  367         return (EJUSTRETURN);
  368 }
Cache object: 462035c5dba1fe18521950e9dc52c014
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FreeBSD/Linux Kernel Cross Reference sys/dev/mii/atphy.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/atphy.c
