atphy.c

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
    1 /*-
    2  * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice unmodified, this list of conditions, and the following
   10  *    disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  */
   27 
   28 #include <sys/cdefs.h>
   29 __FBSDID("$FreeBSD$");
   30 
   31 /*
   32  * Driver for the Attansic/Atheros F1 10/100/1000 PHY.
   33  */
   34 
   35 #include <sys/param.h>
   36 #include <sys/systm.h>
   37 #include <sys/kernel.h>
   38 #include <sys/module.h>
   39 #include <sys/socket.h>
   40 #include <sys/bus.h>
   41 
   42 #include <net/if.h>
   43 #include <net/if_media.h>
   44 
   45 #include <dev/mii/mii.h>
   46 #include <dev/mii/miivar.h>
   47 #include "miidevs.h"
   48 
   49 #include <dev/mii/atphyreg.h>
   50 
   51 #include "miibus_if.h"
   52 
   53 static int atphy_probe(device_t);
   54 static int atphy_attach(device_t);
   55 
   56 static device_method_t atphy_methods[] = {
   57         /* Device interface. */
   58         DEVMETHOD(device_probe,         atphy_probe),
   59         DEVMETHOD(device_attach,        atphy_attach),
   60         DEVMETHOD(device_detach,        mii_phy_detach),
   61         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   62         DEVMETHOD_END
   63 };
   64 
   65 static devclass_t atphy_devclass;
   66 static driver_t atphy_driver = {
   67         "atphy",
   68         atphy_methods,
   69         sizeof(struct mii_softc)
   70 };
   71 
   72 DRIVER_MODULE(atphy, miibus, atphy_driver, atphy_devclass, 0, 0);
   73 
   74 static int      atphy_service(struct mii_softc *, struct mii_data *, int);
   75 static void     atphy_status(struct mii_softc *);
   76 static void     atphy_reset(struct mii_softc *);
   77 static uint16_t atphy_anar(struct ifmedia_entry *);
   78 static int      atphy_setmedia(struct mii_softc *, int);
   79 
   80 static const struct mii_phydesc atphys[] = {
   81         MII_PHY_DESC(xxATHEROS, F1),
   82         MII_PHY_DESC(xxATHEROS, F1_7),
   83         MII_PHY_DESC(xxATHEROS, F2),
   84         MII_PHY_END
   85 };
   86 
   87 static const struct mii_phy_funcs atphy_funcs = {
   88         atphy_service,
   89         atphy_status,
   90         atphy_reset
   91 };
   92 
   93 static int
   94 atphy_probe(device_t dev)
   95 {
   96 
   97         return (mii_phy_dev_probe(dev, atphys, BUS_PROBE_DEFAULT));
   98 }
   99 
  100 static int
  101 atphy_attach(device_t dev)
  102 {
  103 
  104         mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &atphy_funcs, 1);
  105         return (0);
  106 }
  107 
  108 static int
  109 atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  110 {
  111         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  112         uint16_t anar, bmcr, bmsr;
  113 
  114         switch (cmd) {
  115         case MII_POLLSTAT:
  116                 break;
  117 
  118         case MII_MEDIACHG:
  119                 /*
  120                  * If the interface is not up, don't do anything.
  121                  */
  122                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  123                         break;
  124 
  125                 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO ||
  126                     IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
  127                         atphy_setmedia(sc, ife->ifm_media);
  128                         break;
  129                 }
  130 
  131                 bmcr = 0;
  132                 switch (IFM_SUBTYPE(ife->ifm_media)) {
  133                 case IFM_100_TX:
  134                         bmcr = BMCR_S100;
  135                         break;
  136                 case IFM_10_T:
  137                         bmcr = BMCR_S10;
  138                         break;
  139                 case IFM_NONE:
  140                         bmcr = PHY_READ(sc, MII_BMCR);
  141                         /*
  142                          * XXX
  143                          * Due to an unknown reason powering down PHY resulted
  144                          * in unexpected results such as inaccessibility of
  145                          * hardware of freshly rebooted system. Disable
  146                          * powering down PHY until I got more information for
  147                          * Attansic/Atheros PHY hardwares.
  148                          */
  149                         PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
  150                         goto done;
  151                 default:
  152                         return (EINVAL);
  153                 }
  154 
  155                 anar = atphy_anar(ife);
  156                 if ((ife->ifm_media & IFM_FDX) != 0) {
  157                         bmcr |= BMCR_FDX;
  158                         if ((ife->ifm_media & IFM_FLOW) != 0 ||
  159                             (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
  160                                 anar |= ANAR_PAUSE_TOWARDS;
  161                 }
  162 
  163                 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX |
  164                     EXTSR_1000THDX)) != 0)
  165                         PHY_WRITE(sc, MII_100T2CR, 0);
  166                 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
  167 
  168                 /*
  169                  * Reset the PHY so all changes take effect.
  170                  */
  171                 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN |
  172                     BMCR_STARTNEG);
  173 done:
  174                 break;
  175 
  176         case MII_TICK:
  177                 /*
  178                  * Is the interface even up?
  179                  */
  180                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  181                         return (0);
  182 
  183                 /*
  184                  * Only used for autonegotiation.
  185                  */
  186                 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
  187                         sc->mii_ticks = 0;
  188                         break;
  189                 }
  190 
  191                 /*
  192                  * Check for link.
  193                  * Read the status register twice; BMSR_LINK is latch-low.
  194                  */
  195                 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  196                 if (bmsr & BMSR_LINK) {
  197                         sc->mii_ticks = 0;
  198                         break;
  199                 }
  200 
  201                 /* Announce link loss right after it happens. */
  202                 if (sc->mii_ticks++ == 0)
  203                         break;
  204                 if (sc->mii_ticks <= sc->mii_anegticks)
  205                         return (0);
  206 
  207                 sc->mii_ticks = 0;
  208                 atphy_setmedia(sc, ife->ifm_media);
  209                 break;
  210         }
  211 
  212         /* Update the media status. */
  213         PHY_STATUS(sc);
  214 
  215         /* Callback if something changed. */
  216         mii_phy_update(sc, cmd);
  217         return (0);
  218 }
  219 
  220 static void
  221 atphy_status(struct mii_softc *sc)
  222 {
  223         struct mii_data *mii = sc->mii_pdata;
  224         uint32_t bmsr, bmcr, ssr;
  225 
  226         mii->mii_media_status = IFM_AVALID;
  227         mii->mii_media_active = IFM_ETHER;
  228 
  229         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  230         if ((bmsr & BMSR_LINK) != 0)
  231                 mii->mii_media_status |= IFM_ACTIVE;
  232 
  233         bmcr = PHY_READ(sc, MII_BMCR);
  234         if ((bmcr & BMCR_ISO) != 0) {
  235                 mii->mii_media_active |= IFM_NONE;
  236                 mii->mii_media_status = 0;
  237                 return;
  238         }
  239 
  240         if ((bmcr & BMCR_LOOP) != 0)
  241                 mii->mii_media_active |= IFM_LOOP;
  242 
  243         ssr = PHY_READ(sc, ATPHY_SSR);
  244         if ((ssr & ATPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
  245                 /* Erg, still trying, I guess... */
  246                 mii->mii_media_active |= IFM_NONE;
  247                 return;
  248         }
  249 
  250         switch (ssr & ATPHY_SSR_SPEED_MASK) {
  251         case ATPHY_SSR_1000MBS:
  252                 mii->mii_media_active |= IFM_1000_T;
  253                 /*
  254                  * atphy(4) has a valid link so reset mii_ticks.
  255                  * Resetting mii_ticks is needed in order to
  256                  * detect link loss after auto-negotiation.
  257                  */
  258                 sc->mii_ticks = 0;
  259                 break;
  260         case ATPHY_SSR_100MBS:
  261                 mii->mii_media_active |= IFM_100_TX;
  262                 sc->mii_ticks = 0;
  263                 break;
  264         case ATPHY_SSR_10MBS:
  265                 mii->mii_media_active |= IFM_10_T;
  266                 sc->mii_ticks = 0;
  267                 break;
  268         default:
  269                 mii->mii_media_active |= IFM_NONE;
  270                 return;
  271         }
  272 
  273         if ((ssr & ATPHY_SSR_DUPLEX) != 0)
  274                 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
  275         else
  276                 mii->mii_media_active |= IFM_HDX;
  277                 
  278         if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
  279             (PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0)
  280                 mii->mii_media_active |= IFM_ETH_MASTER;
  281 }
  282 
  283 static void
  284 atphy_reset(struct mii_softc *sc)
  285 {
  286         struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
  287         uint32_t reg;
  288         int i;
  289 
  290         /* Take PHY out of power down mode. */
  291         PHY_WRITE(sc, 29, 0x29);
  292         PHY_WRITE(sc, 30, 0);
  293 
  294         reg = PHY_READ(sc, ATPHY_SCR);
  295         /* Enable automatic crossover. */
  296         reg |= ATPHY_SCR_AUTO_X_MODE;
  297         /* Disable power down. */
  298         reg &= ~ATPHY_SCR_MAC_PDOWN;
  299         /* Enable CRS on Tx. */
  300         reg |= ATPHY_SCR_ASSERT_CRS_ON_TX;
  301         /* Auto correction for reversed cable polarity. */
  302         reg |= ATPHY_SCR_POLARITY_REVERSAL;
  303         PHY_WRITE(sc, ATPHY_SCR, reg);
  304 
  305         /* Workaround F1 bug to reset phy. */
  306         atphy_setmedia(sc, ife == NULL ? IFM_AUTO : ife->ifm_media);
  307 
  308         for (i = 0; i < 1000; i++) {
  309                 DELAY(1);
  310                 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
  311                         break;
  312         }
  313 }
  314 
  315 static uint16_t
  316 atphy_anar(struct ifmedia_entry *ife)
  317 {
  318         uint16_t anar;
  319 
  320         anar = 0;
  321         switch (IFM_SUBTYPE(ife->ifm_media)) {
  322         case IFM_AUTO:
  323                 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
  324                 return (anar);
  325         case IFM_1000_T:
  326                 return (anar);
  327         case IFM_100_TX:
  328                 anar |= ANAR_TX;
  329                 break;
  330         case IFM_10_T:
  331                 anar |= ANAR_10;
  332                 break;
  333         default:
  334                 return (0);
  335         }
  336 
  337         if ((ife->ifm_media & IFM_FDX) != 0) {
  338                 if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX)
  339                         anar |= ANAR_TX_FD;
  340                 else
  341                         anar |= ANAR_10_FD;
  342         }
  343 
  344         return (anar);
  345 }
  346 
  347 static int
  348 atphy_setmedia(struct mii_softc *sc, int media)
  349 {
  350         uint16_t anar;
  351 
  352         anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
  353         if ((IFM_SUBTYPE(media) == IFM_AUTO || (media & IFM_FDX) != 0) &&
  354             ((media & IFM_FLOW) != 0 ||
  355             (sc->mii_flags & MIIF_FORCEPAUSE) != 0))
  356                 anar |= ANAR_PAUSE_TOWARDS;
  357         PHY_WRITE(sc, MII_ANAR, anar);
  358         if ((sc->mii_extcapabilities &
  359              (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
  360                 PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX |
  361                     GTCR_ADV_1000THDX);
  362         else if (sc->mii_mpd_model == MII_MODEL_xxATHEROS_F1) {
  363                 /*
  364                  * AR8132 has 10/100 PHY and the PHY uses the same
  365                  * model number of F1 gigabit PHY.  The PHY has no
  366                  * ability to establish gigabit link so explicitly
  367                  * disable 1000baseT configuration for the PHY.
  368                  * Otherwise, there is a case that atphy(4) could
  369                  * not establish a link against gigabit link partner
  370                  * unless the link partner supports down-shifting.
  371                  */
  372                 PHY_WRITE(sc, MII_100T2CR, 0);
  373         }
  374         PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
  375 
  376         return (EJUSTRETURN);
  377 }
Cache object: 09a93acf1f70e6ecfbbfabf1b63ab56c
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.
FreeBSD/Linux Kernel Cross Reference sys/dev/mii/atphy.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/atphy.c
