FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/atphyreg.h
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2008, Pyun YongHyeon
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
12 * disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD$
30 */
31
32 #ifndef _DEV_MII_ATPHYREG_H_
33 #define _DEV_MII_ATPHYREG_H_
34
35 /*
36 * Registers for the Attansic/Atheros Gigabit PHY.
37 */
38
39 /* Special Control Register */
40 #define ATPHY_SCR 0x10
41 #define ATPHY_SCR_JABBER_DISABLE 0x0001
42 #define ATPHY_SCR_POLARITY_REVERSAL 0x0002
43 #define ATPHY_SCR_SQE_TEST 0x0004
44 #define ATPHY_SCR_MAC_PDOWN 0x0008
45 #define ATPHY_SCR_CLK125_DISABLE 0x0010
46 #define ATPHY_SCR_MDI_MANUAL_MODE 0x0000
47 #define ATPHY_SCR_MDIX_MANUAL_MODE 0x0020
48 #define ATPHY_SCR_AUTO_X_1000T 0x0040
49 #define ATPHY_SCR_AUTO_X_MODE 0x0060
50 #define ATPHY_SCR_10BT_EXT_ENABLE 0x0080
51 #define ATPHY_SCR_MII_5BIT_ENABLE 0x0100
52 #define ATPHY_SCR_SCRAMBLER_DISABLE 0x0200
53 #define ATPHY_SCR_FORCE_LINK_GOOD 0x0400
54 #define ATPHY_SCR_ASSERT_CRS_ON_TX 0x0800
55
56 /* Special Status Register. */
57 #define ATPHY_SSR 0x11
58 #define ATPHY_SSR_SPD_DPLX_RESOLVED 0x0800
59 #define ATPHY_SSR_DUPLEX 0x2000
60 #define ATPHY_SSR_SPEED_MASK 0xC000
61 #define ATPHY_SSR_10MBS 0x0000
62 #define ATPHY_SSR_100MBS 0x4000
63 #define ATPHY_SSR_1000MBS 0x8000
64
65 #endif /* _DEV_MII_ATPHYREG_H_ */
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