The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/bmtphy.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-NetBSD
    3  *
    4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
    9  * NASA Ames Research Center.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   30  * POSSIBILITY OF SUCH DAMAGE.
   31  */
   32 
   33 /*
   34  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
   35  *
   36  * Redistribution and use in source and binary forms, with or without
   37  * modification, are permitted provided that the following conditions
   38  * are met:
   39  * 1. Redistributions of source code must retain the above copyright
   40  *    notice, this list of conditions and the following disclaimer.
   41  * 2. Redistributions in binary form must reproduce the above copyright
   42  *    notice, this list of conditions and the following disclaimer in the
   43  *    documentation and/or other materials provided with the distribution.
   44  *
   45  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   46  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   47  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   48  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   49  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   50  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   51  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   52  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   53  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   54  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   55  *
   56  *      from: NetBSD: bmtphy.c,v 1.8 2002/07/03 06:25:50 simonb Exp
   57  *
   58  */
   59 
   60 #include <sys/cdefs.h>
   61 __FBSDID("$FreeBSD$");
   62 
   63 /*
   64  * Driver for the Broadcom BCM5201/BCM5202 "Mini-Theta" PHYs.  This also
   65  * drives the PHY on the 3Com 3c905C.  The 3c905C's PHY is described in
   66  * the 3c905C data sheet.
   67  */
   68 
   69 #include <sys/param.h>
   70 #include <sys/systm.h>
   71 #include <sys/kernel.h>
   72 #include <sys/module.h>
   73 #include <sys/socket.h>
   74 #include <sys/bus.h>
   75 
   76 #include <net/if.h>
   77 #include <net/if_media.h>
   78 
   79 #include <dev/mii/mii.h>
   80 #include <dev/mii/miivar.h>
   81 #include "miidevs.h"
   82 
   83 #include <dev/mii/bmtphyreg.h>
   84 
   85 #include "miibus_if.h"
   86 
   87 static int      bmtphy_probe(device_t);
   88 static int      bmtphy_attach(device_t);
   89 
   90 static device_method_t bmtphy_methods[] = {
   91         /* Device interface */
   92         DEVMETHOD(device_probe,         bmtphy_probe),
   93         DEVMETHOD(device_attach,        bmtphy_attach),
   94         DEVMETHOD(device_detach,        mii_phy_detach),
   95         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   96         DEVMETHOD_END
   97 };
   98 
   99 static devclass_t       bmtphy_devclass;
  100 
  101 static driver_t bmtphy_driver = {
  102         "bmtphy",
  103         bmtphy_methods,
  104         sizeof(struct mii_softc)
  105 };
  106 
  107 DRIVER_MODULE(bmtphy, miibus, bmtphy_driver, bmtphy_devclass, 0, 0);
  108 
  109 static int      bmtphy_service(struct mii_softc *, struct mii_data *, int);
  110 static void     bmtphy_status(struct mii_softc *);
  111 static void     bmtphy_reset(struct mii_softc *);
  112 
  113 static const struct mii_phydesc bmtphys_dp[] = {
  114         MII_PHY_DESC(xxBROADCOM, BCM4401),
  115         MII_PHY_DESC(xxBROADCOM, BCM5201),
  116         MII_PHY_DESC(xxBROADCOM, BCM5214),
  117         MII_PHY_DESC(xxBROADCOM, BCM5221),
  118         MII_PHY_DESC(xxBROADCOM, BCM5222),
  119         MII_PHY_END
  120 };
  121 
  122 static const struct mii_phydesc bmtphys_lp[] = {
  123         MII_PHY_DESC(xxBROADCOM, 3C905B),
  124         MII_PHY_DESC(xxBROADCOM, 3C905C),
  125         MII_PHY_END
  126 };
  127 
  128 static const struct mii_phy_funcs bmtphy_funcs = {
  129         bmtphy_service,
  130         bmtphy_status,
  131         bmtphy_reset 
  132 };
  133 
  134 static int
  135 bmtphy_probe(device_t dev)
  136 {
  137         int     rval;
  138 
  139         /* Let exphy(4) take precedence for these. */
  140         rval = mii_phy_dev_probe(dev, bmtphys_lp, BUS_PROBE_LOW_PRIORITY);
  141         if (rval <= 0)
  142                 return (rval);
  143 
  144         return (mii_phy_dev_probe(dev, bmtphys_dp, BUS_PROBE_DEFAULT));
  145 }
  146 
  147 static int
  148 bmtphy_attach(device_t dev)
  149 {
  150 
  151         mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &bmtphy_funcs, 1);
  152         return (0);
  153 }
  154 
  155 static int
  156 bmtphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  157 {
  158 
  159         switch (cmd) {
  160         case MII_POLLSTAT:
  161                 break;
  162 
  163         case MII_MEDIACHG:
  164                 mii_phy_setmedia(sc);
  165                 break;
  166 
  167         case MII_TICK:
  168                 if (mii_phy_tick(sc) == EJUSTRETURN)
  169                         return (0);
  170                 break;
  171         }
  172 
  173         /* Update the media status. */
  174         PHY_STATUS(sc);
  175 
  176         /* Callback if something changed. */
  177         mii_phy_update(sc, cmd);
  178         return (0);
  179 }
  180 
  181 static void
  182 bmtphy_status(struct mii_softc *sc)
  183 {
  184         struct mii_data *mii;
  185         struct ifmedia_entry *ife;
  186         int bmsr, bmcr, aux_csr;
  187 
  188         mii = sc->mii_pdata;
  189         ife = mii->mii_media.ifm_cur;
  190 
  191         mii->mii_media_status = IFM_AVALID;
  192         mii->mii_media_active = IFM_ETHER;
  193 
  194         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  195 
  196         if (bmsr & BMSR_LINK)
  197                 mii->mii_media_status |= IFM_ACTIVE;
  198 
  199         bmcr = PHY_READ(sc, MII_BMCR);
  200         if (bmcr & BMCR_ISO) {
  201                 mii->mii_media_active |= IFM_NONE;
  202                 mii->mii_media_status = 0;
  203                 return;
  204         }
  205 
  206         if (bmcr & BMCR_LOOP)
  207                 mii->mii_media_active |= IFM_LOOP;
  208 
  209         if (bmcr & BMCR_AUTOEN) {
  210                 /*
  211                  * The media status bits are only valid if autonegotiation
  212                  * has completed (or it's disabled).
  213                  */
  214                 if ((bmsr & BMSR_ACOMP) == 0) {
  215                         /* Erg, still trying, I guess... */
  216                         mii->mii_media_active |= IFM_NONE;
  217                         return;
  218                 }
  219 
  220                 aux_csr = PHY_READ(sc, MII_BMTPHY_AUX_CSR);
  221                 if (aux_csr & AUX_CSR_SPEED)
  222                         mii->mii_media_active |= IFM_100_TX;
  223                 else
  224                         mii->mii_media_active |= IFM_10_T;
  225                 if (aux_csr & AUX_CSR_FDX)
  226                         mii->mii_media_active |=
  227                             IFM_FDX | mii_phy_flowstatus(sc);
  228                 else
  229                         mii->mii_media_active |= IFM_HDX;
  230         } else
  231                 mii->mii_media_active = ife->ifm_media;
  232 }
  233 
  234 static void
  235 bmtphy_reset(struct mii_softc *sc)
  236 {
  237         u_int16_t data;
  238 
  239         mii_phy_reset(sc);
  240 
  241         if (sc->mii_mpd_model == MII_MODEL_xxBROADCOM_BCM5221) {
  242                 /* Enable shadow register mode. */
  243                 data = PHY_READ(sc, 0x1f);
  244                 PHY_WRITE(sc, 0x1f, data | 0x0080);
  245 
  246                 /* Enable APD (Auto PowerDetect). */
  247                 data = PHY_READ(sc, MII_BMTPHY_AUX2);
  248                 PHY_WRITE(sc, MII_BMTPHY_AUX2, data | 0x0020);
  249 
  250                 /* Enable clocks across APD for Auto-MDIX functionality. */
  251                 data = PHY_READ(sc, MII_BMTPHY_INTR);
  252                 PHY_WRITE(sc, MII_BMTPHY_INTR, data | 0x0004);
  253 
  254                 /* Disable shadow register mode. */
  255                 data = PHY_READ(sc, 0x1f);
  256                 PHY_WRITE(sc, 0x1f, data & ~0x0080);
  257         }
  258 }

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