bmtphy.c

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    1 /*      $OpenBSD: bmtphy.c,v 1.21 2022/04/06 18:59:29 naddy Exp $       */
    2 /*      $NetBSD: bmtphy.c,v 1.17 2005/01/17 13:17:45 scw Exp $  */
    3 
    4 /*-
    5  * Copyright (c) 2001 Theo de Raadt
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 /*
   30  * Driver for Broadcom BCM5201/BCM5202 "Mini-Theta" PHYs.  This also
   31  * drives the PHY on the 3Com 3c905C.  The 3c905C's PHY is described in
   32  * the 3c905C data sheet.
   33  */
   34 
   35 #include <sys/param.h>
   36 #include <sys/systm.h>
   37 #include <sys/device.h>
   38 #include <sys/socket.h>
   39 #include <sys/errno.h>
   40 
   41 #include <net/if.h>
   42 #include <net/if_var.h>
   43 #include <net/if_media.h>
   44 
   45 #include <dev/mii/mii.h>
   46 #include <dev/mii/miivar.h>
   47 #include <dev/mii/miidevs.h>
   48 
   49 #include <dev/mii/bmtphyreg.h>
   50 
   51 int     bmtphymatch(struct device *, void *, void *);
   52 void    bmtphyattach(struct device *, struct device *, void *);
   53 
   54 const struct cfattach bmtphy_ca = {
   55         sizeof(struct mii_softc), bmtphymatch, bmtphyattach, mii_phy_detach
   56 };
   57 
   58 struct cfdriver bmtphy_cd = {
   59         NULL, "bmtphy", DV_DULL
   60 };
   61 
   62 int     bmtphy_service(struct mii_softc *, struct mii_data *, int);
   63 void    bmtphy_status(struct mii_softc *);
   64 void    bmtphy_reset(struct mii_softc *);
   65 
   66 const struct mii_phy_funcs bmtphy_funcs = {
   67         bmtphy_service, bmtphy_status, bmtphy_reset,
   68 };
   69 
   70 static const struct mii_phydesc bmtphys[] = {
   71         { MII_OUI_BROADCOM,             MII_MODEL_BROADCOM_3C905B,
   72           MII_STR_BROADCOM_3C905B },
   73         { MII_OUI_BROADCOM,             MII_MODEL_BROADCOM_3C905C,
   74           MII_STR_BROADCOM_3C905C },
   75         { MII_OUI_BROADCOM,             MII_MODEL_BROADCOM_BCM4401,
   76           MII_STR_BROADCOM_BCM4401 },
   77         { MII_OUI_BROADCOM,             MII_MODEL_BROADCOM_BCM5201,
   78           MII_STR_BROADCOM_BCM5201 },
   79         { MII_OUI_BROADCOM,             MII_MODEL_BROADCOM_BCM5214,
   80           MII_STR_BROADCOM_BCM5214 },
   81         { MII_OUI_BROADCOM,             MII_MODEL_BROADCOM_BCM5220,
   82           MII_STR_BROADCOM_BCM5220 },
   83         { MII_OUI_BROADCOM,             MII_MODEL_BROADCOM_BCM5221,
   84           MII_STR_BROADCOM_BCM5221 },
   85         { MII_OUI_BROADCOM,             MII_MODEL_BROADCOM_BCM5222,
   86           MII_STR_BROADCOM_BCM5222 },
   87 
   88         { 0,                            0,
   89           NULL },
   90 };
   91 
   92 int
   93 bmtphymatch(struct device *parent, void *match, void *aux)
   94 {
   95         struct mii_attach_args *ma = aux;
   96 
   97         if (mii_phy_match(ma, bmtphys) != NULL)
   98                 return (10);
   99 
  100         return (0);
  101 }
  102 
  103 void
  104 bmtphyattach(struct device *parent, struct device *self, void *aux)
  105 {
  106         struct mii_softc *sc = (struct mii_softc *)self;
  107         struct mii_attach_args *ma = aux;
  108         struct mii_data *mii = ma->mii_data;
  109         const struct mii_phydesc *mpd;
  110 
  111         mpd = mii_phy_match(ma, bmtphys);
  112         printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
  113 
  114         sc->mii_model = MII_MODEL(ma->mii_id2);
  115         sc->mii_inst = mii->mii_instance;
  116         sc->mii_phy = ma->mii_phyno;
  117         sc->mii_funcs = &bmtphy_funcs;
  118         sc->mii_pdata = mii;
  119         sc->mii_flags = ma->mii_flags;
  120         sc->mii_anegticks = MII_ANEGTICKS;
  121 
  122         PHY_RESET(sc);
  123 
  124         /*
  125          * XXX Check AUX_STS_FX_MODE to set MIIF_HAVE_FIBER?
  126          */
  127 
  128         sc->mii_capabilities =
  129             PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
  130         if (sc->mii_capabilities & BMSR_MEDIAMASK)
  131                 mii_phy_add_media(sc);
  132 }
  133 
  134 int
  135 bmtphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  136 {
  137         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  138         int reg;
  139 
  140         if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
  141                 return (ENXIO);
  142 
  143         switch (cmd) {
  144         case MII_POLLSTAT:
  145                 /*
  146                  * If we're not polling our PHY instance, just return.
  147                  */
  148                 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
  149                         return (0);
  150                 break;
  151 
  152         case MII_MEDIACHG:
  153                 /*
  154                  * If the media indicates a different PHY instance,
  155                  * isolate ourselves.
  156                  */
  157                 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
  158                         reg = PHY_READ(sc, MII_BMCR);
  159                         PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
  160                         return (0);
  161                 }
  162 
  163                 /*
  164                  * If the interface is not up, don't do anything.
  165                  */
  166                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  167                         break;
  168 
  169                 mii_phy_setmedia(sc);
  170                 break;
  171 
  172         case MII_TICK:
  173                 /*
  174                  * If we're not currently selected, just return.
  175                  */
  176                 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
  177                         return (0);
  178 
  179                 if (mii_phy_tick(sc) == EJUSTRETURN)
  180                         return (0);
  181                 break;
  182 
  183         case MII_DOWN:
  184                 mii_phy_down(sc);
  185                 return (0);
  186         }
  187 
  188         /* Update the media status. */
  189         mii_phy_status(sc);
  190 
  191         /* Callback if something changed. */
  192         mii_phy_update(sc, cmd);
  193         return (0);
  194 }
  195 
  196 void
  197 bmtphy_status(struct mii_softc *sc)
  198 {
  199         struct mii_data *mii = sc->mii_pdata;
  200         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  201         int bmsr, bmcr, aux_csr;
  202 
  203         mii->mii_media_status = IFM_AVALID;
  204         mii->mii_media_active = IFM_ETHER;
  205 
  206         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  207         if (bmsr & BMSR_LINK)
  208                 mii->mii_media_status |= IFM_ACTIVE;
  209 
  210         bmcr = PHY_READ(sc, MII_BMCR);
  211         if (bmcr & BMCR_ISO) {
  212                 mii->mii_media_active |= IFM_NONE;
  213                 mii->mii_media_status = 0;
  214                 return;
  215         }
  216 
  217         if (bmcr & BMCR_LOOP)
  218                 mii->mii_media_active |= IFM_LOOP;
  219 
  220         if (bmcr & BMCR_AUTOEN) {
  221                 /*
  222                  * The later are only valid if autonegotiation
  223                  * has completed (or it's disabled).
  224                  */
  225                 if ((bmsr & BMSR_ACOMP) == 0) {
  226                         /* Erg, still trying, I guess... */
  227                         mii->mii_media_active |= IFM_NONE;
  228                         return;
  229                 }
  230 
  231                 aux_csr = PHY_READ(sc, MII_BMTPHY_AUX_CSR);
  232                 if (aux_csr & AUX_CSR_SPEED)
  233                         mii->mii_media_active |= IFM_100_TX;
  234                 else
  235                         mii->mii_media_active |= IFM_10_T;
  236 
  237                 if (aux_csr & AUX_CSR_FDX)
  238                         mii->mii_media_active |= mii_phy_flowstatus(sc) | IFM_FDX;
  239                 else
  240                         mii->mii_media_active |= IFM_HDX;
  241         } else
  242                 mii->mii_media_active = ife->ifm_media;
  243 }
  244 
  245 void
  246 bmtphy_reset(struct mii_softc *sc)
  247 {
  248         u_int16_t data;
  249 
  250         mii_phy_reset(sc);
  251 
  252         if (sc->mii_model == MII_MODEL_BROADCOM_BCM5221) {
  253                 /* Enable shadow register mode */
  254                 data = PHY_READ(sc, 0x1f);
  255                 PHY_WRITE(sc, 0x1f, data | 0x0080);
  256 
  257                 /* Enable APD (Auto PowerDetect) */
  258                 data = PHY_READ(sc, MII_BMTPHY_AUX2);
  259                 PHY_WRITE(sc, MII_BMTPHY_AUX2, data | 0x0020);
  260 
  261                 /* Enable clocks across APD for
  262                  * Auto-MDIX functionality */
  263                 data = PHY_READ(sc, MII_BMTPHY_INTR);
  264                 PHY_WRITE(sc, MII_BMTPHY_INTR, data | 0x0004);
  265 
  266                 /* Disable shadow register mode */
  267                 data = PHY_READ(sc, 0x1f);
  268                 PHY_WRITE(sc, 0x1f, data & ~0x0080);
  269         }
  270 }

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FreeBSD/Linux Kernel Cross Reference sys/dev/mii/bmtphy.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/bmtphy.c