ciphy.c

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
    1 /*-
    2  * Copyright (c) 2004
    3  *      Bill Paul <wpaul@windriver.com>.  All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. All advertising materials mentioning features or use of this software
   14  *    must display the following acknowledgement:
   15  *      This product includes software developed by Bill Paul.
   16  * 4. Neither the name of the author nor the names of any co-contributors
   17  *    may be used to endorse or promote products derived from this software
   18  *    without specific prior written permission.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   30  * THE POSSIBILITY OF SUCH DAMAGE.
   31  */
   32 
   33 #include <sys/cdefs.h>
   34 __FBSDID("$FreeBSD: releng/8.2/sys/dev/mii/ciphy.c 215881 2010-11-26 20:37:19Z marius $");
   35 
   36 /*
   37  * Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY.
   38  */
   39 
   40 #include <sys/param.h>
   41 #include <sys/systm.h>
   42 #include <sys/kernel.h>
   43 #include <sys/module.h>
   44 #include <sys/socket.h>
   45 #include <sys/bus.h>
   46 
   47 #include <net/if.h>
   48 #include <net/if_arp.h>
   49 #include <net/if_media.h>
   50 
   51 #include <dev/mii/mii.h>
   52 #include <dev/mii/miivar.h>
   53 #include "miidevs.h"
   54 
   55 #include <dev/mii/ciphyreg.h>
   56 
   57 #include "miibus_if.h"
   58 
   59 #include <machine/bus.h>
   60 
   61 static int ciphy_probe(device_t);
   62 static int ciphy_attach(device_t);
   63 
   64 static device_method_t ciphy_methods[] = {
   65         /* device interface */
   66         DEVMETHOD(device_probe,         ciphy_probe),
   67         DEVMETHOD(device_attach,        ciphy_attach),
   68         DEVMETHOD(device_detach,        mii_phy_detach),
   69         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   70         { 0, 0 }
   71 };
   72 
   73 static devclass_t ciphy_devclass;
   74 
   75 static driver_t ciphy_driver = {
   76         "ciphy",
   77         ciphy_methods,
   78         sizeof(struct mii_softc)
   79 };
   80 
   81 DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
   82 
   83 static int      ciphy_service(struct mii_softc *, struct mii_data *, int);
   84 static void     ciphy_status(struct mii_softc *);
   85 static void     ciphy_reset(struct mii_softc *);
   86 static void     ciphy_fixup(struct mii_softc *);
   87 
   88 static const struct mii_phydesc ciphys[] = {
   89         MII_PHY_DESC(CICADA, CS8201),
   90         MII_PHY_DESC(CICADA, CS8201A),
   91         MII_PHY_DESC(CICADA, CS8201B),
   92         MII_PHY_DESC(CICADA, CS8204),
   93         MII_PHY_DESC(CICADA, VSC8211),
   94         MII_PHY_DESC(CICADA, CS8244),
   95         MII_PHY_DESC(VITESSE, VSC8601),
   96         MII_PHY_END
   97 };
   98 
   99 static int
  100 ciphy_probe(device_t dev)
  101 {
  102 
  103         return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT));
  104 }
  105 
  106 static int
  107 ciphy_attach(device_t dev)
  108 {
  109         struct mii_softc *sc;
  110         struct mii_attach_args *ma;
  111         struct mii_data *mii;
  112 
  113         sc = device_get_softc(dev);
  114         ma = device_get_ivars(dev);
  115         sc->mii_dev = device_get_parent(dev);
  116         mii = ma->mii_data;
  117         LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
  118 
  119         sc->mii_flags = miibus_get_flags(dev);
  120         sc->mii_inst = mii->mii_instance++;
  121         sc->mii_phy = ma->mii_phyno;
  122         sc->mii_service = ciphy_service;
  123         sc->mii_pdata = mii;
  124 
  125         sc->mii_flags |= MIIF_NOISOLATE;
  126 
  127         ciphy_reset(sc);
  128 
  129         sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
  130         if (sc->mii_capabilities & BMSR_EXTSTAT)
  131                 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
  132         device_printf(dev, " ");
  133         mii_phy_add_media(sc);
  134         printf("\n");
  135 
  136         MIIBUS_MEDIAINIT(sc->mii_dev);
  137         return (0);
  138 }
  139 
  140 static int
  141 ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  142 {
  143         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  144         int reg, speed, gig;
  145 
  146         switch (cmd) {
  147         case MII_POLLSTAT:
  148                 break;
  149 
  150         case MII_MEDIACHG:
  151                 /*
  152                  * If the interface is not up, don't do anything.
  153                  */
  154                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  155                         break;
  156 
  157                 ciphy_fixup(sc);        /* XXX hardware bug work-around */
  158 
  159                 switch (IFM_SUBTYPE(ife->ifm_media)) {
  160                 case IFM_AUTO:
  161 #ifdef foo
  162                         /*
  163                          * If we're already in auto mode, just return.
  164                          */
  165                         if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
  166                                 return (0);
  167 #endif
  168                         (void)mii_phy_auto(sc);
  169                         break;
  170                 case IFM_1000_T:
  171                         speed = CIPHY_S1000;
  172                         goto setit;
  173                 case IFM_100_TX:
  174                         speed = CIPHY_S100;
  175                         goto setit;
  176                 case IFM_10_T:
  177                         speed = CIPHY_S10;
  178 setit:
  179                         if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
  180                                 speed |= CIPHY_BMCR_FDX;
  181                                 gig = CIPHY_1000CTL_AFD;
  182                         } else {
  183                                 gig = CIPHY_1000CTL_AHD;
  184                         }
  185 
  186                         PHY_WRITE(sc, CIPHY_MII_1000CTL, 0);
  187                         PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
  188                         PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
  189 
  190                         if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
  191                                 break;
  192 
  193                         gig |= CIPHY_1000CTL_MSE;
  194                         if ((ife->ifm_media & IFM_ETH_MASTER) != 0 ||
  195                             (mii->mii_ifp->if_flags & IFF_LINK0) != 0)
  196                                 gig |= CIPHY_1000CTL_MSC;
  197                         PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
  198                         PHY_WRITE(sc, CIPHY_MII_BMCR,
  199                             speed | CIPHY_BMCR_AUTOEN | CIPHY_BMCR_STARTNEG);
  200                         break;
  201                 case IFM_NONE:
  202                         PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
  203                         break;
  204                 default:
  205                         return (EINVAL);
  206                 }
  207                 break;
  208 
  209         case MII_TICK:
  210                 /*
  211                  * Is the interface even up?
  212                  */
  213                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  214                         return (0);
  215 
  216                 /*
  217                  * Only used for autonegotiation.
  218                  */
  219                 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
  220                         break;
  221 
  222                 /*
  223                  * Check to see if we have link.  If we do, we don't
  224                  * need to restart the autonegotiation process.  Read
  225                  * the BMSR twice in case it's latched.
  226                  */
  227                 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  228                 if (reg & BMSR_LINK)
  229                         break;
  230 
  231                 /* Announce link loss right after it happens. */
  232                 if (++sc->mii_ticks == 0)
  233                         break;
  234                 /*
  235                  * Only retry autonegotiation every mii_anegticks seconds.
  236                  */
  237                 if (sc->mii_ticks <= sc->mii_anegticks)
  238                         break;
  239 
  240                 sc->mii_ticks = 0;
  241                 mii_phy_auto(sc);
  242                 break;
  243         }
  244 
  245         /* Update the media status. */
  246         ciphy_status(sc);
  247 
  248         /*
  249          * Callback if something changed. Note that we need to poke
  250          * apply fixups for certain PHY revs.
  251          */
  252         if (sc->mii_media_active != mii->mii_media_active ||
  253             sc->mii_media_status != mii->mii_media_status ||
  254             cmd == MII_MEDIACHG) {
  255                 ciphy_fixup(sc);
  256         }
  257         mii_phy_update(sc, cmd);
  258         return (0);
  259 }
  260 
  261 static void
  262 ciphy_status(struct mii_softc *sc)
  263 {
  264         struct mii_data *mii = sc->mii_pdata;
  265         int bmsr, bmcr;
  266 
  267         mii->mii_media_status = IFM_AVALID;
  268         mii->mii_media_active = IFM_ETHER;
  269 
  270         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  271 
  272         if (bmsr & BMSR_LINK)
  273                 mii->mii_media_status |= IFM_ACTIVE;
  274 
  275         bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
  276 
  277         if (bmcr & CIPHY_BMCR_LOOP)
  278                 mii->mii_media_active |= IFM_LOOP;
  279 
  280         if (bmcr & CIPHY_BMCR_AUTOEN) {
  281                 if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
  282                         /* Erg, still trying, I guess... */
  283                         mii->mii_media_active |= IFM_NONE;
  284                         return;
  285                 }
  286         }
  287 
  288         bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
  289         switch (bmsr & CIPHY_AUXCSR_SPEED) {
  290         case CIPHY_SPEED10:
  291                 mii->mii_media_active |= IFM_10_T;
  292                 break;
  293         case CIPHY_SPEED100:
  294                 mii->mii_media_active |= IFM_100_TX;
  295                 break;
  296         case CIPHY_SPEED1000:
  297                 mii->mii_media_active |= IFM_1000_T;
  298                 break;
  299         default:
  300                 device_printf(sc->mii_dev, "unknown PHY speed %x\n",
  301                     bmsr & CIPHY_AUXCSR_SPEED);
  302                 break;
  303         }
  304 
  305         if (bmsr & CIPHY_AUXCSR_FDX)
  306                 mii->mii_media_active |= IFM_FDX;
  307         else
  308                 mii->mii_media_active |= IFM_HDX;
  309 
  310         if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
  311            (PHY_READ(sc, CIPHY_MII_1000STS) & CIPHY_1000STS_MSR) != 0)
  312                 mii->mii_media_active |= IFM_ETH_MASTER;
  313 }
  314 
  315 static void
  316 ciphy_reset(struct mii_softc *sc)
  317 {
  318 
  319         mii_phy_reset(sc);
  320         DELAY(1000);
  321 }
  322 
  323 #define PHY_SETBIT(x, y, z) \
  324         PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
  325 #define PHY_CLRBIT(x, y, z) \
  326         PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
  327 
  328 static void
  329 ciphy_fixup(struct mii_softc *sc)
  330 {
  331         uint16_t                model;
  332         uint16_t                status, speed;
  333         uint16_t                val;
  334 
  335         model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
  336         status = PHY_READ(sc, CIPHY_MII_AUXCSR);
  337         speed = status & CIPHY_AUXCSR_SPEED;
  338 
  339         if (strcmp(device_get_name(device_get_parent(sc->mii_dev)),
  340             "nfe") == 0) {
  341                 /* need to set for 2.5V RGMII for NVIDIA adapters */
  342                 val = PHY_READ(sc, CIPHY_MII_ECTL1);
  343                 val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL);
  344                 val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII);
  345                 PHY_WRITE(sc, CIPHY_MII_ECTL1, val);
  346                 /* From Linux. */
  347                 val = PHY_READ(sc, CIPHY_MII_AUXCSR);
  348                 val |= CIPHY_AUXCSR_MDPPS;
  349                 PHY_WRITE(sc, CIPHY_MII_AUXCSR, val);
  350                 val = PHY_READ(sc, CIPHY_MII_10BTCSR);
  351                 val |= CIPHY_10BTCSR_ECHO;
  352                 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val);
  353         }
  354 
  355         switch (model) {
  356         case MII_MODEL_CICADA_CS8204:
  357         case MII_MODEL_CICADA_CS8201:
  358 
  359                 /* Turn off "aux mode" (whatever that means) */
  360                 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
  361 
  362                 /*
  363                  * Work around speed polling bug in VT3119/VT3216
  364                  * when using MII in full duplex mode.
  365                  */
  366                 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
  367                     (status & CIPHY_AUXCSR_FDX)) {
  368                         PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
  369                 } else {
  370                         PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
  371                 }
  372 
  373                 /* Enable link/activity LED blink. */
  374                 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
  375 
  376                 break;
  377 
  378         case MII_MODEL_CICADA_CS8201A:
  379         case MII_MODEL_CICADA_CS8201B:
  380 
  381                 /*
  382                  * Work around speed polling bug in VT3119/VT3216
  383                  * when using MII in full duplex mode.
  384                  */
  385                 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
  386                     (status & CIPHY_AUXCSR_FDX)) {
  387                         PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
  388                 } else {
  389                         PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
  390                 }
  391 
  392                 break;
  393         case MII_MODEL_CICADA_VSC8211:
  394         case MII_MODEL_CICADA_CS8244:
  395         case MII_MODEL_VITESSE_VSC8601:
  396                 break;
  397         default:
  398                 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
  399                     model);
  400                 break;
  401         }
  402 }
Cache object: 3f414081329a7e2fb0010cb32dfeef5d
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.
FreeBSD/Linux Kernel Cross Reference sys/dev/mii/ciphy.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/ciphy.c
