ciphy.c

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    1 /*-
    2  * Copyright (c) 2004
    3  *      Bill Paul <wpaul@windriver.com>.  All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. All advertising materials mentioning features or use of this software
   14  *    must display the following acknowledgement:
   15  *      This product includes software developed by Bill Paul.
   16  * 4. Neither the name of the author nor the names of any co-contributors
   17  *    may be used to endorse or promote products derived from this software
   18  *    without specific prior written permission.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   30  * THE POSSIBILITY OF SUCH DAMAGE.
   31  */
   32 
   33 #include <sys/cdefs.h>
   34 __FBSDID("$FreeBSD$");
   35 
   36 /*
   37  * Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY.
   38  */
   39 
   40 #include <sys/param.h>
   41 #include <sys/systm.h>
   42 #include <sys/kernel.h>
   43 #include <sys/module.h>
   44 #include <sys/socket.h>
   45 #include <sys/bus.h>
   46 
   47 #include <net/if.h>
   48 #include <net/if_arp.h>
   49 #include <net/if_media.h>
   50 
   51 #include <dev/mii/mii.h>
   52 #include <dev/mii/miivar.h>
   53 #include "miidevs.h"
   54 
   55 #include <dev/mii/ciphyreg.h>
   56 
   57 #include "miibus_if.h"
   58 
   59 #include <machine/bus.h>
   60 
   61 static int ciphy_probe(device_t);
   62 static int ciphy_attach(device_t);
   63 
   64 static device_method_t ciphy_methods[] = {
   65         /* device interface */
   66         DEVMETHOD(device_probe,         ciphy_probe),
   67         DEVMETHOD(device_attach,        ciphy_attach),
   68         DEVMETHOD(device_detach,        mii_phy_detach),
   69         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   70         DEVMETHOD_END
   71 };
   72 
   73 static devclass_t ciphy_devclass;
   74 
   75 static driver_t ciphy_driver = {
   76         "ciphy",
   77         ciphy_methods,
   78         sizeof(struct mii_softc)
   79 };
   80 
   81 DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
   82 
   83 static int      ciphy_service(struct mii_softc *, struct mii_data *, int);
   84 static void     ciphy_status(struct mii_softc *);
   85 static void     ciphy_reset(struct mii_softc *);
   86 static void     ciphy_fixup(struct mii_softc *);
   87 
   88 static const struct mii_phydesc ciphys[] = {
   89         MII_PHY_DESC(xxCICADA, CS8201),
   90         MII_PHY_DESC(xxCICADA, CS8201A),
   91         MII_PHY_DESC(xxCICADA, CS8201B),
   92         MII_PHY_DESC(xxCICADA, CS8204),
   93         MII_PHY_DESC(xxCICADA, VSC8211),
   94         MII_PHY_DESC(xxCICADA, CS8244),
   95         MII_PHY_DESC(xxVITESSE, VSC8601),
   96         MII_PHY_END
   97 };
   98 
   99 static const struct mii_phy_funcs ciphy_funcs = {
  100         ciphy_service,
  101         ciphy_status,
  102         ciphy_reset
  103 };
  104 
  105 static int
  106 ciphy_probe(device_t dev)
  107 {
  108 
  109         return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT));
  110 }
  111 
  112 static int
  113 ciphy_attach(device_t dev)
  114 {
  115 
  116         mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
  117             &ciphy_funcs, 1);
  118         return (0);
  119 }
  120 
  121 static int
  122 ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  123 {
  124         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  125         int reg, speed, gig;
  126 
  127         switch (cmd) {
  128         case MII_POLLSTAT:
  129                 break;
  130 
  131         case MII_MEDIACHG:
  132                 /*
  133                  * If the interface is not up, don't do anything.
  134                  */
  135                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  136                         break;
  137 
  138                 ciphy_fixup(sc);        /* XXX hardware bug work-around */
  139 
  140                 switch (IFM_SUBTYPE(ife->ifm_media)) {
  141                 case IFM_AUTO:
  142 #ifdef foo
  143                         /*
  144                          * If we're already in auto mode, just return.
  145                          */
  146                         if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
  147                                 return (0);
  148 #endif
  149                         (void)mii_phy_auto(sc);
  150                         break;
  151                 case IFM_1000_T:
  152                         speed = CIPHY_S1000;
  153                         goto setit;
  154                 case IFM_100_TX:
  155                         speed = CIPHY_S100;
  156                         goto setit;
  157                 case IFM_10_T:
  158                         speed = CIPHY_S10;
  159 setit:
  160                         if ((ife->ifm_media & IFM_FDX) != 0) {
  161                                 speed |= CIPHY_BMCR_FDX;
  162                                 gig = CIPHY_1000CTL_AFD;
  163                         } else
  164                                 gig = CIPHY_1000CTL_AHD;
  165 
  166                         if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
  167                                 gig |= CIPHY_1000CTL_MSE;
  168                                 if ((ife->ifm_media & IFM_ETH_MASTER) != 0)
  169                                         gig |= CIPHY_1000CTL_MSC;
  170                                 speed |=
  171                                     CIPHY_BMCR_AUTOEN | CIPHY_BMCR_STARTNEG;
  172                         } else
  173                                 gig = 0;
  174                         PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
  175                         PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
  176                         PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
  177                         break;
  178                 case IFM_NONE:
  179                         PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
  180                         break;
  181                 default:
  182                         return (EINVAL);
  183                 }
  184                 break;
  185 
  186         case MII_TICK:
  187                 /*
  188                  * Is the interface even up?
  189                  */
  190                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  191                         return (0);
  192 
  193                 /*
  194                  * Only used for autonegotiation.
  195                  */
  196                 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
  197                         break;
  198 
  199                 /*
  200                  * Check to see if we have link.  If we do, we don't
  201                  * need to restart the autonegotiation process.  Read
  202                  * the BMSR twice in case it's latched.
  203                  */
  204                 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  205                 if (reg & BMSR_LINK)
  206                         break;
  207 
  208                 /* Announce link loss right after it happens. */
  209                 if (++sc->mii_ticks == 0)
  210                         break;
  211                 /*
  212                  * Only retry autonegotiation every mii_anegticks seconds.
  213                  */
  214                 if (sc->mii_ticks <= sc->mii_anegticks)
  215                         break;
  216 
  217                 sc->mii_ticks = 0;
  218                 mii_phy_auto(sc);
  219                 break;
  220         }
  221 
  222         /* Update the media status. */
  223         PHY_STATUS(sc);
  224 
  225         /*
  226          * Callback if something changed. Note that we need to poke
  227          * apply fixups for certain PHY revs.
  228          */
  229         if (sc->mii_media_active != mii->mii_media_active ||
  230             sc->mii_media_status != mii->mii_media_status ||
  231             cmd == MII_MEDIACHG) {
  232                 ciphy_fixup(sc);
  233         }
  234         mii_phy_update(sc, cmd);
  235         return (0);
  236 }
  237 
  238 static void
  239 ciphy_status(struct mii_softc *sc)
  240 {
  241         struct mii_data *mii = sc->mii_pdata;
  242         int bmsr, bmcr;
  243 
  244         mii->mii_media_status = IFM_AVALID;
  245         mii->mii_media_active = IFM_ETHER;
  246 
  247         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  248 
  249         if (bmsr & BMSR_LINK)
  250                 mii->mii_media_status |= IFM_ACTIVE;
  251 
  252         bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
  253 
  254         if (bmcr & CIPHY_BMCR_LOOP)
  255                 mii->mii_media_active |= IFM_LOOP;
  256 
  257         if (bmcr & CIPHY_BMCR_AUTOEN) {
  258                 if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
  259                         /* Erg, still trying, I guess... */
  260                         mii->mii_media_active |= IFM_NONE;
  261                         return;
  262                 }
  263         }
  264 
  265         bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
  266         switch (bmsr & CIPHY_AUXCSR_SPEED) {
  267         case CIPHY_SPEED10:
  268                 mii->mii_media_active |= IFM_10_T;
  269                 break;
  270         case CIPHY_SPEED100:
  271                 mii->mii_media_active |= IFM_100_TX;
  272                 break;
  273         case CIPHY_SPEED1000:
  274                 mii->mii_media_active |= IFM_1000_T;
  275                 break;
  276         default:
  277                 device_printf(sc->mii_dev, "unknown PHY speed %x\n",
  278                     bmsr & CIPHY_AUXCSR_SPEED);
  279                 break;
  280         }
  281 
  282         if (bmsr & CIPHY_AUXCSR_FDX)
  283                 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
  284         else
  285                 mii->mii_media_active |= IFM_HDX;
  286 
  287         if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
  288            (PHY_READ(sc, CIPHY_MII_1000STS) & CIPHY_1000STS_MSR) != 0)
  289                 mii->mii_media_active |= IFM_ETH_MASTER;
  290 }
  291 
  292 static void
  293 ciphy_reset(struct mii_softc *sc)
  294 {
  295 
  296         mii_phy_reset(sc);
  297         DELAY(1000);
  298 }
  299 
  300 #define PHY_SETBIT(x, y, z) \
  301         PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
  302 #define PHY_CLRBIT(x, y, z) \
  303         PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
  304 
  305 static void
  306 ciphy_fixup(struct mii_softc *sc)
  307 {
  308         uint16_t                model;
  309         uint16_t                status, speed;
  310         uint16_t                val;
  311 
  312         model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
  313         status = PHY_READ(sc, CIPHY_MII_AUXCSR);
  314         speed = status & CIPHY_AUXCSR_SPEED;
  315 
  316         if (strcmp(device_get_name(device_get_parent(sc->mii_dev)),
  317             "nfe") == 0) {
  318                 /* need to set for 2.5V RGMII for NVIDIA adapters */
  319                 val = PHY_READ(sc, CIPHY_MII_ECTL1);
  320                 val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL);
  321                 val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII);
  322                 PHY_WRITE(sc, CIPHY_MII_ECTL1, val);
  323                 /* From Linux. */
  324                 val = PHY_READ(sc, CIPHY_MII_AUXCSR);
  325                 val |= CIPHY_AUXCSR_MDPPS;
  326                 PHY_WRITE(sc, CIPHY_MII_AUXCSR, val);
  327                 val = PHY_READ(sc, CIPHY_MII_10BTCSR);
  328                 val |= CIPHY_10BTCSR_ECHO;
  329                 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val);
  330         }
  331 
  332         switch (model) {
  333         case MII_MODEL_xxCICADA_CS8204:
  334         case MII_MODEL_xxCICADA_CS8201:
  335 
  336                 /* Turn off "aux mode" (whatever that means) */
  337                 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
  338 
  339                 /*
  340                  * Work around speed polling bug in VT3119/VT3216
  341                  * when using MII in full duplex mode.
  342                  */
  343                 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
  344                     (status & CIPHY_AUXCSR_FDX)) {
  345                         PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
  346                 } else {
  347                         PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
  348                 }
  349 
  350                 /* Enable link/activity LED blink. */
  351                 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
  352 
  353                 break;
  354 
  355         case MII_MODEL_xxCICADA_CS8201A:
  356         case MII_MODEL_xxCICADA_CS8201B:
  357 
  358                 /*
  359                  * Work around speed polling bug in VT3119/VT3216
  360                  * when using MII in full duplex mode.
  361                  */
  362                 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
  363                     (status & CIPHY_AUXCSR_FDX)) {
  364                         PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
  365                 } else {
  366                         PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
  367                 }
  368 
  369                 break;
  370         case MII_MODEL_xxCICADA_VSC8211:
  371         case MII_MODEL_xxCICADA_CS8244:
  372         case MII_MODEL_xxVITESSE_VSC8601:
  373                 break;
  374         default:
  375                 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
  376                     model);
  377                 break;
  378         }
  379 }
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FreeBSD/Linux Kernel Cross Reference sys/dev/mii/ciphy.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/ciphy.c
