The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/icsphyreg.h

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    1 /*      $NetBSD: icsphyreg.h,v 1.2 2003/07/01 22:46:08 msaitoh Exp $    */
    2 
    3 /*-
    4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
    9  * NASA Ames Research Center.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   30  * POSSIBILITY OF SUCH DAMAGE.
   31  *
   32  * $FreeBSD$
   33  */
   34 
   35 #ifndef _DEV_MII_ICSPHYREG_H_
   36 #define _DEV_MII_ICSPHYREG_H_
   37 
   38 /*
   39  * ICS1890 registers.
   40  *      http://www.icst.com/pdf/18??.pdf
   41  */
   42 
   43 /* HEX                          1889    1890    1892    1893
   44  *--------------------------------------------------------------
   45  *  0 Control                   *       *       *       *
   46  *  1 Status                    *       *       *       *
   47  *  2 PHY Identifier            *       *       *       *
   48  *  3 PHY Identifier            *       *       *       *
   49  *  4 Auto-Neg. Advertisement           *       *       *
   50  *  5 Auto-Neg. Link Parent Adv         *       *       *
   51  *  6 Auto-Neg. Expansion               *       *       *
   52  *  7 Auto-Neg. Next Page Tx                    *       *
   53  *  8 ANg Nxt Page Lnk Parnt Abl                *       *
   54  * 10 Extended Control          *       *       *       *
   55  * 11 Quick Poll Status         *       *       *       *
   56  * 12 10Base-T Operation                *       *       *
   57  * 13 Extended Control2                 *       *       *
   58  */
   59 
   60 #define MII_ICSPHY_ECR          0x10    /* Extended Control Register */
   61 #define ECR_OVR                 0x8000  /* disable command reg overwrites */
   62 #define ECR_PHYADDR_MASK        0x07c0  /* PHY address mask */
   63 #define ECR_CTEST               0x0020  /* Stream Cipher Test Mode */
   64 #define ECR_IECT                0x0004  /* Invalid Error Code Test */
   65 #define ECR_SSD                 0x0001  /* Stream Cipher Disable */
   66 
   67 #define MII_ICSPHY_QPR          0x11    /* Quick Poll Register */
   68 #define QPR_SPEED               0x8000  /* 100Mbps */
   69 #define QPR_FDX                 0x4000  /* Full dupled */
   70 #define QPR_ANB2                0x2000  /* Autoneg monitor bit 2 */
   71 #define QPR_ANB1                0x1000  /* Autoneg monitor bit 1 */
   72 #define QPR_ANB0                0x0800  /* Autoneg monitor bit 0 */
   73 #define QPR_RXERR               0x0400  /* Receive signal lost */
   74 #define QPR_PLLERR              0x0200  /* PLL error */
   75 #define QPR_FCARR               0x0100  /* False carrier detected */
   76 #define QPR_INVALSYM            0x0080  /* Invalid Symbol Detected */
   77 #define QPR_HALT                0x0040  /* Halt Symbol Detected */
   78 #define QPR_PREEM               0x0020  /* Two Idle Symbols together */
   79 #define QPR_ACOMP               0x0010  /* Autonegotiation complete */
   80 #define QPR_SDETECT             0x0008  /* signal detect */
   81 #define QPR_JABBER              0x0004  /* Jabber detected */
   82 #define QPR_RFAULT              0x0002  /* Remote Fault */
   83 #define QPR_LINK                0x0001  /* Link */
   84 
   85 #define MII_ICSPHY_TTR          0x12    /* 10baseT Operations Register */
   86 #define TTR_RJABBER             0x8000  /* Remote Jabber */
   87 #define TTR_POLARITY            0x4000  /* Polarity Reversed */
   88 #define TTR_NOJABBER            0x0020  /* Disable Jabber Check */
   89 #define TTR_LOOP                0x0010  /* Loopback mode */
   90 #define TTR_NOAPOLARITY         0x0008  /* Disable auto polarity correction */
   91 #define TTR_NOSQE               0x0004  /* Disable SQE check */
   92 #define TTR_NOLINK              0x0002  /* Disable Link check */
   93 #define TTR_NOSQUELCH           0x0001  /* Disable squelch */
   94 
   95 
   96 /*
   97  * Extended Control Register 2
   98  *
   99  * HEX                                  1889    1890    1892    1893
  100  *-------------------------------------------------------------------
  101  * 8000 Node/Repeater Mode                      *       *       *
  102  * 4000 Hardware/Software Mode                  *       *       *
  103  * 2000 Link Partner Support Remote Flt         *
  104  * 2000 Remote Fault                                    *       *
  105  * 1000
  106  * 0800
  107  * 0400 Xmitted Remote Fault status             *
  108  * 0200
  109  * 0100
  110  * 0080 Tri-state Enable                                        *
  111  * 0040
  112  * 0020
  113  * 0010 A-N Powerup Remote Flt                  *
  114  * 0008
  115  * 0004
  116  * 0002 Automatic 10Base-T Power Down                   *
  117  * 0001 Automatic 100Base-TX Power Down         *       *       *
  118  */
  119 
  120 #define MII_ICSPHY_ECR2         0x13    /* Extended Control Register 2 */
  121 #define ECR2_REPEATER           0x8000  /* Repeater Mode */
  122 #define ECR2_HWSW               0x4000  /* hw/sw config priority */
  123 #define ECR2_LPRF               0x2000  /* link partner supports rem fault */
  124 #define ECR2_FORCERF            0x0400  /* Force transmit of rem fault */
  125 #define ECR2_RFPUP              0x0010  /* A-N Powerup Remote fault */
  126 #define ECR2_10AUTOPWRDN        0x0002  /* Automatic 10baseT power down */
  127 #define ECR2_100AUTOPWRDN       0x0001  /* Automatic 100baseTX power down */
  128 
  129 #endif /* _DEV_MII_ICSPHYREG_H_ */

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