FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/jmphy.c
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
12 * disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32
33 /*
34 * Driver for the JMicron JMP211 10/100/1000, JMP202 10/100 PHY.
35 */
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/socket.h>
42 #include <sys/bus.h>
43
44 #include <net/if.h>
45 #include <net/if_var.h>
46 #include <net/if_media.h>
47
48 #include <dev/mii/mii.h>
49 #include <dev/mii/miivar.h>
50 #include "miidevs.h"
51
52 #include <dev/mii/jmphyreg.h>
53
54 #include "miibus_if.h"
55
56 static int jmphy_probe(device_t);
57 static int jmphy_attach(device_t);
58 static void jmphy_reset(struct mii_softc *);
59 static uint16_t jmphy_anar(struct ifmedia_entry *);
60 static int jmphy_setmedia(struct mii_softc *, struct ifmedia_entry *);
61
62 static device_method_t jmphy_methods[] = {
63 /* Device interface. */
64 DEVMETHOD(device_probe, jmphy_probe),
65 DEVMETHOD(device_attach, jmphy_attach),
66 DEVMETHOD(device_detach, mii_phy_detach),
67 DEVMETHOD(device_shutdown, bus_generic_shutdown),
68 DEVMETHOD_END
69 };
70
71 static driver_t jmphy_driver = {
72 "jmphy",
73 jmphy_methods,
74 sizeof(struct mii_softc)
75 };
76
77 DRIVER_MODULE(jmphy, miibus, jmphy_driver, 0, 0);
78
79 static int jmphy_service(struct mii_softc *, struct mii_data *, int);
80 static void jmphy_status(struct mii_softc *);
81
82 static const struct mii_phydesc jmphys[] = {
83 MII_PHY_DESC(JMICRON, JMP202),
84 MII_PHY_DESC(JMICRON, JMP211),
85 MII_PHY_END
86 };
87
88 static const struct mii_phy_funcs jmphy_funcs = {
89 jmphy_service,
90 jmphy_status,
91 jmphy_reset
92 };
93
94 static int
95 jmphy_probe(device_t dev)
96 {
97
98 return (mii_phy_dev_probe(dev, jmphys, BUS_PROBE_DEFAULT));
99 }
100
101 static int
102 jmphy_attach(device_t dev)
103 {
104 u_int flags;
105
106 flags = 0;
107 if (mii_dev_mac_match(dev, "jme") &&
108 (miibus_get_flags(dev) & MIIF_MACPRIV0) != 0)
109 flags |= MIIF_PHYPRIV0;
110 mii_phy_dev_attach(dev, flags, &jmphy_funcs, 1);
111 return (0);
112 }
113
114 static int
115 jmphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
116 {
117 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
118
119 switch (cmd) {
120 case MII_POLLSTAT:
121 break;
122
123 case MII_MEDIACHG:
124 if (jmphy_setmedia(sc, ife) != EJUSTRETURN)
125 return (EINVAL);
126 break;
127
128 case MII_TICK:
129 /*
130 * Only used for autonegotiation.
131 */
132 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
133 sc->mii_ticks = 0;
134 break;
135 }
136
137 /* Check for link. */
138 if ((PHY_READ(sc, JMPHY_SSR) & JMPHY_SSR_LINK_UP) != 0) {
139 sc->mii_ticks = 0;
140 break;
141 }
142
143 /* Announce link loss right after it happens. */
144 if (sc->mii_ticks++ == 0)
145 break;
146 if (sc->mii_ticks <= sc->mii_anegticks)
147 return (0);
148
149 sc->mii_ticks = 0;
150 (void)jmphy_setmedia(sc, ife);
151 break;
152 }
153
154 /* Update the media status. */
155 PHY_STATUS(sc);
156
157 /* Callback if something changed. */
158 mii_phy_update(sc, cmd);
159 return (0);
160 }
161
162 static void
163 jmphy_status(struct mii_softc *sc)
164 {
165 struct mii_data *mii = sc->mii_pdata;
166 int bmcr, ssr;
167
168 mii->mii_media_status = IFM_AVALID;
169 mii->mii_media_active = IFM_ETHER;
170
171 ssr = PHY_READ(sc, JMPHY_SSR);
172 if ((ssr & JMPHY_SSR_LINK_UP) != 0)
173 mii->mii_media_status |= IFM_ACTIVE;
174
175 bmcr = PHY_READ(sc, MII_BMCR);
176 if ((bmcr & BMCR_ISO) != 0) {
177 mii->mii_media_active |= IFM_NONE;
178 mii->mii_media_status = 0;
179 return;
180 }
181
182 if ((bmcr & BMCR_LOOP) != 0)
183 mii->mii_media_active |= IFM_LOOP;
184
185 if ((ssr & JMPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
186 /* Erg, still trying, I guess... */
187 mii->mii_media_active |= IFM_NONE;
188 return;
189 }
190
191 switch ((ssr & JMPHY_SSR_SPEED_MASK)) {
192 case JMPHY_SSR_SPEED_1000:
193 mii->mii_media_active |= IFM_1000_T;
194 /*
195 * jmphy(4) got a valid link so reset mii_ticks.
196 * Resetting mii_ticks is needed in order to
197 * detect link loss after auto-negotiation.
198 */
199 sc->mii_ticks = 0;
200 break;
201 case JMPHY_SSR_SPEED_100:
202 mii->mii_media_active |= IFM_100_TX;
203 sc->mii_ticks = 0;
204 break;
205 case JMPHY_SSR_SPEED_10:
206 mii->mii_media_active |= IFM_10_T;
207 sc->mii_ticks = 0;
208 break;
209 default:
210 mii->mii_media_active |= IFM_NONE;
211 return;
212 }
213
214 if ((ssr & JMPHY_SSR_DUPLEX) != 0)
215 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
216 else
217 mii->mii_media_active |= IFM_HDX;
218
219 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
220 if ((PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0)
221 mii->mii_media_active |= IFM_ETH_MASTER;
222 }
223 }
224
225 static void
226 jmphy_reset(struct mii_softc *sc)
227 {
228 uint16_t t2cr, val;
229 int i;
230
231 /* Disable sleep mode. */
232 PHY_WRITE(sc, JMPHY_TMCTL,
233 PHY_READ(sc, JMPHY_TMCTL) & ~JMPHY_TMCTL_SLEEP_ENB);
234 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);
235
236 for (i = 0; i < 1000; i++) {
237 DELAY(1);
238 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
239 break;
240 }
241 /* Perform vendor recommended PHY calibration. */
242 if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) {
243 /* Select PHY test mode 1. */
244 t2cr = PHY_READ(sc, MII_100T2CR);
245 t2cr &= ~GTCR_TEST_MASK;
246 t2cr |= 0x2000;
247 PHY_WRITE(sc, MII_100T2CR, t2cr);
248 /* Apply calibration patch. */
249 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_READ |
250 JMPHY_EXT_COMM_2);
251 val = PHY_READ(sc, JMPHY_SPEC_DATA);
252 val &= ~0x0002;
253 val |= 0x0010 | 0x0001;
254 PHY_WRITE(sc, JMPHY_SPEC_DATA, val);
255 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_WRITE |
256 JMPHY_EXT_COMM_2);
257
258 /* XXX 20ms to complete recalibration. */
259 DELAY(20 * 1000);
260
261 PHY_READ(sc, MII_100T2CR);
262 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_READ |
263 JMPHY_EXT_COMM_2);
264 val = PHY_READ(sc, JMPHY_SPEC_DATA);
265 val &= ~(0x0001 | 0x0002 | 0x0010);
266 PHY_WRITE(sc, JMPHY_SPEC_DATA, val);
267 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_WRITE |
268 JMPHY_EXT_COMM_2);
269 /* Disable PHY test mode. */
270 PHY_READ(sc, MII_100T2CR);
271 t2cr &= ~GTCR_TEST_MASK;
272 PHY_WRITE(sc, MII_100T2CR, t2cr);
273 }
274 }
275
276 static uint16_t
277 jmphy_anar(struct ifmedia_entry *ife)
278 {
279 uint16_t anar;
280
281 anar = 0;
282 switch (IFM_SUBTYPE(ife->ifm_media)) {
283 case IFM_AUTO:
284 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
285 break;
286 case IFM_1000_T:
287 break;
288 case IFM_100_TX:
289 anar |= ANAR_TX | ANAR_TX_FD;
290 break;
291 case IFM_10_T:
292 anar |= ANAR_10 | ANAR_10_FD;
293 break;
294 default:
295 break;
296 }
297
298 return (anar);
299 }
300
301 static int
302 jmphy_setmedia(struct mii_softc *sc, struct ifmedia_entry *ife)
303 {
304 uint16_t anar, bmcr, gig;
305
306 gig = 0;
307 bmcr = PHY_READ(sc, MII_BMCR);
308 switch (IFM_SUBTYPE(ife->ifm_media)) {
309 case IFM_AUTO:
310 gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
311 break;
312 case IFM_1000_T:
313 gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
314 break;
315 case IFM_100_TX:
316 case IFM_10_T:
317 break;
318 case IFM_NONE:
319 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN);
320 return (EJUSTRETURN);
321 default:
322 return (EINVAL);
323 }
324
325 anar = jmphy_anar(ife);
326 if ((IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO ||
327 (ife->ifm_media & IFM_FDX) != 0) &&
328 ((ife->ifm_media & IFM_FLOW) != 0 ||
329 (sc->mii_flags & MIIF_FORCEPAUSE) != 0))
330 anar |= ANAR_PAUSE_TOWARDS;
331
332 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) {
333 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
334 gig |= GTCR_MAN_MS;
335 if ((ife->ifm_media & IFM_ETH_MASTER) != 0)
336 gig |= GTCR_ADV_MS;
337 }
338 PHY_WRITE(sc, MII_100T2CR, gig);
339 }
340 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
341 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
342
343 return (EJUSTRETURN);
344 }
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